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dt-bindings: clock: Add "qcom,adsp-pil-mode" property

When this property is set, the remoteproc is used to boot the
LPASS and therefore lpass_q6ss_ahbm_clk and lpass_q6ss_ahbs_clk
clocks would be used to bring LPASS out of reset and the rest of
the lpass clocks would be controlled directly by the remoteproc.

This is a cleanup done to handle overlap of regmap of
lpasscc and lpass_aon blocks.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-2-git-send-email-quic_c_skakit@quicinc.com

authored by

Taniya Das and committed by
Bjorn Andersson 7afdf3af 568035b0

+9 -4
+2 -4
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
··· 36 36 items: 37 37 - description: LPASS qdsp6ss register 38 38 - description: LPASS top-cc register 39 - - description: LPASS cc register 40 39 41 40 reg-names: 42 41 items: 43 42 - const: qdsp6ss 44 43 - const: top_cc 45 - - const: cc 46 44 47 45 required: 48 46 - compatible ··· 57 59 #include <dt-bindings/clock/qcom,lpass-sc7280.h> 58 60 clock-controller@3000000 { 59 61 compatible = "qcom,sc7280-lpasscc"; 60 - reg = <0x03000000 0x40>, <0x03c04000 0x4>, <0x03389000 0x24>; 61 - reg-names = "qdsp6ss", "top_cc", "cc"; 62 + reg = <0x03000000 0x40>, <0x03c04000 0x4>; 63 + reg-names = "qdsp6ss", "top_cc"; 62 64 clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; 63 65 clock-names = "iface"; 64 66 #clock-cells = <1>;
+7
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
··· 41 41 reg: 42 42 maxItems: 1 43 43 44 + qcom,adsp-pil-mode: 45 + description: 46 + Indicates if the LPASS would be brought out of reset using 47 + peripheral loader. 48 + type: boolean 49 + 44 50 required: 45 51 - compatible 46 52 - reg ··· 171 165 clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, 172 166 <&lpasscore LPASS_CORE_CC_CORE_CLK>; 173 167 clock-names = "bi_tcxo", "bi_tcxo_ao","iface"; 168 + qcom,adsp-pil-mode; 174 169 #clock-cells = <1>; 175 170 #power-domain-cells = <1>; 176 171 };