Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze

* 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze:
microblaze: Fix out_le32() macro
microblaze: Fix cache loop function for cache range

+9 -20
+1 -1
arch/microblaze/include/asm/io.h
··· 217 217 * Little endian 218 218 */ 219 219 220 - #define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a)); 220 + #define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a)) 221 221 #define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a)) 222 222 223 223 #define in_le32(a) __le32_to_cpu(__raw_readl(a))
+8 -19
arch/microblaze/kernel/cpu/cache.c
··· 172 172 /* It is used only first parameter for OP - for wic, wdc */ 173 173 #define CACHE_RANGE_LOOP_1(start, end, line_length, op) \ 174 174 do { \ 175 - int step = -line_length; \ 176 - int count = end - start; \ 177 - BUG_ON(count <= 0); \ 175 + int volatile temp; \ 176 + BUG_ON(end - start <= 0); \ 178 177 \ 179 - __asm__ __volatile__ (" 1: addk %0, %0, %1; \ 180 - " #op " %0, r0; \ 181 - bgtid %1, 1b; \ 182 - addk %1, %1, %2; \ 183 - " : : "r" (start), "r" (count), \ 184 - "r" (step) : "memory"); \ 178 + __asm__ __volatile__ (" 1: " #op " %1, r0; \ 179 + cmpu %0, %1, %2; \ 180 + bgtid %0, 1b; \ 181 + addk %1, %1, %3; \ 182 + " : : "r" (temp), "r" (start), "r" (end),\ 183 + "r" (line_length) : "memory"); \ 185 184 } while (0); 186 185 187 186 static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end) ··· 312 313 pr_debug("%s\n", __func__); 313 314 CACHE_ALL_LOOP2(cpuinfo.dcache_size, cpuinfo.dcache_line_length, 314 315 wdc.clear) 315 - 316 - #if 0 317 - unsigned int i; 318 - 319 - pr_debug("%s\n", __func__); 320 - 321 - /* Just loop through cache size and invalidate it */ 322 - for (i = 0; i < cpuinfo.dcache_size; i += cpuinfo.dcache_line_length) 323 - __invalidate_dcache(0, i); 324 - #endif 325 316 } 326 317 327 318 static void __invalidate_dcache_range_wb(unsigned long start,