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dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges

Ensure cxl_acpi has published CXL Window resources before HMEM walks Soft
Reserved ranges.

Replace MODULE_SOFTDEP("pre: cxl_acpi") with an explicit, synchronous
request_module("cxl_acpi"). MODULE_SOFTDEP() only guarantees eventual
loading, it does not enforce that the dependency has finished init
before the current module runs. This can cause HMEM to start before
cxl_acpi has populated the resource tree, breaking detection of overlaps
between Soft Reserved and CXL Windows.

Also, request cxl_pci before HMEM walks Soft Reserved ranges. Unlike
cxl_acpi, cxl_pci attach is asynchronous and creates dependent devices
that trigger further module loads. Asynchronous probe flushing
(wait_for_device_probe()) is added later in the series in a deferred
context before HMEM makes ownership decisions for Soft Reserved ranges.

Add an additional explicit Kconfig ordering so that CXL_ACPI and CXL_PCI
must be initialized before DEV_DAX_HMEM. This prevents HMEM from consuming
Soft Reserved ranges before CXL drivers have had a chance to claim them.

Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Tested-by: Tomasz Wolski <tomasz.wolski@fujitsu.com>
Link: https://patch.msgid.link/20260322195343.206900-4-Smita.KoralahalliChannabasappa@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

authored by

Dan Williams and committed by
Dave Jiang 7b4bcaad 116be1e1

+12 -7
+2
drivers/dax/Kconfig
··· 48 48 tristate "CXL DAX: direct access to CXL RAM regions" 49 49 depends on CXL_BUS && CXL_REGION && DEV_DAX 50 50 default CXL_REGION && DEV_DAX 51 + depends on CXL_ACPI >= DEV_DAX_HMEM 52 + depends on CXL_PCI >= DEV_DAX_HMEM 51 53 help 52 54 CXL RAM regions are either mapped by platform-firmware 53 55 and published in the initial system-memory map as "System RAM", mapped
+10 -7
drivers/dax/hmem/hmem.c
··· 145 145 { 146 146 int rc; 147 147 148 + /* 149 + * Ensure that cxl_acpi and cxl_pci have a chance to kick off 150 + * CXL topology discovery at least once before scanning the 151 + * iomem resource tree for IORES_DESC_CXL resources. 152 + */ 153 + if (IS_ENABLED(CONFIG_DEV_DAX_CXL)) { 154 + request_module("cxl_acpi"); 155 + request_module("cxl_pci"); 156 + } 157 + 148 158 rc = platform_driver_register(&dax_hmem_platform_driver); 149 159 if (rc) 150 160 return rc; ··· 174 164 175 165 module_init(dax_hmem_init); 176 166 module_exit(dax_hmem_exit); 177 - 178 - /* Allow for CXL to define its own dax regions */ 179 - #if IS_ENABLED(CONFIG_CXL_REGION) 180 - #if IS_MODULE(CONFIG_CXL_ACPI) 181 - MODULE_SOFTDEP("pre: cxl_acpi"); 182 - #endif 183 - #endif 184 167 185 168 MODULE_ALIAS("platform:hmem*"); 186 169 MODULE_ALIAS("platform:hmem_platform*");