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drm/amdgpu/gfx9: drop unnecessary 64-bit fence flag check in KIQ

Remove the BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT) assertion from
gfx_v9_0_ring_emit_fence_kiq(). The KIQ hardware supports 64-bit
fence writes; the 32-bit writeback address constraint is an
upper-layer convention, not a hardware limitation. The check serves
no purpose and should not be present.

Found by code inspection while investigating related BUG_ON
assertions in the GFX and compute ring emission paths.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: John B. Moore <jbmoore61@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 1b1101a46a426bb4328116bb5273c326a2780389)
Cc: stable@vger.kernel.org

authored by

John B. Moore and committed by
Alex Deucher 7bbfb255 9b4e3495

-3
-3
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
··· 5660 5660 { 5661 5661 struct amdgpu_device *adev = ring->adev; 5662 5662 5663 - /* we only allocate 32bit for each seq wb address */ 5664 - BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT); 5665 - 5666 5663 /* write fence seq to the "addr" */ 5667 5664 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); 5668 5665 amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |