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Merge tag 'v6.19-rc3' into driver-core-next

We need the driver-core fixes in here as well to build on top of.

Signed-off-by: Danilo Krummrich <dakr@kernel.org>

+4428 -2356
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.clang-format
··· 748 748 - 'ynl_attr_for_each_nested' 749 749 - 'ynl_attr_for_each_payload' 750 750 - 'zorro_for_each_dev' 751 + - 'zpci_bus_for_each' 751 752 752 753 IncludeBlocks: Preserve 753 754 IncludeCategories:
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CREDITS
··· 1987 1987 D: netfilter: raw table 1988 1988 D: netfilter: iprange match 1989 1989 D: netfilter: new logging interfaces 1990 + D: netfilter: ipset 1990 1991 D: netfilter: various other hacks 1991 1992 S: Tata 1992 1993 S: Hungary
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Documentation/admin-guide/blockdev/zoned_loop.rst
··· 134 134 135 135 $ modprobe zloop 136 136 $ mkdir -p /var/local/zloop/0 137 - $ echo "add capacity_mb=2048,zone_size_mb=64,zone_capacity=63MB" > /dev/zloop-control 137 + $ echo "add capacity_mb=2048,zone_size_mb=64,zone_capacity_mb=63" > /dev/zloop-control 138 138 139 139 For the device created (/dev/zloop0), the zone backing files are all created 140 140 under the default base directory (/var/local/zloop)::
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Documentation/arch/riscv/hwprobe.rst
··· 281 281 * :c:macro:`RISCV_HWPROBE_EXT_ZICBOP`: The Zicbop extension is supported, as 282 282 ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs. 283 283 284 + * :c:macro:`RISCV_HWPROBE_EXT_ZILSD`: The Zilsd extension is supported as 285 + defined in the RISC-V ISA manual starting from commit f88abf1 ("Integrating 286 + load/store pair for RV32 with the main manual") of the riscv-isa-manual. 287 + 288 + * :c:macro:`RISCV_HWPROBE_EXT_ZCLSD`: The Zclsd extension is supported as 289 + defined in the RISC-V ISA manual starting from commit f88abf1 ("Integrating 290 + load/store pair for RV32 with the main manual") of the riscv-isa-manual. 291 + 284 292 * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to 285 293 :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was 286 294 mistakenly classified as a bitmask rather than a value.
+96 -96
Documentation/arch/x86/boot.rst
··· 95 95 The traditional memory map for the kernel loader, used for Image or 96 96 zImage kernels, typically looks like:: 97 97 98 - | | 98 + | | 99 99 0A0000 +------------------------+ 100 - | Reserved for BIOS | Do not use. Reserved for BIOS EBDA. 100 + | Reserved for BIOS | Do not use. Reserved for BIOS EBDA. 101 101 09A000 +------------------------+ 102 - | Command line | 103 - | Stack/heap | For use by the kernel real-mode code. 102 + | Command line | 103 + | Stack/heap | For use by the kernel real-mode code. 104 104 098000 +------------------------+ 105 - | Kernel setup | The kernel real-mode code. 105 + | Kernel setup | The kernel real-mode code. 106 106 090200 +------------------------+ 107 - | Kernel boot sector | The kernel legacy boot sector. 107 + | Kernel boot sector | The kernel legacy boot sector. 108 108 090000 +------------------------+ 109 - | Protected-mode kernel | The bulk of the kernel image. 109 + | Protected-mode kernel | The bulk of the kernel image. 110 110 010000 +------------------------+ 111 - | Boot loader | <- Boot sector entry point 0000:7C00 111 + | Boot loader | <- Boot sector entry point 0000:7C00 112 112 001000 +------------------------+ 113 - | Reserved for MBR/BIOS | 113 + | Reserved for MBR/BIOS | 114 114 000800 +------------------------+ 115 - | Typically used by MBR | 115 + | Typically used by MBR | 116 116 000600 +------------------------+ 117 - | BIOS use only | 117 + | BIOS use only | 118 118 000000 +------------------------+ 119 119 120 120 When using bzImage, the protected-mode kernel was relocated to ··· 142 142 For a modern bzImage kernel with boot protocol version >= 2.02, a 143 143 memory layout like the following is suggested:: 144 144 145 - ~ ~ 146 - | Protected-mode kernel | 145 + ~ ~ 146 + | Protected-mode kernel | 147 147 100000 +------------------------+ 148 - | I/O memory hole | 148 + | I/O memory hole | 149 149 0A0000 +------------------------+ 150 - | Reserved for BIOS | Leave as much as possible unused 151 - ~ ~ 152 - | Command line | (Can also be below the X+10000 mark) 150 + | Reserved for BIOS | Leave as much as possible unused 151 + ~ ~ 152 + | Command line | (Can also be below the X+10000 mark) 153 153 X+10000 +------------------------+ 154 - | Stack/heap | For use by the kernel real-mode code. 154 + | Stack/heap | For use by the kernel real-mode code. 155 155 X+08000 +------------------------+ 156 - | Kernel setup | The kernel real-mode code. 157 - | Kernel boot sector | The kernel legacy boot sector. 156 + | Kernel setup | The kernel real-mode code. 157 + | Kernel boot sector | The kernel legacy boot sector. 158 158 X +------------------------+ 159 - | Boot loader | <- Boot sector entry point 0000:7C00 159 + | Boot loader | <- Boot sector entry point 0000:7C00 160 160 001000 +------------------------+ 161 - | Reserved for MBR/BIOS | 161 + | Reserved for MBR/BIOS | 162 162 000800 +------------------------+ 163 - | Typically used by MBR | 163 + | Typically used by MBR | 164 164 000600 +------------------------+ 165 - | BIOS use only | 165 + | BIOS use only | 166 166 000000 +------------------------+ 167 167 168 168 ... where the address X is as low as the design of the boot loader permits. ··· 433 433 434 434 Assigned boot loader IDs: 435 435 436 - == ======================================= 436 + ==== ======================================= 437 437 0x0 LILO 438 438 (0x00 reserved for pre-2.00 bootloader) 439 439 0x1 Loadlin ··· 456 456 <http://sebastian-plotz.blogspot.de> 457 457 0x12 OVMF UEFI virtualization stack 458 458 0x13 barebox 459 - == ======================================= 459 + ==== ======================================= 460 460 461 461 Please contact <hpa@zytor.com> if you need a bootloader ID value assigned. 462 462 ··· 809 809 as follow:: 810 810 811 811 struct setup_data { 812 - __u64 next; 813 - __u32 type; 814 - __u32 len; 815 - __u8 data[]; 812 + __u64 next; 813 + __u32 type; 814 + __u32 len; 815 + __u8 data[]; 816 816 } 817 - 817 + 818 818 Where, the next is a 64-bit physical pointer to the next node of 819 819 linked list, the next field of the last node is 0; the type is used 820 820 to identify the contents of data; the len is the length of data ··· 835 835 protocol 2.15:: 836 836 837 837 struct setup_indirect { 838 - __u32 type; 839 - __u32 reserved; /* Reserved, must be set to zero. */ 840 - __u64 len; 841 - __u64 addr; 838 + __u32 type; 839 + __u32 reserved; /* Reserved, must be set to zero. */ 840 + __u64 len; 841 + __u64 addr; 842 842 }; 843 843 844 844 The type member is a SETUP_INDIRECT | SETUP_* type. However, it cannot be ··· 850 850 In this case setup_data and setup_indirect will look like this:: 851 851 852 852 struct setup_data { 853 - .next = 0, /* or <addr_of_next_setup_data_struct> */ 854 - .type = SETUP_INDIRECT, 855 - .len = sizeof(setup_indirect), 856 - .data[sizeof(setup_indirect)] = (struct setup_indirect) { 857 - .type = SETUP_INDIRECT | SETUP_E820_EXT, 858 - .reserved = 0, 859 - .len = <len_of_SETUP_E820_EXT_data>, 860 - .addr = <addr_of_SETUP_E820_EXT_data>, 861 - }, 853 + .next = 0, /* or <addr_of_next_setup_data_struct> */ 854 + .type = SETUP_INDIRECT, 855 + .len = sizeof(setup_indirect), 856 + .data[sizeof(setup_indirect)] = (struct setup_indirect) { 857 + .type = SETUP_INDIRECT | SETUP_E820_EXT, 858 + .reserved = 0, 859 + .len = <len_of_SETUP_E820_EXT_data>, 860 + .addr = <addr_of_SETUP_E820_EXT_data>, 861 + }, 862 862 } 863 863 864 864 .. note:: ··· 897 897 The kernel runtime start address is determined by the following algorithm:: 898 898 899 899 if (relocatable_kernel) { 900 - if (load_address < pref_address) 901 - load_address = pref_address; 902 - runtime_start = align_up(load_address, kernel_alignment); 900 + if (load_address < pref_address) 901 + load_address = pref_address; 902 + runtime_start = align_up(load_address, kernel_alignment); 903 903 } else { 904 - runtime_start = pref_address; 904 + runtime_start = pref_address; 905 905 } 906 906 907 907 Hence the necessary memory window location and size can be estimated by ··· 975 975 be prefixed with header/magic and its size, e.g.:: 976 976 977 977 kernel_info: 978 - .ascii "LToP" /* Header, Linux top (structure). */ 979 - .long kernel_info_var_len_data - kernel_info 980 - .long kernel_info_end - kernel_info 981 - .long 0x01234567 /* Some fixed size data for the bootloaders. */ 978 + .ascii "LToP" /* Header, Linux top (structure). */ 979 + .long kernel_info_var_len_data - kernel_info 980 + .long kernel_info_end - kernel_info 981 + .long 0x01234567 /* Some fixed size data for the bootloaders. */ 982 982 kernel_info_var_len_data: 983 983 example_struct: /* Some variable size data for the bootloaders. */ 984 - .ascii "0123" /* Header/Magic. */ 985 - .long example_struct_end - example_struct 986 - .ascii "Struct" 987 - .long 0x89012345 984 + .ascii "0123" /* Header/Magic. */ 985 + .long example_struct_end - example_struct 986 + .ascii "Struct" 987 + .long 0x89012345 988 988 example_struct_end: 989 989 example_strings: /* Some variable size data for the bootloaders. */ 990 - .ascii "ABCD" /* Header/Magic. */ 991 - .long example_strings_end - example_strings 992 - .asciz "String_0" 993 - .asciz "String_1" 990 + .ascii "ABCD" /* Header/Magic. */ 991 + .long example_strings_end - example_strings 992 + .asciz "String_0" 993 + .asciz "String_1" 994 994 example_strings_end: 995 995 kernel_info_end: 996 996 ··· 1132 1132 unsigned long base_ptr; /* base address for real-mode segment */ 1133 1133 1134 1134 if (setup_sects == 0) 1135 - setup_sects = 4; 1135 + setup_sects = 4; 1136 1136 1137 1137 if (protocol >= 0x0200) { 1138 - type_of_loader = <type code>; 1139 - if (loading_initrd) { 1140 - ramdisk_image = <initrd_address>; 1141 - ramdisk_size = <initrd_size>; 1142 - } 1138 + type_of_loader = <type code>; 1139 + if (loading_initrd) { 1140 + ramdisk_image = <initrd_address>; 1141 + ramdisk_size = <initrd_size>; 1142 + } 1143 1143 1144 - if (protocol >= 0x0202 && loadflags & 0x01) 1145 - heap_end = 0xe000; 1146 - else 1147 - heap_end = 0x9800; 1144 + if (protocol >= 0x0202 && loadflags & 0x01) 1145 + heap_end = 0xe000; 1146 + else 1147 + heap_end = 0x9800; 1148 1148 1149 - if (protocol >= 0x0201) { 1150 - heap_end_ptr = heap_end - 0x200; 1151 - loadflags |= 0x80; /* CAN_USE_HEAP */ 1152 - } 1149 + if (protocol >= 0x0201) { 1150 + heap_end_ptr = heap_end - 0x200; 1151 + loadflags |= 0x80; /* CAN_USE_HEAP */ 1152 + } 1153 1153 1154 - if (protocol >= 0x0202) { 1155 - cmd_line_ptr = base_ptr + heap_end; 1156 - strcpy(cmd_line_ptr, cmdline); 1157 - } else { 1158 - cmd_line_magic = 0xA33F; 1159 - cmd_line_offset = heap_end; 1160 - setup_move_size = heap_end + strlen(cmdline) + 1; 1161 - strcpy(base_ptr + cmd_line_offset, cmdline); 1162 - } 1154 + if (protocol >= 0x0202) { 1155 + cmd_line_ptr = base_ptr + heap_end; 1156 + strcpy(cmd_line_ptr, cmdline); 1157 + } else { 1158 + cmd_line_magic = 0xA33F; 1159 + cmd_line_offset = heap_end; 1160 + setup_move_size = heap_end + strlen(cmdline) + 1; 1161 + strcpy(base_ptr + cmd_line_offset, cmdline); 1162 + } 1163 1163 } else { 1164 - /* Very old kernel */ 1164 + /* Very old kernel */ 1165 1165 1166 - heap_end = 0x9800; 1166 + heap_end = 0x9800; 1167 1167 1168 - cmd_line_magic = 0xA33F; 1169 - cmd_line_offset = heap_end; 1168 + cmd_line_magic = 0xA33F; 1169 + cmd_line_offset = heap_end; 1170 1170 1171 - /* A very old kernel MUST have its real-mode code loaded at 0x90000 */ 1172 - if (base_ptr != 0x90000) { 1173 - /* Copy the real-mode kernel */ 1174 - memcpy(0x90000, base_ptr, (setup_sects + 1) * 512); 1175 - base_ptr = 0x90000; /* Relocated */ 1176 - } 1171 + /* A very old kernel MUST have its real-mode code loaded at 0x90000 */ 1172 + if (base_ptr != 0x90000) { 1173 + /* Copy the real-mode kernel */ 1174 + memcpy(0x90000, base_ptr, (setup_sects + 1) * 512); 1175 + base_ptr = 0x90000; /* Relocated */ 1176 + } 1177 1177 1178 - strcpy(0x90000 + cmd_line_offset, cmdline); 1178 + strcpy(0x90000 + cmd_line_offset, cmdline); 1179 1179 1180 - /* It is recommended to clear memory up to the 32K mark */ 1181 - memset(0x90000 + (setup_sects + 1) * 512, 0, (64 - (setup_sects + 1)) * 512); 1180 + /* It is recommended to clear memory up to the 32K mark */ 1181 + memset(0x90000 + (setup_sects + 1) * 512, 0, (64 - (setup_sects + 1)) * 512); 1182 1182 } 1183 1183 1184 1184
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Documentation/devicetree/bindings/arm/arm,integrator.yaml
··· 7 7 title: ARM Integrator Boards 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: |+ 13 13 These were the first ARM platforms officially supported by ARM Ltd.
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Documentation/devicetree/bindings/arm/arm,realview.yaml
··· 7 7 title: ARM RealView Boards 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: |+ 13 13 The ARM RealView series of reference designs were built to explore the Arm11,
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Documentation/devicetree/bindings/arm/arm,scu.yaml
··· 7 7 title: ARM Snoop Control Unit (SCU) 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
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Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml
··· 7 7 title: Arm Versatile system registers 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 This is a system control registers block, providing multiple low level
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Documentation/devicetree/bindings/arm/arm,versatile.yaml
··· 7 7 title: ARM Versatile Boards 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: |+ 13 13 The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards
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Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml
··· 8 8 9 9 maintainers: 10 10 - Sudeep Holla <sudeep.holla@arm.com> 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: |+ 14 14 ARM's Versatile Express platform were built as reference designs for exploring
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Documentation/devicetree/bindings/arm/gemini.yaml
··· 20 20 Many of the IP blocks used in the SoC comes from Faraday Technology. 21 21 22 22 maintainers: 23 - - Linus Walleij <linus.walleij@linaro.org> 23 + - Linus Walleij <linusw@kernel.org> 24 24 25 25 properties: 26 26 $nodename:
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Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml
··· 7 7 title: Intel IXP4xx 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 properties: 13 13 $nodename:
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Documentation/devicetree/bindings/arm/ux500.yaml
··· 7 7 title: Ux500 platforms 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 properties: 13 13 $nodename:
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Documentation/devicetree/bindings/ata/ata-generic.yaml
··· 7 7 title: Generic Parallel ATA Controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 Generic Parallel ATA controllers supporting PIO modes only.
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Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml
··· 7 7 title: Cortina Systems Gemini SATA Bridge 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
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Documentation/devicetree/bindings/ata/faraday,ftide010.yaml
··· 7 7 title: Faraday Technology FTIDE010 PATA controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 This controller is the first Faraday IDE interface block, used in the
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Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml
··· 7 7 title: Intel IXP4xx CompactFlash Card Controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 The IXP4xx network processors have a CompactFlash interface that presents
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Documentation/devicetree/bindings/ata/pata-common.yaml
··· 7 7 title: Common Properties for Parallel AT attachment (PATA) controllers 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 This document defines device tree properties common to most Parallel
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Documentation/devicetree/bindings/ata/sata-common.yaml
··· 7 7 title: Common Properties for Serial AT attachment (SATA) controllers 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 This document defines device tree properties common to most Serial
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Documentation/devicetree/bindings/auxdisplay/arm,versatile-lcd.yaml
··· 7 7 title: ARM Versatile Character LCD 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Rob Herring <robh@kernel.org> 12 12 13 13 description:
-26
Documentation/devicetree/bindings/clock/sprd,sc9860-clk.yaml
··· 114 114 - reg 115 115 properties: 116 116 sprd,syscon: false 117 - - if: 118 - properties: 119 - compatible: 120 - contains: 121 - enum: 122 - - sprd,sc9860-agcp-gate 123 - - sprd,sc9860-aon-gate 124 - - sprd,sc9860-apahb-gate 125 - - sprd,sc9860-apapb-gate 126 - - sprd,sc9860-cam-gate 127 - - sprd,sc9860-disp-gate 128 - - sprd,sc9860-pll 129 - - sprd,sc9860-pmu-gate 130 - - sprd,sc9860-vsp-gate 131 - then: 132 - required: 133 - - sprd,syscon 134 - properties: 135 - reg: false 136 117 137 118 additionalProperties: false 138 119 ··· 122 141 soc { 123 142 #address-cells = <2>; 124 143 #size-cells = <2>; 125 - 126 - pmu-gate { 127 - compatible = "sprd,sc9860-pmu-gate"; 128 - clocks = <&ext_26m>; 129 - #clock-cells = <1>; 130 - sprd,syscon = <&pmu_regs>; 131 - }; 132 144 133 145 clock-controller@20000000 { 134 146 compatible = "sprd,sc9860-ap-clk";
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Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml
··· 8 8 9 9 maintainers: 10 10 - Ulf Hansson <ulf.hansson@linaro.org> 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: While named "U8500 clocks" these clocks are inside the 14 14 DB8500 digital baseband system-on-chip and its siblings such as
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Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml
··· 8 8 title: Intel IXP4xx cryptographic engine 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: | 14 14 The Intel IXP4xx cryptographic engine makes use of the IXP4xx NPE
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Documentation/devicetree/bindings/display/dsi-controller.yaml
··· 7 7 title: Common Properties for DSI Display Panels 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 This document defines device tree properties common to DSI, Display
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Documentation/devicetree/bindings/display/faraday,tve200.yaml
··· 7 7 title: Faraday TV Encoder TVE200 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 properties: 13 13 compatible:
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Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml
··· 7 7 title: Arm RTSM Virtual Platforms Display 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: panel-common.yaml#
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Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml
··· 7 7 title: ARM Versatile TFT Panels 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 These panels are connected to the daughterboards found on the
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Documentation/devicetree/bindings/display/panel/ilitek,ili9322.yaml
··· 7 7 title: Ilitek ILI9322 TFT panel driver with SPI control bus 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 This is a driver for 320x240 TFT panels, accepting a variety of input
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Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml
··· 7 7 title: Novatek NT35510-based display panels 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: panel-common.yaml#
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Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml
··· 11 11 used with internal or external backlight control. 12 12 13 13 maintainers: 14 - - Linus Walleij <linus.walleij@linaro.org> 14 + - Linus Walleij <linusw@kernel.org> 15 15 16 16 allOf: 17 17 - $ref: panel-common.yaml#
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Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml
··· 10 10 named DB7430 with a separate backlight controller. 11 11 12 12 maintainers: 13 - - Linus Walleij <linus.walleij@linaro.org> 13 + - Linus Walleij <linusw@kernel.org> 14 14 15 15 allOf: 16 16 - $ref: panel-common.yaml#
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Documentation/devicetree/bindings/display/panel/samsung,s6d16d0.yaml
··· 7 7 title: Samsung S6D16D0 4" 864x480 AMOLED panel 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: panel-common.yaml#
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Documentation/devicetree/bindings/display/panel/sony,acx424akp.yaml
··· 12 12 AKP. 13 13 14 14 maintainers: 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 allOf: 18 18 - $ref: panel-common.yaml#
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Documentation/devicetree/bindings/display/panel/ti,nspire.yaml
··· 7 7 title: Texas Instruments NSPIRE Display Panels 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: panel-common.yaml#
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Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml
··· 7 7 title: TPO TPG110 Panel 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Thierry Reding <thierry.reding@gmail.com> 12 12 13 13 description: |+
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Documentation/devicetree/bindings/display/ste,mcde.yaml
··· 7 7 title: ST-Ericsson Multi Channel Display Engine MCDE 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 properties: 13 13 compatible:
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Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
··· 84 84 maxItems: 1 85 85 description: phandle to the associated power domain 86 86 87 - dma-coherent: 88 - type: boolean 87 + dma-coherent: true 89 88 90 89 ports: 91 90 $ref: /schemas/graph.yaml#/properties/ports
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Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
··· 103 103 maxItems: 1 104 104 description: phandle to the associated power domain 105 105 106 - dma-coherent: 107 - type: boolean 106 + dma-coherent: true 108 107 109 108 ports: 110 109 $ref: /schemas/graph.yaml#/properties/ports
+1 -1
Documentation/devicetree/bindings/dma/stericsson,dma40.yaml
··· 7 7 title: ST-Ericsson DMA40 DMA Engine 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: dma-controller.yaml#
+1 -1
Documentation/devicetree/bindings/extcon/fcs,fsa880.yaml
··· 7 7 title: Fairchild Semiconductor FSA880, FSA9480 and compatibles 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 The FSA880 and FSA9480 are USB port accessory detectors and switches.
+1 -1
Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
··· 8 8 title: Intel IXP4xx Network Processing Engine 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: | 14 14 On the IXP4xx SoCs, the Network Processing Engine (NPE) is a small
+1 -1
Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml
··· 8 8 9 9 maintainers: 10 10 - Johan Hovold <johan@kernel.org> 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: 14 14 Broadcom GPS chips can be used over the UART or I2C bus. The UART
+1 -1
Documentation/devicetree/bindings/gpio/faraday,ftgpio010.yaml
··· 7 7 title: Faraday Technology FTGPIO010 GPIO Controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/gpio/gpio-consumer-common.yaml
··· 8 8 9 9 maintainers: 10 10 - Bartosz Golaszewski <brgl@bgdev.pl> 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: 14 14 Pay attention to using proper GPIO flag (e.g. GPIO_ACTIVE_LOW) for the GPIOs
+1 -1
Documentation/devicetree/bindings/gpio/gpio-ep9301.yaml
··· 7 7 title: EP93xx GPIO controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Bartosz Golaszewski <brgl@bgdev.pl> 12 12 - Nikita Shubin <nikita.shubin@maquefel.me> 13 13
+1 -1
Documentation/devicetree/bindings/gpio/gpio-mmio.yaml
··· 7 7 title: Generic MMIO GPIO 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Bartosz Golaszewski <brgl@bgdev.pl> 12 12 13 13 description:
+1 -1
Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.yaml
··· 22 22 and this can be enabled by a special flag. 23 23 24 24 maintainers: 25 - - Linus Walleij <linus.walleij@linaro.org> 25 + - Linus Walleij <linusw@kernel.org> 26 26 27 27 properties: 28 28 compatible:
+1 -1
Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml
··· 7 7 title: Marvell PXA GPIO controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Bartosz Golaszewski <bgolaszewski@baylibre.com> 12 12 - Rob Herring <robh@kernel.org> 13 13
+1 -1
Documentation/devicetree/bindings/gpio/pl061-gpio.yaml
··· 7 7 title: ARM PL061 GPIO controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Rob Herring <robh@kernel.org> 12 12 13 13 # We need a select here so we don't match all nodes with 'arm,primecell'
+1 -1
Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml
··· 12 12 with pinctrl-nomadik. 13 13 14 14 maintainers: 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 properties: 18 18 $nodename:
+1 -1
Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml
··· 14 14 GPIO portions of these expanders. 15 15 16 16 maintainers: 17 - - Linus Walleij <linus.walleij@linaro.org> 17 + - Linus Walleij <linusw@kernel.org> 18 18 19 19 properties: 20 20 compatible:
+3 -1
Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
··· 20 20 - const: img,img-gx6250 21 21 - const: img,img-rogue 22 22 - items: 23 - - const: renesas,r8a77965-gpu 23 + - enum: 24 + - renesas,r8a77965-gpu 25 + - renesas,r8a779a0-gpu 24 26 - const: img,img-ge7800 25 27 - const: img,img-rogue 26 28 - items:
+1 -1
Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml
··· 6 6 title: NTC thermistor temperature sensors 7 7 8 8 maintainers: 9 - - Linus Walleij <linus.walleij@linaro.org> 9 + - Linus Walleij <linusw@kernel.org> 10 10 11 11 description: | 12 12 Thermistors with negative temperature coefficient (NTC) are resistors that
+1 -1
Documentation/devicetree/bindings/hwmon/winbond,w83781d.yaml
··· 7 7 title: Winbond W83781 and compatible hardware monitor IC 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml
··· 7 7 title: I2C Controller on ARM Ltd development platforms 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: /schemas/i2c/i2c-controller.yaml#
+2
Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
··· 38 38 - qcom,sm8450-cci 39 39 - qcom,sm8550-cci 40 40 - qcom,sm8650-cci 41 + - qcom,sm8750-cci 41 42 - qcom,x1e80100-cci 42 43 - const: qcom,msm8996-cci # CCI v2 43 44 ··· 133 132 enum: 134 133 - qcom,kaanapali-cci 135 134 - qcom,qcm2290-cci 135 + - qcom,sm8750-cci 136 136 then: 137 137 properties: 138 138 clocks:
+7
Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
··· 34 34 - const: snps,designware-i2c 35 35 - description: Baikal-T1 SoC System I2C controller 36 36 const: baikal,bt1-sys-i2c 37 + - description: Mobileye EyeQ DesignWare I2C controller 38 + items: 39 + - enum: 40 + - mobileye,eyeq7h-i2c 41 + - const: mobileye,eyeq6lplus-i2c 42 + - const: snps,designware-i2c 37 43 - items: 38 44 - enum: 45 + - mobileye,eyeq6lplus-i2c 39 46 - mscc,ocelot-i2c 40 47 - sophgo,sg2044-i2c 41 48 - thead,th1520-i2c
+1 -1
Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml
··· 12 12 DB8500 after the merge of these two companies wireless divisions. 13 13 14 14 maintainers: 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 # Need a custom select here or 'arm,primecell' will match on lots of nodes 18 18 select:
+1 -1
Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml
··· 7 7 title: Bosch BMA255 and Similar Accelerometers 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Stephan Gerhold <stephan@gerhold.net> 12 12 13 13 description:
+1 -1
Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml
··· 7 7 title: Qualcomm's PM8xxx voltage XOADC 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
+1 -1
Documentation/devicetree/bindings/iio/gyroscope/invensense,mpu3050.yaml
··· 7 7 title: Invensense MPU-3050 Gyroscope 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/iio/light/capella,cm3605.yaml
··· 8 8 Capella Microsystems CM3605 Ambient Light and Short Distance Proximity Sensor 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 - Kevin Tsai <ktsai@capellamicro.com> 13 13 14 14 description: |
+1 -1
Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml
··· 7 7 title: Sharp GP2AP002A00F and GP2AP002S00F proximity and ambient light sensors 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 Proximity and ambient light sensor with IR LED for the proximity
+1 -1
Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8974.yaml
··· 7 7 title: Asahi Kasei AK8974 magnetometer sensor 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml
··· 7 7 title: Yamaha YAS530 family of magnetometer sensors 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 The Yamaha YAS530 magnetometers is a line of 3-axis magnetometers
+1 -1
Documentation/devicetree/bindings/iio/st,st-sensors.yaml
··· 14 14 15 15 maintainers: 16 16 - Denis Ciocca <denis.ciocca@st.com> 17 - - Linus Walleij <linus.walleij@linaro.org> 17 + - Linus Walleij <linusw@kernel.org> 18 18 19 19 properties: 20 20 compatible:
+1 -1
Documentation/devicetree/bindings/input/atmel,maxtouch.yaml
··· 8 8 9 9 maintainers: 10 10 - Nick Dyer <nick@shmanahar.org> 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: | 14 14 Atmel maXTouch touchscreen or touchpads such as the mXT244
+1 -1
Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml
··· 7 7 title: Cypress CY8CTMA140 series touchscreen controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: touchscreen.yaml#
+1 -1
Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml
··· 12 12 13 13 maintainers: 14 14 - Javier Martinez Canillas <javier@dowhile0.org> 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 allOf: 18 18 - $ref: touchscreen.yaml#
+1 -1
Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml
··· 7 7 title: Melfas MMS114 family touchscreen controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: touchscreen.yaml#
+1 -1
Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml
··· 12 12 13 13 maintainers: 14 14 - Michael Srba <Michael.Srba@seznam.cz> 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 allOf: 18 18 - $ref: touchscreen.yaml#
+1 -1
Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml
··· 7 7 title: ARM Versatile FPGA IRQ Controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 One or more FPGA IRQ controllers can be synthesized in an ARM reference board
+1 -1
Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml
··· 6 6 title: Faraday Technology FTINTC010 interrupt controller 7 7 8 8 maintainers: 9 - - Linus Walleij <linus.walleij@linaro.org> 9 + - Linus Walleij <linusw@kernel.org> 10 10 11 11 description: 12 12 This interrupt controller is a stock IP block from Faraday Technology found
+1 -1
Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml
··· 8 8 title: Intel IXP4xx XScale Networking Processors Interrupt Controller 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: | 14 14 This interrupt controller is found in the Intel IXP4xx processors.
+1 -1
Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml
··· 7 7 title: Kinetic Technologies KTD253 and KTD259 one-wire backlight 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 The Kinetic Technologies KTD253 and KTD259 are white LED backlights
+1 -1
Documentation/devicetree/bindings/leds/register-bit-led.yaml
··· 7 7 title: Register Bit LEDs 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: |+ 13 13 Register bit leds are used with syscon multifunctional devices where single
+1 -1
Documentation/devicetree/bindings/leds/regulator-led.yaml
··· 7 7 title: Regulator LEDs 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 Regulator LEDs are powered by a single regulator such that they can
+1 -1
Documentation/devicetree/bindings/leds/richtek,rt8515.yaml
··· 7 7 title: Richtek RT8515 1.5A dual channel LED driver 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 The Richtek RT8515 is a dual channel (two mode) LED driver that
+1 -1
Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml
··· 12 12 including IXP42x, IXP43x, IXP45x and IXP46x. 13 13 14 14 maintainers: 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 properties: 18 18 $nodename:
+1 -1
Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml
··· 12 12 including IXP42x, IXP43x, IXP45x and IXP46x. 13 13 14 14 maintainers: 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 properties: 18 18 intel,ixp4xx-eb-t1:
+1 -1
Documentation/devicetree/bindings/mfd/arm,dev-platforms-syscon.yaml
··· 7 7 title: Arm Ltd Developer Platforms System Controllers 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 The Arm Ltd Integrator, Realview, and Versatile families of developer
+1 -1
Documentation/devicetree/bindings/mfd/st,stmpe.yaml
··· 12 12 peripherals connected to SPI or I2C. 13 13 14 14 maintainers: 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 allOf: 18 18 - $ref: /schemas/spi/spi-peripheral-props.yaml#
+1 -1
Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml
··· 7 7 title: ST-Ericsson Analog Baseband AB8500 and AB8505 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 the AB8500 "Analog Baseband" is the mixed-signals integrated circuit
+1 -1
Documentation/devicetree/bindings/mfd/stericsson,db8500-prcmu.yaml
··· 7 7 title: ST-Ericsson DB8500 PRCMU - Power Reset and Control Management Unit 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 The DB8500 Power Reset and Control Management Unit is an XP70 8-bit
+1 -1
Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager.yaml
··· 8 8 title: Intel IXP4xx AHB Queue Manager 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: | 14 14 The IXP4xx AHB Queue Manager maintains queues as circular buffers in
+1 -1
Documentation/devicetree/bindings/mmc/arm,pl18x.yaml
··· 7 7 title: ARM PrimeCell MultiMedia Card Interface (MMCI) PL180 and PL181 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Ulf Hansson <ulf.hansson@linaro.org> 12 12 13 13 description:
+1 -1
Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml
··· 41 41 patternProperties: 42 42 "^sdhci@[0-9a-f]+$": 43 43 type: object 44 - $ref: mmc-controller.yaml 44 + $ref: sdhci-common.yaml 45 45 unevaluatedProperties: false 46 46 47 47 properties:
+1 -1
Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml
··· 7 7 title: ARM Firmware Suite (AFS) Partitions 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 select: false 13 13
+1 -1
Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml
··· 14 14 32 KB in size. 15 15 16 16 maintainers: 17 - - Linus Walleij <linus.walleij@linaro.org> 17 + - Linus Walleij <linusw@kernel.org> 18 18 19 19 select: false 20 20
+1 -1
Documentation/devicetree/bindings/mtd/partitions/seama.yaml
··· 18 18 - $ref: partition.yaml# 19 19 20 20 maintainers: 21 - - Linus Walleij <linus.walleij@linaro.org> 21 + - Linus Walleij <linusw@kernel.org> 22 22 23 23 properties: 24 24 compatible:
+1 -1
Documentation/devicetree/bindings/net/bluetooth/brcm,bluetooth.yaml
··· 7 7 title: Broadcom Bluetooth Chips 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 This binding describes Broadcom UART-attached bluetooth chips.
+1 -1
Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml
··· 7 7 title: Cortina Systems Gemini Ethernet Controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 This ethernet controller is found in the Gemini SoC family:
+1 -1
Documentation/devicetree/bindings/net/dsa/micrel,ks8995.yaml
··· 7 7 title: Micrel KS8995 Family DSA Switches 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 The Micrel KS8995 DSA Switches are 100 Mbit switches that were produced in
+1 -1
Documentation/devicetree/bindings/net/dsa/realtek.yaml
··· 10 10 - $ref: dsa.yaml#/$defs/ethernet-ports 11 11 12 12 maintainers: 13 - - Linus Walleij <linus.walleij@linaro.org> 13 + - Linus Walleij <linusw@kernel.org> 14 14 15 15 description: 16 16 Realtek advertises these chips as fast/gigabit switches or unmanaged
+1 -1
Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.yaml
··· 7 7 title: Vitesse VSC73xx DSA Switches 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 The Vitesse DSA Switches were produced in the early-to-mid 2000s.
+1 -1
Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml
··· 8 8 title: Intel IXP46x PTP Timer (TSYNC) 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: | 14 14 The Intel IXP46x PTP timer is known in the manual as IEEE1588 Hardware
+1 -1
Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml
··· 11 11 - $ref: ethernet-controller.yaml# 12 12 13 13 maintainers: 14 - - Linus Walleij <linus.walleij@linaro.org> 14 + - Linus Walleij <linusw@kernel.org> 15 15 16 16 description: | 17 17 The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network
+1 -1
Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml
··· 8 8 title: Intel IXP4xx V.35 WAN High Speed Serial Link (HSS) 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: | 14 14 The Intel IXP4xx HSS makes use of the IXP4xx NPE (Network
+1 -1
Documentation/devicetree/bindings/pci/faraday,ftpci100.yaml
··· 7 7 title: Faraday Technology FTPCI100 PCI Host Bridge 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 This PCI bridge is found inside that Cortina Systems Gemini SoC platform and
+1 -1
Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
··· 7 7 title: Intel IXP4xx PCI controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: PCI host controller found in the Intel IXP4xx SoC series. 13 13
+1 -1
Documentation/devicetree/bindings/pci/v3,v360epc-pci.yaml
··· 7 7 title: V3 Semiconductor V360 EPC PCI bridge 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 This bridge is found in the ARM Integrator/AP (Application Platform)
+1 -1
Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
··· 7 7 title: Generic Pin Configuration Node 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: 13 13 Many data items that are represented in a pin configuration node are common
+1 -1
Documentation/devicetree/bindings/pinctrl/pinctrl.yaml
··· 7 7 title: Pin controller device 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Rafał Miłecki <rafal@milecki.pl> 12 12 13 13 description: |
+1 -1
Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml
··· 7 7 title: Generic Pin Multiplexing Node 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 The contents of the pin configuration child nodes are defined by the binding
+1 -1
Documentation/devicetree/bindings/power/supply/samsung,battery.yaml
··· 7 7 title: Samsung SDI Batteries 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 Samsung SDI (Samsung Digital Interface) batteries are all different versions
+36
Documentation/devicetree/bindings/riscv/extensions.yaml
··· 377 377 guarantee on LR/SC sequences, as ratified in commit b1d806605f87 378 378 ("Updated to ratified state.") of the riscv profiles specification. 379 379 380 + - const: zilsd 381 + description: 382 + The standard Zilsd extension which provides support for aligned 383 + register-pair load and store operations in 32-bit instruction 384 + encodings, as ratified in commit f88abf1 ("Integrating 385 + load/store pair for RV32 with the main manual") of riscv-isa-manual. 386 + 387 + - const: zclsd 388 + description: 389 + The Zclsd extension implements the compressed (16-bit) version of the 390 + Load/Store Pair for RV32. As with Zilsd, this extension was ratified 391 + in commit f88abf1 ("Integrating load/store pair for RV32 with the 392 + main manual") of riscv-isa-manual. 393 + 380 394 - const: zk 381 395 description: 382 396 The standard Zk Standard Scalar cryptography extension as ratified ··· 896 882 anyOf: 897 883 - const: v 898 884 - const: zve32x 885 + # Zclsd depends on Zilsd and Zca 886 + - if: 887 + contains: 888 + anyOf: 889 + - const: zclsd 890 + then: 891 + contains: 892 + allOf: 893 + - const: zilsd 894 + - const: zca 899 895 900 896 allOf: 901 897 # Zcf extension does not exist on rv64 ··· 923 899 not: 924 900 contains: 925 901 const: zcf 902 + # Zilsd extension does not exist on rv64 903 + - if: 904 + properties: 905 + riscv,isa-base: 906 + contains: 907 + const: rv64i 908 + then: 909 + properties: 910 + riscv,isa-extensions: 911 + not: 912 + contains: 913 + const: zilsd 926 914 927 915 additionalProperties: true 928 916 ...
+1 -1
Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml
··· 12 12 32 bit random number. 13 13 14 14 maintainers: 15 - - Linus Walleij <linus.walleij@linaro.org> 15 + - Linus Walleij <linusw@kernel.org> 16 16 17 17 properties: 18 18 compatible:
+1 -1
Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml
··· 7 7 title: Faraday Technology FTRTC010 Real Time Clock 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 description: | 13 13 This RTC appears in for example the Storlink Gemini family of SoCs.
+4
Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
··· 17 17 compatible: 18 18 oneOf: 19 19 - const: allwinner,sun50i-r329-spi 20 + - const: allwinner,sun55i-a523-spi 20 21 - const: allwinner,sun6i-a31-spi 21 22 - const: allwinner,sun8i-h3-spi 22 23 - items: ··· 36 35 - const: allwinner,sun20i-d1-spi-dbi 37 36 - const: allwinner,sun50i-r329-spi-dbi 38 37 - const: allwinner,sun50i-r329-spi 38 + - items: 39 + - const: allwinner,sun55i-a523-spi-dbi 40 + - const: allwinner,sun55i-a523-spi 39 41 40 42 reg: 41 43 maxItems: 1
+1 -1
Documentation/devicetree/bindings/spi/arm,pl022-peripheral-props.yaml
··· 7 7 title: Peripheral-specific properties for Arm PL022 SPI controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 select: false 13 13
+3 -3
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
··· 121 121 num-cs: 122 122 default: 4 123 123 minimum: 1 124 - maximum: 4 124 + maximum: 16 125 125 126 126 dmas: 127 127 items: ··· 153 153 provides an interface to override the native DWC SSI CS control. 154 154 155 155 patternProperties: 156 - "@[0-9a-f]+$": 156 + "@[0-9a-f]$": 157 157 type: object 158 158 additionalProperties: true 159 159 160 160 properties: 161 161 reg: 162 162 minimum: 0 163 - maximum: 3 163 + maximum: 0xf 164 164 165 165 unevaluatedProperties: false 166 166
+1 -1
Documentation/devicetree/bindings/spi/spi-pl022.yaml
··· 7 7 title: ARM PL022 SPI controller 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: spi-controller.yaml#
+1 -1
Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml
··· 8 8 9 9 maintainers: 10 10 - Joel Stanley <joel@jms.id.au> 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: 14 14 This timer is a generic IP block from Faraday Technology, embedded in the
+1 -1
Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml
··· 8 8 title: Intel IXP4xx XScale Networking Processors Timers 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: This timer is found in the Intel IXP4xx processors. 14 14
+1 -1
Documentation/devicetree/bindings/timer/st,nomadik-mtu.yaml
··· 8 8 title: ST Microelectronics Nomadik Multi-Timer Unit MTU Timer 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 description: This timer is found in the ST Microelectronics Nomadik 14 14 SoCs STn8800, STn8810 and STn8815 as well as in ST-Ericsson DB8500.
+1 -1
Documentation/devicetree/bindings/usb/faraday,fotg210.yaml
··· 8 8 title: Faraday Technology FOTG200 series HS OTG USB 2.0 controller 9 9 10 10 maintainers: 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 allOf: 14 14 - $ref: usb-drd.yaml#
+1 -1
Documentation/devicetree/bindings/usb/intel,ixp4xx-udc.yaml
··· 10 10 Controller with 16 endpoints and a built-in transceiver. 11 11 12 12 maintainers: 13 - - Linus Walleij <linus.walleij@linaro.org> 13 + - Linus Walleij <linusw@kernel.org> 14 14 15 15 properties: 16 16 compatible:
+1 -1
Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.yaml
··· 7 7 title: Faraday Technology FTWDT010 watchdog 8 8 9 9 maintainers: 10 - - Linus Walleij <linus.walleij@linaro.org> 10 + - Linus Walleij <linusw@kernel.org> 11 11 - Corentin Labbe <clabbe@baylibre.com> 12 12 13 13 description: |
+1 -1
Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml
··· 8 8 9 9 maintainers: 10 10 - Marc Zyngier <maz@kernel.org> 11 - - Linus Walleij <linus.walleij@linaro.org> 11 + - Linus Walleij <linusw@kernel.org> 12 12 13 13 allOf: 14 14 - $ref: watchdog.yaml#
+2 -2
Documentation/hwmon/ds620.rst
··· 7 7 8 8 Prefix: 'ds620' 9 9 10 - Datasheet: Publicly available at the Dallas Semiconductor website 10 + Datasheet: Publicly available at the Analog Devices website 11 11 12 - http://www.dalsemi.com/ 12 + https://www.analog.com/media/en/technical-documentation/data-sheets/DS620.pdf 13 13 14 14 Authors: 15 15 Roland Stigge <stigge@antcom.de>
+1
Documentation/i2c/busses/i2c-i801.rst
··· 52 52 * Intel Panther Lake (SOC) 53 53 * Intel Wildcat Lake (SOC) 54 54 * Intel Diamond Rapids (SOC) 55 + * Intel Nova Lake (PCH) 55 56 56 57 Datasheets: Publicly available at the Intel website 57 58
+6
Documentation/input/event-codes.rst
··· 241 241 emitted only when the selected profile changes, indicating the newly 242 242 selected profile value. 243 243 244 + * ABS_SND_PROFILE: 245 + 246 + - Used to describe the state of a multi-value sound profile switch. 247 + An event is emitted only when the selected profile changes, 248 + indicating the newly selected profile value. 249 + 244 250 * ABS_MT_<name>: 245 251 246 252 - Used to describe multitouch input events. Please see
+2 -1
MAINTAINERS
··· 18030 18030 18031 18031 NETFILTER 18032 18032 M: Pablo Neira Ayuso <pablo@netfilter.org> 18033 - M: Jozsef Kadlecsik <kadlec@netfilter.org> 18034 18033 M: Florian Westphal <fw@strlen.de> 18035 18034 R: Phil Sutter <phil@nwl.cc> 18036 18035 L: netfilter-devel@vger.kernel.org ··· 26465 26466 S: Maintained 26466 26467 Q: https://patchwork.kernel.org/project/linux-trace-kernel/list/ 26467 26468 T: git git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace.git 26469 + F: Documentation/core-api/tracepoint.rst 26468 26470 F: Documentation/trace/* 26469 26471 F: fs/tracefs/ 26470 26472 F: include/linux/trace*.h ··· 27922 27922 F: rust/kernel/regulator.rs 27923 27923 F: include/dt-bindings/regulator/ 27924 27924 F: include/linux/regulator/ 27925 + F: include/uapi/regulator/ 27925 27926 K: regulator_get_optional 27926 27927 27927 27928 VOLTAGE AND CURRENT REGULATOR IRQ HELPERS
+1 -1
Makefile
··· 2 2 VERSION = 6 3 3 PATCHLEVEL = 19 4 4 SUBLEVEL = 0 5 - EXTRAVERSION = -rc1 5 + EXTRAVERSION = -rc3 6 6 NAME = Baby Opossum Posse 7 7 8 8 # *DOCUMENTATION*
+55
arch/arm64/boot/dts/mediatek/Makefile
··· 19 19 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo 20 20 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sata.dtbo 21 21 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo 22 + mt7986a-bananapi-bpi-r3-emmc-nand-dtbs := \ 23 + mt7986a-bananapi-bpi-r3.dtb \ 24 + mt7986a-bananapi-bpi-r3-emmc.dtbo \ 25 + mt7986a-bananapi-bpi-r3-nand.dtbo 26 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc-nand.dtb 27 + mt7986a-bananapi-bpi-r3-emmc-nor-dtbs := \ 28 + mt7986a-bananapi-bpi-r3.dtb \ 29 + mt7986a-bananapi-bpi-r3-emmc.dtbo \ 30 + mt7986a-bananapi-bpi-r3-nor.dtbo 31 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc-nor.dtb 32 + mt7986a-bananapi-bpi-r3-sd-nand-dtbs := \ 33 + mt7986a-bananapi-bpi-r3.dtb \ 34 + mt7986a-bananapi-bpi-r3-sd.dtbo \ 35 + mt7986a-bananapi-bpi-r3-nand.dtbo \ 36 + mt7986a-bananapi-bpi-r3-sata.dtbo 37 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd-nand.dtb 38 + mt7986a-bananapi-bpi-r3-sd-nor-dtbs := \ 39 + mt7986a-bananapi-bpi-r3.dtb \ 40 + mt7986a-bananapi-bpi-r3-sd.dtbo \ 41 + mt7986a-bananapi-bpi-r3-nor.dtbo 42 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd-nor.dtb 22 43 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb 23 44 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb 24 45 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4.dtb ··· 52 31 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-pro-emmc.dtbo 53 32 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-pro-sd.dtbo 54 33 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-sd.dtbo 34 + mt7988a-bananapi-bpi-r4-emmc-dtbs := \ 35 + mt7988a-bananapi-bpi-r4.dtb \ 36 + mt7988a-bananapi-bpi-r4-emmc.dtbo 37 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-emmc.dtb 38 + mt7988a-bananapi-bpi-r4-sd-dtbs := \ 39 + mt7988a-bananapi-bpi-r4.dtb \ 40 + mt7988a-bananapi-bpi-r4-sd.dtbo 41 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-sd.dtb 42 + mt7988a-bananapi-bpi-r4-2g5-emmc-dtbs := \ 43 + mt7988a-bananapi-bpi-r4-2g5.dtb \ 44 + mt7988a-bananapi-bpi-r4-emmc.dtbo 45 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-2g5-emmc.dtb 46 + mt7988a-bananapi-bpi-r4-2g5-sd-dtbs := \ 47 + mt7988a-bananapi-bpi-r4-2g5.dtb \ 48 + mt7988a-bananapi-bpi-r4-sd.dtbo 49 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-2g5-sd.dtb 50 + mt7988a-bananapi-bpi-r4-pro-8x-emmc-dtbs := \ 51 + mt7988a-bananapi-bpi-r4-pro-8x.dtb \ 52 + mt7988a-bananapi-bpi-r4-pro-emmc.dtbo 53 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-pro-8x-emmc.dtb 54 + mt7988a-bananapi-bpi-r4-pro-8x-sd-dtbs := \ 55 + mt7988a-bananapi-bpi-r4-pro-8x.dtb \ 56 + mt7988a-bananapi-bpi-r4-pro-sd.dtbo 57 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-pro-8x-sd.dtb 58 + mt7988a-bananapi-bpi-r4-pro-8x-sd-cn15-dtbs := \ 59 + mt7988a-bananapi-bpi-r4-pro-8x-sd.dtb \ 60 + mt7988a-bananapi-bpi-r4-pro-cn15.dtbo 61 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-pro-8x-sd-cn15.dtb 62 + mt7988a-bananapi-bpi-r4-pro-8x-sd-cn18-dtbs := \ 63 + mt7988a-bananapi-bpi-r4-pro-8x-sd.dtb \ 64 + mt7988a-bananapi-bpi-r4-pro-cn18.dtbo 65 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4-pro-8x-sd-cn18.dtb 55 66 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb 56 67 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb 57 68 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb ··· 166 113 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-kontron-3-5-sbc-i1200.dtb 167 114 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-radxa-nio-12l.dtb 168 115 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-radxa-nio-12l-8-hd-panel.dtbo 116 + mt8395-radxa-nio-12l-8-hd-panel-dtbs := mt8395-radxa-nio-12l.dtb mt8395-radxa-nio-12l-8-hd-panel.dtbo 117 + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-radxa-nio-12l-8-hd-panel.dtb 169 118 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb 170 119 171 120 # Device tree overlays support
+8 -1
arch/arm64/include/asm/simd.h
··· 48 48 kernel_neon_begin(_T->lock), 49 49 kernel_neon_end(_T->lock)) 50 50 51 - #define scoped_ksimd() scoped_guard(ksimd, &(struct user_fpsimd_state){}) 51 + #define __scoped_ksimd(_label) \ 52 + for (struct user_fpsimd_state __uninitialized __st; \ 53 + true; ({ goto _label; })) \ 54 + if (0) { \ 55 + _label: break; \ 56 + } else scoped_guard(ksimd, &__st) 57 + 58 + #define scoped_ksimd() __scoped_ksimd(__UNIQUE_ID(label)) 52 59 53 60 #endif
+20 -110
arch/arm64/kernel/fpsimd.c
··· 180 180 set_default_vl(ARM64_VEC_SVE, val); 181 181 } 182 182 183 - static u8 *efi_sve_state; 184 - 185 - #else /* ! CONFIG_ARM64_SVE */ 186 - 187 - /* Dummy declaration for code that will be optimised out: */ 188 - extern u8 *efi_sve_state; 189 - 190 183 #endif /* ! CONFIG_ARM64_SVE */ 191 184 192 185 #ifdef CONFIG_ARM64_SME ··· 1088 1095 return 0; 1089 1096 } 1090 1097 1091 - static void __init sve_efi_setup(void) 1092 - { 1093 - int max_vl = 0; 1094 - int i; 1095 - 1096 - if (!IS_ENABLED(CONFIG_EFI)) 1097 - return; 1098 - 1099 - for (i = 0; i < ARRAY_SIZE(vl_info); i++) 1100 - max_vl = max(vl_info[i].max_vl, max_vl); 1101 - 1102 - /* 1103 - * alloc_percpu() warns and prints a backtrace if this goes wrong. 1104 - * This is evidence of a crippled system and we are returning void, 1105 - * so no attempt is made to handle this situation here. 1106 - */ 1107 - if (!sve_vl_valid(max_vl)) 1108 - goto fail; 1109 - 1110 - efi_sve_state = kmalloc(SVE_SIG_REGS_SIZE(sve_vq_from_vl(max_vl)), 1111 - GFP_KERNEL); 1112 - if (!efi_sve_state) 1113 - goto fail; 1114 - 1115 - return; 1116 - 1117 - fail: 1118 - panic("Cannot allocate memory for EFI SVE save/restore"); 1119 - } 1120 - 1121 1098 void cpu_enable_sve(const struct arm64_cpu_capabilities *__always_unused p) 1122 1099 { 1123 1100 write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1); ··· 1148 1185 if (sve_max_virtualisable_vl() < sve_max_vl()) 1149 1186 pr_warn("%s: unvirtualisable vector lengths present\n", 1150 1187 info->name); 1151 - 1152 - sve_efi_setup(); 1153 1188 } 1154 1189 1155 1190 /* ··· 1908 1947 #ifdef CONFIG_EFI 1909 1948 1910 1949 static struct user_fpsimd_state efi_fpsimd_state; 1911 - static bool efi_fpsimd_state_used; 1912 - static bool efi_sve_state_used; 1913 - static bool efi_sm_state; 1914 1950 1915 1951 /* 1916 1952 * EFI runtime services support functions ··· 1934 1976 if (may_use_simd()) { 1935 1977 kernel_neon_begin(&efi_fpsimd_state); 1936 1978 } else { 1937 - WARN_ON(preemptible()); 1938 - 1939 1979 /* 1940 - * If !efi_sve_state, SVE can't be in use yet and doesn't need 1941 - * preserving: 1980 + * We are running in hardirq or NMI context, and the only 1981 + * legitimate case where this might happen is when EFI pstore 1982 + * is attempting to record the system's dying gasps into EFI 1983 + * variables. This could be due to an oops, a panic or a call 1984 + * to emergency_restart(), and in none of those cases, we can 1985 + * expect the current task to ever return to user space again, 1986 + * or for the kernel to resume any normal execution, for that 1987 + * matter (an oops in hardirq context triggers a panic too). 1988 + * 1989 + * Therefore, there is no point in attempting to preserve any 1990 + * SVE/SME state here. On the off chance that we might have 1991 + * ended up here for a different reason inadvertently, kill the 1992 + * task and preserve/restore the base FP/SIMD state, which 1993 + * might belong to kernel mode FP/SIMD. 1942 1994 */ 1943 - if (system_supports_sve() && efi_sve_state != NULL) { 1944 - bool ffr = true; 1945 - u64 svcr; 1946 - 1947 - efi_sve_state_used = true; 1948 - 1949 - if (system_supports_sme()) { 1950 - svcr = read_sysreg_s(SYS_SVCR); 1951 - 1952 - efi_sm_state = svcr & SVCR_SM_MASK; 1953 - 1954 - /* 1955 - * Unless we have FA64 FFR does not 1956 - * exist in streaming mode. 1957 - */ 1958 - if (!system_supports_fa64()) 1959 - ffr = !(svcr & SVCR_SM_MASK); 1960 - } 1961 - 1962 - sve_save_state(efi_sve_state + sve_ffr_offset(sve_max_vl()), 1963 - &efi_fpsimd_state.fpsr, ffr); 1964 - 1965 - if (system_supports_sme()) 1966 - sysreg_clear_set_s(SYS_SVCR, 1967 - SVCR_SM_MASK, 0); 1968 - 1969 - } else { 1970 - fpsimd_save_state(&efi_fpsimd_state); 1971 - } 1972 - 1973 - efi_fpsimd_state_used = true; 1995 + pr_warn_ratelimited("Calling EFI runtime from %s context\n", 1996 + in_nmi() ? "NMI" : "hardirq"); 1997 + force_signal_inject(SIGKILL, SI_KERNEL, 0, 0); 1998 + fpsimd_save_state(&efi_fpsimd_state); 1974 1999 } 1975 2000 } 1976 2001 ··· 1965 2024 if (!system_supports_fpsimd()) 1966 2025 return; 1967 2026 1968 - if (!efi_fpsimd_state_used) { 2027 + if (may_use_simd()) { 1969 2028 kernel_neon_end(&efi_fpsimd_state); 1970 2029 } else { 1971 - if (system_supports_sve() && efi_sve_state_used) { 1972 - bool ffr = true; 1973 - 1974 - /* 1975 - * Restore streaming mode; EFI calls are 1976 - * normal function calls so should not return in 1977 - * streaming mode. 1978 - */ 1979 - if (system_supports_sme()) { 1980 - if (efi_sm_state) { 1981 - sysreg_clear_set_s(SYS_SVCR, 1982 - 0, 1983 - SVCR_SM_MASK); 1984 - 1985 - /* 1986 - * Unless we have FA64 FFR does not 1987 - * exist in streaming mode. 1988 - */ 1989 - if (!system_supports_fa64()) 1990 - ffr = false; 1991 - } 1992 - } 1993 - 1994 - sve_load_state(efi_sve_state + sve_ffr_offset(sve_max_vl()), 1995 - &efi_fpsimd_state.fpsr, ffr); 1996 - 1997 - efi_sve_state_used = false; 1998 - } else { 1999 - fpsimd_load_state(&efi_fpsimd_state); 2000 - } 2001 - 2002 - efi_fpsimd_state_used = false; 2030 + fpsimd_load_state(&efi_fpsimd_state); 2003 2031 } 2004 2032 } 2005 2033
+1
arch/arm64/kernel/process.c
··· 292 292 current->thread.gcs_base = 0; 293 293 current->thread.gcs_size = 0; 294 294 current->thread.gcs_el0_mode = 0; 295 + current->thread.gcs_el0_locked = 0; 295 296 write_sysreg_s(GCSCRE0_EL1_nTR, SYS_GCSCRE0_EL1); 296 297 write_sysreg_s(0, SYS_GCSPR_EL0); 297 298 }
+16 -17
arch/arm64/mm/mmu.c
··· 767 767 return rodata_full || arm64_kfence_can_set_direct_map() || is_realm_world(); 768 768 } 769 769 770 - static inline bool split_leaf_mapping_possible(void) 771 - { 772 - /* 773 - * !BBML2_NOABORT systems should never run into scenarios where we would 774 - * have to split. So exit early and let calling code detect it and raise 775 - * a warning. 776 - */ 777 - if (!system_supports_bbml2_noabort()) 778 - return false; 779 - return !force_pte_mapping(); 780 - } 781 - 782 770 static DEFINE_MUTEX(pgtable_split_lock); 783 771 784 772 int split_kernel_leaf_mapping(unsigned long start, unsigned long end) ··· 774 786 int ret; 775 787 776 788 /* 777 - * Exit early if the region is within a pte-mapped area or if we can't 778 - * split. For the latter case, the permission change code will raise a 779 - * warning if not already pte-mapped. 789 + * !BBML2_NOABORT systems should not be trying to change permissions on 790 + * anything that is not pte-mapped in the first place. Just return early 791 + * and let the permission change code raise a warning if not already 792 + * pte-mapped. 780 793 */ 781 - if (!split_leaf_mapping_possible() || is_kfence_address((void *)start)) 794 + if (!system_supports_bbml2_noabort()) 795 + return 0; 796 + 797 + /* 798 + * If the region is within a pte-mapped area, there is no need to try to 799 + * split. Additionally, CONFIG_DEBUG_PAGEALLOC and CONFIG_KFENCE may 800 + * change permissions from atomic context so for those cases (which are 801 + * always pte-mapped), we must not go any further because taking the 802 + * mutex below may sleep. 803 + */ 804 + if (force_pte_mapping() || is_kfence_address((void *)start)) 782 805 return 0; 783 806 784 807 /* ··· 1088 1089 int ret; 1089 1090 1090 1091 /* Exit early if we know the linear map is already pte-mapped. */ 1091 - if (!split_leaf_mapping_possible()) 1092 + if (force_pte_mapping()) 1092 1093 return true; 1093 1094 1094 1095 /* Kfence pool is already pte-mapped for the early init case. */
+1 -1
arch/arm64/net/bpf_jit_comp.c
··· 1004 1004 arm64_get_spectre_v2_state() == SPECTRE_VULNERABLE) 1005 1005 return; 1006 1006 1007 - if (capable(CAP_SYS_ADMIN)) 1007 + if (ns_capable_noaudit(&init_user_ns, CAP_SYS_ADMIN)) 1008 1008 return; 1009 1009 1010 1010 if (supports_clearbhb(SCOPE_SYSTEM)) {
+1 -2
arch/mips/alchemy/common/setup.c
··· 94 94 return phys_addr; 95 95 } 96 96 97 - static inline unsigned long io_remap_pfn_range_pfn(unsigned long pfn, 98 - unsigned long size) 97 + unsigned long io_remap_pfn_range_pfn(unsigned long pfn, unsigned long size) 99 98 { 100 99 phys_addr_t phys_addr = fixup_bigphys_addr(pfn << PAGE_SHIFT, size); 101 100
+2 -1
arch/mips/sgi-ip22/ip22-gio.c
··· 372 372 gio_dev->resource.flags = IORESOURCE_MEM; 373 373 gio_dev->irq = irq; 374 374 dev_set_name(&gio_dev->dev, "%d", slotno); 375 - gio_device_register(gio_dev); 375 + if (gio_device_register(gio_dev)) 376 + gio_dev_put(gio_dev); 376 377 } else 377 378 printk(KERN_INFO "GIO: slot %d : Empty\n", slotno); 378 379 }
+1 -1
arch/powerpc/include/asm/hw_irq.h
··· 90 90 if (IS_ENABLED(CONFIG_BOOKE)) 91 91 wrtee(0); 92 92 else if (IS_ENABLED(CONFIG_PPC_8xx)) 93 - wrtspr(SPRN_NRI); 93 + wrtspr_sync(SPRN_NRI); 94 94 else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) 95 95 __mtmsrd(0, 1); 96 96 else
+1
arch/powerpc/include/asm/reg.h
··· 1400 1400 : "r" ((unsigned long)(v)) \ 1401 1401 : "memory") 1402 1402 #define wrtspr(rn) asm volatile("mtspr " __stringify(rn) ",2" : : : "memory") 1403 + #define wrtspr_sync(rn) asm volatile("mtspr " __stringify(rn) ",2; sync" : : : "memory") 1403 1404 1404 1405 static inline void wrtee(unsigned long val) 1405 1406 {
+2 -1
arch/powerpc/kernel/btext.c
··· 20 20 #include <asm/io.h> 21 21 #include <asm/processor.h> 22 22 #include <asm/udbg.h> 23 + #include <asm/setup.h> 23 24 24 25 #define NO_SCROLL 25 26 ··· 464 463 { 465 464 unsigned char *base = calc_base(locX << 3, locY << 4); 466 465 unsigned int font_index = c * 16; 467 - const unsigned char *font = font_sun_8x16.data + font_index; 466 + const unsigned char *font = PTRRELOC(font_sun_8x16.data) + font_index; 468 467 int rb = dispDeviceRowBytes; 469 468 470 469 rmci_maybe_on();
-15
arch/powerpc/kernel/entry_32.S
··· 101 101 .endm 102 102 #endif 103 103 104 - .macro clr_ri trash 105 - #ifndef CONFIG_BOOKE 106 - #ifdef CONFIG_PPC_8xx 107 - mtspr SPRN_NRI, \trash 108 - #else 109 - li \trash, MSR_KERNEL & ~MSR_RI 110 - mtmsr \trash 111 - #endif 112 - #endif 113 - .endm 114 - 115 104 .globl transfer_to_syscall 116 105 transfer_to_syscall: 117 106 stw r3, ORIG_GPR3(r1) ··· 149 160 cmpwi r3,0 150 161 REST_GPR(3, r1) 151 162 syscall_exit_finish: 152 - clr_ri r4 153 163 mtspr SPRN_SRR0,r7 154 164 mtspr SPRN_SRR1,r8 155 165 ··· 225 237 /* Clear the exception marker on the stack to avoid confusing stacktrace */ 226 238 li r10, 0 227 239 stw r10, 8(r11) 228 - clr_ri r10 229 240 mtspr SPRN_SRR1,r9 230 241 mtspr SPRN_SRR0,r12 231 242 REST_GPR(9, r11) ··· 257 270 .Lfast_user_interrupt_return: 258 271 lwz r11,_NIP(r1) 259 272 lwz r12,_MSR(r1) 260 - clr_ri r4 261 273 mtspr SPRN_SRR0,r11 262 274 mtspr SPRN_SRR1,r12 263 275 ··· 299 313 cmpwi cr1,r3,0 300 314 lwz r11,_NIP(r1) 301 315 lwz r12,_MSR(r1) 302 - clr_ri r4 303 316 mtspr SPRN_SRR0,r11 304 317 mtspr SPRN_SRR1,r12 305 318
+4 -1
arch/powerpc/kernel/interrupt.c
··· 38 38 #else 39 39 static inline bool exit_must_hard_disable(void) 40 40 { 41 - return false; 41 + return true; 42 42 } 43 43 #endif 44 44 ··· 443 443 444 444 if (unlikely(stack_store)) 445 445 __hard_EE_RI_disable(); 446 + #else 447 + } else { 448 + __hard_EE_RI_disable(); 446 449 #endif /* CONFIG_PPC64 */ 447 450 } 448 451
+19
arch/powerpc/kexec/core_64.c
··· 202 202 mb(); 203 203 } 204 204 205 + 206 + /* 207 + * The add_cpu() call in wake_offline_cpus() can fail as cpu_bootable() 208 + * returns false for CPUs that fail the cpu_smt_thread_allowed() check 209 + * or non primary threads if SMT is disabled. Re-enable SMT and set the 210 + * number of SMT threads to threads per core. 211 + */ 212 + static void kexec_smt_reenable(void) 213 + { 214 + #if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_SMT) 215 + lock_device_hotplug(); 216 + cpu_smt_num_threads = threads_per_core; 217 + cpu_smt_control = CPU_SMT_ENABLED; 218 + unlock_device_hotplug(); 219 + #endif 220 + } 221 + 205 222 /* 206 223 * We need to make sure each present CPU is online. The next kernel will scan 207 224 * the device tree and assume primary threads are online and query secondary ··· 232 215 static void wake_offline_cpus(void) 233 216 { 234 217 int cpu = 0; 218 + 219 + kexec_smt_reenable(); 235 220 236 221 for_each_present_cpu(cpu) { 237 222 if (!cpu_online(cpu)) {
+5 -4
arch/powerpc/platforms/powernv/idle.c
··· 1171 1171 u64 max_residency_ns = 0; 1172 1172 int i; 1173 1173 1174 - /* stop is not really architected, we only have p9,p10 drivers */ 1175 - if (!pvr_version_is(PVR_POWER10) && !pvr_version_is(PVR_POWER9)) 1174 + /* stop is not really architected, we only have p9,p10 and p11 drivers */ 1175 + if (!pvr_version_is(PVR_POWER9) && !pvr_version_is(PVR_POWER10) && 1176 + !pvr_version_is(PVR_POWER11)) 1176 1177 return; 1177 1178 1178 1179 /* ··· 1190 1189 struct pnv_idle_states_t *state = &pnv_idle_states[i]; 1191 1190 u64 psscr_rl = state->psscr_val & PSSCR_RL_MASK; 1192 1191 1193 - /* No deep loss driver implemented for POWER10 yet */ 1194 - if (pvr_version_is(PVR_POWER10) && 1192 + /* No deep loss driver implemented for POWER10 and POWER11 yet */ 1193 + if ((pvr_version_is(PVR_POWER10) || pvr_version_is(PVR_POWER11)) && 1195 1194 state->flags & (OPAL_PM_TIMEBASE_STOP|OPAL_PM_LOSE_FULL_CONTEXT)) 1196 1195 continue; 1197 1196
-1
arch/powerpc/tools/gcc-check-fpatchable-function-entry.sh
··· 2 2 # SPDX-License-Identifier: GPL-2.0 3 3 4 4 set -e 5 - set -o pipefail 6 5 7 6 # To debug, uncomment the following line 8 7 # set -x
-1
arch/powerpc/tools/gcc-check-mprofile-kernel.sh
··· 2 2 # SPDX-License-Identifier: GPL-2.0 3 3 4 4 set -e 5 - set -o pipefail 6 5 7 6 # To debug, uncomment the following line 8 7 # set -x
+4 -4
arch/riscv/include/asm/atomic.h
··· 203 203 " add %[rc], %[p], %[a]\n" \ 204 204 " sc." sfx ".rl %[rc], %[rc], %[c]\n" \ 205 205 " bnez %[rc], 0b\n" \ 206 - " fence rw, rw\n" \ 206 + RISCV_FULL_BARRIER \ 207 207 "1:\n" \ 208 208 : [p]"=&r" (_prev), [rc]"=&r" (_rc), [c]"+A" (counter) \ 209 209 : [a]"r" (_a), [u]"r" (_u) \ ··· 242 242 " addi %[rc], %[p], 1\n" \ 243 243 " sc." sfx ".rl %[rc], %[rc], %[c]\n" \ 244 244 " bnez %[rc], 0b\n" \ 245 - " fence rw, rw\n" \ 245 + RISCV_FULL_BARRIER \ 246 246 "1:\n" \ 247 247 : [p]"=&r" (_prev), [rc]"=&r" (_rc), [c]"+A" (counter) \ 248 248 : \ ··· 268 268 " addi %[rc], %[p], -1\n" \ 269 269 " sc." sfx ".rl %[rc], %[rc], %[c]\n" \ 270 270 " bnez %[rc], 0b\n" \ 271 - " fence rw, rw\n" \ 271 + RISCV_FULL_BARRIER \ 272 272 "1:\n" \ 273 273 : [p]"=&r" (_prev), [rc]"=&r" (_rc), [c]"+A" (counter) \ 274 274 : \ ··· 294 294 " bltz %[rc], 1f\n" \ 295 295 " sc." sfx ".rl %[rc], %[rc], %[c]\n" \ 296 296 " bnez %[rc], 0b\n" \ 297 - " fence rw, rw\n" \ 297 + RISCV_FULL_BARRIER \ 298 298 "1:\n" \ 299 299 : [p]"=&r" (_prev), [rc]"=&r" (_rc), [c]"+A" (counter) \ 300 300 : \
+2
arch/riscv/include/asm/hwcap.h
··· 108 108 #define RISCV_ISA_EXT_ZICBOP 99 109 109 #define RISCV_ISA_EXT_SVRSW60T59B 100 110 110 #define RISCV_ISA_EXT_ZALASR 101 111 + #define RISCV_ISA_EXT_ZILSD 102 112 + #define RISCV_ISA_EXT_ZCLSD 103 111 113 112 114 #define RISCV_ISA_EXT_XLINUXENVCFG 127 113 115
+14 -2
arch/riscv/include/asm/pgtable.h
··· 660 660 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 661 661 unsigned long address, pte_t *ptep) 662 662 { 663 - pte_t pte = __pte(atomic_long_xchg((atomic_long_t *)ptep, 0)); 663 + #ifdef CONFIG_SMP 664 + pte_t pte = __pte(xchg(&ptep->pte, 0)); 665 + #else 666 + pte_t pte = *ptep; 667 + 668 + set_pte(ptep, __pte(0)); 669 + #endif 664 670 665 671 page_table_check_pte_clear(mm, pte); 666 672 ··· 1003 997 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 1004 998 unsigned long address, pmd_t *pmdp) 1005 999 { 1006 - pmd_t pmd = __pmd(atomic_long_xchg((atomic_long_t *)pmdp, 0)); 1000 + #ifdef CONFIG_SMP 1001 + pmd_t pmd = __pmd(xchg(&pmdp->pmd, 0)); 1002 + #else 1003 + pmd_t pmd = *pmdp; 1004 + 1005 + pmd_clear(pmdp); 1006 + #endif 1007 1007 1008 1008 page_table_check_pmd_clear(mm, pmd); 1009 1009
+29
arch/riscv/include/asm/sbi.h
··· 37 37 SBI_EXT_NACL = 0x4E41434C, 38 38 SBI_EXT_FWFT = 0x46574654, 39 39 SBI_EXT_MPXY = 0x4D505859, 40 + SBI_EXT_DBTR = 0x44425452, 40 41 41 42 /* Experimentals extensions must lie within this range */ 42 43 SBI_EXT_EXPERIMENTAL_START = 0x08000000, ··· 505 504 #define SBI_MPXY_CHAN_CAP_SEND_WITH_RESP BIT(3) 506 505 #define SBI_MPXY_CHAN_CAP_SEND_WITHOUT_RESP BIT(4) 507 506 #define SBI_MPXY_CHAN_CAP_GET_NOTIFICATIONS BIT(5) 507 + 508 + /* SBI debug triggers function IDs */ 509 + enum sbi_ext_dbtr_fid { 510 + SBI_EXT_DBTR_NUM_TRIGGERS = 0, 511 + SBI_EXT_DBTR_SETUP_SHMEM, 512 + SBI_EXT_DBTR_TRIG_READ, 513 + SBI_EXT_DBTR_TRIG_INSTALL, 514 + SBI_EXT_DBTR_TRIG_UPDATE, 515 + SBI_EXT_DBTR_TRIG_UNINSTALL, 516 + SBI_EXT_DBTR_TRIG_ENABLE, 517 + SBI_EXT_DBTR_TRIG_DISABLE, 518 + }; 519 + 520 + struct sbi_dbtr_data_msg { 521 + unsigned long tstate; 522 + unsigned long tdata1; 523 + unsigned long tdata2; 524 + unsigned long tdata3; 525 + }; 526 + 527 + struct sbi_dbtr_id_msg { 528 + unsigned long idx; 529 + }; 530 + 531 + union sbi_dbtr_shmem_entry { 532 + struct sbi_dbtr_data_msg data; 533 + struct sbi_dbtr_id_msg id; 534 + }; 508 535 509 536 /* SBI spec version fields */ 510 537 #define SBI_SPEC_VERSION_DEFAULT 0x1
+3
arch/riscv/include/asm/vector.h
··· 424 424 #define riscv_v_thread_free(tsk) do {} while (0) 425 425 #define riscv_v_setup_ctx_cache() do {} while (0) 426 426 #define riscv_v_thread_alloc(tsk) do {} while (0) 427 + #define get_cpu_vector_context() do {} while (0) 428 + #define put_cpu_vector_context() do {} while (0) 429 + #define riscv_v_vstate_set_restore(task, regs) do {} while (0) 427 430 428 431 #endif /* CONFIG_RISCV_ISA_V */ 429 432
+3
arch/riscv/include/uapi/asm/hwprobe.h
··· 84 84 #define RISCV_HWPROBE_EXT_ZABHA (1ULL << 58) 85 85 #define RISCV_HWPROBE_EXT_ZALASR (1ULL << 59) 86 86 #define RISCV_HWPROBE_EXT_ZICBOP (1ULL << 60) 87 + #define RISCV_HWPROBE_EXT_ZILSD (1ULL << 61) 88 + #define RISCV_HWPROBE_EXT_ZCLSD (1ULL << 62) 89 + 87 90 #define RISCV_HWPROBE_KEY_CPUPERF_0 5 88 91 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) 89 92 #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
+24
arch/riscv/kernel/cpufeature.c
··· 242 242 return -EPROBE_DEFER; 243 243 } 244 244 245 + static int riscv_ext_zilsd_validate(const struct riscv_isa_ext_data *data, 246 + const unsigned long *isa_bitmap) 247 + { 248 + if (IS_ENABLED(CONFIG_64BIT)) 249 + return -EINVAL; 250 + 251 + return 0; 252 + } 253 + 254 + static int riscv_ext_zclsd_validate(const struct riscv_isa_ext_data *data, 255 + const unsigned long *isa_bitmap) 256 + { 257 + if (IS_ENABLED(CONFIG_64BIT)) 258 + return -EINVAL; 259 + 260 + if (__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_ZILSD) && 261 + __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_ZCA)) 262 + return 0; 263 + 264 + return -EPROBE_DEFER; 265 + } 266 + 245 267 static int riscv_vector_f_validate(const struct riscv_isa_ext_data *data, 246 268 const unsigned long *isa_bitmap) 247 269 { ··· 506 484 __RISCV_ISA_EXT_DATA_VALIDATE(zcd, RISCV_ISA_EXT_ZCD, riscv_ext_zcd_validate), 507 485 __RISCV_ISA_EXT_DATA_VALIDATE(zcf, RISCV_ISA_EXT_ZCF, riscv_ext_zcf_validate), 508 486 __RISCV_ISA_EXT_DATA_VALIDATE(zcmop, RISCV_ISA_EXT_ZCMOP, riscv_ext_zca_depends), 487 + __RISCV_ISA_EXT_DATA_VALIDATE(zclsd, RISCV_ISA_EXT_ZCLSD, riscv_ext_zclsd_validate), 488 + __RISCV_ISA_EXT_DATA_VALIDATE(zilsd, RISCV_ISA_EXT_ZILSD, riscv_ext_zilsd_validate), 509 489 __RISCV_ISA_EXT_DATA(zba, RISCV_ISA_EXT_ZBA), 510 490 __RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB), 511 491 __RISCV_ISA_EXT_DATA(zbc, RISCV_ISA_EXT_ZBC),
+41 -21
arch/riscv/kernel/signal.c
··· 68 68 #define restore_fp_state(task, regs) (0) 69 69 #endif 70 70 71 - #ifdef CONFIG_RISCV_ISA_V 72 - 73 - static long save_v_state(struct pt_regs *regs, void __user **sc_vec) 71 + static long save_v_state(struct pt_regs *regs, void __user *sc_vec) 74 72 { 75 - struct __riscv_ctx_hdr __user *hdr; 76 73 struct __sc_riscv_v_state __user *state; 77 74 void __user *datap; 78 75 long err; 79 76 80 - hdr = *sc_vec; 81 - /* Place state to the user's signal context space after the hdr */ 82 - state = (struct __sc_riscv_v_state __user *)(hdr + 1); 77 + if (!IS_ENABLED(CONFIG_RISCV_ISA_V) || 78 + !((has_vector() || has_xtheadvector()) && 79 + riscv_v_vstate_query(regs))) 80 + return 0; 81 + 82 + /* Place state to the user's signal context space */ 83 + state = (struct __sc_riscv_v_state __user *)sc_vec; 83 84 /* Point datap right after the end of __sc_riscv_v_state */ 84 85 datap = state + 1; 85 86 ··· 98 97 err |= __put_user((__force void *)datap, &state->v_state.datap); 99 98 /* Copy the whole vector content to user space datap. */ 100 99 err |= __copy_to_user(datap, current->thread.vstate.datap, riscv_v_vsize); 101 - /* Copy magic to the user space after saving all vector conetext */ 102 - err |= __put_user(RISCV_V_MAGIC, &hdr->magic); 103 - err |= __put_user(riscv_v_sc_size, &hdr->size); 104 100 if (unlikely(err)) 105 - return err; 101 + return -EFAULT; 106 102 107 - /* Only progress the sv_vec if everything has done successfully */ 108 - *sc_vec += riscv_v_sc_size; 109 - return 0; 103 + /* Only return the size if everything has done successfully */ 104 + return riscv_v_sc_size; 110 105 } 111 106 112 107 /* ··· 139 142 */ 140 143 return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); 141 144 } 142 - #else 143 - #define save_v_state(task, regs) (0) 144 - #define __restore_v_state(task, regs) (0) 145 - #endif 145 + 146 + struct arch_ext_priv { 147 + __u32 magic; 148 + long (*save)(struct pt_regs *regs, void __user *sc_vec); 149 + }; 150 + 151 + struct arch_ext_priv arch_ext_list[] = { 152 + { 153 + .magic = RISCV_V_MAGIC, 154 + .save = &save_v_state, 155 + }, 156 + }; 157 + 158 + const size_t nr_arch_exts = ARRAY_SIZE(arch_ext_list); 146 159 147 160 static long restore_sigcontext(struct pt_regs *regs, 148 161 struct sigcontext __user *sc) ··· 277 270 { 278 271 struct sigcontext __user *sc = &frame->uc.uc_mcontext; 279 272 struct __riscv_ctx_hdr __user *sc_ext_ptr = &sc->sc_extdesc.hdr; 280 - long err; 273 + struct arch_ext_priv *arch_ext; 274 + long err, i, ext_size; 281 275 282 276 /* sc_regs is structured the same as the start of pt_regs */ 283 277 err = __copy_to_user(&sc->sc_regs, regs, sizeof(sc->sc_regs)); ··· 286 278 if (has_fpu()) 287 279 err |= save_fp_state(regs, &sc->sc_fpregs); 288 280 /* Save the vector state. */ 289 - if ((has_vector() || has_xtheadvector()) && riscv_v_vstate_query(regs)) 290 - err |= save_v_state(regs, (void __user **)&sc_ext_ptr); 281 + for (i = 0; i < nr_arch_exts; i++) { 282 + arch_ext = &arch_ext_list[i]; 283 + if (!arch_ext->save) 284 + continue; 285 + 286 + ext_size = arch_ext->save(regs, sc_ext_ptr + 1); 287 + if (ext_size <= 0) { 288 + err |= ext_size; 289 + } else { 290 + err |= __put_user(arch_ext->magic, &sc_ext_ptr->magic); 291 + err |= __put_user(ext_size, &sc_ext_ptr->size); 292 + sc_ext_ptr = (void *)sc_ext_ptr + ext_size; 293 + } 294 + } 291 295 /* Write zero to fp-reserved space and check it on restore_sigcontext */ 292 296 err |= __put_user(0, &sc->sc_extdesc.reserved); 293 297 /* And put END __riscv_ctx_hdr at the end. */
+2
arch/riscv/kernel/sys_hwprobe.c
··· 121 121 EXT_KEY(ZBS); 122 122 EXT_KEY(ZCA); 123 123 EXT_KEY(ZCB); 124 + EXT_KEY(ZCLSD); 124 125 EXT_KEY(ZCMOP); 125 126 EXT_KEY(ZICBOM); 126 127 EXT_KEY(ZICBOP); ··· 131 130 EXT_KEY(ZIHINTNTL); 132 131 EXT_KEY(ZIHINTPAUSE); 133 132 EXT_KEY(ZIHPM); 133 + EXT_KEY(ZILSD); 134 134 EXT_KEY(ZIMOP); 135 135 EXT_KEY(ZKND); 136 136 EXT_KEY(ZKNE);
+1
arch/s390/include/uapi/asm/ipl.h
··· 15 15 #define IPL_PL_FLAG_IPLPS 0x80 16 16 #define IPL_PL_FLAG_SIPL 0x40 17 17 #define IPL_PL_FLAG_IPLSR 0x20 18 + #define IPL_PL_FLAG_SBP 0x10 18 19 19 20 /* IPL Parameter Block header */ 20 21 struct ipl_pb_hdr {
+36 -12
arch/s390/kernel/ipl.c
··· 262 262 sys_##_prefix##_##_name##_show, \ 263 263 sys_##_prefix##_##_name##_store) 264 264 265 + #define DEFINE_IPL_ATTR_BOOTPROG_RW(_prefix, _name, _fmt_out, _fmt_in, _hdr, _value) \ 266 + IPL_ATTR_SHOW_FN(_prefix, _name, _fmt_out, (unsigned long long) _value) \ 267 + static ssize_t sys_##_prefix##_##_name##_store(struct kobject *kobj, \ 268 + struct kobj_attribute *attr, \ 269 + const char *buf, size_t len) \ 270 + { \ 271 + unsigned long long value; \ 272 + if (sscanf(buf, _fmt_in, &value) != 1) \ 273 + return -EINVAL; \ 274 + (_value) = value; \ 275 + (_hdr).flags &= ~IPL_PL_FLAG_SBP; \ 276 + return len; \ 277 + } \ 278 + static struct kobj_attribute sys_##_prefix##_##_name##_attr = \ 279 + __ATTR(_name, 0644, \ 280 + sys_##_prefix##_##_name##_show, \ 281 + sys_##_prefix##_##_name##_store) 282 + 265 283 #define DEFINE_IPL_ATTR_STR_RW(_prefix, _name, _fmt_out, _fmt_in, _value)\ 266 284 IPL_ATTR_SHOW_FN(_prefix, _name, _fmt_out, _value) \ 267 285 static ssize_t sys_##_prefix##_##_name##_store(struct kobject *kobj, \ ··· 836 818 reipl_block_fcp->fcp.wwpn); 837 819 DEFINE_IPL_ATTR_RW(reipl_fcp, lun, "0x%016llx\n", "%llx\n", 838 820 reipl_block_fcp->fcp.lun); 839 - DEFINE_IPL_ATTR_RW(reipl_fcp, bootprog, "%lld\n", "%lld\n", 840 - reipl_block_fcp->fcp.bootprog); 841 821 DEFINE_IPL_ATTR_RW(reipl_fcp, br_lba, "%lld\n", "%lld\n", 842 822 reipl_block_fcp->fcp.br_lba); 843 823 DEFINE_IPL_ATTR_RW(reipl_fcp, device, "0.0.%04llx\n", "0.0.%llx\n", 844 824 reipl_block_fcp->fcp.devno); 825 + DEFINE_IPL_ATTR_BOOTPROG_RW(reipl_fcp, bootprog, "%lld\n", "%lld\n", 826 + reipl_block_fcp->hdr, 827 + reipl_block_fcp->fcp.bootprog); 845 828 846 829 static void reipl_get_ascii_loadparm(char *loadparm, 847 830 struct ipl_parameter_block *ibp) ··· 961 942 reipl_block_nvme->nvme.fid); 962 943 DEFINE_IPL_ATTR_RW(reipl_nvme, nsid, "0x%08llx\n", "%llx\n", 963 944 reipl_block_nvme->nvme.nsid); 964 - DEFINE_IPL_ATTR_RW(reipl_nvme, bootprog, "%lld\n", "%lld\n", 965 - reipl_block_nvme->nvme.bootprog); 966 945 DEFINE_IPL_ATTR_RW(reipl_nvme, br_lba, "%lld\n", "%lld\n", 967 946 reipl_block_nvme->nvme.br_lba); 947 + DEFINE_IPL_ATTR_BOOTPROG_RW(reipl_nvme, bootprog, "%lld\n", "%lld\n", 948 + reipl_block_nvme->hdr, 949 + reipl_block_nvme->nvme.bootprog); 968 950 969 951 static struct attribute *reipl_nvme_attrs[] = { 970 952 &sys_reipl_nvme_fid_attr.attr, ··· 1058 1038 }; 1059 1039 1060 1040 DEFINE_IPL_CCW_ATTR_RW(reipl_eckd, device, reipl_block_eckd->eckd); 1061 - DEFINE_IPL_ATTR_RW(reipl_eckd, bootprog, "%lld\n", "%lld\n", 1062 - reipl_block_eckd->eckd.bootprog); 1041 + DEFINE_IPL_ATTR_BOOTPROG_RW(reipl_eckd, bootprog, "%lld\n", "%lld\n", 1042 + reipl_block_eckd->hdr, 1043 + reipl_block_eckd->eckd.bootprog); 1063 1044 1064 1045 static struct attribute *reipl_eckd_attrs[] = { 1065 1046 &sys_reipl_eckd_device_attr.attr, ··· 1588 1567 dump_block_fcp->fcp.wwpn); 1589 1568 DEFINE_IPL_ATTR_RW(dump_fcp, lun, "0x%016llx\n", "%llx\n", 1590 1569 dump_block_fcp->fcp.lun); 1591 - DEFINE_IPL_ATTR_RW(dump_fcp, bootprog, "%lld\n", "%lld\n", 1592 - dump_block_fcp->fcp.bootprog); 1593 1570 DEFINE_IPL_ATTR_RW(dump_fcp, br_lba, "%lld\n", "%lld\n", 1594 1571 dump_block_fcp->fcp.br_lba); 1595 1572 DEFINE_IPL_ATTR_RW(dump_fcp, device, "0.0.%04llx\n", "0.0.%llx\n", 1596 1573 dump_block_fcp->fcp.devno); 1574 + DEFINE_IPL_ATTR_BOOTPROG_RW(dump_fcp, bootprog, "%lld\n", "%lld\n", 1575 + dump_block_fcp->hdr, 1576 + dump_block_fcp->fcp.bootprog); 1597 1577 1598 1578 DEFINE_IPL_ATTR_SCP_DATA_RW(dump_fcp, dump_block_fcp->hdr, 1599 1579 dump_block_fcp->fcp, ··· 1626 1604 dump_block_nvme->nvme.fid); 1627 1605 DEFINE_IPL_ATTR_RW(dump_nvme, nsid, "0x%08llx\n", "%llx\n", 1628 1606 dump_block_nvme->nvme.nsid); 1629 - DEFINE_IPL_ATTR_RW(dump_nvme, bootprog, "%lld\n", "%llx\n", 1630 - dump_block_nvme->nvme.bootprog); 1631 1607 DEFINE_IPL_ATTR_RW(dump_nvme, br_lba, "%lld\n", "%llx\n", 1632 1608 dump_block_nvme->nvme.br_lba); 1609 + DEFINE_IPL_ATTR_BOOTPROG_RW(dump_nvme, bootprog, "%lld\n", "%llx\n", 1610 + dump_block_nvme->hdr, 1611 + dump_block_nvme->nvme.bootprog); 1633 1612 1634 1613 DEFINE_IPL_ATTR_SCP_DATA_RW(dump_nvme, dump_block_nvme->hdr, 1635 1614 dump_block_nvme->nvme, ··· 1658 1635 1659 1636 /* ECKD dump device attributes */ 1660 1637 DEFINE_IPL_CCW_ATTR_RW(dump_eckd, device, dump_block_eckd->eckd); 1661 - DEFINE_IPL_ATTR_RW(dump_eckd, bootprog, "%lld\n", "%llx\n", 1662 - dump_block_eckd->eckd.bootprog); 1638 + DEFINE_IPL_ATTR_BOOTPROG_RW(dump_eckd, bootprog, "%lld\n", "%llx\n", 1639 + dump_block_eckd->hdr, 1640 + dump_block_eckd->eckd.bootprog); 1663 1641 1664 1642 IPL_ATTR_BR_CHR_SHOW_FN(dump, dump_block_eckd->eckd); 1665 1643 IPL_ATTR_BR_CHR_STORE_FN(dump, dump_block_eckd->eckd);
+2 -16
arch/s390/kernel/stacktrace.c
··· 104 104 struct stack_frame_vdso_wrapper __user *sf_vdso; 105 105 struct stack_frame_user __user *sf; 106 106 unsigned long ip, sp; 107 - bool first = true; 108 107 109 108 if (!current->mm) 110 109 return; ··· 132 133 if (__get_user(ip, &sf->gprs[8])) 133 134 break; 134 135 } 135 - /* Sanity check: ABI requires SP to be 8 byte aligned. */ 136 - if (sp & 0x7) 136 + /* Validate SP and RA (ABI requires SP to be 8 byte aligned). */ 137 + if (sp & 0x7 || ip_invalid(ip)) 137 138 break; 138 - if (ip_invalid(ip)) { 139 - /* 140 - * If the instruction address is invalid, and this 141 - * is the first stack frame, assume r14 has not 142 - * been written to the stack yet. Otherwise exit. 143 - */ 144 - if (!first) 145 - break; 146 - ip = regs->gprs[14]; 147 - if (ip_invalid(ip)) 148 - break; 149 - } 150 139 if (!store_ip(consume_entry, cookie, entry, perf, ip)) 151 140 break; 152 - first = false; 153 141 } 154 142 pagefault_enable(); 155 143 }
+6 -1
arch/s390/pci/pci.c
··· 961 961 } 962 962 963 963 void zpci_release_device(struct kref *kref) 964 + __releases(&zpci_list_lock) 964 965 { 965 966 struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref); 966 967 ··· 1149 1148 1150 1149 int zpci_scan_devices(void) 1151 1150 { 1151 + struct zpci_bus *zbus; 1152 1152 LIST_HEAD(scan_list); 1153 1153 int rc; 1154 1154 ··· 1158 1156 return rc; 1159 1157 1160 1158 zpci_add_devices(&scan_list); 1161 - zpci_bus_scan_busses(); 1159 + zpci_bus_for_each(zbus) { 1160 + zpci_bus_scan_bus(zbus); 1161 + cond_resched(); 1162 + } 1162 1163 return 0; 1163 1164 } 1164 1165
+71 -27
arch/s390/pci/pci_bus.c
··· 153 153 return ret; 154 154 } 155 155 156 - /* zpci_bus_scan_busses - Scan all registered busses 157 - * 158 - * Scan all available zbusses 159 - * 160 - */ 161 - void zpci_bus_scan_busses(void) 162 - { 163 - struct zpci_bus *zbus = NULL; 164 - 165 - mutex_lock(&zbus_list_lock); 166 - list_for_each_entry(zbus, &zbus_list, bus_next) { 167 - zpci_bus_scan_bus(zbus); 168 - cond_resched(); 169 - } 170 - mutex_unlock(&zbus_list_lock); 171 - } 172 - 173 156 static bool zpci_bus_is_multifunction_root(struct zpci_dev *zdev) 174 157 { 175 158 return !s390_pci_no_rid && zdev->rid_available && ··· 205 222 return -ENOMEM; 206 223 } 207 224 208 - static void zpci_bus_release(struct kref *kref) 225 + /** 226 + * zpci_bus_release - Un-initialize resources associated with the zbus and 227 + * free memory 228 + * @kref: refcount * that is part of struct zpci_bus 229 + * 230 + * MUST be called with `zbus_list_lock` held, but the lock is released during 231 + * run of the function. 232 + */ 233 + static inline void zpci_bus_release(struct kref *kref) 234 + __releases(&zbus_list_lock) 209 235 { 210 236 struct zpci_bus *zbus = container_of(kref, struct zpci_bus, kref); 237 + 238 + lockdep_assert_held(&zbus_list_lock); 239 + 240 + list_del(&zbus->bus_next); 241 + mutex_unlock(&zbus_list_lock); 242 + 243 + /* 244 + * At this point no-one should see this object, or be able to get a new 245 + * reference to it. 246 + */ 211 247 212 248 if (zbus->bus) { 213 249 pci_lock_rescan_remove(); ··· 239 237 pci_unlock_rescan_remove(); 240 238 } 241 239 242 - mutex_lock(&zbus_list_lock); 243 - list_del(&zbus->bus_next); 244 - mutex_unlock(&zbus_list_lock); 245 240 zpci_remove_parent_msi_domain(zbus); 246 241 kfree(zbus); 247 242 } 248 243 249 - static void zpci_bus_put(struct zpci_bus *zbus) 244 + static inline void __zpci_bus_get(struct zpci_bus *zbus) 250 245 { 251 - kref_put(&zbus->kref, zpci_bus_release); 246 + lockdep_assert_held(&zbus_list_lock); 247 + kref_get(&zbus->kref); 248 + } 249 + 250 + static inline void zpci_bus_put(struct zpci_bus *zbus) 251 + { 252 + kref_put_mutex(&zbus->kref, zpci_bus_release, &zbus_list_lock); 252 253 } 253 254 254 255 static struct zpci_bus *zpci_bus_get(int topo, bool topo_is_tid) ··· 263 258 if (!zbus->multifunction) 264 259 continue; 265 260 if (topo_is_tid == zbus->topo_is_tid && topo == zbus->topo) { 266 - kref_get(&zbus->kref); 261 + __zpci_bus_get(zbus); 267 262 goto out_unlock; 268 263 } 269 264 } ··· 271 266 out_unlock: 272 267 mutex_unlock(&zbus_list_lock); 273 268 return zbus; 269 + } 270 + 271 + /** 272 + * zpci_bus_get_next - get the next zbus object from given position in the list 273 + * @pos: current position/cursor in the global zbus list 274 + * 275 + * Acquires and releases references as the cursor iterates (might also free/ 276 + * release the cursor). Is tolerant of concurrent operations on the list. 277 + * 278 + * To begin the iteration, set *@pos to %NULL before calling the function. 279 + * 280 + * *@pos is set to %NULL in cases where either the list is empty, or *@pos is 281 + * the last element in the list. 282 + * 283 + * Context: Process context. May sleep. 284 + */ 285 + void zpci_bus_get_next(struct zpci_bus **pos) 286 + { 287 + struct zpci_bus *curp = *pos, *next = NULL; 288 + 289 + mutex_lock(&zbus_list_lock); 290 + if (curp) 291 + next = list_next_entry(curp, bus_next); 292 + else 293 + next = list_first_entry(&zbus_list, typeof(*curp), bus_next); 294 + 295 + if (list_entry_is_head(next, &zbus_list, bus_next)) 296 + next = NULL; 297 + 298 + if (next) 299 + __zpci_bus_get(next); 300 + 301 + *pos = next; 302 + mutex_unlock(&zbus_list_lock); 303 + 304 + /* zpci_bus_put() might drop refcount to 0 and locks zbus_list_lock */ 305 + if (curp) 306 + zpci_bus_put(curp); 274 307 } 275 308 276 309 static struct zpci_bus *zpci_bus_alloc(int topo, bool topo_is_tid) ··· 322 279 zbus->topo = topo; 323 280 zbus->topo_is_tid = topo_is_tid; 324 281 INIT_LIST_HEAD(&zbus->bus_next); 325 - mutex_lock(&zbus_list_lock); 326 - list_add_tail(&zbus->bus_next, &zbus_list); 327 - mutex_unlock(&zbus_list_lock); 328 282 329 283 kref_init(&zbus->kref); 330 284 INIT_LIST_HEAD(&zbus->resources); ··· 330 290 zbus->bus_resource.end = ZPCI_BUS_NR; 331 291 zbus->bus_resource.flags = IORESOURCE_BUS; 332 292 pci_add_resource(&zbus->resources, &zbus->bus_resource); 293 + 294 + mutex_lock(&zbus_list_lock); 295 + list_add_tail(&zbus->bus_next, &zbus_list); 296 + mutex_unlock(&zbus_list_lock); 333 297 334 298 return zbus; 335 299 }
+14 -1
arch/s390/pci/pci_bus.h
··· 15 15 void zpci_bus_device_unregister(struct zpci_dev *zdev); 16 16 17 17 int zpci_bus_scan_bus(struct zpci_bus *zbus); 18 - void zpci_bus_scan_busses(void); 18 + void zpci_bus_get_next(struct zpci_bus **pos); 19 + 20 + /** 21 + * zpci_bus_for_each - iterate over all the registered zbus objects 22 + * @pos: a struct zpci_bus * as cursor 23 + * 24 + * Acquires and releases references as the cursor iterates over the registered 25 + * objects. Is tolerant against concurrent removals of objects. 26 + * 27 + * Context: Process context. May sleep. 28 + */ 29 + #define zpci_bus_for_each(pos) \ 30 + for ((pos) = NULL, zpci_bus_get_next(&(pos)); (pos) != NULL; \ 31 + zpci_bus_get_next(&(pos))) 19 32 20 33 int zpci_bus_scan_device(struct zpci_dev *zdev); 21 34 void zpci_bus_remove_device(struct zpci_dev *zdev, bool set_error);
+1 -1
arch/x86/include/asm/bug.h
··· 15 15 /* 16 16 * Despite that some emulators terminate on UD2, we use it for WARN(). 17 17 */ 18 - #define ASM_UD2 _ASM_BYTES(0x0f, 0x0b) 18 + #define ASM_UD2 __ASM_FORM(ud2) 19 19 #define INSN_UD2 0x0b0f 20 20 #define LEN_UD2 2 21 21
+7
arch/x86/include/asm/irq_remapping.h
··· 87 87 } 88 88 89 89 #endif /* CONFIG_IRQ_REMAP */ 90 + 91 + #ifdef CONFIG_X86_POSTED_MSI 92 + void intel_ack_posted_msi_irq(struct irq_data *irqd); 93 + #else 94 + #define intel_ack_posted_msi_irq NULL 95 + #endif 96 + 90 97 #endif /* __X86_IRQ_REMAPPING_H */
+1 -1
arch/x86/include/asm/irqflags.h
··· 25 25 */ 26 26 asm volatile("# __raw_save_flags\n\t" 27 27 "pushf ; pop %0" 28 - : "=rm" (flags) 28 + : ASM_OUTPUT_RM (flags) 29 29 : /* no input */ 30 30 : "memory"); 31 31
+1 -1
arch/x86/include/asm/uv/bios.h
··· 122 122 struct { 123 123 u32 type:8; /* type of entry */ 124 124 u32 offset:24; /* byte offset from struct start to entry */ 125 - } entry[1]; /* additional entries follow */ 125 + } entry[]; /* additional entries follow */ 126 126 }; 127 127 extern struct uv_systab *uv_systab; 128 128
+1 -1
arch/x86/kernel/cpu/sgx/ioctl.c
··· 242 242 /* 243 243 * If the caller requires measurement of the page as a proof for the content, 244 244 * use EEXTEND to add a measurement for 256 bytes of the page. Repeat this 245 - * operation until the entire page is measured." 245 + * operation until the entire page is measured. 246 246 */ 247 247 static int __sgx_encl_extend(struct sgx_encl *encl, 248 248 struct sgx_epc_page *epc_page)
+2 -2
arch/x86/kernel/fpu/xstate.c
··· 1946 1946 }; 1947 1947 1948 1948 if (!dump_emit(cprm, &xc, sizeof(xc))) 1949 - return 0; 1949 + return -1; 1950 1950 1951 1951 num_records++; 1952 1952 } ··· 1984 1984 return 1; 1985 1985 1986 1986 num_records = dump_xsave_layout_desc(cprm); 1987 - if (!num_records) 1987 + if (num_records < 0) 1988 1988 return 1; 1989 1989 1990 1990 /* Total size should be equal to the number of records */
+23
arch/x86/kernel/irq.c
··· 397 397 398 398 /* Posted Interrupt Descriptors for coalesced MSIs to be posted */ 399 399 DEFINE_PER_CPU_ALIGNED(struct pi_desc, posted_msi_pi_desc); 400 + static DEFINE_PER_CPU_CACHE_HOT(bool, posted_msi_handler_active); 400 401 401 402 void intel_posted_msi_init(void) 402 403 { ··· 413 412 apic_id = this_cpu_read(x86_cpu_to_apicid); 414 413 destination = x2apic_enabled() ? apic_id : apic_id << 8; 415 414 this_cpu_write(posted_msi_pi_desc.ndst, destination); 415 + } 416 + 417 + void intel_ack_posted_msi_irq(struct irq_data *irqd) 418 + { 419 + irq_move_irq(irqd); 420 + 421 + /* 422 + * Handle the rare case that irq_retrigger() raised the actual 423 + * assigned vector on the target CPU, which means that it was not 424 + * invoked via the posted MSI handler below. In that case APIC EOI 425 + * is required as otherwise the ISR entry becomes stale and lower 426 + * priority interrupts are never going to be delivered after that. 427 + * 428 + * If the posted handler invoked the device interrupt handler then 429 + * the EOI would be premature because it would acknowledge the 430 + * posted vector. 431 + */ 432 + if (unlikely(!__this_cpu_read(posted_msi_handler_active))) 433 + apic_eoi(); 416 434 } 417 435 418 436 static __always_inline bool handle_pending_pir(unsigned long *pir, struct pt_regs *regs) ··· 466 446 467 447 pid = this_cpu_ptr(&posted_msi_pi_desc); 468 448 449 + /* Mark the handler active for intel_ack_posted_msi_irq() */ 450 + __this_cpu_write(posted_msi_handler_active, true); 469 451 inc_irq_stat(posted_msi_notification_count); 470 452 irq_enter(); 471 453 ··· 496 474 497 475 apic_eoi(); 498 476 irq_exit(); 477 + __this_cpu_write(posted_msi_handler_active, false); 499 478 set_irq_regs(old_regs); 500 479 } 501 480 #endif /* X86_POSTED_MSI */
+27 -12
arch/x86/kernel/unwind_orc.c
··· 2 2 #include <linux/objtool.h> 3 3 #include <linux/module.h> 4 4 #include <linux/sort.h> 5 + #include <linux/bpf.h> 5 6 #include <asm/ptrace.h> 6 7 #include <asm/stacktrace.h> 7 8 #include <asm/unwind.h> ··· 173 172 } 174 173 #endif 175 174 175 + /* Fake frame pointer entry -- used as a fallback for generated code */ 176 + static struct orc_entry orc_fp_entry = { 177 + .type = ORC_TYPE_CALL, 178 + .sp_reg = ORC_REG_BP, 179 + .sp_offset = 16, 180 + .bp_reg = ORC_REG_PREV_SP, 181 + .bp_offset = -16, 182 + }; 183 + 184 + static struct orc_entry *orc_bpf_find(unsigned long ip) 185 + { 186 + #ifdef CONFIG_BPF_JIT 187 + if (bpf_has_frame_pointer(ip)) 188 + return &orc_fp_entry; 189 + #endif 190 + 191 + return NULL; 192 + } 193 + 176 194 /* 177 195 * If we crash with IP==0, the last successfully executed instruction 178 196 * was probably an indirect function call with a NULL function pointer, ··· 204 184 .sp_reg = ORC_REG_SP, 205 185 .bp_reg = ORC_REG_UNDEFINED, 206 186 .type = ORC_TYPE_CALL 207 - }; 208 - 209 - /* Fake frame pointer entry -- used as a fallback for generated code */ 210 - static struct orc_entry orc_fp_entry = { 211 - .type = ORC_TYPE_CALL, 212 - .sp_reg = ORC_REG_BP, 213 - .sp_offset = 16, 214 - .bp_reg = ORC_REG_PREV_SP, 215 - .bp_offset = -16, 216 187 }; 217 188 218 189 static struct orc_entry *orc_find(unsigned long ip) ··· 246 235 247 236 /* Module lookup: */ 248 237 orc = orc_module_find(ip); 238 + if (orc) 239 + return orc; 240 + 241 + /* BPF lookup: */ 242 + orc = orc_bpf_find(ip); 249 243 if (orc) 250 244 return orc; 251 245 ··· 511 495 if (!orc) { 512 496 /* 513 497 * As a fallback, try to assume this code uses a frame pointer. 514 - * This is useful for generated code, like BPF, which ORC 515 - * doesn't know about. This is just a guess, so the rest of 516 - * the unwind is no longer considered reliable. 498 + * This is just a guess, so the rest of the unwind is no longer 499 + * considered reliable. 517 500 */ 518 501 orc = &orc_fp_entry; 519 502 state->error = true;
+9 -2
arch/x86/kvm/cpuid.c
··· 510 510 int r; 511 511 512 512 /* 513 + * Apply pending runtime CPUID updates to the current CPUID entries to 514 + * avoid false positives due to mismatches on KVM-owned feature flags. 515 + */ 516 + if (vcpu->arch.cpuid_dynamic_bits_dirty) 517 + kvm_update_cpuid_runtime(vcpu); 518 + 519 + /* 513 520 * Swap the existing (old) entries with the incoming (new) entries in 514 521 * order to massage the new entries, e.g. to account for dynamic bits 515 - * that KVM controls, without clobbering the current guest CPUID, which 516 - * KVM needs to preserve in order to unwind on failure. 522 + * that KVM controls, without losing the current guest CPUID, which KVM 523 + * needs to preserve in order to unwind on failure. 517 524 * 518 525 * Similarly, save the vCPU's current cpu_caps so that the capabilities 519 526 * can be updated alongside the CPUID entries when performing runtime
+2 -2
arch/x86/kvm/svm/nested.c
··· 985 985 if (!nested_vmcb_check_save(vcpu) || 986 986 !nested_vmcb_check_controls(vcpu)) { 987 987 vmcb12->control.exit_code = SVM_EXIT_ERR; 988 - vmcb12->control.exit_code_hi = 0; 988 + vmcb12->control.exit_code_hi = -1u; 989 989 vmcb12->control.exit_info_1 = 0; 990 990 vmcb12->control.exit_info_2 = 0; 991 991 goto out; ··· 1018 1018 svm->soft_int_injected = false; 1019 1019 1020 1020 svm->vmcb->control.exit_code = SVM_EXIT_ERR; 1021 - svm->vmcb->control.exit_code_hi = 0; 1021 + svm->vmcb->control.exit_code_hi = -1u; 1022 1022 svm->vmcb->control.exit_info_1 = 0; 1023 1023 svm->vmcb->control.exit_info_2 = 0; 1024 1024
+2
arch/x86/kvm/svm/svm.c
··· 2443 2443 2444 2444 if (cr0 ^ val) { 2445 2445 svm->vmcb->control.exit_code = SVM_EXIT_CR0_SEL_WRITE; 2446 + svm->vmcb->control.exit_code_hi = 0; 2446 2447 ret = (nested_svm_exit_handled(svm) == NESTED_EXIT_DONE); 2447 2448 } 2448 2449 ··· 4618 4617 if (static_cpu_has(X86_FEATURE_NRIPS)) 4619 4618 vmcb->control.next_rip = info->next_rip; 4620 4619 vmcb->control.exit_code = icpt_info.exit_code; 4620 + vmcb->control.exit_code_hi = 0; 4621 4621 vmexit = nested_svm_exit_handled(svm); 4622 4622 4623 4623 ret = (vmexit == NESTED_EXIT_DONE) ? X86EMUL_INTERCEPTED
+4 -3
arch/x86/kvm/svm/svm.h
··· 761 761 762 762 static inline int nested_svm_simple_vmexit(struct vcpu_svm *svm, u32 exit_code) 763 763 { 764 - svm->vmcb->control.exit_code = exit_code; 765 - svm->vmcb->control.exit_info_1 = 0; 766 - svm->vmcb->control.exit_info_2 = 0; 764 + svm->vmcb->control.exit_code = exit_code; 765 + svm->vmcb->control.exit_code_hi = 0; 766 + svm->vmcb->control.exit_info_1 = 0; 767 + svm->vmcb->control.exit_info_2 = 0; 767 768 return nested_svm_vmexit(svm); 768 769 } 769 770
+2 -1
arch/x86/kvm/vmx/nested.c
··· 19 19 #include "trace.h" 20 20 #include "vmx.h" 21 21 #include "smm.h" 22 + #include "x86_ops.h" 22 23 23 24 static bool __read_mostly enable_shadow_vmcs = 1; 24 25 module_param_named(enable_shadow_vmcs, enable_shadow_vmcs, bool, S_IRUGO); ··· 5166 5165 5167 5166 if (vmx->nested.update_vmcs01_apicv_status) { 5168 5167 vmx->nested.update_vmcs01_apicv_status = false; 5169 - kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu); 5168 + vmx_refresh_apicv_exec_ctrl(vcpu); 5170 5169 } 5171 5170 5172 5171 if (vmx->nested.update_vmcs01_hwapic_isr) {
-9
arch/x86/kvm/vmx/vmx.c
··· 6937 6937 * VM-Exit, otherwise L1 with run with a stale SVI. 6938 6938 */ 6939 6939 if (is_guest_mode(vcpu)) { 6940 - /* 6941 - * KVM is supposed to forward intercepted L2 EOIs to L1 if VID 6942 - * is enabled in vmcs12; as above, the EOIs affect L2's vAPIC. 6943 - * Note, userspace can stuff state while L2 is active; assert 6944 - * that VID is disabled if and only if the vCPU is in KVM_RUN 6945 - * to avoid false positives if userspace is setting APIC state. 6946 - */ 6947 - WARN_ON_ONCE(vcpu->wants_to_run && 6948 - nested_cpu_has_vid(get_vmcs12(vcpu))); 6949 6940 to_vmx(vcpu)->nested.update_vmcs01_hwapic_isr = true; 6950 6941 return; 6951 6942 }
+7
arch/x86/kvm/x86.c
··· 10886 10886 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was 10887 10887 * still active when the interrupt got accepted. Make sure 10888 10888 * kvm_check_and_inject_events() is called to check for that. 10889 + * 10890 + * Update SVI when APICv gets enabled, otherwise SVI won't reflect the 10891 + * highest bit in vISR and the next accelerated EOI in the guest won't 10892 + * be virtualized correctly (the CPU uses SVI to determine which vISR 10893 + * vector to clear). 10889 10894 */ 10890 10895 if (!apic->apicv_active) 10891 10896 kvm_make_request(KVM_REQ_EVENT, vcpu); 10897 + else 10898 + kvm_apic_update_hwapic_isr(vcpu); 10892 10899 10893 10900 out: 10894 10901 preempt_enable();
+12
arch/x86/net/bpf_jit_comp.c
··· 1678 1678 emit_prologue(&prog, image, stack_depth, 1679 1679 bpf_prog_was_classic(bpf_prog), tail_call_reachable, 1680 1680 bpf_is_subprog(bpf_prog), bpf_prog->aux->exception_cb); 1681 + 1682 + bpf_prog->aux->ksym.fp_start = prog - temp; 1683 + 1681 1684 /* Exception callback will clobber callee regs for its own use, and 1682 1685 * restore the original callee regs from main prog's stack frame. 1683 1686 */ ··· 2739 2736 pop_r12(&prog); 2740 2737 } 2741 2738 EMIT1(0xC9); /* leave */ 2739 + bpf_prog->aux->ksym.fp_end = prog - temp; 2740 + 2742 2741 emit_return(&prog, image + addrs[i - 1] + (prog - temp)); 2743 2742 break; 2744 2743 ··· 3330 3325 } 3331 3326 EMIT1(0x55); /* push rbp */ 3332 3327 EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */ 3328 + if (im) 3329 + im->ksym.fp_start = prog - (u8 *)rw_image; 3330 + 3333 3331 if (!is_imm8(stack_size)) { 3334 3332 /* sub rsp, stack_size */ 3335 3333 EMIT3_off32(0x48, 0x81, 0xEC, stack_size); ··· 3470 3462 emit_ldx(&prog, BPF_DW, BPF_REG_0, BPF_REG_FP, -8); 3471 3463 3472 3464 emit_ldx(&prog, BPF_DW, BPF_REG_6, BPF_REG_FP, -rbx_off); 3465 + 3473 3466 EMIT1(0xC9); /* leave */ 3467 + if (im) 3468 + im->ksym.fp_end = prog - (u8 *)rw_image; 3469 + 3474 3470 if (flags & BPF_TRAMP_F_SKIP_FRAME) { 3475 3471 /* skip our return address and return to parent */ 3476 3472 EMIT4(0x48, 0x83, 0xC4, 8); /* add rsp, 8 */
+1 -1
arch/x86/xen/enlighten_pv.c
··· 108 108 * calls. 109 109 */ 110 110 DEFINE_PER_CPU(bool, xen_in_preemptible_hcall); 111 - EXPORT_SYMBOL_GPL(xen_in_preemptible_hcall); 111 + EXPORT_PER_CPU_SYMBOL_GPL(xen_in_preemptible_hcall); 112 112 113 113 /* 114 114 * In case of scheduling the flag must be cleared and restored after
+1 -1
block/bfq-iosched.c
··· 7181 7181 7182 7182 blk_stat_disable_accounting(bfqd->queue); 7183 7183 blk_queue_flag_clear(QUEUE_FLAG_DISABLE_WBT_DEF, bfqd->queue); 7184 - set_bit(ELEVATOR_FLAG_ENABLE_WBT_ON_EXIT, &e->flags); 7184 + wbt_enable_default(bfqd->queue->disk); 7185 7185 7186 7186 kfree(bfqd); 7187 7187 }
+9 -5
block/blk-settings.c
··· 161 161 return -EINVAL; 162 162 } 163 163 164 - if (bi->pi_tuple_size > bi->metadata_size) { 165 - pr_warn("pi_tuple_size (%u) exceeds metadata_size (%u)\n", 166 - bi->pi_tuple_size, 167 - bi->metadata_size); 164 + if (bi->pi_offset + bi->pi_tuple_size > bi->metadata_size) { 165 + pr_warn("pi_offset (%u) + pi_tuple_size (%u) exceeds metadata_size (%u)\n", 166 + bi->pi_offset, bi->pi_tuple_size, bi->metadata_size); 168 167 return -EINVAL; 169 168 } 170 169 ··· 193 194 break; 194 195 } 195 196 196 - if (!bi->interval_exp) 197 + if (!bi->interval_exp) { 197 198 bi->interval_exp = ilog2(lim->logical_block_size); 199 + } else if (bi->interval_exp < SECTOR_SHIFT || 200 + bi->interval_exp > ilog2(lim->logical_block_size)) { 201 + pr_warn("invalid interval_exp %u\n", bi->interval_exp); 202 + return -EINVAL; 203 + } 198 204 199 205 /* 200 206 * The PI generation / validation helpers do not expect intervals to
+1 -1
block/blk-sysfs.c
··· 932 932 elevator_set_default(q); 933 933 934 934 blk_queue_flag_set(QUEUE_FLAG_REGISTERED, q); 935 - wbt_enable_default(disk); 935 + wbt_init_enable_default(disk); 936 936 937 937 /* Now everything is ready and send out KOBJ_ADD uevent */ 938 938 kobject_uevent(&disk->queue_kobj, KOBJ_ADD);
+16 -4
block/blk-wbt.c
··· 699 699 /* 700 700 * Enable wbt if defaults are configured that way 701 701 */ 702 - void wbt_enable_default(struct gendisk *disk) 702 + static bool __wbt_enable_default(struct gendisk *disk) 703 703 { 704 704 struct request_queue *q = disk->queue; 705 705 struct rq_qos *rqos; ··· 716 716 if (enable && RQWB(rqos)->enable_state == WBT_STATE_OFF_DEFAULT) 717 717 RQWB(rqos)->enable_state = WBT_STATE_ON_DEFAULT; 718 718 mutex_unlock(&disk->rqos_state_mutex); 719 - return; 719 + return false; 720 720 } 721 721 mutex_unlock(&disk->rqos_state_mutex); 722 722 723 723 /* Queue not registered? Maybe shutting down... */ 724 724 if (!blk_queue_registered(q)) 725 - return; 725 + return false; 726 726 727 727 if (queue_is_mq(q) && enable) 728 - wbt_init(disk); 728 + return true; 729 + return false; 730 + } 731 + 732 + void wbt_enable_default(struct gendisk *disk) 733 + { 734 + __wbt_enable_default(disk); 729 735 } 730 736 EXPORT_SYMBOL_GPL(wbt_enable_default); 737 + 738 + void wbt_init_enable_default(struct gendisk *disk) 739 + { 740 + if (__wbt_enable_default(disk)) 741 + WARN_ON_ONCE(wbt_init(disk)); 742 + } 731 743 732 744 u64 wbt_default_latency_nsec(struct request_queue *q) 733 745 {
+5
block/blk-wbt.h
··· 5 5 #ifdef CONFIG_BLK_WBT 6 6 7 7 int wbt_init(struct gendisk *disk); 8 + void wbt_init_enable_default(struct gendisk *disk); 8 9 void wbt_disable_default(struct gendisk *disk); 9 10 void wbt_enable_default(struct gendisk *disk); 10 11 ··· 16 15 u64 wbt_default_latency_nsec(struct request_queue *); 17 16 18 17 #else 18 + 19 + static inline void wbt_init_enable_default(struct gendisk *disk) 20 + { 21 + } 19 22 20 23 static inline void wbt_disable_default(struct gendisk *disk) 21 24 {
-4
block/elevator.c
··· 633 633 .et = ctx->old->et, 634 634 .data = ctx->old->elevator_data 635 635 }; 636 - bool enable_wbt = test_bit(ELEVATOR_FLAG_ENABLE_WBT_ON_EXIT, 637 - &ctx->old->flags); 638 636 639 637 elv_unregister_queue(q, ctx->old); 640 638 blk_mq_free_sched_res(&res, ctx->old->type, q->tag_set); 641 639 kobject_put(&ctx->old->kobj); 642 - if (enable_wbt) 643 - wbt_enable_default(q->disk); 644 640 } 645 641 if (ctx->new) { 646 642 ret = elv_register_queue(q, ctx->new, !ctx->no_uevent);
-1
block/elevator.h
··· 156 156 157 157 #define ELEVATOR_FLAG_REGISTERED 0 158 158 #define ELEVATOR_FLAG_DYING 1 159 - #define ELEVATOR_FLAG_ENABLE_WBT_ON_EXIT 2 160 159 161 160 /* 162 161 * block elevator interface
+5 -4
block/ioctl.c
··· 442 442 if (copy_from_user(&read_keys, arg, sizeof(read_keys))) 443 443 return -EFAULT; 444 444 445 - keys_info_len = struct_size(keys_info, keys, read_keys.num_keys); 446 - if (keys_info_len == SIZE_MAX) 445 + if (read_keys.num_keys > PR_KEYS_MAX) 447 446 return -EINVAL; 448 447 449 - keys_info = kzalloc(keys_info_len, GFP_KERNEL); 448 + keys_info_len = struct_size(keys_info, keys, read_keys.num_keys); 449 + 450 + keys_info = kvzalloc(keys_info_len, GFP_KERNEL); 450 451 if (!keys_info) 451 452 return -ENOMEM; 452 453 ··· 474 473 if (copy_to_user(arg, &read_keys, sizeof(read_keys))) 475 474 ret = -EFAULT; 476 475 out: 477 - kfree(keys_info); 476 + kvfree(keys_info); 478 477 return ret; 479 478 } 480 479
+6
drivers/accel/amdxdna/aie2_pci.c
··· 17 17 #include <linux/iopoll.h> 18 18 #include <linux/pci.h> 19 19 #include <linux/xarray.h> 20 + #include <asm/hypervisor.h> 20 21 21 22 #include "aie2_msg_priv.h" 22 23 #include "aie2_pci.h" ··· 508 507 const struct firmware *fw; 509 508 unsigned long bars = 0; 510 509 int i, nvec, ret; 510 + 511 + if (!hypervisor_is_type(X86_HYPER_NATIVE)) { 512 + XDNA_ERR(xdna, "Running under hypervisor not supported"); 513 + return -EINVAL; 514 + } 511 515 512 516 ndev = drmm_kzalloc(&xdna->ddev, sizeof(*ndev), GFP_KERNEL); 513 517 if (!ndev)
+1 -1
drivers/acpi/acpi_pcc.c
··· 52 52 struct pcc_data *data; 53 53 struct acpi_pcc_info *ctx = handler_context; 54 54 struct pcc_mbox_chan *pcc_chan; 55 - static acpi_status ret; 55 + acpi_status ret; 56 56 57 57 data = kzalloc(sizeof(*data), GFP_KERNEL); 58 58 if (!data)
+2 -1
drivers/acpi/cppc_acpi.c
··· 1366 1366 /* Are any of the regs PCC ?*/ 1367 1367 if (CPC_IN_PCC(highest_reg) || CPC_IN_PCC(lowest_reg) || 1368 1368 CPC_IN_PCC(lowest_non_linear_reg) || CPC_IN_PCC(nominal_reg) || 1369 - CPC_IN_PCC(low_freq_reg) || CPC_IN_PCC(nom_freq_reg)) { 1369 + CPC_IN_PCC(low_freq_reg) || CPC_IN_PCC(nom_freq_reg) || 1370 + CPC_IN_PCC(guaranteed_reg)) { 1370 1371 if (pcc_ss_id < 0) { 1371 1372 pr_debug("Invalid pcc_ss_id\n"); 1372 1373 return -ENODEV;
+3
drivers/ata/libata-core.c
··· 4143 4143 { "ST3320[68]13AS", "SD1[5-9]", ATA_QUIRK_NONCQ | 4144 4144 ATA_QUIRK_FIRMWARE_WARN }, 4145 4145 4146 + /* Seagate disks with LPM issues */ 4147 + { "ST2000DM008-2FR102", NULL, ATA_QUIRK_NOLPM }, 4148 + 4146 4149 /* drives which fail FPDMA_AA activation (some may freeze afterwards) 4147 4150 the ST disks also have LPM issues */ 4148 4151 { "ST1000LM024 HN-M101MBB", NULL, ATA_QUIRK_BROKEN_FPDMA_AA |
+12 -10
drivers/base/power/runtime.c
··· 1868 1868 */ 1869 1869 void pm_runtime_reinit(struct device *dev) 1870 1870 { 1871 - if (!pm_runtime_enabled(dev)) { 1872 - if (dev->power.runtime_status == RPM_ACTIVE) 1873 - pm_runtime_set_suspended(dev); 1874 - if (dev->power.irq_safe) { 1875 - spin_lock_irq(&dev->power.lock); 1876 - dev->power.irq_safe = 0; 1877 - spin_unlock_irq(&dev->power.lock); 1878 - if (dev->parent) 1879 - pm_runtime_put(dev->parent); 1880 - } 1871 + if (pm_runtime_enabled(dev)) 1872 + return; 1873 + 1874 + if (dev->power.runtime_status == RPM_ACTIVE) 1875 + pm_runtime_set_suspended(dev); 1876 + 1877 + if (dev->power.irq_safe) { 1878 + spin_lock_irq(&dev->power.lock); 1879 + dev->power.irq_safe = 0; 1880 + spin_unlock_irq(&dev->power.lock); 1881 + if (dev->parent) 1882 + pm_runtime_put(dev->parent); 1881 1883 } 1882 1884 /* 1883 1885 * Clear power.needs_force_resume in case it has been set by
+13 -9
drivers/block/loop.c
··· 1082 1082 /* Order wrt reading lo_state in loop_validate_file(). */ 1083 1083 wmb(); 1084 1084 1085 - lo->lo_state = Lo_bound; 1085 + WRITE_ONCE(lo->lo_state, Lo_bound); 1086 1086 if (part_shift) 1087 1087 lo->lo_flags |= LO_FLAGS_PARTSCAN; 1088 1088 partscan = lo->lo_flags & LO_FLAGS_PARTSCAN; ··· 1179 1179 if (!part_shift) 1180 1180 set_bit(GD_SUPPRESS_PART_SCAN, &lo->lo_disk->state); 1181 1181 mutex_lock(&lo->lo_mutex); 1182 - lo->lo_state = Lo_unbound; 1182 + WRITE_ONCE(lo->lo_state, Lo_unbound); 1183 1183 mutex_unlock(&lo->lo_mutex); 1184 1184 1185 1185 /* ··· 1218 1218 1219 1219 lo->lo_flags |= LO_FLAGS_AUTOCLEAR; 1220 1220 if (disk_openers(lo->lo_disk) == 1) 1221 - lo->lo_state = Lo_rundown; 1221 + WRITE_ONCE(lo->lo_state, Lo_rundown); 1222 1222 loop_global_unlock(lo, true); 1223 1223 1224 1224 return 0; ··· 1743 1743 1744 1744 mutex_lock(&lo->lo_mutex); 1745 1745 if (lo->lo_state == Lo_bound && (lo->lo_flags & LO_FLAGS_AUTOCLEAR)) 1746 - lo->lo_state = Lo_rundown; 1746 + WRITE_ONCE(lo->lo_state, Lo_rundown); 1747 1747 1748 1748 need_clear = (lo->lo_state == Lo_rundown); 1749 1749 mutex_unlock(&lo->lo_mutex); ··· 1858 1858 1859 1859 blk_mq_start_request(rq); 1860 1860 1861 - if (lo->lo_state != Lo_bound) 1861 + if (data_race(READ_ONCE(lo->lo_state)) != Lo_bound) 1862 1862 return BLK_STS_IOERR; 1863 1863 1864 1864 switch (req_op(rq)) { ··· 2016 2016 lo->worker_tree = RB_ROOT; 2017 2017 INIT_LIST_HEAD(&lo->idle_worker_list); 2018 2018 timer_setup(&lo->timer, loop_free_idle_workers_timer, TIMER_DEFERRABLE); 2019 - lo->lo_state = Lo_unbound; 2019 + WRITE_ONCE(lo->lo_state, Lo_unbound); 2020 2020 2021 2021 err = mutex_lock_killable(&loop_ctl_mutex); 2022 2022 if (err) ··· 2174 2174 goto mark_visible; 2175 2175 } 2176 2176 /* Mark this loop device as no more bound, but not quite unbound yet */ 2177 - lo->lo_state = Lo_deleting; 2177 + WRITE_ONCE(lo->lo_state, Lo_deleting); 2178 2178 mutex_unlock(&lo->lo_mutex); 2179 2179 2180 2180 loop_remove(lo); ··· 2197 2197 if (ret) 2198 2198 return ret; 2199 2199 idr_for_each_entry(&loop_index_idr, lo, id) { 2200 - /* Hitting a race results in creating a new loop device which is harmless. */ 2201 - if (lo->idr_visible && data_race(lo->lo_state) == Lo_unbound) 2200 + /* 2201 + * Hitting a race results in creating a new loop device 2202 + * which is harmless. 2203 + */ 2204 + if (lo->idr_visible && 2205 + data_race(READ_ONCE(lo->lo_state)) == Lo_unbound) 2202 2206 goto found; 2203 2207 } 2204 2208 mutex_unlock(&loop_ctl_mutex);
+8 -5
drivers/block/rnbd/rnbd-clt.c
··· 1423 1423 goto out_alloc; 1424 1424 } 1425 1425 1426 - ret = ida_alloc_max(&index_ida, (1 << (MINORBITS - RNBD_PART_BITS)) - 1, 1427 - GFP_KERNEL); 1428 - if (ret < 0) { 1426 + dev->clt_device_id = ida_alloc_max(&index_ida, 1427 + (1 << (MINORBITS - RNBD_PART_BITS)) - 1, 1428 + GFP_KERNEL); 1429 + if (dev->clt_device_id < 0) { 1430 + ret = dev->clt_device_id; 1429 1431 pr_err("Failed to initialize device '%s' from session %s, allocating idr failed, err: %d\n", 1430 1432 pathname, sess->sessname, ret); 1431 1433 goto out_queues; ··· 1436 1434 dev->pathname = kstrdup(pathname, GFP_KERNEL); 1437 1435 if (!dev->pathname) { 1438 1436 ret = -ENOMEM; 1439 - goto out_queues; 1437 + goto out_ida; 1440 1438 } 1441 1439 1442 - dev->clt_device_id = ret; 1443 1440 dev->sess = sess; 1444 1441 dev->access_mode = access_mode; 1445 1442 dev->nr_poll_queues = nr_poll_queues; ··· 1454 1453 1455 1454 return dev; 1456 1455 1456 + out_ida: 1457 + ida_free(&index_ida, dev->clt_device_id); 1457 1458 out_queues: 1458 1459 kfree(dev->hw_queues); 1459 1460 out_alloc:
+1 -1
drivers/block/rnbd/rnbd-clt.h
··· 112 112 struct rnbd_queue *hw_queues; 113 113 u32 device_id; 114 114 /* local Idr index - used to track minor number allocations. */ 115 - u32 clt_device_id; 115 + int clt_device_id; 116 116 struct mutex lock; 117 117 enum rnbd_clt_dev_state dev_state; 118 118 refcount_t refcount;
+29 -6
drivers/block/ublk_drv.c
··· 1080 1080 return io_uring_cmd_to_pdu(ioucmd, struct ublk_uring_cmd_pdu); 1081 1081 } 1082 1082 1083 + static void ublk_end_request(struct request *req, blk_status_t error) 1084 + { 1085 + local_bh_disable(); 1086 + blk_mq_end_request(req, error); 1087 + local_bh_enable(); 1088 + } 1089 + 1083 1090 /* todo: handle partial completion */ 1084 1091 static inline void __ublk_complete_rq(struct request *req, struct ublk_io *io, 1085 1092 bool need_map) 1086 1093 { 1087 1094 unsigned int unmapped_bytes; 1088 1095 blk_status_t res = BLK_STS_OK; 1096 + bool requeue; 1089 1097 1090 1098 /* failed read IO if nothing is read */ 1091 1099 if (!io->res && req_op(req) == REQ_OP_READ) ··· 1125 1117 if (unlikely(unmapped_bytes < io->res)) 1126 1118 io->res = unmapped_bytes; 1127 1119 1128 - if (blk_update_request(req, BLK_STS_OK, io->res)) 1120 + /* 1121 + * Run bio->bi_end_io() with softirqs disabled. If the final fput 1122 + * happens off this path, then that will prevent ublk's blkdev_release() 1123 + * from being called on current's task work, see fput() implementation. 1124 + * 1125 + * Otherwise, ublk server may not provide forward progress in case of 1126 + * reading the partition table from bdev_open() with disk->open_mutex 1127 + * held, and causes dead lock as we could already be holding 1128 + * disk->open_mutex here. 1129 + * 1130 + * Preferably we would not be doing IO with a mutex held that is also 1131 + * used for release, but this work-around will suffice for now. 1132 + */ 1133 + local_bh_disable(); 1134 + requeue = blk_update_request(req, BLK_STS_OK, io->res); 1135 + local_bh_enable(); 1136 + if (requeue) 1129 1137 blk_mq_requeue_request(req, true); 1130 1138 else if (likely(!blk_should_fake_timeout(req->q))) 1131 1139 __blk_mq_end_request(req, BLK_STS_OK); 1132 1140 1133 1141 return; 1134 1142 exit: 1135 - blk_mq_end_request(req, res); 1143 + ublk_end_request(req, res); 1136 1144 } 1137 1145 1138 1146 static struct io_uring_cmd *__ublk_prep_compl_io_cmd(struct ublk_io *io, ··· 1188 1164 if (ublk_nosrv_dev_should_queue_io(ubq->dev)) 1189 1165 blk_mq_requeue_request(rq, false); 1190 1166 else 1191 - blk_mq_end_request(rq, BLK_STS_IOERR); 1167 + ublk_end_request(rq, BLK_STS_IOERR); 1192 1168 } 1193 1169 1194 1170 static void ··· 1233 1209 ublk_auto_buf_reg_fallback(ubq, req->tag); 1234 1210 return AUTO_BUF_REG_FALLBACK; 1235 1211 } 1236 - blk_mq_end_request(req, BLK_STS_IOERR); 1212 + ublk_end_request(req, BLK_STS_IOERR); 1237 1213 return AUTO_BUF_REG_FAIL; 1238 1214 } 1239 1215 ··· 1607 1583 { 1608 1584 int i, j; 1609 1585 1610 - if (!(ub->dev_info.flags & (UBLK_F_SUPPORT_ZERO_COPY | 1611 - UBLK_F_AUTO_BUF_REG))) 1586 + if (!ublk_dev_need_req_ref(ub)) 1612 1587 return false; 1613 1588 1614 1589 for (i = 0; i < ub->dev_info.nr_hw_queues; i++) {
+4 -4
drivers/block/zloop.c
··· 697 697 struct zloop_cmd *cmd = blk_mq_rq_to_pdu(rq); 698 698 struct zloop_device *zlo = rq->q->queuedata; 699 699 700 - if (zlo->state == Zlo_deleting) 700 + if (data_race(READ_ONCE(zlo->state)) == Zlo_deleting) 701 701 return BLK_STS_IOERR; 702 702 703 703 /* ··· 1002 1002 ret = -ENOMEM; 1003 1003 goto out; 1004 1004 } 1005 - zlo->state = Zlo_creating; 1005 + WRITE_ONCE(zlo->state, Zlo_creating); 1006 1006 1007 1007 ret = mutex_lock_killable(&zloop_ctl_mutex); 1008 1008 if (ret) ··· 1113 1113 } 1114 1114 1115 1115 mutex_lock(&zloop_ctl_mutex); 1116 - zlo->state = Zlo_live; 1116 + WRITE_ONCE(zlo->state, Zlo_live); 1117 1117 mutex_unlock(&zloop_ctl_mutex); 1118 1118 1119 1119 pr_info("zloop: device %d, %u zones of %llu MiB, %u B block size\n", ··· 1177 1177 ret = -EINVAL; 1178 1178 } else { 1179 1179 idr_remove(&zloop_index_idr, zlo->id); 1180 - zlo->state = Zlo_deleting; 1180 + WRITE_ONCE(zlo->state, Zlo_deleting); 1181 1181 } 1182 1182 1183 1183 mutex_unlock(&zloop_ctl_mutex);
+4 -3
drivers/cpufreq/cpufreq-dt-platdev.c
··· 219 219 220 220 static int __init cpufreq_dt_platdev_init(void) 221 221 { 222 - const void *data; 222 + const void *data = NULL; 223 223 224 - data = of_machine_get_match_data(allowlist); 225 - if (data) 224 + if (of_machine_device_match(allowlist)) { 225 + data = of_machine_get_match_data(allowlist); 226 226 goto create_pdev; 227 + } 227 228 228 229 if (cpu0_node_has_opp_v2_prop() && !of_machine_device_match(blocklist)) 229 230 goto create_pdev;
+5 -5
drivers/firewire/nosy.c
··· 36 36 37 37 static char driver_name[] = KBUILD_MODNAME; 38 38 39 + #define RCV_BUFFER_SIZE (16 * 1024) 40 + 39 41 /* this is the physical layout of a PCL, its size is 128 bytes */ 40 42 struct pcl { 41 43 __le32 next; ··· 519 517 lynx->rcv_start_pcl, lynx->rcv_start_pcl_bus); 520 518 dma_free_coherent(&lynx->pci_device->dev, sizeof(struct pcl), 521 519 lynx->rcv_pcl, lynx->rcv_pcl_bus); 522 - dma_free_coherent(&lynx->pci_device->dev, PAGE_SIZE, lynx->rcv_buffer, 523 - lynx->rcv_buffer_bus); 520 + dma_free_coherent(&lynx->pci_device->dev, RCV_BUFFER_SIZE, 521 + lynx->rcv_buffer, lynx->rcv_buffer_bus); 524 522 525 523 iounmap(lynx->registers); 526 524 pci_disable_device(dev); 527 525 lynx_put(lynx); 528 526 } 529 - 530 - #define RCV_BUFFER_SIZE (16 * 1024) 531 527 532 528 static int 533 529 add_card(struct pci_dev *dev, const struct pci_device_id *unused) ··· 680 680 dma_free_coherent(&lynx->pci_device->dev, sizeof(struct pcl), 681 681 lynx->rcv_pcl, lynx->rcv_pcl_bus); 682 682 if (lynx->rcv_buffer) 683 - dma_free_coherent(&lynx->pci_device->dev, PAGE_SIZE, 683 + dma_free_coherent(&lynx->pci_device->dev, RCV_BUFFER_SIZE, 684 684 lynx->rcv_buffer, lynx->rcv_buffer_bus); 685 685 iounmap(lynx->registers); 686 686
+1
drivers/firmware/efi/efi.c
··· 73 73 MMAP_LOCK_INITIALIZER(efi_mm) 74 74 .page_table_lock = __SPIN_LOCK_UNLOCKED(efi_mm.page_table_lock), 75 75 .mmlist = LIST_HEAD_INIT(efi_mm.mmlist), 76 + .user_ns = &init_user_ns, 76 77 .cpu_bitmap = { [BITS_TO_LONGS(NR_CPUS)] = 0}, 77 78 #ifdef CONFIG_SCHED_MM_CID 78 79 .mm_cid.lock = __RAW_SPIN_LOCK_UNLOCKED(efi_mm.mm_cid.lock),
+4 -4
drivers/firmware/efi/libstub/gop.c
··· 513 513 status = efi_bs_call(handle_protocol, handle, &EFI_EDID_ACTIVE_PROTOCOL_GUID, 514 514 (void **)&active_edid); 515 515 if (status == EFI_SUCCESS) { 516 - gop_size_of_edid = active_edid->size_of_edid; 517 - gop_edid = active_edid->edid; 516 + gop_size_of_edid = efi_table_attr(active_edid, size_of_edid); 517 + gop_edid = efi_table_attr(active_edid, edid); 518 518 } else { 519 519 status = efi_bs_call(handle_protocol, handle, 520 520 &EFI_EDID_DISCOVERED_PROTOCOL_GUID, 521 521 (void **)&discovered_edid); 522 522 if (status == EFI_SUCCESS) { 523 - gop_size_of_edid = discovered_edid->size_of_edid; 524 - gop_edid = discovered_edid->edid; 523 + gop_size_of_edid = efi_table_attr(discovered_edid, size_of_edid); 524 + gop_edid = efi_table_attr(discovered_edid, edid); 525 525 } 526 526 } 527 527
+8 -2
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
··· 6613 6613 struct amdgpu_hive_info *hive = NULL; 6614 6614 int r = 0; 6615 6615 bool need_emergency_restart = false; 6616 + /* save the pasid here as the job may be freed before the end of the reset */ 6617 + int pasid = job ? job->pasid : -EINVAL; 6616 6618 6617 6619 /* 6618 6620 * If it reaches here because of hang/timeout and a RAS error is ··· 6715 6713 if (!r) { 6716 6714 struct amdgpu_task_info *ti = NULL; 6717 6715 6718 - if (job) 6719 - ti = amdgpu_vm_get_task_info_pasid(adev, job->pasid); 6716 + /* 6717 + * The job may already be freed at this point via the sched tdr workqueue so 6718 + * use the cached pasid. 6719 + */ 6720 + if (pasid >= 0) 6721 + ti = amdgpu_vm_get_task_info_pasid(adev, pasid); 6720 6722 6721 6723 drm_dev_wedged_event(adev_to_drm(adev), DRM_WEDGE_RECOVERY_NONE, 6722 6724 ti ? &ti->task : NULL);
+4 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
··· 33 33 #include <drm/drm_vblank.h> 34 34 35 35 #include <linux/cc_platform.h> 36 + #include <linux/console.h> 36 37 #include <linux/dynamic_debug.h> 37 38 #include <linux/module.h> 38 39 #include <linux/mmu_notifier.h> ··· 2705 2704 struct drm_device *drm_dev = dev_get_drvdata(dev); 2706 2705 2707 2706 /* do not resume device if it's normal hibernation */ 2708 - if (!pm_hibernate_is_recovering() && !pm_hibernation_mode_is_suspend()) 2707 + if (console_suspend_enabled && 2708 + !pm_hibernate_is_recovering() && 2709 + !pm_hibernation_mode_is_suspend()) 2709 2710 return 0; 2710 2711 2711 2712 return amdgpu_device_resume(drm_dev, true);
+1 -1
drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
··· 312 312 { 313 313 kfd_smi_event_add(pid, node, KFD_SMI_EVENT_QUEUE_RESTORE, 314 314 KFD_EVENT_FMT_QUEUE_RESTORE(ktime_get_boottime_ns(), pid, 315 - node->id, 0)); 315 + node->id, '0')); 316 316 } 317 317 318 318 void kfd_smi_event_queue_restore_rescheduled(struct mm_struct *mm)
+4 -4
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
··· 1118 1118 if (dc->current_state->res_ctx.pipe_ctx[i].stream_res.audio != NULL) 1119 1119 num_audio++; 1120 1120 } 1121 + if (num_audio >= 1 && clk_mgr->funcs->enable_pme_wa) { 1122 + /*wake AZ from D3 first before access az endpoint*/ 1123 + clk_mgr->funcs->enable_pme_wa(clk_mgr); 1124 + } 1121 1125 1122 1126 pipe_ctx->stream_res.audio->funcs->az_enable(pipe_ctx->stream_res.audio); 1123 - 1124 - if (num_audio >= 1 && clk_mgr->funcs->enable_pme_wa) 1125 - /*this is the first audio. apply the PME w/a in order to wake AZ from D3*/ 1126 - clk_mgr->funcs->enable_pme_wa(clk_mgr); 1127 1127 1128 1128 link_hwss->enable_audio_packet(pipe_ctx); 1129 1129
+4 -4
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
··· 203 203 NBIO_BASE_INNER(seg) 204 204 205 205 #define NBIO_SR(reg_name)\ 206 - REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \ 207 - regBIF_BX2_ ## reg_name 206 + REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \ 207 + regBIF_BX1_ ## reg_name 208 208 209 209 #define NBIO_SR_ARR(reg_name, id)\ 210 - REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \ 211 - regBIF_BX2_ ## reg_name 210 + REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \ 211 + regBIF_BX1_ ## reg_name 212 212 213 213 #define bios_regs_init() \ 214 214 ( \
+4 -4
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
··· 183 183 NBIO_BASE_INNER(seg) 184 184 185 185 #define NBIO_SR(reg_name)\ 186 - REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \ 187 - regBIF_BX2_ ## reg_name 186 + REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \ 187 + regBIF_BX1_ ## reg_name 188 188 189 189 #define NBIO_SR_ARR(reg_name, id)\ 190 - REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \ 191 - regBIF_BX2_ ## reg_name 190 + REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \ 191 + regBIF_BX1_ ## reg_name 192 192 193 193 #define bios_regs_init() \ 194 194 ( \
+5
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
··· 1939 1939 dev_err(smu->adev->dev, "Set soft max sclk failed!"); 1940 1940 return ret; 1941 1941 } 1942 + if (smu->gfx_actual_hard_min_freq != smu->gfx_default_hard_min_freq || 1943 + smu->gfx_actual_soft_max_freq != smu->gfx_default_soft_max_freq) 1944 + smu->user_dpm_profile.user_od = true; 1945 + else 1946 + smu->user_dpm_profile.user_od = false; 1942 1947 break; 1943 1948 default: 1944 1949 return -ENOSYS;
+32 -5
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
··· 1514 1514 1515 1515 smu->gfx_default_hard_min_freq = clk_table->MinGfxClk; 1516 1516 smu->gfx_default_soft_max_freq = clk_table->MaxGfxClk; 1517 - smu->gfx_actual_hard_min_freq = 0; 1518 - smu->gfx_actual_soft_max_freq = 0; 1519 - 1517 + if (smu->gfx_actual_hard_min_freq == 0) 1518 + smu->gfx_actual_hard_min_freq = smu->gfx_default_hard_min_freq; 1519 + if (smu->gfx_actual_soft_max_freq == 0) 1520 + smu->gfx_actual_soft_max_freq = smu->gfx_default_soft_max_freq; 1520 1521 return 0; 1521 1522 } 1522 1523 ··· 1527 1526 1528 1527 smu->gfx_default_hard_min_freq = clk_table->MinGfxClk; 1529 1528 smu->gfx_default_soft_max_freq = clk_table->MaxGfxClk; 1530 - smu->gfx_actual_hard_min_freq = 0; 1531 - smu->gfx_actual_soft_max_freq = 0; 1529 + if (smu->gfx_actual_hard_min_freq == 0) 1530 + smu->gfx_actual_hard_min_freq = smu->gfx_default_hard_min_freq; 1531 + if (smu->gfx_actual_soft_max_freq == 0) 1532 + smu->gfx_actual_soft_max_freq = smu->gfx_default_soft_max_freq; 1532 1533 1533 1534 return 0; 1534 1535 } ··· 1668 1665 return ret; 1669 1666 } 1670 1667 1668 + static int smu_v14_0_0_restore_user_od_settings(struct smu_context *smu) 1669 + { 1670 + int ret; 1671 + 1672 + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinGfxClk, 1673 + smu->gfx_actual_hard_min_freq, 1674 + NULL); 1675 + if (ret) { 1676 + dev_err(smu->adev->dev, "Failed to restore hard min sclk!\n"); 1677 + return ret; 1678 + } 1679 + 1680 + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxGfxClk, 1681 + smu->gfx_actual_soft_max_freq, 1682 + NULL); 1683 + if (ret) { 1684 + dev_err(smu->adev->dev, "Failed to restore soft max sclk!\n"); 1685 + return ret; 1686 + } 1687 + 1688 + return 0; 1689 + } 1690 + 1671 1691 static const struct pptable_funcs smu_v14_0_0_ppt_funcs = { 1672 1692 .check_fw_status = smu_v14_0_check_fw_status, 1673 1693 .check_fw_version = smu_v14_0_check_fw_version, ··· 1714 1688 .mode2_reset = smu_v14_0_0_mode2_reset, 1715 1689 .get_dpm_ultimate_freq = smu_v14_0_common_get_dpm_ultimate_freq, 1716 1690 .set_soft_freq_limited_range = smu_v14_0_0_set_soft_freq_limited_range, 1691 + .restore_user_od_settings = smu_v14_0_0_restore_user_od_settings, 1717 1692 .od_edit_dpm_table = smu_v14_0_od_edit_dpm_table, 1718 1693 .print_clk_levels = smu_v14_0_0_print_clk_levels, 1719 1694 .force_clk_levels = smu_v14_0_0_force_clk_levels,
+6 -2
drivers/gpu/drm/drm_gem.c
··· 969 969 if (!obj) 970 970 return -ENOENT; 971 971 972 - if (args->handle == args->new_handle) 973 - return 0; 972 + if (args->handle == args->new_handle) { 973 + ret = 0; 974 + goto out; 975 + } 974 976 975 977 mutex_lock(&file_priv->prime.lock); 976 978 ··· 1004 1002 1005 1003 out_unlock: 1006 1004 mutex_unlock(&file_priv->prime.lock); 1005 + out: 1006 + drm_gem_object_put(obj); 1007 1007 1008 1008 return ret; 1009 1009 }
+12 -1
drivers/gpu/drm/msm/adreno/a6xx_catalog.c
··· 1376 1376 REG_A6XX_UCHE_MODE_CNTL, 1377 1377 REG_A6XX_RB_NC_MODE_CNTL, 1378 1378 REG_A6XX_RB_CMP_DBG_ECO_CNTL, 1379 - REG_A7XX_GRAS_NC_MODE_CNTL, 1380 1379 REG_A6XX_RB_CONTEXT_SWITCH_GMEM_SAVE_RESTORE_ENABLE, 1381 1380 REG_A6XX_UCHE_GBIF_GX_CONFIG, 1382 1381 REG_A6XX_UCHE_CLIENT_PF, ··· 1391 1392 REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(2), 1392 1393 REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(3), 1393 1394 REG_A6XX_TPL1_BICUBIC_WEIGHTS_TABLE(4), 1395 + REG_A6XX_RBBM_PERFCTR_CNTL, 1394 1396 REG_A6XX_TPL1_NC_MODE_CNTL, 1395 1397 REG_A6XX_SP_NC_MODE_CNTL, 1396 1398 REG_A6XX_CP_DBG_ECO_CNTL, ··· 1448 1448 1449 1449 DECLARE_ADRENO_REGLIST_LIST(a750_ifpc_reglist); 1450 1450 1451 + static const struct adreno_reglist_pipe a7xx_dyn_pwrup_reglist_regs[] = { 1452 + { REG_A7XX_GRAS_NC_MODE_CNTL, 0, BIT(PIPE_BV) | BIT(PIPE_BR) }, 1453 + }; 1454 + 1455 + DECLARE_ADRENO_REGLIST_PIPE_LIST(a7xx_dyn_pwrup_reglist); 1456 + 1451 1457 static const struct adreno_info a7xx_gpus[] = { 1452 1458 { 1453 1459 .chip_ids = ADRENO_CHIP_IDS(0x07000200), ··· 1497 1491 .hwcg = a730_hwcg, 1498 1492 .protect = &a730_protect, 1499 1493 .pwrup_reglist = &a7xx_pwrup_reglist, 1494 + .dyn_pwrup_reglist = &a7xx_dyn_pwrup_reglist, 1500 1495 .gbif_cx = a640_gbif, 1501 1496 .gmu_cgc_mode = 0x00020000, 1502 1497 }, ··· 1520 1513 .hwcg = a740_hwcg, 1521 1514 .protect = &a730_protect, 1522 1515 .pwrup_reglist = &a7xx_pwrup_reglist, 1516 + .dyn_pwrup_reglist = &a7xx_dyn_pwrup_reglist, 1523 1517 .gbif_cx = a640_gbif, 1524 1518 .gmu_chipid = 0x7020100, 1525 1519 .gmu_cgc_mode = 0x00020202, ··· 1555 1547 .hwcg = a740_hwcg, 1556 1548 .protect = &a730_protect, 1557 1549 .pwrup_reglist = &a7xx_pwrup_reglist, 1550 + .dyn_pwrup_reglist = &a7xx_dyn_pwrup_reglist, 1558 1551 .ifpc_reglist = &a750_ifpc_reglist, 1559 1552 .gbif_cx = a640_gbif, 1560 1553 .gmu_chipid = 0x7050001, ··· 1598 1589 .a6xx = &(const struct a6xx_info) { 1599 1590 .protect = &a730_protect, 1600 1591 .pwrup_reglist = &a7xx_pwrup_reglist, 1592 + .dyn_pwrup_reglist = &a7xx_dyn_pwrup_reglist, 1601 1593 .ifpc_reglist = &a750_ifpc_reglist, 1602 1594 .gbif_cx = a640_gbif, 1603 1595 .gmu_chipid = 0x7090100, ··· 1633 1623 .hwcg = a740_hwcg, 1634 1624 .protect = &a730_protect, 1635 1625 .pwrup_reglist = &a7xx_pwrup_reglist, 1626 + .dyn_pwrup_reglist = &a7xx_dyn_pwrup_reglist, 1636 1627 .gbif_cx = a640_gbif, 1637 1628 .gmu_chipid = 0x70f0000, 1638 1629 .gmu_cgc_mode = 0x00020222,
+40 -12
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
··· 849 849 min_acc_len_64b << 3 | 850 850 hbb_lo << 1 | ubwc_mode); 851 851 852 - if (adreno_is_a7xx(adreno_gpu)) 853 - gpu_write(gpu, REG_A7XX_GRAS_NC_MODE_CNTL, 854 - FIELD_PREP(GENMASK(8, 5), hbb_lo)); 852 + if (adreno_is_a7xx(adreno_gpu)) { 853 + for (u32 pipe_id = PIPE_BR; pipe_id <= PIPE_BV; pipe_id++) { 854 + gpu_write(gpu, REG_A7XX_CP_APERTURE_CNTL_HOST, 855 + A7XX_CP_APERTURE_CNTL_HOST_PIPE(pipe_id)); 856 + gpu_write(gpu, REG_A7XX_GRAS_NC_MODE_CNTL, 857 + FIELD_PREP(GENMASK(8, 5), hbb_lo)); 858 + } 859 + gpu_write(gpu, REG_A7XX_CP_APERTURE_CNTL_HOST, 860 + A7XX_CP_APERTURE_CNTL_HOST_PIPE(PIPE_NONE)); 861 + } 855 862 856 863 gpu_write(gpu, REG_A6XX_UCHE_MODE_CNTL, 857 864 min_acc_len_64b << 23 | hbb_lo << 21); ··· 872 865 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); 873 866 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); 874 867 const struct adreno_reglist_list *reglist; 868 + const struct adreno_reglist_pipe_list *dyn_pwrup_reglist; 875 869 void *ptr = a6xx_gpu->pwrup_reglist_ptr; 876 870 struct cpu_gpu_lock *lock = ptr; 877 871 u32 *dest = (u32 *)&lock->regs[0]; 872 + u32 dyn_pwrup_reglist_count = 0; 878 873 int i; 879 874 880 875 lock->gpu_req = lock->cpu_req = lock->turn = 0; 881 876 882 877 reglist = adreno_gpu->info->a6xx->ifpc_reglist; 883 - lock->ifpc_list_len = reglist->count; 878 + if (reglist) { 879 + lock->ifpc_list_len = reglist->count; 884 880 885 - /* 886 - * For each entry in each of the lists, write the offset and the current 887 - * register value into the GPU buffer 888 - */ 889 - for (i = 0; i < reglist->count; i++) { 890 - *dest++ = reglist->regs[i]; 891 - *dest++ = gpu_read(gpu, reglist->regs[i]); 881 + /* 882 + * For each entry in each of the lists, write the offset and the current 883 + * register value into the GPU buffer 884 + */ 885 + for (i = 0; i < reglist->count; i++) { 886 + *dest++ = reglist->regs[i]; 887 + *dest++ = gpu_read(gpu, reglist->regs[i]); 888 + } 892 889 } 893 890 894 891 reglist = adreno_gpu->info->a6xx->pwrup_reglist; ··· 918 907 * (<aperture, shifted 12 bits> <address> <data>), and the length is 919 908 * stored as number for triplets in dynamic_list_len. 920 909 */ 921 - lock->dynamic_list_len = 0; 910 + dyn_pwrup_reglist = adreno_gpu->info->a6xx->dyn_pwrup_reglist; 911 + if (dyn_pwrup_reglist) { 912 + for (u32 pipe_id = PIPE_BR; pipe_id <= PIPE_BV; pipe_id++) { 913 + gpu_write(gpu, REG_A7XX_CP_APERTURE_CNTL_HOST, 914 + A7XX_CP_APERTURE_CNTL_HOST_PIPE(pipe_id)); 915 + for (i = 0; i < dyn_pwrup_reglist->count; i++) { 916 + if ((dyn_pwrup_reglist->regs[i].pipe & BIT(pipe_id)) == 0) 917 + continue; 918 + *dest++ = A7XX_CP_APERTURE_CNTL_HOST_PIPE(pipe_id); 919 + *dest++ = dyn_pwrup_reglist->regs[i].offset; 920 + *dest++ = gpu_read(gpu, dyn_pwrup_reglist->regs[i].offset); 921 + dyn_pwrup_reglist_count++; 922 + } 923 + } 924 + gpu_write(gpu, REG_A7XX_CP_APERTURE_CNTL_HOST, 925 + A7XX_CP_APERTURE_CNTL_HOST_PIPE(PIPE_NONE)); 926 + } 927 + lock->dynamic_list_len = dyn_pwrup_reglist_count; 922 928 } 923 929 924 930 static int a7xx_preempt_start(struct msm_gpu *gpu)
+1
drivers/gpu/drm/msm/adreno/a6xx_gpu.h
··· 45 45 const struct adreno_reglist *hwcg; 46 46 const struct adreno_protect *protect; 47 47 const struct adreno_reglist_list *pwrup_reglist; 48 + const struct adreno_reglist_pipe_list *dyn_pwrup_reglist; 48 49 const struct adreno_reglist_list *ifpc_reglist; 49 50 const struct adreno_reglist *gbif_cx; 50 51 const struct adreno_reglist_pipe *nonctxt_reglist;
+2 -2
drivers/gpu/drm/msm/adreno/a6xx_preempt.c
··· 454 454 gpu->vm, &a6xx_gpu->preempt_postamble_bo, 455 455 &a6xx_gpu->preempt_postamble_iova); 456 456 457 - preempt_prepare_postamble(a6xx_gpu); 458 - 459 457 if (IS_ERR(a6xx_gpu->preempt_postamble_ptr)) 460 458 goto fail; 459 + 460 + preempt_prepare_postamble(a6xx_gpu); 461 461 462 462 timer_setup(&a6xx_gpu->preempt_timer, a6xx_preempt_timer, 0); 463 463
+13
drivers/gpu/drm/msm/adreno/adreno_gpu.h
··· 188 188 .count = ARRAY_SIZE(name ## _regs), \ 189 189 }; 190 190 191 + struct adreno_reglist_pipe_list { 192 + /** @reg: List of register **/ 193 + const struct adreno_reglist_pipe *regs; 194 + /** @count: Number of registers in the list **/ 195 + u32 count; 196 + }; 197 + 198 + #define DECLARE_ADRENO_REGLIST_PIPE_LIST(name) \ 199 + static const struct adreno_reglist_pipe_list name = { \ 200 + .regs = name ## _regs, \ 201 + .count = ARRAY_SIZE(name ## _regs), \ 202 + }; 203 + 191 204 struct adreno_gpu { 192 205 struct msm_gpu base; 193 206 const struct adreno_info *info;
+7 -31
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
··· 200 200 struct dpu_crtc_state *crtc_state) 201 201 { 202 202 struct dpu_crtc_mixer *m; 203 - u32 crcs[CRTC_QUAD_MIXERS]; 203 + u32 crcs[CRTC_DUAL_MIXERS]; 204 204 205 205 int rc = 0; 206 206 int i; ··· 1328 1328 struct drm_display_mode *mode = &crtc_state->adjusted_mode; 1329 1329 struct msm_display_topology topology = {0}; 1330 1330 struct drm_encoder *drm_enc; 1331 - u32 num_rt_intf; 1332 1331 1333 1332 drm_for_each_encoder_mask(drm_enc, crtc->dev, crtc_state->encoder_mask) 1334 1333 dpu_encoder_update_topology(drm_enc, &topology, crtc_state->state, ··· 1341 1342 * Dual display 1342 1343 * 2 LM, 2 INTF ( Split display using 2 interfaces) 1343 1344 * 1344 - * If DSC is enabled, try to use 4:4:2 topology if there is enough 1345 - * resource. Otherwise, use 2:2:2 topology. 1346 - * 1347 1345 * Single display 1348 1346 * 1 LM, 1 INTF 1349 1347 * 2 LM, 1 INTF (stream merge to support high resolution interfaces) 1350 1348 * 1351 - * If DSC is enabled, use 2:2:1 topology 1349 + * If DSC is enabled, use 2 LMs for 2:2:1 topology 1352 1350 * 1353 1351 * Add dspps to the reservation requirements if ctm is requested 1354 1352 * ··· 1357 1361 * (mode->hdisplay > MAX_HDISPLAY_SPLIT) check. 1358 1362 */ 1359 1363 1360 - num_rt_intf = topology.num_intf; 1361 - if (topology.cwb_enabled) 1362 - num_rt_intf--; 1363 - 1364 - if (topology.num_dsc) { 1365 - if (dpu_kms->catalog->dsc_count >= num_rt_intf * 2) 1366 - topology.num_dsc = num_rt_intf * 2; 1367 - else 1368 - topology.num_dsc = num_rt_intf; 1369 - topology.num_lm = topology.num_dsc; 1370 - } else if (num_rt_intf == 2) { 1364 + if (topology.num_intf == 2 && !topology.cwb_enabled) 1371 1365 topology.num_lm = 2; 1372 - } else if (dpu_kms->catalog->caps->has_3d_merge) { 1366 + else if (topology.num_dsc == 2) 1367 + topology.num_lm = 2; 1368 + else if (dpu_kms->catalog->caps->has_3d_merge) 1373 1369 topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1; 1374 - } else { 1370 + else 1375 1371 topology.num_lm = 1; 1376 - } 1377 1372 1378 1373 if (crtc_state->ctm) 1379 1374 topology.num_dspp = topology.num_lm; ··· 1605 1618 } 1606 1619 1607 1620 return 0; 1608 - } 1609 - 1610 - /** 1611 - * dpu_crtc_get_num_lm - Get mixer number in this CRTC pipeline 1612 - * @state: Pointer to drm crtc state object 1613 - */ 1614 - unsigned int dpu_crtc_get_num_lm(const struct drm_crtc_state *state) 1615 - { 1616 - struct dpu_crtc_state *cstate = to_dpu_crtc_state(state); 1617 - 1618 - return cstate->num_mixers; 1619 1621 } 1620 1622 1621 1623 #ifdef CONFIG_DEBUG_FS
+3 -5
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
··· 210 210 211 211 bool bw_control; 212 212 bool bw_split_vote; 213 - struct drm_rect lm_bounds[CRTC_QUAD_MIXERS]; 213 + struct drm_rect lm_bounds[CRTC_DUAL_MIXERS]; 214 214 215 215 uint64_t input_fence_timeout_ns; 216 216 ··· 218 218 219 219 /* HW Resources reserved for the crtc */ 220 220 u32 num_mixers; 221 - struct dpu_crtc_mixer mixers[CRTC_QUAD_MIXERS]; 221 + struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS]; 222 222 223 223 u32 num_ctls; 224 - struct dpu_hw_ctl *hw_ctls[CRTC_QUAD_MIXERS]; 224 + struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS]; 225 225 226 226 enum dpu_crtc_crc_source crc_source; 227 227 int crc_frame_skip_count; ··· 266 266 } 267 267 268 268 void dpu_crtc_frame_event_cb(struct drm_crtc *crtc, u32 event); 269 - 270 - unsigned int dpu_crtc_get_num_lm(const struct drm_crtc_state *state); 271 269 272 270 #endif /* _DPU_CRTC_H_ */
+20 -9
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
··· 55 55 #define MAX_PHYS_ENCODERS_PER_VIRTUAL \ 56 56 (MAX_H_TILES_PER_DISPLAY * NUM_PHYS_ENCODER_TYPES) 57 57 58 - #define MAX_CHANNELS_PER_ENC 4 58 + #define MAX_CHANNELS_PER_ENC 2 59 59 #define MAX_CWB_PER_ENC 2 60 60 61 61 #define IDLE_SHORT_TIMEOUT 1 ··· 661 661 struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc); 662 662 struct msm_drm_private *priv = dpu_enc->base.dev->dev_private; 663 663 struct msm_display_info *disp_info = &dpu_enc->disp_info; 664 + struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms); 664 665 struct drm_connector *connector; 665 666 struct drm_connector_state *conn_state; 666 667 struct drm_framebuffer *fb; ··· 675 674 676 675 dsc = dpu_encoder_get_dsc_config(drm_enc); 677 676 678 - /* 679 - * Set DSC number as 1 to mark the enabled status, will be adjusted 680 - * in dpu_crtc_get_topology() 681 - */ 682 - if (dsc) 683 - topology->num_dsc = 1; 677 + /* We only support 2 DSC mode (with 2 LM and 1 INTF) */ 678 + if (dsc) { 679 + /* 680 + * Use 2 DSC encoders, 2 layer mixers and 1 or 2 interfaces 681 + * when Display Stream Compression (DSC) is enabled, 682 + * and when enough DSC blocks are available. 683 + * This is power-optimal and can drive up to (including) 4k 684 + * screens. 685 + */ 686 + WARN(topology->num_intf > 2, 687 + "DSC topology cannot support more than 2 interfaces\n"); 688 + if (topology->num_intf >= 2 || dpu_kms->catalog->dsc_count >= 2) 689 + topology->num_dsc = 2; 690 + else 691 + topology->num_dsc = 1; 692 + } 684 693 685 694 connector = drm_atomic_get_new_connector_for_encoder(state, drm_enc); 686 695 if (!connector) ··· 2180 2169 { 2181 2170 int i, num_lm; 2182 2171 struct dpu_global_state *global_state; 2183 - struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC]; 2184 - struct dpu_hw_mixer *hw_mixer[MAX_CHANNELS_PER_ENC]; 2172 + struct dpu_hw_blk *hw_lm[2]; 2173 + struct dpu_hw_mixer *hw_mixer[2]; 2185 2174 struct dpu_hw_ctl *ctl = phys_enc->hw_ctl; 2186 2175 2187 2176 /* reset all mixers for this encoder */
+1 -1
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
··· 302 302 303 303 /* Use merge_3d unless DSC MERGE topology is used */ 304 304 if (phys_enc->split_role == ENC_ROLE_SOLO && 305 - (dpu_cstate->num_mixers != 1) && 305 + dpu_cstate->num_mixers == CRTC_DUAL_MIXERS && 306 306 !dpu_encoder_use_dsc_merge(phys_enc->parent)) 307 307 return BLEND_3D_H_ROW_INT; 308 308
+4 -6
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
··· 247 247 if (hw_cdm) 248 248 intf_cfg.cdm = hw_cdm->idx; 249 249 250 - if (phys_enc->hw_pp->merge_3d && phys_enc->hw_pp->merge_3d->ops.setup_3d_mode) 251 - phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d, 252 - mode_3d); 250 + if (hw_pp && hw_pp->merge_3d && hw_pp->merge_3d->ops.setup_3d_mode) 251 + hw_pp->merge_3d->ops.setup_3d_mode(hw_pp->merge_3d, mode_3d); 253 252 254 253 /* setup which pp blk will connect to this wb */ 255 - if (hw_pp && phys_enc->hw_wb->ops.bind_pingpong_blk) 256 - phys_enc->hw_wb->ops.bind_pingpong_blk(phys_enc->hw_wb, 257 - phys_enc->hw_pp->idx); 254 + if (hw_pp && hw_wb->ops.bind_pingpong_blk) 255 + hw_wb->ops.bind_pingpong_blk(hw_wb, hw_pp->idx); 258 256 259 257 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); 260 258 } else if (phys_enc->hw_ctl && phys_enc->hw_ctl->ops.setup_intf_cfg) {
+1 -1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
··· 24 24 #define DPU_MAX_IMG_WIDTH 0x3fff 25 25 #define DPU_MAX_IMG_HEIGHT 0x3fff 26 26 27 - #define CRTC_QUAD_MIXERS 4 27 + #define CRTC_DUAL_MIXERS 2 28 28 29 29 #define MAX_XIN_COUNT 16 30 30
+2 -2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.h
··· 89 89 */ 90 90 struct dpu_hw_cdm_ops { 91 91 /** 92 - * Enable the CDM module 92 + * @enable: Enable the CDM module 93 93 * @cdm Pointer to chroma down context 94 94 */ 95 95 int (*enable)(struct dpu_hw_cdm *cdm, struct dpu_hw_cdm_cfg *cfg); 96 96 97 97 /** 98 - * Enable/disable the connection with pingpong 98 + * @bind_pingpong_blk: Enable/disable the connection with pingpong 99 99 * @cdm Pointer to chroma down context 100 100 * @pp pingpong block id. 101 101 */
+53 -31
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
··· 12 12 #include "dpu_hw_sspp.h" 13 13 14 14 /** 15 - * dpu_ctl_mode_sel: Interface mode selection 16 - * DPU_CTL_MODE_SEL_VID: Video mode interface 17 - * DPU_CTL_MODE_SEL_CMD: Command mode interface 15 + * enum dpu_ctl_mode_sel: Interface mode selection 16 + * @DPU_CTL_MODE_SEL_VID: Video mode interface 17 + * @DPU_CTL_MODE_SEL_CMD: Command mode interface 18 18 */ 19 19 enum dpu_ctl_mode_sel { 20 20 DPU_CTL_MODE_SEL_VID = 0, ··· 37 37 * struct dpu_hw_intf_cfg :Describes how the DPU writes data to output interface 38 38 * @intf : Interface id 39 39 * @intf_master: Master interface id in the dual pipe topology 40 + * @wb: Writeback mode 40 41 * @mode_3d: 3d mux configuration 41 42 * @merge_3d: 3d merge block used 42 43 * @intf_mode_sel: Interface mode, cmd / vid ··· 65 64 */ 66 65 struct dpu_hw_ctl_ops { 67 66 /** 68 - * kickoff hw operation for Sw controlled interfaces 67 + * @trigger_start: kickoff hw operation for Sw controlled interfaces 69 68 * DSI cmd mode and WB interface are SW controlled 70 69 * @ctx : ctl path ctx pointer 71 70 */ 72 71 void (*trigger_start)(struct dpu_hw_ctl *ctx); 73 72 74 73 /** 75 - * check if the ctl is started 74 + * @is_started: check if the ctl is started 76 75 * @ctx : ctl path ctx pointer 77 76 * @Return: true if started, false if stopped 78 77 */ 79 78 bool (*is_started)(struct dpu_hw_ctl *ctx); 80 79 81 80 /** 82 - * kickoff prepare is in progress hw operation for sw 81 + * @trigger_pending: kickoff prepare is in progress hw operation for sw 83 82 * controlled interfaces: DSI cmd mode and WB interface 84 83 * are SW controlled 85 84 * @ctx : ctl path ctx pointer ··· 87 86 void (*trigger_pending)(struct dpu_hw_ctl *ctx); 88 87 89 88 /** 90 - * Clear the value of the cached pending_flush_mask 89 + * @clear_pending_flush: Clear the value of the cached pending_flush_mask 91 90 * No effect on hardware. 92 91 * Required to be implemented. 93 92 * @ctx : ctl path ctx pointer ··· 95 94 void (*clear_pending_flush)(struct dpu_hw_ctl *ctx); 96 95 97 96 /** 98 - * Query the value of the cached pending_flush_mask 97 + * @get_pending_flush: Query the value of the cached pending_flush_mask 99 98 * No effect on hardware 100 99 * @ctx : ctl path ctx pointer 101 100 */ 102 101 u32 (*get_pending_flush)(struct dpu_hw_ctl *ctx); 103 102 104 103 /** 105 - * OR in the given flushbits to the cached pending_flush_mask 104 + * @update_pending_flush: OR in the given flushbits to the cached 105 + * pending_flush_mask. 106 106 * No effect on hardware 107 107 * @ctx : ctl path ctx pointer 108 108 * @flushbits : module flushmask ··· 112 110 u32 flushbits); 113 111 114 112 /** 115 - * OR in the given flushbits to the cached pending_(wb_)flush_mask 113 + * @update_pending_flush_wb: OR in the given flushbits to the 114 + * cached pending_(wb_)flush_mask. 116 115 * No effect on hardware 117 116 * @ctx : ctl path ctx pointer 118 117 * @blk : writeback block index ··· 122 119 enum dpu_wb blk); 123 120 124 121 /** 125 - * OR in the given flushbits to the cached pending_(cwb_)flush_mask 122 + * @update_pending_flush_cwb: OR in the given flushbits to the 123 + * cached pending_(cwb_)flush_mask. 126 124 * No effect on hardware 127 125 * @ctx : ctl path ctx pointer 128 126 * @blk : concurrent writeback block index ··· 132 128 enum dpu_cwb blk); 133 129 134 130 /** 135 - * OR in the given flushbits to the cached pending_(intf_)flush_mask 131 + * @update_pending_flush_intf: OR in the given flushbits to the 132 + * cached pending_(intf_)flush_mask. 136 133 * No effect on hardware 137 134 * @ctx : ctl path ctx pointer 138 135 * @blk : interface block index ··· 142 137 enum dpu_intf blk); 143 138 144 139 /** 145 - * OR in the given flushbits to the cached pending_(periph_)flush_mask 140 + * @update_pending_flush_periph: OR in the given flushbits to the 141 + * cached pending_(periph_)flush_mask. 146 142 * No effect on hardware 147 143 * @ctx : ctl path ctx pointer 148 144 * @blk : interface block index ··· 152 146 enum dpu_intf blk); 153 147 154 148 /** 155 - * OR in the given flushbits to the cached pending_(merge_3d_)flush_mask 149 + * @update_pending_flush_merge_3d: OR in the given flushbits to the 150 + * cached pending_(merge_3d_)flush_mask. 156 151 * No effect on hardware 157 152 * @ctx : ctl path ctx pointer 158 153 * @blk : interface block index ··· 162 155 enum dpu_merge_3d blk); 163 156 164 157 /** 165 - * OR in the given flushbits to the cached pending_flush_mask 158 + * @update_pending_flush_sspp: OR in the given flushbits to the 159 + * cached pending_flush_mask. 166 160 * No effect on hardware 167 161 * @ctx : ctl path ctx pointer 168 162 * @blk : SSPP block index ··· 172 164 enum dpu_sspp blk); 173 165 174 166 /** 175 - * OR in the given flushbits to the cached pending_flush_mask 167 + * @update_pending_flush_mixer: OR in the given flushbits to the 168 + * cached pending_flush_mask. 176 169 * No effect on hardware 177 170 * @ctx : ctl path ctx pointer 178 171 * @blk : LM block index ··· 182 173 enum dpu_lm blk); 183 174 184 175 /** 185 - * OR in the given flushbits to the cached pending_flush_mask 176 + * @update_pending_flush_dspp: OR in the given flushbits to the 177 + * cached pending_flush_mask. 186 178 * No effect on hardware 187 179 * @ctx : ctl path ctx pointer 188 180 * @blk : DSPP block index ··· 193 183 enum dpu_dspp blk, u32 dspp_sub_blk); 194 184 195 185 /** 196 - * OR in the given flushbits to the cached pending_(dsc_)flush_mask 186 + * @update_pending_flush_dsc: OR in the given flushbits to the 187 + * cached pending_(dsc_)flush_mask. 197 188 * No effect on hardware 198 189 * @ctx: ctl path ctx pointer 199 190 * @blk: interface block index ··· 203 192 enum dpu_dsc blk); 204 193 205 194 /** 206 - * OR in the given flushbits to the cached pending_(cdm_)flush_mask 195 + * @update_pending_flush_cdm: OR in the given flushbits to the 196 + * cached pending_(cdm_)flush_mask. 207 197 * No effect on hardware 208 198 * @ctx: ctl path ctx pointer 209 199 * @cdm_num: idx of cdm to be flushed ··· 212 200 void (*update_pending_flush_cdm)(struct dpu_hw_ctl *ctx, enum dpu_cdm cdm_num); 213 201 214 202 /** 215 - * Write the value of the pending_flush_mask to hardware 203 + * @trigger_flush: Write the value of the pending_flush_mask to hardware 216 204 * @ctx : ctl path ctx pointer 217 205 */ 218 206 void (*trigger_flush)(struct dpu_hw_ctl *ctx); 219 207 220 208 /** 221 - * Read the value of the flush register 209 + * @get_flush_register: Read the value of the flush register 222 210 * @ctx : ctl path ctx pointer 223 211 * @Return: value of the ctl flush register. 224 212 */ 225 213 u32 (*get_flush_register)(struct dpu_hw_ctl *ctx); 226 214 227 215 /** 228 - * Setup ctl_path interface config 216 + * @setup_intf_cfg: Setup ctl_path interface config 229 217 * @ctx 230 218 * @cfg : interface config structure pointer 231 219 */ ··· 233 221 struct dpu_hw_intf_cfg *cfg); 234 222 235 223 /** 236 - * reset ctl_path interface config 224 + * @reset_intf_cfg: reset ctl_path interface config 237 225 * @ctx : ctl path ctx pointer 238 226 * @cfg : interface config structure pointer 239 227 */ 240 228 void (*reset_intf_cfg)(struct dpu_hw_ctl *ctx, 241 229 struct dpu_hw_intf_cfg *cfg); 242 230 231 + /** 232 + * @reset: reset function for this ctl type 233 + */ 243 234 int (*reset)(struct dpu_hw_ctl *c); 244 235 245 - /* 246 - * wait_reset_status - checks ctl reset status 236 + /** 237 + * @wait_reset_status: checks ctl reset status 247 238 * @ctx : ctl path ctx pointer 248 239 * 249 240 * This function checks the ctl reset status bit. ··· 257 242 int (*wait_reset_status)(struct dpu_hw_ctl *ctx); 258 243 259 244 /** 260 - * Set all blend stages to disabled 245 + * @clear_all_blendstages: Set all blend stages to disabled 261 246 * @ctx : ctl path ctx pointer 262 247 */ 263 248 void (*clear_all_blendstages)(struct dpu_hw_ctl *ctx); 264 249 265 250 /** 266 - * Configure layer mixer to pipe configuration 251 + * @setup_blendstage: Configure layer mixer to pipe configuration 267 252 * @ctx : ctl path ctx pointer 268 253 * @lm : layer mixer enumeration 269 254 * @cfg : blend stage configuration ··· 271 256 void (*setup_blendstage)(struct dpu_hw_ctl *ctx, 272 257 enum dpu_lm lm, struct dpu_hw_stage_cfg *cfg); 273 258 259 + /** 260 + * @set_active_fetch_pipes: Set active pipes attached to this CTL 261 + * @ctx: ctl path ctx pointer 262 + * @active_pipes: bitmap of enum dpu_sspp 263 + */ 274 264 void (*set_active_fetch_pipes)(struct dpu_hw_ctl *ctx, 275 265 unsigned long *fetch_active); 276 266 277 267 /** 278 - * Set active pipes attached to this CTL 268 + * @set_active_pipes: Set active pipes attached to this CTL 279 269 * @ctx: ctl path ctx pointer 280 270 * @active_pipes: bitmap of enum dpu_sspp 281 271 */ ··· 288 268 unsigned long *active_pipes); 289 269 290 270 /** 291 - * Set active layer mixers attached to this CTL 271 + * @set_active_lms: Set active layer mixers attached to this CTL 292 272 * @ctx: ctl path ctx pointer 293 273 * @active_lms: bitmap of enum dpu_lm 294 274 */ 295 275 void (*set_active_lms)(struct dpu_hw_ctl *ctx, 296 276 unsigned long *active_lms); 297 - 298 277 }; 299 278 300 279 /** ··· 308 289 * @pending_intf_flush_mask: pending INTF flush 309 290 * @pending_wb_flush_mask: pending WB flush 310 291 * @pending_cwb_flush_mask: pending CWB flush 292 + * @pending_periph_flush_mask: pending PERIPH flush 293 + * @pending_merge_3d_flush_mask: pending MERGE 3D flush 294 + * @pending_dspp_flush_mask: pending DSPP flush 311 295 * @pending_dsc_flush_mask: pending DSC flush 312 296 * @pending_cdm_flush_mask: pending CDM flush 313 297 * @mdss_ver: MDSS revision information ··· 342 320 }; 343 321 344 322 /** 345 - * dpu_hw_ctl - convert base object dpu_hw_base to container 323 + * to_dpu_hw_ctl - convert base object dpu_hw_base to container 346 324 * @hw: Pointer to base hardware block 347 325 * return: Pointer to hardware block container 348 326 */
+1 -2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.h
··· 28 28 }; 29 29 30 30 /** 31 - * 32 31 * struct dpu_hw_cwb_ops : Interface to the cwb hw driver functions 33 32 * @config_cwb: configure CWB mux 34 33 */ ··· 53 54 }; 54 55 55 56 /** 56 - * dpu_hw_cwb - convert base object dpu_hw_base to container 57 + * to_dpu_hw_cwb - convert base object dpu_hw_base to container 57 58 * @hw: Pointer to base hardware block 58 59 * return: Pointer to hardware block container 59 60 */
+7 -3
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
··· 21 21 */ 22 22 struct dpu_hw_dsc_ops { 23 23 /** 24 - * dsc_disable - disable dsc 24 + * @dsc_disable: disable dsc 25 25 * @hw_dsc: Pointer to dsc context 26 26 */ 27 27 void (*dsc_disable)(struct dpu_hw_dsc *hw_dsc); 28 28 29 29 /** 30 - * dsc_config - configures dsc encoder 30 + * @dsc_config: configures dsc encoder 31 31 * @hw_dsc: Pointer to dsc context 32 32 * @dsc: panel dsc parameters 33 33 * @mode: dsc topology mode to be set ··· 39 39 u32 initial_lines); 40 40 41 41 /** 42 - * dsc_config_thresh - programs panel thresholds 42 + * @dsc_config_thresh: programs panel thresholds 43 43 * @hw_dsc: Pointer to dsc context 44 44 * @dsc: panel dsc parameters 45 45 */ 46 46 void (*dsc_config_thresh)(struct dpu_hw_dsc *hw_dsc, 47 47 struct drm_dsc_config *dsc); 48 48 49 + /** 50 + * @dsc_bind_pingpong_blk: binds pixel output from a DSC block 51 + * to a pingpong block 52 + */ 49 53 void (*dsc_bind_pingpong_blk)(struct dpu_hw_dsc *hw_dsc, 50 54 enum dpu_pingpong pp); 51 55 };
+3 -3
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h
··· 22 22 }; 23 23 24 24 /** 25 - * struct dpu_hw_pcc - pcc feature structure 25 + * struct dpu_hw_pcc_cfg - pcc feature structure 26 26 * @r: red coefficients. 27 27 * @g: green coefficients. 28 28 * @b: blue coefficients. ··· 40 40 */ 41 41 struct dpu_hw_dspp_ops { 42 42 /** 43 - * setup_pcc - setup dspp pcc 43 + * @setup_pcc: setup_pcc - setup dspp pcc 44 44 * @ctx: Pointer to dspp context 45 45 * @cfg: Pointer to configuration 46 46 */ ··· 69 69 }; 70 70 71 71 /** 72 - * dpu_hw_dspp - convert base object dpu_hw_base to container 72 + * to_dpu_hw_dspp - convert base object dpu_hw_base to container 73 73 * @hw: Pointer to base hardware block 74 74 * return: Pointer to hardware block container 75 75 */
+7 -13
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
··· 57 57 /** 58 58 * struct dpu_hw_intf_ops : Interface to the interface Hw driver functions 59 59 * Assumption is these functions will be called after clocks are enabled 60 - * @ setup_timing_gen : programs the timing engine 61 - * @ setup_prog_fetch : enables/disables the programmable fetch logic 62 - * @ enable_timing: enable/disable timing engine 63 - * @ get_status: returns if timing engine is enabled or not 64 - * @ get_line_count: reads current vertical line counter 60 + * @setup_timing_gen : programs the timing engine 61 + * @setup_prg_fetch : enables/disables the programmable fetch logic 62 + * @enable_timing: enable/disable timing engine 63 + * @get_status: returns if timing engine is enabled or not 64 + * @get_line_count: reads current vertical line counter 65 65 * @bind_pingpong_blk: enable/disable the connection with pingpong which will 66 66 * feed pixels to this interface 67 67 * @setup_misr: enable/disable MISR ··· 70 70 * pointer and programs the tear check configuration 71 71 * @disable_tearcheck: Disables tearcheck block 72 72 * @connect_external_te: Read, modify, write to either set or clear listening to external TE 73 - * Return: 1 if TE was originally connected, 0 if not, or -ERROR 74 - * @get_vsync_info: Provides the programmed and current line_count 75 - * @setup_autorefresh: Configure and enable the autorefresh config 76 - * @get_autorefresh: Retrieve autorefresh config from hardware 77 - * Return: 0 on success, -ETIMEDOUT on timeout 73 + * Returns 1 if TE was originally connected, 0 if not, or -ERROR 78 74 * @vsync_sel: Select vsync signal for tear-effect configuration 75 + * @disable_autorefresh: Disable autorefresh if enabled 79 76 * @program_intf_cmd_cfg: Program the DPU to interface datapath for command mode 80 77 */ 81 78 struct dpu_hw_intf_ops { ··· 106 109 107 110 void (*vsync_sel)(struct dpu_hw_intf *intf, enum dpu_vsync_source vsync_source); 108 111 109 - /** 110 - * Disable autorefresh if enabled 111 - */ 112 112 void (*disable_autorefresh)(struct dpu_hw_intf *intf, uint32_t encoder_id, u16 vdisplay); 113 113 114 114 void (*program_intf_cmd_cfg)(struct dpu_hw_intf *intf,
+11 -12
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
··· 25 25 }; 26 26 27 27 /** 28 - * 29 28 * struct dpu_hw_lm_ops : Interface to the mixer Hw driver functions 30 29 * Assumption is these functions will be called after clocks are enabled 31 30 */ 32 31 struct dpu_hw_lm_ops { 33 - /* 34 - * Sets up mixer output width and height 32 + /** 33 + * @setup_mixer_out: Sets up mixer output width and height 35 34 * and border color if enabled 36 35 */ 37 36 void (*setup_mixer_out)(struct dpu_hw_mixer *ctx, 38 37 struct dpu_hw_mixer_cfg *cfg); 39 38 40 - /* 41 - * Alpha blending configuration 39 + /** 40 + * @setup_blend_config: Alpha blending configuration 42 41 * for the specified stage 43 42 */ 44 43 void (*setup_blend_config)(struct dpu_hw_mixer *ctx, uint32_t stage, 45 44 uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op); 46 45 47 - /* 48 - * Alpha color component selection from either fg or bg 46 + /** 47 + * @setup_alpha_out: Alpha color component selection from either fg or bg 49 48 */ 50 49 void (*setup_alpha_out)(struct dpu_hw_mixer *ctx, uint32_t mixer_op); 51 50 52 51 /** 53 - * Clear layer mixer to pipe configuration 52 + * @clear_all_blendstages: Clear layer mixer to pipe configuration 54 53 * @ctx : mixer ctx pointer 55 54 * Returns: 0 on success or -error 56 55 */ 57 56 int (*clear_all_blendstages)(struct dpu_hw_mixer *ctx); 58 57 59 58 /** 60 - * Configure layer mixer to pipe configuration 59 + * @setup_blendstage: Configure layer mixer to pipe configuration 61 60 * @ctx : mixer ctx pointer 62 61 * @lm : layer mixer enumeration 63 62 * @stage_cfg : blend stage configuration ··· 66 67 struct dpu_hw_stage_cfg *stage_cfg); 67 68 68 69 /** 69 - * setup_border_color : enable/disable border color 70 + * @setup_border_color : enable/disable border color 70 71 */ 71 72 void (*setup_border_color)(struct dpu_hw_mixer *ctx, 72 73 struct dpu_mdss_color *color, 73 74 u8 border_en); 74 75 75 76 /** 76 - * setup_misr: Enable/disable MISR 77 + * @setup_misr: Enable/disable MISR 77 78 */ 78 79 void (*setup_misr)(struct dpu_hw_mixer *ctx); 79 80 80 81 /** 81 - * collect_misr: Read MISR signature 82 + * @collect_misr: Read MISR signature 82 83 */ 83 84 int (*collect_misr)(struct dpu_hw_mixer *ctx, u32 *misr_value); 84 85 };
+1 -1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
··· 34 34 #define DPU_MAX_PLANES 4 35 35 #endif 36 36 37 - #define STAGES_PER_PLANE 2 37 + #define STAGES_PER_PLANE 1 38 38 #define PIPES_PER_STAGE 2 39 39 #define PIPES_PER_PLANE (PIPES_PER_STAGE * STAGES_PER_PLANE) 40 40 #ifndef DPU_MAX_DE_CURVES
-1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.h
··· 12 12 struct dpu_hw_merge_3d; 13 13 14 14 /** 15 - * 16 15 * struct dpu_hw_merge_3d_ops : Interface to the merge_3d Hw driver functions 17 16 * Assumption is these functions will be called after clocks are enabled 18 17 * @setup_3d_mode : enable 3D merge
+10 -10
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
··· 34 34 }; 35 35 36 36 /** 37 - * 38 37 * struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions 39 38 * Assumption is these functions will be called after clocks are enabled 40 39 * @enable_tearcheck: program and enable tear check block ··· 43 44 */ 44 45 struct dpu_hw_pingpong_ops { 45 46 /** 46 - * enables vysnc generation and sets up init value of 47 + * @enable_tearcheck: enables vysnc generation and sets up init value of 47 48 * read pointer and programs the tear check cofiguration 48 49 */ 49 50 int (*enable_tearcheck)(struct dpu_hw_pingpong *pp, 50 51 struct dpu_hw_tear_check *cfg); 51 52 52 53 /** 53 - * disables tear check block 54 + * @disable_tearcheck: disables tear check block 54 55 */ 55 56 int (*disable_tearcheck)(struct dpu_hw_pingpong *pp); 56 57 57 58 /** 58 - * read, modify, write to either set or clear listening to external TE 59 + * @connect_external_te: read, modify, write to either set or clear 60 + * listening to external TE 59 61 * @Return: 1 if TE was originally connected, 0 if not, or -ERROR 60 62 */ 61 63 int (*connect_external_te)(struct dpu_hw_pingpong *pp, 62 64 bool enable_external_te); 63 65 64 66 /** 65 - * Obtain current vertical line counter 67 + * @get_line_count: Obtain current vertical line counter 66 68 */ 67 69 u32 (*get_line_count)(struct dpu_hw_pingpong *pp); 68 70 69 71 /** 70 - * Disable autorefresh if enabled 72 + * @disable_autorefresh: Disable autorefresh if enabled 71 73 */ 72 74 void (*disable_autorefresh)(struct dpu_hw_pingpong *pp, uint32_t encoder_id, u16 vdisplay); 73 75 74 76 /** 75 - * Setup dither matix for pingpong block 77 + * @setup_dither: Setup dither matix for pingpong block 76 78 */ 77 79 void (*setup_dither)(struct dpu_hw_pingpong *pp, 78 80 struct dpu_hw_dither_cfg *cfg); 79 81 /** 80 - * Enable DSC 82 + * @enable_dsc: Enable DSC 81 83 */ 82 84 int (*enable_dsc)(struct dpu_hw_pingpong *pp); 83 85 84 86 /** 85 - * Disable DSC 87 + * @disable_dsc: Disable DSC 86 88 */ 87 89 void (*disable_dsc)(struct dpu_hw_pingpong *pp); 88 90 89 91 /** 90 - * Setup DSC 92 + * @setup_dsc: Setup DSC 91 93 */ 92 94 int (*setup_dsc)(struct dpu_hw_pingpong *pp); 93 95 };
+24 -23
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
··· 14 14 15 15 #define DPU_SSPP_MAX_PITCH_SIZE 0xffff 16 16 17 - /** 17 + /* 18 18 * Flags 19 19 */ 20 20 #define DPU_SSPP_FLIP_LR BIT(0) ··· 23 23 #define DPU_SSPP_ROT_90 BIT(3) 24 24 #define DPU_SSPP_SOLID_FILL BIT(4) 25 25 26 - /** 26 + /* 27 27 * Component indices 28 28 */ 29 29 enum { ··· 36 36 }; 37 37 38 38 /** 39 - * DPU_SSPP_RECT_SOLO - multirect disabled 40 - * DPU_SSPP_RECT_0 - rect0 of a multirect pipe 41 - * DPU_SSPP_RECT_1 - rect1 of a multirect pipe 39 + * enum dpu_sspp_multirect_index - multirect mode 40 + * @DPU_SSPP_RECT_SOLO: multirect disabled 41 + * @DPU_SSPP_RECT_0: rect0 of a multirect pipe 42 + * @DPU_SSPP_RECT_1: rect1 of a multirect pipe 42 43 * 43 44 * Note: HW supports multirect with either RECT0 or 44 45 * RECT1. Considering no benefit of such configs over ··· 144 143 * struct dpu_sw_pipe_cfg : software pipe configuration 145 144 * @src_rect: src ROI, caller takes into account the different operations 146 145 * such as decimation, flip etc to program this field 147 - * @dest_rect: destination ROI. 146 + * @dst_rect: destination ROI. 148 147 * @rotation: simplified drm rotation hint 149 148 */ 150 149 struct dpu_sw_pipe_cfg { ··· 166 165 /** 167 166 * struct dpu_sw_pipe - software pipe description 168 167 * @sspp: backing SSPP pipe 169 - * @index: index of the rectangle of SSPP 170 - * @mode: parallel or time multiplex multirect mode 168 + * @multirect_index: index of the rectangle of SSPP 169 + * @multirect_mode: parallel or time multiplex multirect mode 171 170 */ 172 171 struct dpu_sw_pipe { 173 172 struct dpu_hw_sspp *sspp; ··· 182 181 */ 183 182 struct dpu_hw_sspp_ops { 184 183 /** 185 - * setup_format - setup pixel format cropping rectangle, flip 184 + * @setup_format: setup pixel format cropping rectangle, flip 186 185 * @pipe: Pointer to software pipe context 187 186 * @cfg: Pointer to pipe config structure 188 187 * @flags: Extra flags for format config ··· 191 190 const struct msm_format *fmt, u32 flags); 192 191 193 192 /** 194 - * setup_rects - setup pipe ROI rectangles 193 + * @setup_rects: setup pipe ROI rectangles 195 194 * @pipe: Pointer to software pipe context 196 195 * @cfg: Pointer to pipe config structure 197 196 */ ··· 199 198 struct dpu_sw_pipe_cfg *cfg); 200 199 201 200 /** 202 - * setup_pe - setup pipe pixel extension 201 + * @setup_pe: setup pipe pixel extension 203 202 * @ctx: Pointer to pipe context 204 203 * @pe_ext: Pointer to pixel ext settings 205 204 */ ··· 207 206 struct dpu_hw_pixel_ext *pe_ext); 208 207 209 208 /** 210 - * setup_sourceaddress - setup pipe source addresses 209 + * @setup_sourceaddress: setup pipe source addresses 211 210 * @pipe: Pointer to software pipe context 212 211 * @layout: format layout information for programming buffer to hardware 213 212 */ ··· 215 214 struct dpu_hw_fmt_layout *layout); 216 215 217 216 /** 218 - * setup_csc - setup color space coversion 217 + * @setup_csc: setup color space coversion 219 218 * @ctx: Pointer to pipe context 220 219 * @data: Pointer to config structure 221 220 */ 222 221 void (*setup_csc)(struct dpu_hw_sspp *ctx, const struct dpu_csc_cfg *data); 223 222 224 223 /** 225 - * setup_solidfill - enable/disable colorfill 224 + * @setup_solidfill: enable/disable colorfill 226 225 * @pipe: Pointer to software pipe context 227 226 * @const_color: Fill color value 228 227 * @flags: Pipe flags ··· 230 229 void (*setup_solidfill)(struct dpu_sw_pipe *pipe, u32 color); 231 230 232 231 /** 233 - * setup_multirect - setup multirect configuration 232 + * @setup_multirect: setup multirect configuration 234 233 * @pipe: Pointer to software pipe context 235 234 */ 236 235 237 236 void (*setup_multirect)(struct dpu_sw_pipe *pipe); 238 237 239 238 /** 240 - * setup_sharpening - setup sharpening 239 + * @setup_sharpening: setup sharpening 241 240 * @ctx: Pointer to pipe context 242 241 * @cfg: Pointer to config structure 243 242 */ 244 243 void (*setup_sharpening)(struct dpu_hw_sspp *ctx, 245 244 struct dpu_hw_sharp_cfg *cfg); 246 245 247 - 248 246 /** 249 - * setup_qos_lut - setup QoS LUTs 247 + * @setup_qos_lut: setup QoS LUTs 250 248 * @ctx: Pointer to pipe context 251 249 * @cfg: LUT configuration 252 250 */ ··· 253 253 struct dpu_hw_qos_cfg *cfg); 254 254 255 255 /** 256 - * setup_qos_ctrl - setup QoS control 256 + * @setup_qos_ctrl: setup QoS control 257 257 * @ctx: Pointer to pipe context 258 258 * @danger_safe_en: flags controlling enabling of danger/safe QoS/LUT 259 259 */ ··· 261 261 bool danger_safe_en); 262 262 263 263 /** 264 - * setup_clk_force_ctrl - setup clock force control 264 + * @setup_clk_force_ctrl: setup clock force control 265 265 * @ctx: Pointer to pipe context 266 266 * @enable: enable clock force if true 267 267 */ ··· 269 269 bool enable); 270 270 271 271 /** 272 - * setup_histogram - setup histograms 272 + * @setup_histogram: setup histograms 273 273 * @ctx: Pointer to pipe context 274 274 * @cfg: Pointer to histogram configuration 275 275 */ ··· 277 277 void *cfg); 278 278 279 279 /** 280 - * setup_scaler - setup scaler 280 + * @setup_scaler: setup scaler 281 281 * @scaler3_cfg: Pointer to scaler configuration 282 282 * @format: pixel format parameters 283 283 */ ··· 286 286 const struct msm_format *format); 287 287 288 288 /** 289 - * setup_cdp - setup client driven prefetch 289 + * @setup_cdp: setup client driven prefetch 290 290 * @pipe: Pointer to software pipe context 291 291 * @fmt: format used by the sw pipe 292 292 * @enable: whether the CDP should be enabled for this pipe ··· 303 303 * @ubwc: UBWC configuration data 304 304 * @idx: pipe index 305 305 * @cap: pointer to layer_cfg 306 + * @mdss_ver: MDSS version info to use for feature checks 306 307 * @ops: pointer to operations possible for this pipe 307 308 */ 308 309 struct dpu_hw_sspp {
+10 -11
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h
··· 77 77 /** 78 78 * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions 79 79 * Assumption is these functions will be called after clocks are enabled. 80 - * @setup_split_pipe : Programs the pipe control registers 81 - * @setup_pp_split : Programs the pp split control registers 82 - * @setup_traffic_shaper : programs traffic shaper control 83 80 */ 84 81 struct dpu_hw_mdp_ops { 85 - /** setup_split_pipe() : Registers are not double buffered, thisk 82 + /** 83 + * @setup_split_pipe : Programs the pipe control registers. 84 + * Registers are not double buffered, this 86 85 * function should be called before timing control enable 87 86 * @mdp : mdp top context driver 88 87 * @cfg : upper and lower part of pipe configuration ··· 90 91 struct split_pipe_cfg *p); 91 92 92 93 /** 93 - * setup_traffic_shaper() : Setup traffic shaper control 94 + * @setup_traffic_shaper : programs traffic shaper control. 94 95 * @mdp : mdp top context driver 95 96 * @cfg : traffic shaper configuration 96 97 */ ··· 98 99 struct traffic_shaper_cfg *cfg); 99 100 100 101 /** 101 - * setup_clk_force_ctrl - set clock force control 102 + * @setup_clk_force_ctrl: set clock force control 102 103 * @mdp: mdp top context driver 103 104 * @clk_ctrl: clock to be controlled 104 105 * @enable: force on enable ··· 108 109 enum dpu_clk_ctrl_type clk_ctrl, bool enable); 109 110 110 111 /** 111 - * get_danger_status - get danger status 112 + * @get_danger_status: get danger status 112 113 * @mdp: mdp top context driver 113 114 * @status: Pointer to danger safe status 114 115 */ ··· 116 117 struct dpu_danger_safe_status *status); 117 118 118 119 /** 119 - * setup_vsync_source - setup vsync source configuration details 120 + * @setup_vsync_source: setup vsync source configuration details 120 121 * @mdp: mdp top context driver 121 122 * @cfg: vsync source selection configuration 122 123 */ ··· 124 125 struct dpu_vsync_source_cfg *cfg); 125 126 126 127 /** 127 - * get_safe_status - get safe status 128 + * @get_safe_status: get safe status 128 129 * @mdp: mdp top context driver 129 130 * @status: Pointer to danger safe status 130 131 */ ··· 132 133 struct dpu_danger_safe_status *status); 133 134 134 135 /** 135 - * dp_phy_intf_sel - configure intf to phy mapping 136 + * @dp_phy_intf_sel: configure intf to phy mapping 136 137 * @mdp: mdp top context driver 137 138 * @phys: list of phys the DP interfaces should be connected to. 0 disables the INTF. 138 139 */ 139 140 void (*dp_phy_intf_sel)(struct dpu_hw_mdp *mdp, enum dpu_dp_phy_sel phys[2]); 140 141 141 142 /** 142 - * intf_audio_select - select the external interface for audio 143 + * @intf_audio_select: select the external interface for audio 143 144 * @mdp: mdp top context driver 144 145 */ 145 146 void (*intf_audio_select)(struct dpu_hw_mdp *mdp);
+8 -8
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h
··· 17 17 */ 18 18 struct dpu_hw_vbif_ops { 19 19 /** 20 - * set_limit_conf - set transaction limit config 20 + * @set_limit_conf: set transaction limit config 21 21 * @vbif: vbif context driver 22 22 * @xin_id: client interface identifier 23 23 * @rd: true for read limit; false for write limit ··· 27 27 u32 xin_id, bool rd, u32 limit); 28 28 29 29 /** 30 - * get_limit_conf - get transaction limit config 30 + * @get_limit_conf: get transaction limit config 31 31 * @vbif: vbif context driver 32 32 * @xin_id: client interface identifier 33 33 * @rd: true for read limit; false for write limit ··· 37 37 u32 xin_id, bool rd); 38 38 39 39 /** 40 - * set_halt_ctrl - set halt control 40 + * @set_halt_ctrl: set halt control 41 41 * @vbif: vbif context driver 42 42 * @xin_id: client interface identifier 43 43 * @enable: halt control enable ··· 46 46 u32 xin_id, bool enable); 47 47 48 48 /** 49 - * get_halt_ctrl - get halt control 49 + * @get_halt_ctrl: get halt control 50 50 * @vbif: vbif context driver 51 51 * @xin_id: client interface identifier 52 52 * @return: halt control enable ··· 55 55 u32 xin_id); 56 56 57 57 /** 58 - * set_qos_remap - set QoS priority remap 58 + * @set_qos_remap: set QoS priority remap 59 59 * @vbif: vbif context driver 60 60 * @xin_id: client interface identifier 61 61 * @level: priority level ··· 65 65 u32 xin_id, u32 level, u32 remap_level); 66 66 67 67 /** 68 - * set_mem_type - set memory type 68 + * @set_mem_type: set memory type 69 69 * @vbif: vbif context driver 70 70 * @xin_id: client interface identifier 71 71 * @value: memory type value ··· 74 74 u32 xin_id, u32 value); 75 75 76 76 /** 77 - * clear_errors - clear any vbif errors 77 + * @clear_errors: clear any vbif errors 78 78 * This function clears any detected pending/source errors 79 79 * on the VBIF interface, and optionally returns the detected 80 80 * error mask(s). ··· 86 86 u32 *pnd_errors, u32 *src_errors); 87 87 88 88 /** 89 - * set_write_gather_en - set write_gather enable 89 + * @set_write_gather_en: set write_gather enable 90 90 * @vbif: vbif context driver 91 91 * @xin_id: client interface identifier 92 92 */
+2 -2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h
··· 22 22 }; 23 23 24 24 /** 25 - * 26 25 * struct dpu_hw_wb_ops : Interface to the wb hw driver functions 27 26 * Assumption is these functions will be called after clocks are enabled 28 27 * @setup_outaddress: setup output address from the writeback job 29 28 * @setup_outformat: setup output format of writeback block from writeback job 29 + * @setup_roi: setup ROI (Region of Interest) parameters 30 30 * @setup_qos_lut: setup qos LUT for writeback block based on input 31 31 * @setup_cdp: setup chroma down prefetch block for writeback block 32 32 * @setup_clk_force_ctrl: setup clock force control ··· 61 61 * struct dpu_hw_wb : WB driver object 62 62 * @hw: block hardware details 63 63 * @idx: hardware index number within type 64 - * @wb_hw_caps: hardware capabilities 64 + * @caps: hardware capabilities 65 65 * @ops: function pointers 66 66 */ 67 67 struct dpu_hw_wb {
+41 -98
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
··· 826 826 struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state); 827 827 struct dpu_sw_pipe_cfg *pipe_cfg; 828 828 struct dpu_sw_pipe_cfg *r_pipe_cfg; 829 - struct dpu_sw_pipe_cfg init_pipe_cfg; 830 829 struct drm_rect fb_rect = { 0 }; 831 - const struct drm_display_mode *mode = &crtc_state->adjusted_mode; 832 830 uint32_t max_linewidth; 833 - u32 num_lm; 834 - int stage_id, num_stages; 835 831 836 832 min_scale = FRAC_16_16(1, MAX_UPSCALE_RATIO); 837 833 max_scale = MAX_DOWNSCALE_RATIO << 16; ··· 850 854 return -EINVAL; 851 855 } 852 856 853 - num_lm = dpu_crtc_get_num_lm(crtc_state); 854 - 857 + /* move the assignment here, to ease handling to another pairs later */ 858 + pipe_cfg = &pstate->pipe_cfg[0]; 859 + r_pipe_cfg = &pstate->pipe_cfg[1]; 855 860 /* state->src is 16.16, src_rect is not */ 856 - drm_rect_fp_to_int(&init_pipe_cfg.src_rect, &new_plane_state->src); 861 + drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src); 862 + 863 + pipe_cfg->dst_rect = new_plane_state->dst; 857 864 858 865 fb_rect.x2 = new_plane_state->fb->width; 859 866 fb_rect.y2 = new_plane_state->fb->height; ··· 881 882 882 883 max_linewidth = pdpu->catalog->caps->max_linewidth; 883 884 884 - drm_rect_rotate(&init_pipe_cfg.src_rect, 885 + drm_rect_rotate(&pipe_cfg->src_rect, 885 886 new_plane_state->fb->width, new_plane_state->fb->height, 886 887 new_plane_state->rotation); 887 888 888 - /* 889 - * We have 1 mixer pair cfg for 1:1:1 and 2:2:1 topology, 2 mixer pair 890 - * configs for left and right half screen in case of 4:4:2 topology. 891 - * But we may have 2 rect to split wide plane that exceeds limit with 1 892 - * config for 2:2:1. So need to handle both wide plane splitting, and 893 - * two halves of screen splitting for quad-pipe case. Check dest 894 - * rectangle left/right clipping first, then check wide rectangle 895 - * splitting in every half next. 896 - */ 897 - num_stages = (num_lm + 1) / 2; 898 - /* iterate mixer configs for this plane, to separate left/right with the id */ 899 - for (stage_id = 0; stage_id < num_stages; stage_id++) { 900 - struct drm_rect mixer_rect = { 901 - .x1 = stage_id * mode->hdisplay / num_stages, 902 - .y1 = 0, 903 - .x2 = (stage_id + 1) * mode->hdisplay / num_stages, 904 - .y2 = mode->vdisplay 905 - }; 906 - int cfg_idx = stage_id * PIPES_PER_STAGE; 907 - 908 - pipe_cfg = &pstate->pipe_cfg[cfg_idx]; 909 - r_pipe_cfg = &pstate->pipe_cfg[cfg_idx + 1]; 910 - 911 - drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src); 912 - pipe_cfg->dst_rect = new_plane_state->dst; 913 - 914 - DPU_DEBUG_PLANE(pdpu, "checking src " DRM_RECT_FMT 915 - " vs clip window " DRM_RECT_FMT "\n", 916 - DRM_RECT_ARG(&pipe_cfg->src_rect), 917 - DRM_RECT_ARG(&mixer_rect)); 918 - 919 - /* 920 - * If this plane does not fall into mixer rect, check next 921 - * mixer rect. 922 - */ 923 - if (!drm_rect_clip_scaled(&pipe_cfg->src_rect, 924 - &pipe_cfg->dst_rect, 925 - &mixer_rect)) { 926 - memset(pipe_cfg, 0, 2 * sizeof(struct dpu_sw_pipe_cfg)); 927 - 928 - continue; 889 + if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) || 890 + _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_clk_rate) { 891 + if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) { 892 + DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", 893 + DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); 894 + return -E2BIG; 929 895 } 930 896 931 - pipe_cfg->dst_rect.x1 -= mixer_rect.x1; 932 - pipe_cfg->dst_rect.x2 -= mixer_rect.x1; 933 - 934 - DPU_DEBUG_PLANE(pdpu, "Got clip src:" DRM_RECT_FMT " dst: " DRM_RECT_FMT "\n", 935 - DRM_RECT_ARG(&pipe_cfg->src_rect), DRM_RECT_ARG(&pipe_cfg->dst_rect)); 936 - 937 - /* Split wide rect into 2 rect */ 938 - if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) || 939 - _dpu_plane_calc_clk(mode, pipe_cfg) > max_mdp_clk_rate) { 940 - 941 - if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) { 942 - DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", 943 - DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); 944 - return -E2BIG; 945 - } 946 - 947 - memcpy(r_pipe_cfg, pipe_cfg, sizeof(struct dpu_sw_pipe_cfg)); 948 - pipe_cfg->src_rect.x2 = (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2) >> 1; 949 - pipe_cfg->dst_rect.x2 = (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2) >> 1; 950 - r_pipe_cfg->src_rect.x1 = pipe_cfg->src_rect.x2; 951 - r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2; 952 - DPU_DEBUG_PLANE(pdpu, "Split wide plane into:" 953 - DRM_RECT_FMT " and " DRM_RECT_FMT "\n", 954 - DRM_RECT_ARG(&pipe_cfg->src_rect), 955 - DRM_RECT_ARG(&r_pipe_cfg->src_rect)); 956 - } else { 957 - memset(r_pipe_cfg, 0, sizeof(struct dpu_sw_pipe_cfg)); 958 - } 959 - 960 - drm_rect_rotate_inv(&pipe_cfg->src_rect, 961 - new_plane_state->fb->width, 962 - new_plane_state->fb->height, 963 - new_plane_state->rotation); 964 - 965 - if (drm_rect_width(&r_pipe_cfg->src_rect) != 0) 966 - drm_rect_rotate_inv(&r_pipe_cfg->src_rect, 967 - new_plane_state->fb->width, 968 - new_plane_state->fb->height, 969 - new_plane_state->rotation); 897 + *r_pipe_cfg = *pipe_cfg; 898 + pipe_cfg->src_rect.x2 = (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2) >> 1; 899 + pipe_cfg->dst_rect.x2 = (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2) >> 1; 900 + r_pipe_cfg->src_rect.x1 = pipe_cfg->src_rect.x2; 901 + r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2; 902 + } else { 903 + memset(r_pipe_cfg, 0, sizeof(*r_pipe_cfg)); 970 904 } 905 + 906 + drm_rect_rotate_inv(&pipe_cfg->src_rect, 907 + new_plane_state->fb->width, new_plane_state->fb->height, 908 + new_plane_state->rotation); 909 + if (drm_rect_width(&r_pipe_cfg->src_rect) != 0) 910 + drm_rect_rotate_inv(&r_pipe_cfg->src_rect, 911 + new_plane_state->fb->width, new_plane_state->fb->height, 912 + new_plane_state->rotation); 971 913 972 914 pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state); 973 915 ··· 985 1045 drm_atomic_get_new_plane_state(state, plane); 986 1046 struct dpu_plane *pdpu = to_dpu_plane(plane); 987 1047 struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state); 988 - struct dpu_sw_pipe *pipe; 989 - struct dpu_sw_pipe_cfg *pipe_cfg; 990 - int ret = 0, i; 1048 + struct dpu_sw_pipe *pipe = &pstate->pipe[0]; 1049 + struct dpu_sw_pipe *r_pipe = &pstate->pipe[1]; 1050 + struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg[0]; 1051 + struct dpu_sw_pipe_cfg *r_pipe_cfg = &pstate->pipe_cfg[1]; 1052 + int ret = 0; 991 1053 992 - for (i = 0; i < PIPES_PER_PLANE; i++) { 993 - pipe = &pstate->pipe[i]; 994 - pipe_cfg = &pstate->pipe_cfg[i]; 995 - if (!drm_rect_width(&pipe_cfg->src_rect)) 996 - continue; 997 - DPU_DEBUG_PLANE(pdpu, "pipe %d is in use, validate it\n", i); 998 - ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, 1054 + ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, 1055 + &crtc_state->adjusted_mode, 1056 + new_plane_state); 1057 + if (ret) 1058 + return ret; 1059 + 1060 + if (drm_rect_width(&r_pipe_cfg->src_rect) != 0) { 1061 + ret = dpu_plane_atomic_check_pipe(pdpu, r_pipe, r_pipe_cfg, 999 1062 &crtc_state->adjusted_mode, 1000 1063 new_plane_state); 1001 1064 if (ret)
+5 -1
drivers/gpu/drm/msm/disp/mdp_format.h
··· 24 24 #define MSM_FORMAT_FLAG_UNPACK_TIGHT BIT(MSM_FORMAT_FLAG_UNPACK_TIGHT_BIT) 25 25 #define MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB BIT(MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB_BIT) 26 26 27 - /** 27 + /* 28 28 * DPU HW,Component order color map 29 29 */ 30 30 enum { ··· 37 37 /** 38 38 * struct msm_format: defines the format configuration 39 39 * @pixel_format: format fourcc 40 + * @bpc_g_y: element bit widths: BPC for G or Y 41 + * @bpc_b_cb: element bit widths: BPC for B or Cb 42 + * @bpc_r_cr: element bit widths: BPC for R or Cr 43 + * @bpc_a: element bit widths: BPC for the alpha channel 40 44 * @element: element color ordering 41 45 * @fetch_type: how the color components are packed in pixel format 42 46 * @chroma_sample: chroma sub-samplng type
+1 -1
drivers/gpu/drm/msm/dp/dp_debug.h
··· 12 12 #if defined(CONFIG_DEBUG_FS) 13 13 14 14 /** 15 - * msm_dp_debug_get() - configure and get the DisplayPlot debug module data 15 + * msm_dp_debug_init() - configure and get the DisplayPlot debug module data 16 16 * 17 17 * @dev: device instance of the caller 18 18 * @panel: instance of panel module
+1
drivers/gpu/drm/msm/dp/dp_drm.c
··· 18 18 /** 19 19 * msm_dp_bridge_detect - callback to determine if connector is connected 20 20 * @bridge: Pointer to drm bridge structure 21 + * @connector: Pointer to drm connector structure 21 22 * Returns: Bridge's 'is connected' status 22 23 */ 23 24 static enum drm_connector_status
+5 -4
drivers/gpu/drm/msm/dp/dp_link.h
··· 80 80 }; 81 81 82 82 /** 83 - * mdss_dp_test_bit_depth_to_bpp() - convert test bit depth to bpp 83 + * msm_dp_link_bit_depth_to_bpp() - convert test bit depth to bpp 84 84 * @tbd: test bit depth 85 85 * 86 - * Returns the bits per pixel (bpp) to be used corresponding to the 87 - * git bit depth value. This function assumes that bit depth has 86 + * Returns: the bits per pixel (bpp) to be used corresponding to the 87 + * bit depth value. This function assumes that bit depth has 88 88 * already been validated. 89 89 */ 90 90 static inline u32 msm_dp_link_bit_depth_to_bpp(u32 tbd) ··· 120 120 121 121 /** 122 122 * msm_dp_link_get() - get the functionalities of dp test module 123 - * 123 + * @dev: kernel device structure 124 + * @aux: DisplayPort AUX channel 124 125 * 125 126 * return: a pointer to msm_dp_link struct 126 127 */
+4 -4
drivers/gpu/drm/msm/dp/dp_panel.h
··· 63 63 64 64 /** 65 65 * is_link_rate_valid() - validates the link rate 66 - * @lane_rate: link rate requested by the sink 66 + * @bw_code: link rate requested by the sink 67 67 * 68 - * Returns true if the requested link rate is supported. 68 + * Returns: true if the requested link rate is supported. 69 69 */ 70 70 static inline bool is_link_rate_valid(u32 bw_code) 71 71 { ··· 76 76 } 77 77 78 78 /** 79 - * msm_dp_link_is_lane_count_valid() - validates the lane count 79 + * is_lane_count_valid() - validates the lane count 80 80 * @lane_count: lane count requested by the sink 81 81 * 82 - * Returns true if the requested lane count is supported. 82 + * Returns: true if the requested lane count is supported. 83 83 */ 84 84 static inline bool is_lane_count_valid(u32 lane_count) 85 85 {
+19 -17
drivers/gpu/drm/msm/msm_fence.h
··· 16 16 * incrementing fence seqno at the end of each submit 17 17 */ 18 18 struct msm_fence_context { 19 + /** @dev: the drm device */ 19 20 struct drm_device *dev; 20 - /** name: human readable name for fence timeline */ 21 + /** @name: human readable name for fence timeline */ 21 22 char name[32]; 22 - /** context: see dma_fence_context_alloc() */ 23 + /** @context: see dma_fence_context_alloc() */ 23 24 unsigned context; 24 - /** index: similar to context, but local to msm_fence_context's */ 25 + /** @index: similar to context, but local to msm_fence_context's */ 25 26 unsigned index; 26 - 27 27 /** 28 - * last_fence: 29 - * 28 + * @last_fence: 30 29 * Last assigned fence, incremented each time a fence is created 31 30 * on this fence context. If last_fence == completed_fence, 32 31 * there is no remaining pending work 33 32 */ 34 33 uint32_t last_fence; 35 - 36 34 /** 37 - * completed_fence: 38 - * 35 + * @completed_fence: 39 36 * The last completed fence, updated from the CPU after interrupt 40 37 * from GPU 41 38 */ 42 39 uint32_t completed_fence; 43 - 44 40 /** 45 - * fenceptr: 46 - * 41 + * @fenceptr: 47 42 * The address that the GPU directly writes with completed fence 48 43 * seqno. This can be ahead of completed_fence. We can peek at 49 44 * this to see if a fence has already signaled but the CPU hasn't ··· 46 51 */ 47 52 volatile uint32_t *fenceptr; 48 53 54 + /** 55 + * @spinlock: fence context spinlock 56 + */ 49 57 spinlock_t spinlock; 50 58 51 59 /* ··· 57 59 * don't queue, so maybe that is ok 58 60 */ 59 61 60 - /** next_deadline: Time of next deadline */ 62 + /** @next_deadline: Time of next deadline */ 61 63 ktime_t next_deadline; 62 - 63 64 /** 64 - * next_deadline_fence: 65 - * 65 + * @next_deadline_fence: 66 66 * Fence value for next pending deadline. The deadline timer is 67 67 * canceled when this fence is signaled. 68 68 */ 69 69 uint32_t next_deadline_fence; 70 - 70 + /** 71 + * @deadline_timer: tracks nearest deadline of a fence timeline and 72 + * expires just before it. 73 + */ 71 74 struct hrtimer deadline_timer; 75 + /** 76 + * @deadline_work: work to do after deadline_timer expires 77 + */ 72 78 struct kthread_work deadline_work; 73 79 }; 74 80
+4 -1
drivers/gpu/drm/msm/msm_gem_vma.c
··· 65 65 }; 66 66 67 67 /** 68 - * struct msm_vma_op - A MAP or UNMAP operation 68 + * struct msm_vm_op - A MAP or UNMAP operation 69 69 */ 70 70 struct msm_vm_op { 71 71 /** @op: The operation type */ ··· 798 798 * synchronous operations are supported. In a user managed VM, userspace 799 799 * handles virtual address allocation, and both async and sync operations 800 800 * are supported. 801 + * 802 + * Returns: pointer to the created &struct drm_gpuvm on success 803 + * or an ERR_PTR(-errno) on failure. 801 804 */ 802 805 struct drm_gpuvm * 803 806 msm_gem_vm_create(struct drm_device *drm, struct msm_mmu *mmu, const char *name,
+18 -50
drivers/gpu/drm/msm/msm_gpu.h
··· 116 116 * struct msm_gpu_devfreq - devfreq related state 117 117 */ 118 118 struct msm_gpu_devfreq { 119 - /** devfreq: devfreq instance */ 119 + /** @devfreq: devfreq instance */ 120 120 struct devfreq *devfreq; 121 - 122 - /** lock: lock for "suspended", "busy_cycles", and "time" */ 121 + /** @lock: lock for "suspended", "busy_cycles", and "time" */ 123 122 struct mutex lock; 124 - 125 123 /** 126 - * idle_freq: 127 - * 124 + * @idle_freq: 128 125 * Shadow frequency used while the GPU is idle. From the PoV of 129 126 * the devfreq governor, we are continuing to sample busyness and 130 127 * adjust frequency while the GPU is idle, but we use this shadow ··· 129 132 * it is inactive. 130 133 */ 131 134 unsigned long idle_freq; 132 - 133 135 /** 134 - * boost_constraint: 135 - * 136 + * @boost_freq: 136 137 * A PM QoS constraint to boost min freq for a period of time 137 138 * until the boost expires. 138 139 */ 139 140 struct dev_pm_qos_request boost_freq; 140 - 141 141 /** 142 - * busy_cycles: Last busy counter value, for calculating elapsed busy 142 + * @busy_cycles: Last busy counter value, for calculating elapsed busy 143 143 * cycles since last sampling period. 144 144 */ 145 145 u64 busy_cycles; 146 - 147 - /** time: Time of last sampling period. */ 146 + /** @time: Time of last sampling period. */ 148 147 ktime_t time; 149 - 150 - /** idle_time: Time of last transition to idle: */ 148 + /** @idle_time: Time of last transition to idle. */ 151 149 ktime_t idle_time; 152 - 153 150 /** 154 - * idle_work: 155 - * 151 + * @idle_work: 156 152 * Used to delay clamping to idle freq on active->idle transition. 157 153 */ 158 154 struct msm_hrtimer_work idle_work; 159 - 160 155 /** 161 - * boost_work: 162 - * 156 + * @boost_work: 163 157 * Used to reset the boost_constraint after the boost period has 164 158 * elapsed 165 159 */ 166 160 struct msm_hrtimer_work boost_work; 167 161 168 - /** suspended: tracks if we're suspended */ 162 + /** @suspended: tracks if we're suspended */ 169 163 bool suspended; 170 164 }; 171 165 ··· 346 358 struct msm_context { 347 359 /** @queuelock: synchronizes access to submitqueues list */ 348 360 rwlock_t queuelock; 349 - 350 361 /** @submitqueues: list of &msm_gpu_submitqueue created by userspace */ 351 362 struct list_head submitqueues; 352 - 353 363 /** 354 364 * @queueid: 355 - * 356 365 * Counter incremented each time a submitqueue is created, used to 357 366 * assign &msm_gpu_submitqueue.id 358 367 */ 359 368 int queueid; 360 - 361 369 /** 362 370 * @closed: The device file associated with this context has been closed. 363 - * 364 371 * Once the device is closed, any submits that have not been written 365 372 * to the ring buffer are no-op'd. 366 373 */ 367 374 bool closed; 368 - 369 375 /** 370 376 * @userspace_managed_vm: 371 - * 372 377 * Has userspace opted-in to userspace managed VM (ie. VM_BIND) via 373 378 * MSM_PARAM_EN_VM_BIND? 374 379 */ 375 380 bool userspace_managed_vm; 376 - 377 381 /** 378 382 * @vm: 379 - * 380 383 * The per-process GPU address-space. Do not access directly, use 381 384 * msm_context_vm(). 382 385 */ 383 386 struct drm_gpuvm *vm; 384 - 385 - /** @kref: the reference count */ 387 + /** @ref: the reference count */ 386 388 struct kref ref; 387 - 388 389 /** 389 390 * @seqno: 390 - * 391 391 * A unique per-process sequence number. Used to detect context 392 392 * switches, without relying on keeping a, potentially dangling, 393 393 * pointer to the previous context. 394 394 */ 395 395 int seqno; 396 - 397 396 /** 398 397 * @sysprof: 399 - * 400 398 * The value of MSM_PARAM_SYSPROF set by userspace. This is 401 399 * intended to be used by system profiling tools like Mesa's 402 400 * pps-producer (perfetto), and restricted to CAP_SYS_ADMIN. ··· 397 423 * file is closed. 398 424 */ 399 425 int sysprof; 400 - 401 426 /** 402 427 * @comm: Overridden task comm, see MSM_PARAM_COMM 403 428 * 404 429 * Accessed under msm_gpu::lock 405 430 */ 406 431 char *comm; 407 - 408 432 /** 409 433 * @cmdline: Overridden task cmdline, see MSM_PARAM_CMDLINE 410 434 * 411 435 * Accessed under msm_gpu::lock 412 436 */ 413 437 char *cmdline; 414 - 415 438 /** 416 - * @elapsed: 417 - * 439 + * @elapsed_ns: 418 440 * The total (cumulative) elapsed time GPU was busy with rendering 419 441 * from this context in ns. 420 442 */ 421 443 uint64_t elapsed_ns; 422 - 423 444 /** 424 445 * @cycles: 425 - * 426 446 * The total (cumulative) GPU cycles elapsed attributed to this 427 447 * context. 428 448 */ 429 449 uint64_t cycles; 430 - 431 450 /** 432 451 * @entities: 433 - * 434 452 * Table of per-priority-level sched entities used by submitqueues 435 453 * associated with this &drm_file. Because some userspace apps 436 454 * make assumptions about rendering from multiple gl contexts ··· 432 466 * level. 433 467 */ 434 468 struct drm_sched_entity *entities[NR_SCHED_PRIORITIES * MSM_GPU_MAX_RINGS]; 435 - 436 469 /** 437 470 * @ctx_mem: 438 - * 439 471 * Total amount of memory of GEM buffers with handles attached for 440 472 * this context. 441 473 */ ··· 443 479 struct drm_gpuvm *msm_context_vm(struct drm_device *dev, struct msm_context *ctx); 444 480 445 481 /** 446 - * msm_context_is_vm_bind() - has userspace opted in to VM_BIND? 482 + * msm_context_is_vmbind() - has userspace opted in to VM_BIND? 447 483 * 448 484 * @ctx: the drm_file context 449 485 * ··· 451 487 * do sparse binding including having multiple, potentially partial, 452 488 * mappings in the VM. Therefore certain legacy uabi (ie. GET_IOVA, 453 489 * SET_IOVA) are rejected because they don't have a sensible meaning. 490 + * 491 + * Returns: %true if userspace is managing the VM, %false otherwise. 454 492 */ 455 493 static inline bool 456 494 msm_context_is_vmbind(struct msm_context *ctx) ··· 484 518 * This allows generations without preemption (nr_rings==1) to have some 485 519 * amount of prioritization, and provides more priority levels for gens 486 520 * that do have preemption. 521 + * 522 + * Returns: %0 on success, %-errno on error. 487 523 */ 488 524 static inline int msm_gpu_convert_priority(struct msm_gpu *gpu, int prio, 489 525 unsigned *ring_nr, enum drm_sched_priority *sched_prio) ··· 509 541 } 510 542 511 543 /** 512 - * struct msm_gpu_submitqueues - Userspace created context. 544 + * struct msm_gpu_submitqueue - Userspace created context. 513 545 * 514 546 * A submitqueue is associated with a gl context or vk queue (or equiv) 515 547 * in userspace.
+2 -2
drivers/gpu/drm/msm/msm_iommu.c
··· 364 364 } 365 365 366 366 /** 367 - * alloc_pt() - Custom page table allocator 367 + * msm_iommu_pagetable_alloc_pt() - Custom page table allocator 368 368 * @cookie: Cookie passed at page table allocation time. 369 369 * @size: Size of the page table. This size should be fixed, 370 370 * and determined at creation time based on the granule size. ··· 416 416 417 417 418 418 /** 419 - * free_pt() - Custom page table free function 419 + * msm_iommu_pagetable_free_pt() - Custom page table free function 420 420 * @cookie: Cookie passed at page table allocation time. 421 421 * @data: Page table to free. 422 422 * @size: Size of the page table. This size should be fixed,
+5 -5
drivers/gpu/drm/msm/msm_perf.c
··· 65 65 66 66 if ((perf->cnt++ % 32) == 0) { 67 67 /* Header line: */ 68 - n = snprintf(ptr, rem, "%%BUSY"); 68 + n = scnprintf(ptr, rem, "%%BUSY"); 69 69 ptr += n; 70 70 rem -= n; 71 71 72 72 for (i = 0; i < gpu->num_perfcntrs; i++) { 73 73 const struct msm_gpu_perfcntr *perfcntr = &gpu->perfcntrs[i]; 74 - n = snprintf(ptr, rem, "\t%s", perfcntr->name); 74 + n = scnprintf(ptr, rem, "\t%s", perfcntr->name); 75 75 ptr += n; 76 76 rem -= n; 77 77 } ··· 93 93 return ret; 94 94 95 95 val = totaltime ? 1000 * activetime / totaltime : 0; 96 - n = snprintf(ptr, rem, "%3d.%d%%", val / 10, val % 10); 96 + n = scnprintf(ptr, rem, "%3d.%d%%", val / 10, val % 10); 97 97 ptr += n; 98 98 rem -= n; 99 99 100 100 for (i = 0; i < ret; i++) { 101 101 /* cycle counters (I think).. convert to MHz.. */ 102 102 val = cntrs[i] / 10000; 103 - n = snprintf(ptr, rem, "\t%5d.%02d", 103 + n = scnprintf(ptr, rem, "\t%5d.%02d", 104 104 val / 100, val % 100); 105 105 ptr += n; 106 106 rem -= n; 107 107 } 108 108 } 109 109 110 - n = snprintf(ptr, rem, "\n"); 110 + n = scnprintf(ptr, rem, "\n"); 111 111 ptr += n; 112 112 rem -= n; 113 113
+1
drivers/gpu/drm/panel/Kconfig
··· 1165 1165 tristate "Visionox RM69299" 1166 1166 depends on OF 1167 1167 depends on DRM_MIPI_DSI 1168 + depends on BACKLIGHT_CLASS_DEVICE 1168 1169 help 1169 1170 Say Y here if you want to enable support for Visionox 1170 1171 RM69299 DSI Video Mode panel.
+2
drivers/gpu/drm/panel/panel-sony-td4353-jdi.c
··· 212 212 if (ret) 213 213 return dev_err_probe(dev, ret, "Failed to get backlight\n"); 214 214 215 + ctx->panel.prepare_prev_first = true; 216 + 215 217 drm_panel_add(&ctx->panel); 216 218 217 219 ret = mipi_dsi_attach(dsi);
+35 -5
drivers/gpu/drm/tests/drm_atomic_state_test.c
··· 156 156 157 157 if (connector) { 158 158 conn_state = drm_atomic_get_connector_state(state, connector); 159 - KUNIT_ASSERT_NOT_ERR_OR_NULL(test, conn_state); 159 + if (IS_ERR(conn_state)) 160 + return PTR_ERR(conn_state); 160 161 161 162 ret = drm_atomic_set_crtc_for_connector(conn_state, crtc); 162 - KUNIT_EXPECT_EQ(test, ret, 0); 163 + if (ret) 164 + return ret; 163 165 } 164 166 165 167 crtc_state = drm_atomic_get_crtc_state(state, crtc); 166 - KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc_state); 168 + if (IS_ERR(crtc_state)) 169 + return PTR_ERR(crtc_state); 167 170 168 171 ret = drm_atomic_set_mode_for_crtc(crtc_state, &drm_atomic_test_mode); 169 - KUNIT_EXPECT_EQ(test, ret, 0); 172 + if (ret) 173 + return ret; 170 174 171 175 crtc_state->enable = true; 172 176 crtc_state->active = true; 173 177 174 178 if (connector) { 175 179 ret = drm_atomic_commit(state); 176 - KUNIT_ASSERT_EQ(test, ret, 0); 180 + if (ret) 181 + return ret; 177 182 } else { 178 183 // dummy connector mask 179 184 crtc_state->connector_mask = DRM_TEST_CONN_0; ··· 211 206 drm_modeset_acquire_init(&ctx, 0); 212 207 213 208 // first modeset to enable 209 + retry_set_up: 214 210 ret = set_up_atomic_state(test, priv, old_conn, &ctx); 211 + if (ret == -EDEADLK) { 212 + ret = drm_modeset_backoff(&ctx); 213 + if (!ret) 214 + goto retry_set_up; 215 + } 215 216 KUNIT_ASSERT_EQ(test, ret, 0); 216 217 217 218 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 288 277 289 278 drm_modeset_acquire_init(&ctx, 0); 290 279 280 + retry_set_up: 291 281 ret = set_up_atomic_state(test, priv, NULL, &ctx); 282 + if (ret == -EDEADLK) { 283 + ret = drm_modeset_backoff(&ctx); 284 + if (!ret) 285 + goto retry_set_up; 286 + } 292 287 KUNIT_ASSERT_EQ(test, ret, 0); 293 288 294 289 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); 295 290 KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state); 296 291 292 + retry: 297 293 crtc_state = drm_atomic_get_crtc_state(state, priv->crtc); 294 + if (PTR_ERR(crtc_state) == -EDEADLK) { 295 + drm_atomic_state_clear(state); 296 + ret = drm_modeset_backoff(&ctx); 297 + if (!ret) 298 + goto retry; 299 + } 298 300 KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc_state); 299 301 300 302 crtc_state->encoder_mask = param->encoder_mask; ··· 316 292 crtc_state->mode_changed = true; 317 293 318 294 ret = drm_atomic_helper_check_modeset(drm, state); 295 + if (ret == -EDEADLK) { 296 + drm_atomic_state_clear(state); 297 + ret = drm_modeset_backoff(&ctx); 298 + if (!ret) 299 + goto retry; 300 + } 319 301 KUNIT_ASSERT_EQ(test, ret, param->expected_result); 320 302 321 303 drm_modeset_drop_locks(&ctx);
+143
drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c
··· 257 257 258 258 drm_modeset_acquire_init(&ctx, 0); 259 259 260 + retry_conn_enable: 260 261 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 261 262 crtc, conn, 262 263 preferred, 263 264 &ctx); 265 + if (ret == -EDEADLK) { 266 + ret = drm_modeset_backoff(&ctx); 267 + if (!ret) 268 + goto retry_conn_enable; 269 + } 264 270 KUNIT_ASSERT_EQ(test, ret, 0); 265 271 266 272 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 332 326 333 327 drm_modeset_acquire_init(&ctx, 0); 334 328 329 + retry_conn_enable: 335 330 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 336 331 crtc, conn, 337 332 preferred, 338 333 &ctx); 334 + if (ret == -EDEADLK) { 335 + ret = drm_modeset_backoff(&ctx); 336 + if (!ret) 337 + goto retry_conn_enable; 338 + } 339 339 KUNIT_ASSERT_EQ(test, ret, 0); 340 340 341 341 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 409 397 410 398 drm_modeset_acquire_init(&ctx, 0); 411 399 400 + retry_conn_enable: 412 401 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 413 402 crtc, conn, 414 403 preferred, 415 404 &ctx); 405 + if (ret == -EDEADLK) { 406 + ret = drm_modeset_backoff(&ctx); 407 + if (!ret) 408 + goto retry_conn_enable; 409 + } 416 410 KUNIT_ASSERT_EQ(test, ret, 0); 417 411 418 412 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 475 457 KUNIT_ASSERT_NOT_NULL(test, mode); 476 458 477 459 crtc = priv->crtc; 460 + 461 + retry_conn_enable: 478 462 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 479 463 crtc, conn, 480 464 mode, 481 465 &ctx); 466 + if (ret == -EDEADLK) { 467 + ret = drm_modeset_backoff(&ctx); 468 + if (!ret) 469 + goto retry_conn_enable; 470 + } 482 471 KUNIT_ASSERT_EQ(test, ret, 0); 483 472 484 473 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 543 518 544 519 drm_modeset_acquire_init(&ctx, 0); 545 520 521 + retry_conn_enable: 546 522 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 547 523 crtc, conn, 548 524 preferred, 549 525 &ctx); 526 + if (ret == -EDEADLK) { 527 + ret = drm_modeset_backoff(&ctx); 528 + if (!ret) 529 + goto retry_conn_enable; 530 + } 550 531 KUNIT_ASSERT_EQ(test, ret, 0); 551 532 552 533 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 611 580 KUNIT_ASSERT_NOT_NULL(test, mode); 612 581 613 582 crtc = priv->crtc; 583 + 584 + retry_conn_enable: 614 585 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 615 586 crtc, conn, 616 587 mode, 617 588 &ctx); 589 + if (ret == -EDEADLK) { 590 + ret = drm_modeset_backoff(&ctx); 591 + if (!ret) 592 + goto retry_conn_enable; 593 + } 618 594 KUNIT_ASSERT_EQ(test, ret, 0); 619 595 620 596 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 681 643 682 644 drm_modeset_acquire_init(&ctx, 0); 683 645 646 + retry_conn_enable: 684 647 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 685 648 crtc, conn, 686 649 preferred, 687 650 &ctx); 651 + if (ret == -EDEADLK) { 652 + ret = drm_modeset_backoff(&ctx); 653 + if (!ret) 654 + goto retry_conn_enable; 655 + } 688 656 KUNIT_ASSERT_EQ(test, ret, 0); 689 657 690 658 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 749 705 KUNIT_ASSERT_NOT_NULL(test, mode); 750 706 751 707 crtc = priv->crtc; 708 + 709 + retry_conn_enable: 752 710 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 753 711 crtc, conn, 754 712 mode, 755 713 &ctx); 714 + if (ret == -EDEADLK) { 715 + ret = drm_modeset_backoff(&ctx); 716 + if (!ret) 717 + goto retry_conn_enable; 718 + } 756 719 KUNIT_ASSERT_EQ(test, ret, 0); 757 720 758 721 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 921 870 922 871 drm_modeset_acquire_init(&ctx, 0); 923 872 873 + retry_conn_enable: 924 874 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 925 875 crtc, conn, 926 876 preferred, 927 877 &ctx); 878 + if (ret == -EDEADLK) { 879 + ret = drm_modeset_backoff(&ctx); 880 + if (!ret) 881 + goto retry_conn_enable; 882 + } 928 883 KUNIT_ASSERT_EQ(test, ret, 0); 929 884 930 885 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 1003 946 1004 947 drm_modeset_acquire_init(&ctx, 0); 1005 948 949 + retry_conn_enable: 1006 950 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1007 951 crtc, conn, 1008 952 preferred, 1009 953 &ctx); 954 + if (ret == -EDEADLK) { 955 + ret = drm_modeset_backoff(&ctx); 956 + if (!ret) 957 + goto retry_conn_enable; 958 + } 1010 959 KUNIT_ASSERT_EQ(test, ret, 0); 1011 960 1012 961 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx); ··· 1085 1022 1086 1023 drm_modeset_acquire_init(&ctx, 0); 1087 1024 1025 + retry_conn_enable: 1088 1026 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1089 1027 crtc, conn, 1090 1028 preferred, 1091 1029 &ctx); 1030 + if (ret == -EDEADLK) { 1031 + ret = drm_modeset_backoff(&ctx); 1032 + if (!ret) 1033 + goto retry_conn_enable; 1034 + } 1092 1035 KUNIT_ASSERT_EQ(test, ret, 0); 1093 1036 1094 1037 conn_state = conn->state; ··· 1138 1069 1139 1070 drm_modeset_acquire_init(&ctx, 0); 1140 1071 1072 + retry_conn_enable: 1141 1073 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1142 1074 crtc, conn, 1143 1075 preferred, 1144 1076 &ctx); 1077 + if (ret == -EDEADLK) { 1078 + ret = drm_modeset_backoff(&ctx); 1079 + if (!ret) 1080 + goto retry_conn_enable; 1081 + } 1145 1082 KUNIT_ASSERT_EQ(test, ret, 0); 1146 1083 1147 1084 conn_state = conn->state; ··· 1193 1118 1194 1119 drm_modeset_acquire_init(&ctx, 0); 1195 1120 1121 + retry_conn_enable: 1196 1122 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1197 1123 crtc, conn, 1198 1124 preferred, 1199 1125 &ctx); 1126 + if (ret == -EDEADLK) { 1127 + ret = drm_modeset_backoff(&ctx); 1128 + if (!ret) 1129 + goto retry_conn_enable; 1130 + } 1200 1131 KUNIT_ASSERT_EQ(test, ret, 0); 1201 1132 1202 1133 conn_state = conn->state; ··· 1248 1167 1249 1168 drm_modeset_acquire_init(&ctx, 0); 1250 1169 1170 + retry_conn_enable: 1251 1171 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1252 1172 crtc, conn, 1253 1173 preferred, 1254 1174 &ctx); 1175 + if (ret == -EDEADLK) { 1176 + ret = drm_modeset_backoff(&ctx); 1177 + if (!ret) 1178 + goto retry_conn_enable; 1179 + } 1255 1180 KUNIT_ASSERT_EQ(test, ret, 0); 1256 1181 1257 1182 conn_state = conn->state; ··· 1305 1218 1306 1219 drm_modeset_acquire_init(&ctx, 0); 1307 1220 1221 + retry_conn_enable: 1308 1222 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1309 1223 crtc, conn, 1310 1224 preferred, 1311 1225 &ctx); 1226 + if (ret == -EDEADLK) { 1227 + ret = drm_modeset_backoff(&ctx); 1228 + if (!ret) 1229 + goto retry_conn_enable; 1230 + } 1312 1231 KUNIT_ASSERT_EQ(test, ret, 0); 1313 1232 1314 1233 /* You shouldn't be doing that at home. */ ··· 1385 1292 1386 1293 drm_modeset_acquire_init(&ctx, 0); 1387 1294 1295 + retry_conn_enable: 1388 1296 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1389 1297 crtc, conn, 1390 1298 preferred, 1391 1299 &ctx); 1300 + if (ret == -EDEADLK) { 1301 + ret = drm_modeset_backoff(&ctx); 1302 + if (!ret) 1303 + goto retry_conn_enable; 1304 + } 1392 1305 KUNIT_EXPECT_EQ(test, ret, 0); 1393 1306 1394 1307 conn_state = conn->state; ··· 1539 1440 1540 1441 drm_modeset_acquire_init(&ctx, 0); 1541 1442 1443 + retry_conn_enable: 1542 1444 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1543 1445 crtc, conn, 1544 1446 preferred, 1545 1447 &ctx); 1448 + if (ret == -EDEADLK) { 1449 + ret = drm_modeset_backoff(&ctx); 1450 + if (!ret) 1451 + goto retry_conn_enable; 1452 + } 1546 1453 KUNIT_EXPECT_EQ(test, ret, 0); 1547 1454 1548 1455 conn_state = conn->state; ··· 1774 1669 drm_modeset_acquire_init(&ctx, 0); 1775 1670 1776 1671 crtc = priv->crtc; 1672 + 1673 + retry_conn_enable: 1777 1674 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1778 1675 crtc, conn, 1779 1676 mode, 1780 1677 &ctx); 1678 + if (ret == -EDEADLK) { 1679 + ret = drm_modeset_backoff(&ctx); 1680 + if (!ret) 1681 + goto retry_conn_enable; 1682 + } 1781 1683 KUNIT_EXPECT_EQ(test, ret, 0); 1782 1684 1783 1685 conn_state = conn->state; ··· 1848 1736 1849 1737 drm_modeset_acquire_init(&ctx, 0); 1850 1738 1739 + retry_conn_enable: 1851 1740 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1852 1741 crtc, conn, 1853 1742 preferred, 1854 1743 &ctx); 1744 + if (ret == -EDEADLK) { 1745 + ret = drm_modeset_backoff(&ctx); 1746 + if (!ret) 1747 + goto retry_conn_enable; 1748 + } 1855 1749 KUNIT_EXPECT_EQ(test, ret, 0); 1856 1750 1857 1751 conn_state = conn->state; ··· 1923 1805 1924 1806 drm_modeset_acquire_init(&ctx, 0); 1925 1807 1808 + retry_conn_enable: 1926 1809 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1927 1810 crtc, conn, 1928 1811 preferred, 1929 1812 &ctx); 1813 + if (ret == -EDEADLK) { 1814 + ret = drm_modeset_backoff(&ctx); 1815 + if (!ret) 1816 + goto retry_conn_enable; 1817 + } 1930 1818 KUNIT_EXPECT_EQ(test, ret, 0); 1931 1819 1932 1820 conn_state = conn->state; ··· 1989 1865 1990 1866 drm_modeset_acquire_init(&ctx, 0); 1991 1867 1868 + retry_conn_enable: 1992 1869 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 1993 1870 crtc, conn, 1994 1871 preferred, 1995 1872 &ctx); 1873 + if (ret == -EDEADLK) { 1874 + ret = drm_modeset_backoff(&ctx); 1875 + if (!ret) 1876 + goto retry_conn_enable; 1877 + } 1996 1878 KUNIT_EXPECT_EQ(test, ret, 0); 1997 1879 1998 1880 conn_state = conn->state; ··· 2057 1927 2058 1928 drm_modeset_acquire_init(&ctx, 0); 2059 1929 1930 + retry_conn_enable: 2060 1931 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 2061 1932 crtc, conn, 2062 1933 preferred, 2063 1934 &ctx); 1935 + if (ret == -EDEADLK) { 1936 + ret = drm_modeset_backoff(&ctx); 1937 + if (!ret) 1938 + goto retry_conn_enable; 1939 + } 2064 1940 KUNIT_EXPECT_EQ(test, ret, 0); 2065 1941 2066 1942 conn_state = conn->state; ··· 2106 1970 2107 1971 drm = &priv->drm; 2108 1972 crtc = priv->crtc; 1973 + 1974 + retry_conn_enable: 2109 1975 ret = drm_kunit_helper_enable_crtc_connector(test, drm, 2110 1976 crtc, conn, 2111 1977 preferred, 2112 1978 &ctx); 1979 + if (ret == -EDEADLK) { 1980 + ret = drm_modeset_backoff(&ctx); 1981 + if (!ret) 1982 + goto retry_conn_enable; 1983 + } 2113 1984 KUNIT_ASSERT_EQ(test, ret, 0); 2114 1985 2115 1986 state = drm_kunit_helper_atomic_state_alloc(test, drm, &ctx);
+4 -11
drivers/gpu/drm/xe/xe_bo.c
··· 1527 1527 * always succeed here, as long as we hold the lru lock. 1528 1528 */ 1529 1529 spin_lock(&ttm_bo->bdev->lru_lock); 1530 - locked = dma_resv_trylock(ttm_bo->base.resv); 1530 + locked = dma_resv_trylock(&ttm_bo->base._resv); 1531 1531 spin_unlock(&ttm_bo->bdev->lru_lock); 1532 1532 xe_assert(xe, locked); 1533 1533 ··· 1547 1547 bo = ttm_to_xe_bo(ttm_bo); 1548 1548 xe_assert(xe_bo_device(bo), !(bo->created && kref_read(&ttm_bo->base.refcount))); 1549 1549 1550 - /* 1551 - * Corner case where TTM fails to allocate memory and this BOs resv 1552 - * still points the VMs resv 1553 - */ 1554 - if (ttm_bo->base.resv != &ttm_bo->base._resv) 1555 - return; 1556 - 1557 1550 if (!xe_ttm_bo_lock_in_destructor(ttm_bo)) 1558 1551 return; 1559 1552 ··· 1556 1563 * TODO: Don't do this for external bos once we scrub them after 1557 1564 * unbind. 1558 1565 */ 1559 - dma_resv_for_each_fence(&cursor, ttm_bo->base.resv, 1566 + dma_resv_for_each_fence(&cursor, &ttm_bo->base._resv, 1560 1567 DMA_RESV_USAGE_BOOKKEEP, fence) { 1561 1568 if (xe_fence_is_xe_preempt(fence) && 1562 1569 !dma_fence_is_signaled(fence)) { 1563 1570 if (!replacement) 1564 1571 replacement = dma_fence_get_stub(); 1565 1572 1566 - dma_resv_replace_fences(ttm_bo->base.resv, 1573 + dma_resv_replace_fences(&ttm_bo->base._resv, 1567 1574 fence->context, 1568 1575 replacement, 1569 1576 DMA_RESV_USAGE_BOOKKEEP); ··· 1571 1578 } 1572 1579 dma_fence_put(replacement); 1573 1580 1574 - dma_resv_unlock(ttm_bo->base.resv); 1581 + dma_resv_unlock(&ttm_bo->base._resv); 1575 1582 } 1576 1583 1577 1584 static void xe_ttm_bo_delete_mem_notify(struct ttm_buffer_object *ttm_bo)
+1 -1
drivers/gpu/drm/xe/xe_device.c
··· 1056 1056 * transient and need to be flushed.. 1057 1057 */ 1058 1058 if (xe_mmio_wait32(&gt->mmio, XE2_TDF_CTRL, TRANSIENT_FLUSH_REQUEST, 0, 1059 - 150, NULL, false)) 1059 + 300, NULL, false)) 1060 1060 xe_gt_err_once(gt, "TD flush timeout\n"); 1061 1061 1062 1062 xe_force_wake_put(gt_to_fw(gt), fw_ref);
+1 -1
drivers/gpu/drm/xe/xe_dma_buf.c
··· 124 124 case XE_PL_TT: 125 125 sgt = drm_prime_pages_to_sg(obj->dev, 126 126 bo->ttm.ttm->pages, 127 - bo->ttm.ttm->num_pages); 127 + obj->size >> PAGE_SHIFT); 128 128 if (IS_ERR(sgt)) 129 129 return sgt; 130 130
+1 -1
drivers/gpu/drm/xe/xe_eu_stall.c
··· 315 315 return -EFAULT; 316 316 317 317 if (XE_IOCTL_DBG(xe, ext.property >= ARRAY_SIZE(xe_set_eu_stall_property_funcs)) || 318 - XE_IOCTL_DBG(xe, ext.pad)) 318 + XE_IOCTL_DBG(xe, !ext.property) || XE_IOCTL_DBG(xe, ext.pad)) 319 319 return -EINVAL; 320 320 321 321 idx = array_index_nospec(ext.property, ARRAY_SIZE(xe_set_eu_stall_property_funcs));
+2 -1
drivers/gpu/drm/xe/xe_exec.c
··· 132 132 133 133 if (XE_IOCTL_DBG(xe, args->extensions) || 134 134 XE_IOCTL_DBG(xe, args->pad[0] || args->pad[1] || args->pad[2]) || 135 - XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1])) 135 + XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]) || 136 + XE_IOCTL_DBG(xe, args->num_syncs > DRM_XE_MAX_SYNCS)) 136 137 return -EINVAL; 137 138 138 139 q = xe_exec_queue_lookup(xef, args->exec_queue_id);
+4 -3
drivers/gpu/drm/xe/xe_gt.c
··· 797 797 xe_gt_sriov_pf_init_hw(gt); 798 798 799 799 xe_mocs_init(gt); 800 - err = xe_uc_start(&gt->uc); 801 - if (err) 802 - return err; 803 800 804 801 for_each_hw_engine(hwe, gt, id) 805 802 xe_reg_sr_apply_mmio(&hwe->reg_sr, gt); 806 803 807 804 /* Get CCS mode in sync between sw/hw */ 808 805 xe_gt_apply_ccs_mode(gt); 806 + 807 + err = xe_uc_start(&gt->uc); 808 + if (err) 809 + return err; 809 810 810 811 /* Restore GT freq to expected values */ 811 812 xe_gt_sanitize_freq(gt);
+3 -1
drivers/gpu/drm/xe/xe_gt_freq.c
··· 293 293 return -ENOMEM; 294 294 295 295 err = sysfs_create_files(gt->freq, freq_attrs); 296 - if (err) 296 + if (err) { 297 + kobject_put(gt->freq); 297 298 return err; 299 + } 298 300 299 301 err = devm_add_action_or_reset(xe->drm.dev, freq_fini, gt->freq); 300 302 if (err)
+8
drivers/gpu/drm/xe/xe_gt_idle.c
··· 5 5 6 6 #include <drm/drm_managed.h> 7 7 8 + #include <generated/xe_wa_oob.h> 8 9 #include "xe_force_wake.h" 9 10 #include "xe_device.h" 10 11 #include "xe_gt.h" ··· 17 16 #include "xe_mmio.h" 18 17 #include "xe_pm.h" 19 18 #include "xe_sriov.h" 19 + #include "xe_wa.h" 20 20 21 21 /** 22 22 * DOC: Xe GT Idle ··· 146 144 xe_mmio_write32(mmio, MEDIA_POWERGATE_IDLE_HYSTERESIS, 25); 147 145 xe_mmio_write32(mmio, RENDER_POWERGATE_IDLE_HYSTERESIS, 25); 148 146 } 147 + 148 + if (XE_GT_WA(gt, 14020316580)) 149 + gtidle->powergate_enable &= ~(VDN_HCP_POWERGATE_ENABLE(0) | 150 + VDN_MFXVDENC_POWERGATE_ENABLE(0) | 151 + VDN_HCP_POWERGATE_ENABLE(2) | 152 + VDN_MFXVDENC_POWERGATE_ENABLE(2)); 149 153 150 154 xe_mmio_write32(mmio, POWERGATE_ENABLE, gtidle->powergate_enable); 151 155 xe_force_wake_put(gt_to_fw(gt), fw_ref);
+1 -1
drivers/gpu/drm/xe/xe_gt_sriov_vf.c
··· 733 733 734 734 spin_lock(&gt->sriov.vf.migration.lock); 735 735 736 - if (!gt->sriov.vf.migration.recovery_queued || 736 + if (!gt->sriov.vf.migration.recovery_queued && 737 737 !gt->sriov.vf.migration.recovery_teardown) { 738 738 gt->sriov.vf.migration.recovery_queued = true; 739 739 WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, true);
+1 -1
drivers/gpu/drm/xe/xe_gt_throttle.c
··· 140 140 struct throttle_attribute *other_ta = kobj_attribute_to_throttle(kattr); 141 141 142 142 if (other_ta->mask != U32_MAX && reasons & other_ta->mask) 143 - ret += sysfs_emit_at(buff, ret, "%s ", (*pother)->name); 143 + ret += sysfs_emit_at(buff, ret, "%s ", (*pother)->name + strlen("reason_")); 144 144 } 145 145 146 146 if (drm_WARN_ONCE(&xe->drm, !ret, "Unknown reason: %#x\n", reasons))
+28 -7
drivers/gpu/drm/xe/xe_guc_submit.c
··· 717 717 return xe_gt_recovery_pending(guc_to_gt(guc)); 718 718 } 719 719 720 + static inline void relaxed_ms_sleep(unsigned int delay_ms) 721 + { 722 + unsigned long min_us, max_us; 723 + 724 + if (!delay_ms) 725 + return; 726 + 727 + if (delay_ms > 20) { 728 + msleep(delay_ms); 729 + return; 730 + } 731 + 732 + min_us = mul_u32_u32(delay_ms, 1000); 733 + max_us = min_us + 500; 734 + 735 + usleep_range(min_us, max_us); 736 + } 737 + 720 738 static int wq_wait_for_space(struct xe_exec_queue *q, u32 wqi_size) 721 739 { 722 740 struct xe_guc *guc = exec_queue_to_guc(q); 723 741 struct xe_device *xe = guc_to_xe(guc); 724 742 struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]); 725 - unsigned int sleep_period_ms = 1; 743 + unsigned int sleep_period_ms = 1, sleep_total_ms = 0; 726 744 727 745 #define AVAILABLE_SPACE \ 728 746 CIRC_SPACE(q->guc->wqi_tail, q->guc->wqi_head, WQ_SIZE) 729 747 if (wqi_size > AVAILABLE_SPACE && !vf_recovery(guc)) { 730 748 try_again: 731 749 q->guc->wqi_head = parallel_read(xe, map, wq_desc.head); 732 - if (wqi_size > AVAILABLE_SPACE) { 733 - if (sleep_period_ms == 1024) { 750 + if (wqi_size > AVAILABLE_SPACE && !vf_recovery(guc)) { 751 + if (sleep_total_ms > 2000) { 734 752 xe_gt_reset_async(q->gt); 735 753 return -ENODEV; 736 754 } 737 755 738 756 msleep(sleep_period_ms); 739 - sleep_period_ms <<= 1; 757 + sleep_total_ms += sleep_period_ms; 758 + if (sleep_period_ms < 64) 759 + sleep_period_ms <<= 1; 740 760 goto try_again; 741 761 } 742 762 } ··· 1605 1585 since_resume_ms; 1606 1586 1607 1587 if (wait_ms > 0 && q->guc->resume_time) 1608 - msleep(wait_ms); 1588 + relaxed_ms_sleep(wait_ms); 1609 1589 1610 1590 set_exec_queue_suspended(q); 1611 1591 disable_scheduling(q, false); ··· 2273 2253 struct xe_exec_queue *q) 2274 2254 { 2275 2255 struct xe_gpu_scheduler *sched = &q->guc->sched; 2276 - struct xe_sched_job *job = NULL; 2256 + struct xe_sched_job *job = NULL, *__job; 2277 2257 bool restore_replay = false; 2278 2258 2279 - list_for_each_entry(job, &sched->base.pending_list, drm.list) { 2259 + list_for_each_entry(__job, &sched->base.pending_list, drm.list) { 2260 + job = __job; 2280 2261 restore_replay |= job->restore_replay; 2281 2262 if (restore_replay) { 2282 2263 xe_gt_dbg(guc_to_gt(guc), "Replay JOB - guc_id=%d, seqno=%d",
+2 -2
drivers/gpu/drm/xe/xe_heci_gsc.c
··· 223 223 if (xe->heci_gsc.irq < 0) 224 224 return; 225 225 226 - ret = generic_handle_irq(xe->heci_gsc.irq); 226 + ret = generic_handle_irq_safe(xe->heci_gsc.irq); 227 227 if (ret) 228 228 drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret); 229 229 } ··· 243 243 if (xe->heci_gsc.irq < 0) 244 244 return; 245 245 246 - ret = generic_handle_irq(xe->heci_gsc.irq); 246 + ret = generic_handle_irq_safe(xe->heci_gsc.irq); 247 247 if (ret) 248 248 drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret); 249 249 }
+8 -4
drivers/gpu/drm/xe/xe_oa.c
··· 1105 1105 oag_buf_size_select(stream) | 1106 1106 oag_configure_mmio_trigger(stream, true)); 1107 1107 1108 - xe_mmio_write32(mmio, __oa_regs(stream)->oa_ctx_ctrl, stream->periodic ? 1109 - (OAG_OAGLBCTXCTRL_COUNTER_RESUME | 1108 + xe_mmio_write32(mmio, __oa_regs(stream)->oa_ctx_ctrl, 1109 + OAG_OAGLBCTXCTRL_COUNTER_RESUME | 1110 + (stream->periodic ? 1110 1111 OAG_OAGLBCTXCTRL_TIMER_ENABLE | 1111 1112 REG_FIELD_PREP(OAG_OAGLBCTXCTRL_TIMER_PERIOD_MASK, 1112 - stream->period_exponent)) : 0); 1113 + stream->period_exponent) : 0)); 1113 1114 1114 1115 /* 1115 1116 * Initialize Super Queue Internal Cnt Register ··· 1255 1254 static int xe_oa_set_prop_num_syncs(struct xe_oa *oa, u64 value, 1256 1255 struct xe_oa_open_param *param) 1257 1256 { 1257 + if (XE_IOCTL_DBG(oa->xe, value > DRM_XE_MAX_SYNCS)) 1258 + return -EINVAL; 1259 + 1258 1260 param->num_syncs = value; 1259 1261 return 0; 1260 1262 } ··· 1347 1343 ARRAY_SIZE(xe_oa_set_property_funcs_config)); 1348 1344 1349 1345 if (XE_IOCTL_DBG(oa->xe, ext.property >= ARRAY_SIZE(xe_oa_set_property_funcs_open)) || 1350 - XE_IOCTL_DBG(oa->xe, ext.pad)) 1346 + XE_IOCTL_DBG(oa->xe, !ext.property) || XE_IOCTL_DBG(oa->xe, ext.pad)) 1351 1347 return -EINVAL; 1352 1348 1353 1349 idx = array_index_nospec(ext.property, ARRAY_SIZE(xe_oa_set_property_funcs_open));
+1 -1
drivers/gpu/drm/xe/xe_sriov_vfio.c
··· 21 21 bool xe_sriov_vfio_migration_supported(struct xe_device *xe) 22 22 { 23 23 if (!IS_SRIOV_PF(xe)) 24 - return -EPERM; 24 + return false; 25 25 26 26 return xe_sriov_pf_migration_supported(xe); 27 27 }
+1 -1
drivers/gpu/drm/xe/xe_svm.h
··· 214 214 { 215 215 #if IS_ENABLED(CONFIG_DRM_GPUSVM) 216 216 return drm_gpusvm_init(&vm->svm.gpusvm, "Xe SVM (simple)", &vm->xe->drm, 217 - NULL, NULL, 0, 0, 0, NULL, NULL, 0); 217 + NULL, 0, 0, 0, NULL, NULL, 0); 218 218 #else 219 219 return 0; 220 220 #endif
+7 -1
drivers/gpu/drm/xe/xe_vm.c
··· 1508 1508 INIT_WORK(&vm->destroy_work, vm_destroy_work_func); 1509 1509 1510 1510 INIT_LIST_HEAD(&vm->preempt.exec_queues); 1511 - vm->preempt.min_run_period_ms = 10; /* FIXME: Wire up to uAPI */ 1511 + if (flags & XE_VM_FLAG_FAULT_MODE) 1512 + vm->preempt.min_run_period_ms = 0; 1513 + else 1514 + vm->preempt.min_run_period_ms = 5; 1512 1515 1513 1516 for_each_tile(tile, xe, id) 1514 1517 xe_range_fence_tree_init(&vm->rftree[id]); ··· 3325 3322 return -EINVAL; 3326 3323 3327 3324 if (XE_IOCTL_DBG(xe, args->extensions)) 3325 + return -EINVAL; 3326 + 3327 + if (XE_IOCTL_DBG(xe, args->num_syncs > DRM_XE_MAX_SYNCS)) 3328 3328 return -EINVAL; 3329 3329 3330 3330 if (args->num_binds > 1) {
+1 -1
drivers/gpu/drm/xe/xe_vm_types.h
··· 263 263 * @min_run_period_ms: The minimum run period before preempting 264 264 * an engine again 265 265 */ 266 - s64 min_run_period_ms; 266 + unsigned int min_run_period_ms; 267 267 /** @exec_queues: list of exec queues attached to this VM */ 268 268 struct list_head exec_queues; 269 269 /** @num_exec_queues: number exec queues attached to this VM */
-8
drivers/gpu/drm/xe/xe_wa.c
··· 270 270 XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)), 271 271 XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), 272 272 }, 273 - { XE_RTP_NAME("14020316580"), 274 - XE_RTP_RULES(MEDIA_VERSION(1301)), 275 - XE_RTP_ACTIONS(CLR(POWERGATE_ENABLE, 276 - VDN_HCP_POWERGATE_ENABLE(0) | 277 - VDN_MFXVDENC_POWERGATE_ENABLE(0) | 278 - VDN_HCP_POWERGATE_ENABLE(2) | 279 - VDN_MFXVDENC_POWERGATE_ENABLE(2))), 280 - }, 281 273 { XE_RTP_NAME("14019449301"), 282 274 XE_RTP_RULES(MEDIA_VERSION(1301), ENGINE_CLASS(VIDEO_DECODE)), 283 275 XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F08(0), CG3DDISHRS_CLKGATE_DIS)),
+1
drivers/gpu/drm/xe/xe_wa_oob.rules
··· 76 76 77 77 15015404425_disable PLATFORM(PANTHERLAKE), MEDIA_STEP(B0, FOREVER) 78 78 16026007364 MEDIA_VERSION(3000) 79 + 14020316580 MEDIA_VERSION(1301)
+1
drivers/hid/hid-debug.c
··· 3513 3513 [ABS_DISTANCE] = "Distance", [ABS_TILT_X] = "XTilt", 3514 3514 [ABS_TILT_Y] = "YTilt", [ABS_TOOL_WIDTH] = "ToolWidth", 3515 3515 [ABS_VOLUME] = "Volume", [ABS_PROFILE] = "Profile", 3516 + [ABS_SND_PROFILE] = "SoundProfile", 3516 3517 [ABS_MISC] = "Misc", 3517 3518 [ABS_MT_SLOT] = "MTSlot", 3518 3519 [ABS_MT_TOUCH_MAJOR] = "MTMajor",
+9
drivers/hwmon/dell-smm-hwmon.c
··· 76 76 #define DELL_SMM_NO_TEMP 10 77 77 #define DELL_SMM_NO_FANS 4 78 78 79 + /* limit fan multiplier to avoid overflow */ 80 + #define DELL_SMM_MAX_FAN_MULT (INT_MAX / U16_MAX) 81 + 79 82 struct smm_regs { 80 83 unsigned int eax; 81 84 unsigned int ebx; ··· 1256 1253 data->ops = ops; 1257 1254 /* All options must not be 0 */ 1258 1255 data->i8k_fan_mult = fan_mult ? : I8K_FAN_MULT; 1256 + if (data->i8k_fan_mult > DELL_SMM_MAX_FAN_MULT) { 1257 + dev_err(dev, 1258 + "fan multiplier %u is too large (max %u)\n", 1259 + data->i8k_fan_mult, DELL_SMM_MAX_FAN_MULT); 1260 + return -EINVAL; 1261 + } 1259 1262 data->i8k_fan_max = fan_max ? : I8K_FAN_HIGH; 1260 1263 data->i8k_pwm_mult = DIV_ROUND_UP(255, data->i8k_fan_max); 1261 1264
+7 -2
drivers/hwmon/ibmpex.c
··· 277 277 { 278 278 struct ibmpex_bmc_data *data = dev_get_drvdata(dev); 279 279 280 + if (!data) 281 + return -ENODEV; 282 + 280 283 ibmpex_reset_high_low_data(data); 281 284 282 285 return count; ··· 511 508 { 512 509 int i, j; 513 510 511 + hwmon_device_unregister(data->hwmon_dev); 512 + dev_set_drvdata(data->bmc_device, NULL); 513 + 514 514 device_remove_file(data->bmc_device, 515 515 &sensor_dev_attr_reset_high_low.dev_attr); 516 516 device_remove_file(data->bmc_device, &dev_attr_name.attr); ··· 527 521 } 528 522 529 523 list_del(&data->list); 530 - dev_set_drvdata(data->bmc_device, NULL); 531 - hwmon_device_unregister(data->hwmon_dev); 524 + 532 525 ipmi_destroy_user(data->user); 533 526 kfree(data->sensors); 534 527 kfree(data);
+6 -3
drivers/hwmon/ltc4282.c
··· 1000 1000 case hwmon_in_max: 1001 1001 case hwmon_in_min: 1002 1002 case hwmon_in_enable: 1003 - case hwmon_in_reset_history: 1004 1003 return 0644; 1004 + case hwmon_in_reset_history: 1005 + return 0200; 1005 1006 default: 1006 1007 return 0; 1007 1008 } ··· 1021 1020 return 0444; 1022 1021 case hwmon_curr_max: 1023 1022 case hwmon_curr_min: 1024 - case hwmon_curr_reset_history: 1025 1023 return 0644; 1024 + case hwmon_curr_reset_history: 1025 + return 0200; 1026 1026 default: 1027 1027 return 0; 1028 1028 } ··· 1041 1039 return 0444; 1042 1040 case hwmon_power_max: 1043 1041 case hwmon_power_min: 1044 - case hwmon_power_reset_history: 1045 1042 return 0644; 1043 + case hwmon_power_reset_history: 1044 + return 0200; 1046 1045 default: 1047 1046 return 0; 1048 1047 }
+1 -1
drivers/hwmon/tmp401.c
··· 397 397 ret = regmap_read(data->regmap, TMP401_CONVERSION_RATE, &regval); 398 398 if (ret < 0) 399 399 return ret; 400 - *val = (1 << (7 - regval)) * 125; 400 + *val = (1 << (7 - min(regval, 7))) * 125; 401 401 break; 402 402 case hwmon_chip_temp_reset_history: 403 403 *val = 0;
+1
drivers/i2c/busses/Kconfig
··· 167 167 Panther Lake (SOC) 168 168 Wildcat Lake (SOC) 169 169 Diamond Rapids (SOC) 170 + Nova Lake (PCH) 170 171 171 172 This driver can also be built as a module. If so, the module 172 173 will be called i2c-i801.
+1 -2
drivers/i2c/busses/i2c-bcm-iproc.c
··· 1098 1098 1099 1099 platform_set_drvdata(pdev, iproc_i2c); 1100 1100 iproc_i2c->device = &pdev->dev; 1101 - iproc_i2c->type = 1102 - (enum bcm_iproc_i2c_type)of_device_get_match_data(&pdev->dev); 1101 + iproc_i2c->type = (kernel_ulong_t)of_device_get_match_data(&pdev->dev); 1103 1102 init_completion(&iproc_i2c->done); 1104 1103 1105 1104 iproc_i2c->base = devm_platform_ioremap_resource(pdev, 0);
+3
drivers/i2c/busses/i2c-i801.c
··· 85 85 * Panther Lake-P (SOC) 0xe422 32 hard yes yes yes 86 86 * Wildcat Lake-U (SOC) 0x4d22 32 hard yes yes yes 87 87 * Diamond Rapids (SOC) 0x5827 32 hard yes yes yes 88 + * Nova Lake-S (PCH) 0x6e23 32 hard yes yes yes 88 89 * 89 90 * Features supported by this driver: 90 91 * Software PEC no ··· 246 245 #define PCI_DEVICE_ID_INTEL_BIRCH_STREAM_SMBUS 0x5796 247 246 #define PCI_DEVICE_ID_INTEL_DIAMOND_RAPIDS_SMBUS 0x5827 248 247 #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4 248 + #define PCI_DEVICE_ID_INTEL_NOVA_LAKE_S_SMBUS 0x6e23 249 249 #define PCI_DEVICE_ID_INTEL_ARROW_LAKE_H_SMBUS 0x7722 250 250 #define PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_S_SMBUS 0x7a23 251 251 #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3 ··· 1063 1061 { PCI_DEVICE_DATA(INTEL, PANTHER_LAKE_H_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, 1064 1062 { PCI_DEVICE_DATA(INTEL, PANTHER_LAKE_P_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, 1065 1063 { PCI_DEVICE_DATA(INTEL, WILDCAT_LAKE_U_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, 1064 + { PCI_DEVICE_DATA(INTEL, NOVA_LAKE_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, 1066 1065 { 0, } 1067 1066 }; 1068 1067
+1 -1
drivers/i2c/busses/i2c-pxa.c
··· 1266 1266 i2c->use_pio = of_property_read_bool(np, "mrvl,i2c-polling"); 1267 1267 i2c->fast_mode = of_property_read_bool(np, "mrvl,i2c-fast-mode"); 1268 1268 1269 - *i2c_types = (enum pxa_i2c_types)device_get_match_data(&pdev->dev); 1269 + *i2c_types = (kernel_ulong_t)device_get_match_data(&pdev->dev); 1270 1270 1271 1271 return 0; 1272 1272 }
+1 -1
drivers/i2c/busses/i2c-rcar.c
··· 1141 1141 if (IS_ERR(priv->io)) 1142 1142 return PTR_ERR(priv->io); 1143 1143 1144 - priv->devtype = (enum rcar_i2c_type)of_device_get_match_data(dev); 1144 + priv->devtype = (kernel_ulong_t)of_device_get_match_data(dev); 1145 1145 init_waitqueue_head(&priv->wait); 1146 1146 1147 1147 adap = &priv->adap;
+5
drivers/input/joystick/xpad.c
··· 133 133 } xpad_device[] = { 134 134 /* Please keep this list sorted by vendor and product ID. */ 135 135 { 0x0079, 0x18d4, "GPD Win 2 X-Box Controller", 0, XTYPE_XBOX360 }, 136 + { 0x0351, 0x1000, "CRKD LP Blueberry Burst Pro Edition (Xbox)", 0, XTYPE_XBOX360 }, 137 + { 0x0351, 0x2000, "CRKD LP Black Tribal Edition (Xbox) ", 0, XTYPE_XBOX360 }, 136 138 { 0x03eb, 0xff01, "Wooting One (Legacy)", 0, XTYPE_XBOX360 }, 137 139 { 0x03eb, 0xff02, "Wooting Two (Legacy)", 0, XTYPE_XBOX360 }, 138 140 { 0x03f0, 0x038D, "HyperX Clutch", 0, XTYPE_XBOX360 }, /* wired */ ··· 422 420 { 0x3285, 0x0663, "Nacon Evol-X", 0, XTYPE_XBOXONE }, 423 421 { 0x3537, 0x1004, "GameSir T4 Kaleid", 0, XTYPE_XBOX360 }, 424 422 { 0x3537, 0x1010, "GameSir G7 SE", 0, XTYPE_XBOXONE }, 423 + { 0x3651, 0x1000, "CRKD SG", 0, XTYPE_XBOX360 }, 425 424 { 0x366c, 0x0005, "ByoWave Proteus Controller", MAP_SHARE_BUTTON, XTYPE_XBOXONE, FLAG_DELAY_INIT }, 426 425 { 0x3767, 0x0101, "Fanatec Speedster 3 Forceshock Wheel", 0, XTYPE_XBOX }, 427 426 { 0x37d7, 0x2501, "Flydigi Apex 5", 0, XTYPE_XBOX360 }, ··· 521 518 */ 522 519 { USB_INTERFACE_INFO('X', 'B', 0) }, /* Xbox USB-IF not-approved class */ 523 520 XPAD_XBOX360_VENDOR(0x0079), /* GPD Win 2 controller */ 521 + XPAD_XBOX360_VENDOR(0x0351), /* CRKD Controllers */ 524 522 XPAD_XBOX360_VENDOR(0x03eb), /* Wooting Keyboards (Legacy) */ 525 523 XPAD_XBOX360_VENDOR(0x03f0), /* HP HyperX Xbox 360 controllers */ 526 524 XPAD_XBOXONE_VENDOR(0x03f0), /* HP HyperX Xbox One controllers */ ··· 582 578 XPAD_XBOXONE_VENDOR(0x3285), /* Nacon Evol-X */ 583 579 XPAD_XBOX360_VENDOR(0x3537), /* GameSir Controllers */ 584 580 XPAD_XBOXONE_VENDOR(0x3537), /* GameSir Controllers */ 581 + XPAD_XBOX360_VENDOR(0x3651), /* CRKD Controllers */ 585 582 XPAD_XBOXONE_VENDOR(0x366c), /* ByoWave controllers */ 586 583 XPAD_XBOX360_VENDOR(0x37d7), /* Flydigi Controllers */ 587 584 XPAD_XBOX360_VENDOR(0x413d), /* Black Shark Green Ghost Controller */
+7
drivers/input/keyboard/atkbd.c
··· 1937 1937 }, 1938 1938 .callback = atkbd_deactivate_fixup, 1939 1939 }, 1940 + { 1941 + .matches = { 1942 + DMI_MATCH(DMI_SYS_VENDOR, "HONOR"), 1943 + DMI_MATCH(DMI_PRODUCT_NAME, "FMB-P"), 1944 + }, 1945 + .callback = atkbd_deactivate_fixup, 1946 + }, 1940 1947 { } 1941 1948 }; 1942 1949
+4 -1
drivers/input/keyboard/lkkbd.c
··· 670 670 671 671 return 0; 672 672 673 - fail3: serio_close(serio); 673 + fail3: disable_work_sync(&lk->tq); 674 + serio_close(serio); 674 675 fail2: serio_set_drvdata(serio, NULL); 675 676 fail1: input_free_device(input_dev); 676 677 kfree(lk); ··· 684 683 static void lkkbd_disconnect(struct serio *serio) 685 684 { 686 685 struct lkkbd *lk = serio_get_drvdata(serio); 686 + 687 + disable_work_sync(&lk->tq); 687 688 688 689 input_get_device(lk->dev); 689 690 input_unregister_device(lk->dev);
+1
drivers/input/mouse/alps.c
··· 2975 2975 2976 2976 psmouse_reset(psmouse); 2977 2977 timer_shutdown_sync(&priv->timer); 2978 + disable_delayed_work_sync(&priv->dev3_register_work); 2978 2979 if (priv->dev2) 2979 2980 input_unregister_device(priv->dev2); 2980 2981 if (!IS_ERR_OR_NULL(priv->dev3))
+7
drivers/input/serio/i8042-acpipnpio.h
··· 1169 1169 .driver_data = (void *)(SERIO_QUIRK_NOMUX | SERIO_QUIRK_RESET_ALWAYS | 1170 1170 SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP) 1171 1171 }, 1172 + { 1173 + .matches = { 1174 + DMI_MATCH(DMI_BOARD_NAME, "X5KK45xS_X5SP45xS"), 1175 + }, 1176 + .driver_data = (void *)(SERIO_QUIRK_NOMUX | SERIO_QUIRK_RESET_ALWAYS | 1177 + SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP) 1178 + }, 1172 1179 /* 1173 1180 * A lot of modern Clevo barebones have touchpad and/or keyboard issues 1174 1181 * after suspend fixable with the forcenorestore quirk.
+4
drivers/input/touchscreen/apple_z2.c
··· 21 21 #define APPLE_Z2_TOUCH_STARTED 3 22 22 #define APPLE_Z2_TOUCH_MOVED 4 23 23 #define APPLE_Z2_CMD_READ_INTERRUPT_DATA 0xEB 24 + #define APPLE_Z2_REPLY_INTERRUPT_DATA 0xE1 24 25 #define APPLE_Z2_HBPP_CMD_BLOB 0x3001 25 26 #define APPLE_Z2_FW_MAGIC 0x5746325A 26 27 #define LOAD_COMMAND_INIT_PAYLOAD 0 ··· 142 141 error = spi_sync_transfer(z2->spidev, &xfer, 1); 143 142 if (error) 144 143 return error; 144 + 145 + if (z2->rx_buf[0] != APPLE_Z2_REPLY_INTERRUPT_DATA) 146 + return 0; 145 147 146 148 pkt_len = (get_unaligned_le16(z2->rx_buf + 1) + 8) & 0xfffffffc; 147 149
+1 -1
drivers/input/touchscreen/ti_am335x_tsc.c
··· 85 85 wire_order[i] = ts_dev->config_inp[i] & 0x0F; 86 86 if (WARN_ON(analog_line[i] > 7)) 87 87 return -EINVAL; 88 - if (WARN_ON(wire_order[i] > ARRAY_SIZE(config_pins))) 88 + if (WARN_ON(wire_order[i] >= ARRAY_SIZE(config_pins))) 89 89 return -EINVAL; 90 90 } 91 91
+5
drivers/iommu/amd/amd_iommu.h
··· 173 173 bool translation_pre_enabled(struct amd_iommu *iommu); 174 174 int __init add_special_device(u8 type, u8 id, u32 *devid, bool cmd_line); 175 175 176 + int amd_iommu_pdom_id_alloc(void); 177 + int amd_iommu_pdom_id_reserve(u16 id, gfp_t gfp); 178 + void amd_iommu_pdom_id_free(int id); 179 + void amd_iommu_pdom_id_destroy(void); 180 + 176 181 #ifdef CONFIG_DMI 177 182 void amd_iommu_apply_ivrs_quirks(void); 178 183 #else
+21 -3
drivers/iommu/amd/init.c
··· 1136 1136 static bool __reuse_device_table(struct amd_iommu *iommu) 1137 1137 { 1138 1138 struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg; 1139 - u32 lo, hi, old_devtb_size; 1139 + struct dev_table_entry *old_dev_tbl_entry; 1140 + u32 lo, hi, old_devtb_size, devid; 1140 1141 phys_addr_t old_devtb_phys; 1142 + u16 dom_id; 1143 + bool dte_v; 1141 1144 u64 entry; 1142 1145 1143 1146 /* Each IOMMU use separate device table with the same size */ ··· 1174 1171 if (pci_seg->old_dev_tbl_cpy == NULL) { 1175 1172 pr_err("Failed to remap memory for reusing old device table!\n"); 1176 1173 return false; 1174 + } 1175 + 1176 + for (devid = 0; devid <= pci_seg->last_bdf; devid++) { 1177 + old_dev_tbl_entry = &pci_seg->old_dev_tbl_cpy[devid]; 1178 + dte_v = FIELD_GET(DTE_FLAG_V, old_dev_tbl_entry->data[0]); 1179 + dom_id = FIELD_GET(DEV_DOMID_MASK, old_dev_tbl_entry->data[1]); 1180 + 1181 + if (!dte_v || !dom_id) 1182 + continue; 1183 + /* 1184 + * ID reservation can fail with -ENOSPC when there 1185 + * are multiple devices present in the same domain, 1186 + * hence check only for -ENOMEM. 1187 + */ 1188 + if (amd_iommu_pdom_id_reserve(dom_id, GFP_KERNEL) == -ENOMEM) 1189 + return false; 1177 1190 } 1178 1191 1179 1192 return true; ··· 3146 3127 3147 3128 static void __init free_dma_resources(void) 3148 3129 { 3149 - ida_destroy(&pdom_ids); 3150 - 3130 + amd_iommu_pdom_id_destroy(); 3151 3131 free_unity_maps(); 3152 3132 } 3153 3133
+18 -9
drivers/iommu/amd/iommu.c
··· 1811 1811 * contain. 1812 1812 * 1813 1813 ****************************************************************************/ 1814 - 1815 - static int pdom_id_alloc(void) 1814 + int amd_iommu_pdom_id_alloc(void) 1816 1815 { 1817 1816 return ida_alloc_range(&pdom_ids, 1, MAX_DOMAIN_ID - 1, GFP_ATOMIC); 1818 1817 } 1819 1818 1820 - static void pdom_id_free(int id) 1819 + int amd_iommu_pdom_id_reserve(u16 id, gfp_t gfp) 1820 + { 1821 + return ida_alloc_range(&pdom_ids, id, id, gfp); 1822 + } 1823 + 1824 + void amd_iommu_pdom_id_free(int id) 1821 1825 { 1822 1826 ida_free(&pdom_ids, id); 1827 + } 1828 + 1829 + void amd_iommu_pdom_id_destroy(void) 1830 + { 1831 + ida_destroy(&pdom_ids); 1823 1832 } 1824 1833 1825 1834 static void free_gcr3_tbl_level1(u64 *tbl) ··· 1873 1864 gcr3_info->glx = 0; 1874 1865 1875 1866 /* Free per device domain ID */ 1876 - pdom_id_free(gcr3_info->domid); 1867 + amd_iommu_pdom_id_free(gcr3_info->domid); 1877 1868 1878 1869 iommu_free_pages(gcr3_info->gcr3_tbl); 1879 1870 gcr3_info->gcr3_tbl = NULL; ··· 1909 1900 return -EBUSY; 1910 1901 1911 1902 /* Allocate per device domain ID */ 1912 - domid = pdom_id_alloc(); 1903 + domid = amd_iommu_pdom_id_alloc(); 1913 1904 if (domid <= 0) 1914 1905 return -ENOSPC; 1915 1906 gcr3_info->domid = domid; 1916 1907 1917 1908 gcr3_info->gcr3_tbl = iommu_alloc_pages_node_sz(nid, GFP_ATOMIC, SZ_4K); 1918 1909 if (gcr3_info->gcr3_tbl == NULL) { 1919 - pdom_id_free(domid); 1910 + amd_iommu_pdom_id_free(domid); 1920 1911 return -ENOMEM; 1921 1912 } 1922 1913 ··· 2512 2503 if (!domain) 2513 2504 return NULL; 2514 2505 2515 - domid = pdom_id_alloc(); 2506 + domid = amd_iommu_pdom_id_alloc(); 2516 2507 if (domid <= 0) { 2517 2508 kfree(domain); 2518 2509 return NULL; ··· 2811 2802 2812 2803 WARN_ON(!list_empty(&domain->dev_list)); 2813 2804 pt_iommu_deinit(&domain->iommu); 2814 - pdom_id_free(domain->id); 2805 + amd_iommu_pdom_id_free(domain->id); 2815 2806 kfree(domain); 2816 2807 } 2817 2808 ··· 2862 2853 domain->ops = &identity_domain_ops; 2863 2854 domain->owner = &amd_iommu_ops; 2864 2855 2865 - identity_domain.id = pdom_id_alloc(); 2856 + identity_domain.id = amd_iommu_pdom_id_alloc(); 2866 2857 2867 2858 protection_domain_init(&identity_domain); 2868 2859 }
+3
drivers/iommu/generic_pt/iommu_pt.h
··· 372 372 373 373 table_mem = iommu_alloc_pages_node_sz(iommu_table->nid, gfp, 374 374 log2_to_int(lg2sz)); 375 + if (!table_mem) 376 + return ERR_PTR(-ENOMEM); 377 + 375 378 if (pt_feature(common, PT_FEAT_DMA_INCOHERENT) && 376 379 mode == ALLOC_NORMAL) { 377 380 int ret = iommu_pages_start_incoherent(
+4 -4
drivers/iommu/intel/irq_remapping.c
··· 1303 1303 * irq_enter(); 1304 1304 * handle_edge_irq() 1305 1305 * irq_chip_ack_parent() 1306 - * irq_move_irq(); // No EOI 1306 + * intel_ack_posted_msi_irq(); // No EOI 1307 1307 * handle_irq_event() 1308 1308 * driver_handler() 1309 1309 * handle_edge_irq() 1310 1310 * irq_chip_ack_parent() 1311 - * irq_move_irq(); // No EOI 1311 + * intel_ack_posted_msi_irq(); // No EOI 1312 1312 * handle_irq_event() 1313 1313 * driver_handler() 1314 1314 * handle_edge_irq() 1315 1315 * irq_chip_ack_parent() 1316 - * irq_move_irq(); // No EOI 1316 + * intel_ack_posted_msi_irq(); // No EOI 1317 1317 * handle_irq_event() 1318 1318 * driver_handler() 1319 1319 * apic_eoi() ··· 1322 1322 */ 1323 1323 static struct irq_chip intel_ir_chip_post_msi = { 1324 1324 .name = "INTEL-IR-POST", 1325 - .irq_ack = irq_move_irq, 1325 + .irq_ack = intel_ack_posted_msi_irq, 1326 1326 .irq_set_affinity = intel_ir_set_affinity, 1327 1327 .irq_compose_msi_msg = intel_ir_compose_msi_msg, 1328 1328 .irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,
+5 -1
drivers/iommu/iommufd/io_pagetable.c
··· 495 495 return -EOVERFLOW; 496 496 497 497 start_byte = start - ALIGN_DOWN(start, PAGE_SIZE); 498 - dmabuf = dma_buf_get(fd); 498 + if (IS_ENABLED(CONFIG_DMA_SHARED_BUFFER)) 499 + dmabuf = dma_buf_get(fd); 500 + else 501 + dmabuf = ERR_PTR(-ENXIO); 502 + 499 503 if (!IS_ERR(dmabuf)) { 500 504 pages = iopt_alloc_dmabuf_pages(ictx, dmabuf, start_byte, start, 501 505 length,
+11 -3
drivers/iommu/iommufd/selftest.c
··· 1184 1184 unsigned int mockpt_id, 1185 1185 unsigned long start, size_t length) 1186 1186 { 1187 + unsigned long last; 1187 1188 struct iommufd_ioas *ioas; 1188 1189 int rc; 1190 + 1191 + if (!length) 1192 + return -EINVAL; 1193 + if (check_add_overflow(start, length - 1, &last)) 1194 + return -EOVERFLOW; 1189 1195 1190 1196 ioas = iommufd_get_ioas(ucmd->ictx, mockpt_id); 1191 1197 if (IS_ERR(ioas)) 1192 1198 return PTR_ERR(ioas); 1193 1199 down_write(&ioas->iopt.iova_rwsem); 1194 - rc = iopt_reserve_iova(&ioas->iopt, start, start + length - 1, NULL); 1200 + rc = iopt_reserve_iova(&ioas->iopt, start, last, NULL); 1195 1201 up_write(&ioas->iopt.iova_rwsem); 1196 1202 iommufd_put_object(ucmd->ictx, &ioas->obj); 1197 1203 return rc; ··· 1221 1215 page_size = 1 << __ffs(mock->domain.pgsize_bitmap); 1222 1216 if (iova % page_size || length % page_size || 1223 1217 (uintptr_t)uptr % page_size || 1224 - check_add_overflow((uintptr_t)uptr, (uintptr_t)length, &end)) 1225 - return -EINVAL; 1218 + check_add_overflow((uintptr_t)uptr, (uintptr_t)length, &end)) { 1219 + rc = -EINVAL; 1220 + goto out_put; 1221 + } 1226 1222 1227 1223 for (; length; length -= page_size) { 1228 1224 struct page *pages[1];
+53
drivers/misc/lkdtm/bugs.c
··· 8 8 #include "lkdtm.h" 9 9 #include <linux/cpu.h> 10 10 #include <linux/list.h> 11 + #include <linux/hrtimer.h> 11 12 #include <linux/sched.h> 12 13 #include <linux/sched/signal.h> 13 14 #include <linux/sched/task_stack.h> ··· 101 100 stop_machine(panic_stop_irqoff_fn, &v, cpu_online_mask); 102 101 } 103 102 103 + static bool wait_for_panic; 104 + 105 + static enum hrtimer_restart panic_in_hardirq(struct hrtimer *timer) 106 + { 107 + panic("from hard IRQ context"); 108 + 109 + wait_for_panic = false; 110 + return HRTIMER_NORESTART; 111 + } 112 + 113 + static void lkdtm_PANIC_IN_HARDIRQ(void) 114 + { 115 + struct hrtimer timer; 116 + 117 + wait_for_panic = true; 118 + hrtimer_setup_on_stack(&timer, panic_in_hardirq, 119 + CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD); 120 + hrtimer_start(&timer, us_to_ktime(100), HRTIMER_MODE_REL_HARD); 121 + 122 + while (READ_ONCE(wait_for_panic)) 123 + cpu_relax(); 124 + 125 + hrtimer_cancel(&timer); 126 + } 127 + 104 128 static void lkdtm_BUG(void) 105 129 { 106 130 BUG(); 131 + } 132 + 133 + static bool wait_for_bug; 134 + 135 + static enum hrtimer_restart bug_in_hardirq(struct hrtimer *timer) 136 + { 137 + BUG(); 138 + 139 + wait_for_bug = false; 140 + return HRTIMER_NORESTART; 141 + } 142 + 143 + static void lkdtm_BUG_IN_HARDIRQ(void) 144 + { 145 + struct hrtimer timer; 146 + 147 + wait_for_bug = true; 148 + hrtimer_setup_on_stack(&timer, bug_in_hardirq, 149 + CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD); 150 + hrtimer_start(&timer, us_to_ktime(100), HRTIMER_MODE_REL_HARD); 151 + 152 + while (READ_ONCE(wait_for_bug)) 153 + cpu_relax(); 154 + 155 + hrtimer_cancel(&timer); 107 156 } 108 157 109 158 static int warn_counter; ··· 747 696 static struct crashtype crashtypes[] = { 748 697 CRASHTYPE(PANIC), 749 698 CRASHTYPE(PANIC_STOP_IRQOFF), 699 + CRASHTYPE(PANIC_IN_HARDIRQ), 750 700 CRASHTYPE(BUG), 701 + CRASHTYPE(BUG_IN_HARDIRQ), 751 702 CRASHTYPE(WARNING), 752 703 CRASHTYPE(WARNING_MESSAGE), 753 704 CRASHTYPE(EXCEPTION),
+2 -2
drivers/mmc/host/Kconfig
··· 315 315 316 316 config MMC_SDHCI_ESDHC_IMX 317 317 tristate "SDHCI support for the Freescale eSDHC/uSDHC i.MX controller" 318 - depends on ARCH_MXC || COMPILE_TEST 318 + depends on ARCH_MXC || ARCH_S32 || COMPILE_TEST 319 319 depends on MMC_SDHCI_PLTFM 320 320 depends on OF 321 321 select MMC_SDHCI_IO_ACCESSORS 322 322 select MMC_CQHCI 323 323 help 324 324 This selects the Freescale eSDHC/uSDHC controller support 325 - found on i.MX25, i.MX35 i.MX5x and i.MX6x. 325 + found on i.MX25, i.MX35, i.MX5x, i.MX6x, and S32G. 326 326 327 327 If you have a controller with this interface, say Y or M here. 328 328
+1 -1
drivers/mmc/host/sdhci-of-arasan.c
··· 99 99 #define HIWORD_UPDATE(val, mask, shift) \ 100 100 ((val) << (shift) | (mask) << ((shift) + 16)) 101 101 102 - #define CD_STABLE_TIMEOUT_US 1000000 102 + #define CD_STABLE_TIMEOUT_US 2000000 103 103 #define CD_STABLE_MAX_SLEEP_US 10 104 104 105 105 /**
+2 -5
drivers/net/can/Kconfig
··· 1 1 # SPDX-License-Identifier: GPL-2.0-only 2 2 3 3 menuconfig CAN_DEV 4 - tristate "CAN Device Drivers" 4 + bool "CAN Device Drivers" 5 5 default y 6 6 depends on CAN 7 7 help ··· 17 17 virtual ones. If you own such devices or plan to use the virtual CAN 18 18 interfaces to develop applications, say Y here. 19 19 20 - To compile as a module, choose M here: the module will be called 21 - can-dev. 22 - 23 - if CAN_DEV 20 + if CAN_DEV && CAN 24 21 25 22 config CAN_VCAN 26 23 tristate "Virtual Local CAN Interface (vcan)"
+1 -1
drivers/net/can/Makefile
··· 7 7 obj-$(CONFIG_CAN_VXCAN) += vxcan.o 8 8 obj-$(CONFIG_CAN_SLCAN) += slcan/ 9 9 10 - obj-y += dev/ 10 + obj-$(CONFIG_CAN_DEV) += dev/ 11 11 obj-y += esd/ 12 12 obj-y += rcar/ 13 13 obj-y += rockchip/
+2 -3
drivers/net/can/dev/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 3 - obj-$(CONFIG_CAN_DEV) += can-dev.o 3 + obj-$(CONFIG_CAN) += can-dev.o 4 4 5 - can-dev-y += skb.o 6 - 5 + can-dev-$(CONFIG_CAN_DEV) += skb.o 7 6 can-dev-$(CONFIG_CAN_CALC_BITTIMING) += calc_bittiming.o 8 7 can-dev-$(CONFIG_CAN_NETLINK) += bittiming.o 9 8 can-dev-$(CONFIG_CAN_NETLINK) += dev.o
+1 -1
drivers/net/can/usb/gs_usb.c
··· 1074 1074 usb_free_urb(urb); 1075 1075 out_usb_kill_anchored_urbs: 1076 1076 if (!parent->active_channels) { 1077 - usb_kill_anchored_urbs(&dev->tx_submitted); 1077 + usb_kill_anchored_urbs(&parent->rx_submitted); 1078 1078 1079 1079 if (dev->feature & GS_CAN_FEATURE_HW_TIMESTAMP) 1080 1080 gs_usb_timestamp_stop(parent);
-3
drivers/net/dsa/lantiq/lantiq_gswip.c
··· 444 444 if (!priv) 445 445 return; 446 446 447 - /* disable the switch */ 448 - gswip_disable_switch(priv); 449 - 450 447 dsa_unregister_switch(priv->ds); 451 448 452 449 for (i = 0; i < priv->num_gphy_fw; i++)
-2
drivers/net/dsa/lantiq/lantiq_gswip.h
··· 294 294 u16 version; 295 295 }; 296 296 297 - void gswip_disable_switch(struct gswip_priv *priv); 298 - 299 297 int gswip_probe_common(struct gswip_priv *priv, u32 version); 300 298 301 299 #endif /* __LANTIQ_GSWIP_H */
+10 -9
drivers/net/dsa/lantiq/lantiq_gswip_common.c
··· 752 752 return 0; 753 753 } 754 754 755 + static void gswip_teardown(struct dsa_switch *ds) 756 + { 757 + struct gswip_priv *priv = ds->priv; 758 + 759 + regmap_clear_bits(priv->mdio, GSWIP_MDIO_GLOB, GSWIP_MDIO_GLOB_ENABLE); 760 + } 761 + 755 762 static enum dsa_tag_protocol gswip_get_tag_protocol(struct dsa_switch *ds, 756 763 int port, 757 764 enum dsa_tag_protocol mp) ··· 1636 1629 static const struct dsa_switch_ops gswip_switch_ops = { 1637 1630 .get_tag_protocol = gswip_get_tag_protocol, 1638 1631 .setup = gswip_setup, 1632 + .teardown = gswip_teardown, 1639 1633 .port_setup = gswip_port_setup, 1640 1634 .port_enable = gswip_port_enable, 1641 1635 .port_disable = gswip_port_disable, ··· 1663 1655 .port_hsr_join = dsa_port_simple_hsr_join, 1664 1656 .port_hsr_leave = dsa_port_simple_hsr_leave, 1665 1657 }; 1666 - 1667 - void gswip_disable_switch(struct gswip_priv *priv) 1668 - { 1669 - regmap_clear_bits(priv->mdio, GSWIP_MDIO_GLOB, GSWIP_MDIO_GLOB_ENABLE); 1670 - } 1671 - EXPORT_SYMBOL_GPL(gswip_disable_switch); 1672 1658 1673 1659 static int gswip_validate_cpu_port(struct dsa_switch *ds) 1674 1660 { ··· 1720 1718 1721 1719 err = gswip_validate_cpu_port(priv->ds); 1722 1720 if (err) 1723 - goto disable_switch; 1721 + goto unregister_switch; 1724 1722 1725 1723 dev_info(priv->dev, "probed GSWIP version %lx mod %lx\n", 1726 1724 GSWIP_VERSION_REV(version), GSWIP_VERSION_MOD(version)); 1727 1725 1728 1726 return 0; 1729 1727 1730 - disable_switch: 1731 - gswip_disable_switch(priv); 1728 + unregister_switch: 1732 1729 dsa_unregister_switch(priv->ds); 1733 1730 1734 1731 return err;
+41 -5
drivers/net/dsa/lantiq/mxl-gsw1xx.c
··· 11 11 12 12 #include <linux/bits.h> 13 13 #include <linux/delay.h> 14 + #include <linux/jiffies.h> 14 15 #include <linux/module.h> 15 16 #include <linux/of_device.h> 16 17 #include <linux/of_mdio.h> 17 18 #include <linux/regmap.h> 19 + #include <linux/workqueue.h> 18 20 #include <net/dsa.h> 19 21 20 22 #include "lantiq_gswip.h" ··· 31 29 struct regmap *clk; 32 30 struct regmap *shell; 33 31 struct phylink_pcs pcs; 32 + struct delayed_work clear_raneg; 34 33 phy_interface_t tbi_interface; 35 34 struct gswip_priv gswip; 36 35 }; ··· 148 145 { 149 146 struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs); 150 147 151 - /* Assert SGMII shell reset */ 148 + cancel_delayed_work_sync(&priv->clear_raneg); 149 + 150 + /* Assert SGMII shell reset (will also clear RANEG bit) */ 152 151 regmap_set_bits(priv->shell, GSW1XX_SHELL_RST_REQ, 153 152 GSW1XX_RST_REQ_SGMII_SHELL); 154 153 ··· 260 255 FIELD_PREP(GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT, 261 256 GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT_DEF); 262 257 263 - /* TODO: Take care of inverted RX pair once generic property is 258 + /* RX lane seems to be inverted internally, so bit 259 + * GSW1XX_SGMII_PHY_RX0_CFG2_INVERT needs to be set for normal 260 + * (ie. non-inverted) operation. 261 + * 262 + * TODO: Take care of inverted RX pair once generic property is 264 263 * available 265 264 */ 265 + 266 + val |= GSW1XX_SGMII_PHY_RX0_CFG2_INVERT; 266 267 267 268 ret = regmap_write(priv->sgmii, GSW1XX_SGMII_PHY_RX0_CFG2, val); 268 269 if (ret < 0) ··· 433 422 return 0; 434 423 } 435 424 425 + static void gsw1xx_pcs_clear_raneg(struct work_struct *work) 426 + { 427 + struct gsw1xx_priv *priv = 428 + container_of(work, struct gsw1xx_priv, clear_raneg.work); 429 + 430 + regmap_clear_bits(priv->sgmii, GSW1XX_SGMII_TBI_ANEGCTL, 431 + GSW1XX_SGMII_TBI_ANEGCTL_RANEG); 432 + } 433 + 436 434 static void gsw1xx_pcs_an_restart(struct phylink_pcs *pcs) 437 435 { 438 436 struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs); 439 437 438 + cancel_delayed_work_sync(&priv->clear_raneg); 439 + 440 440 regmap_set_bits(priv->sgmii, GSW1XX_SGMII_TBI_ANEGCTL, 441 441 GSW1XX_SGMII_TBI_ANEGCTL_RANEG); 442 + 443 + /* despite being documented as self-clearing, the RANEG bit 444 + * sometimes remains set, preventing auto-negotiation from happening. 445 + * MaxLinear advises to manually clear the bit after 10ms. 446 + */ 447 + schedule_delayed_work(&priv->clear_raneg, msecs_to_jiffies(10)); 442 448 } 443 449 444 450 static void gsw1xx_pcs_link_up(struct phylink_pcs *pcs, ··· 658 630 if (ret) 659 631 return ret; 660 632 633 + INIT_DELAYED_WORK(&priv->clear_raneg, gsw1xx_pcs_clear_raneg); 634 + 661 635 ret = gswip_probe_common(&priv->gswip, version); 662 636 if (ret) 663 637 return ret; ··· 672 642 static void gsw1xx_remove(struct mdio_device *mdiodev) 673 643 { 674 644 struct gswip_priv *priv = dev_get_drvdata(&mdiodev->dev); 645 + struct gsw1xx_priv *gsw1xx_priv; 675 646 676 647 if (!priv) 677 648 return; 678 649 679 - gswip_disable_switch(priv); 680 - 681 650 dsa_unregister_switch(priv->ds); 651 + 652 + gsw1xx_priv = container_of(priv, struct gsw1xx_priv, gswip); 653 + cancel_delayed_work_sync(&gsw1xx_priv->clear_raneg); 682 654 } 683 655 684 656 static void gsw1xx_shutdown(struct mdio_device *mdiodev) 685 657 { 686 658 struct gswip_priv *priv = dev_get_drvdata(&mdiodev->dev); 659 + struct gsw1xx_priv *gsw1xx_priv; 687 660 688 661 if (!priv) 689 662 return; 690 663 664 + dsa_switch_shutdown(priv->ds); 665 + 691 666 dev_set_drvdata(&mdiodev->dev, NULL); 692 667 693 - gswip_disable_switch(priv); 668 + gsw1xx_priv = container_of(priv, struct gsw1xx_priv, gswip); 669 + cancel_delayed_work_sync(&gsw1xx_priv->clear_raneg); 694 670 } 695 671 696 672 static const struct gswip_hw_info gsw12x_data = {
+3
drivers/net/ethernet/broadcom/b44.c
··· 1790 1790 u32 bmcr; 1791 1791 int r; 1792 1792 1793 + if (bp->flags & B44_FLAG_EXTERNAL_PHY) 1794 + return phy_ethtool_nway_reset(dev); 1795 + 1793 1796 spin_lock_irq(&bp->lock); 1794 1797 b44_readphy(bp, MII_BMCR, &bmcr); 1795 1798 b44_readphy(bp, MII_BMCR, &bmcr);
+1 -2
drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c
··· 268 268 case XDP_TX: 269 269 rx_buf = &rxr->rx_buf_ring[cons]; 270 270 mapping = rx_buf->mapping - bp->rx_dma_offset; 271 - *event &= BNXT_TX_CMP_EVENT; 272 271 273 272 if (unlikely(xdp_buff_has_frags(xdp))) { 274 273 struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp); 275 274 276 275 tx_needed += sinfo->nr_frags; 277 - *event = BNXT_AGG_EVENT; 278 276 } 279 277 280 278 if (tx_avail < tx_needed) { ··· 285 287 dma_sync_single_for_device(&pdev->dev, mapping + offset, *len, 286 288 bp->rx_dir); 287 289 290 + *event &= ~BNXT_RX_EVENT; 288 291 *event |= BNXT_TX_EVENT; 289 292 __bnxt_xmit_xdp(bp, txr, mapping + offset, *len, 290 293 NEXT_RX(rxr->rx_prod), xdp);
+2 -1
drivers/net/ethernet/freescale/enetc/enetc.c
··· 1787 1787 int xdp_tx_bd_cnt, i, k; 1788 1788 int xdp_tx_frm_cnt = 0; 1789 1789 1790 - if (unlikely(test_bit(ENETC_TX_DOWN, &priv->flags))) 1790 + if (unlikely(test_bit(ENETC_TX_DOWN, &priv->flags) || 1791 + !netif_carrier_ok(ndev))) 1791 1792 return -ENETDOWN; 1792 1793 1793 1794 enetc_lock_mdio();
+6 -1
drivers/net/ethernet/freescale/fec_main.c
··· 3933 3933 txq->bd.cur = bdp; 3934 3934 3935 3935 /* Trigger transmission start */ 3936 - writel(0, txq->bd.reg_desc_active); 3936 + if (!(fep->quirks & FEC_QUIRK_ERR007885) || 3937 + !readl(txq->bd.reg_desc_active) || 3938 + !readl(txq->bd.reg_desc_active) || 3939 + !readl(txq->bd.reg_desc_active) || 3940 + !readl(txq->bd.reg_desc_active)) 3941 + writel(0, txq->bd.reg_desc_active); 3937 3942 3938 3943 return 0; 3939 3944 }
+10 -7
drivers/net/ethernet/google/gve/gve_main.c
··· 647 647 err = gve_alloc_counter_array(priv); 648 648 if (err) 649 649 goto abort_with_rss_config_cache; 650 - err = gve_init_clock(priv); 651 - if (err) 652 - goto abort_with_counter; 653 650 err = gve_alloc_notify_blocks(priv); 654 651 if (err) 655 - goto abort_with_clock; 652 + goto abort_with_counter; 656 653 err = gve_alloc_stats_report(priv); 657 654 if (err) 658 655 goto abort_with_ntfy_blocks; ··· 680 683 } 681 684 } 682 685 686 + err = gve_init_clock(priv); 687 + if (err) { 688 + dev_err(&priv->pdev->dev, "Failed to init clock"); 689 + goto abort_with_ptype_lut; 690 + } 691 + 683 692 err = gve_init_rss_config(priv, priv->rx_cfg.num_queues); 684 693 if (err) { 685 694 dev_err(&priv->pdev->dev, "Failed to init RSS config"); 686 - goto abort_with_ptype_lut; 695 + goto abort_with_clock; 687 696 } 688 697 689 698 err = gve_adminq_report_stats(priv, priv->stats_report_len, ··· 701 698 gve_set_device_resources_ok(priv); 702 699 return 0; 703 700 701 + abort_with_clock: 702 + gve_teardown_clock(priv); 704 703 abort_with_ptype_lut: 705 704 kvfree(priv->ptype_lut_dqo); 706 705 priv->ptype_lut_dqo = NULL; ··· 710 705 gve_free_stats_report(priv); 711 706 abort_with_ntfy_blocks: 712 707 gve_free_notify_blocks(priv); 713 - abort_with_clock: 714 - gve_teardown_clock(priv); 715 708 abort_with_counter: 716 709 gve_free_counter_array(priv); 717 710 abort_with_rss_config_cache:
+3
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
··· 10555 10555 bool writen_to_tbl = false; 10556 10556 int ret = 0; 10557 10557 10558 + if (vlan_id >= VLAN_N_VID) 10559 + return -EINVAL; 10560 + 10558 10561 /* When device is resetting or reset failed, firmware is unable to 10559 10562 * handle mailbox. Just record the vlan id, and remove it after 10560 10563 * reset finished.
+2 -2
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
··· 193 193 return -EINVAL; 194 194 195 195 for (i = 0; i < ring_num; i++) { 196 - if (req->msg.param[i].tqp_index >= vport->nic.kinfo.rss_size) { 196 + if (req->msg.param[i].tqp_index >= vport->nic.kinfo.num_tqps) { 197 197 dev_err(&hdev->pdev->dev, "tqp index(%u) is out of range(0-%u)\n", 198 198 req->msg.param[i].tqp_index, 199 - vport->nic.kinfo.rss_size - 1U); 199 + vport->nic.kinfo.num_tqps - 1U); 200 200 return -EINVAL; 201 201 } 202 202 }
+2 -2
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
··· 368 368 new_tqps = kinfo->rss_size * num_tc; 369 369 kinfo->num_tqps = min(new_tqps, hdev->num_tqps); 370 370 371 - kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps, 371 + kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, hdev->num_tqps, 372 372 sizeof(struct hnae3_queue *), GFP_KERNEL); 373 373 if (!kinfo->tqp) 374 374 return -ENOMEM; 375 375 376 - for (i = 0; i < kinfo->num_tqps; i++) { 376 + for (i = 0; i < hdev->num_tqps; i++) { 377 377 hdev->htqp[i].q.handle = &hdev->nic; 378 378 hdev->htqp[i].q.tqp_index = i; 379 379 kinfo->tqp[i] = &hdev->htqp[i].q;
+5
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
··· 197 197 struct pci_dev *pdev = dev->pdev; 198 198 int ret = 0; 199 199 200 + if (mlx5_fw_reset_in_progress(dev)) { 201 + NL_SET_ERR_MSG_MOD(extack, "Can't reload during firmware reset"); 202 + return -EBUSY; 203 + } 204 + 200 205 if (mlx5_dev_is_lightweight(dev)) { 201 206 if (action != DEVLINK_RELOAD_ACTION_DRIVER_REINIT) 202 207 return -EOPNOTSUPP;
+84 -13
drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c
··· 33 33 #include "lib/eq.h" 34 34 #include "fw_tracer.h" 35 35 #include "fw_tracer_tracepoint.h" 36 + #include <linux/ctype.h> 36 37 37 38 static int mlx5_query_mtrc_caps(struct mlx5_fw_tracer *tracer) 38 39 { ··· 359 358 static const char *REPLACE_64_VAL_PARM = "%x%x"; 360 359 static const char *PARAM_CHAR = "%"; 361 360 361 + static bool mlx5_is_valid_spec(const char *str) 362 + { 363 + /* Parse format specifiers to find the actual type. 364 + * Structure: %[flags][width][.precision][length]type 365 + * Skip flags, width, precision & length. 366 + */ 367 + while (isdigit(*str) || *str == '#' || *str == '.' || *str == 'l') 368 + str++; 369 + 370 + /* Check if it's a valid integer/hex specifier or %%: 371 + * Valid formats: %x, %d, %i, %u, etc. 372 + */ 373 + if (*str != 'x' && *str != 'X' && *str != 'd' && *str != 'i' && 374 + *str != 'u' && *str != 'c' && *str != '%') 375 + return false; 376 + 377 + return true; 378 + } 379 + 380 + static bool mlx5_tracer_validate_params(const char *str) 381 + { 382 + const char *substr = str; 383 + 384 + if (!str) 385 + return false; 386 + 387 + substr = strstr(substr, PARAM_CHAR); 388 + while (substr) { 389 + if (!mlx5_is_valid_spec(substr + 1)) 390 + return false; 391 + 392 + if (*(substr + 1) == '%') 393 + substr = strstr(substr + 2, PARAM_CHAR); 394 + else 395 + substr = strstr(substr + 1, PARAM_CHAR); 396 + 397 + } 398 + 399 + return true; 400 + } 401 + 362 402 static int mlx5_tracer_message_hash(u32 message_id) 363 403 { 364 404 return jhash_1word(message_id, 0) & (MESSAGE_HASH_SIZE - 1); ··· 461 419 char *substr, *pstr = str; 462 420 int num_of_params = 0; 463 421 422 + /* Validate that all parameters are valid before processing */ 423 + if (!mlx5_tracer_validate_params(str)) 424 + return -EINVAL; 425 + 464 426 /* replace %llx with %x%x */ 465 427 substr = strstr(pstr, VAL_PARM); 466 428 while (substr) { ··· 473 427 substr = strstr(pstr, VAL_PARM); 474 428 } 475 429 476 - /* count all the % characters */ 430 + /* count all the % characters, but skip %% (escaped percent) */ 477 431 substr = strstr(str, PARAM_CHAR); 478 432 while (substr) { 479 - num_of_params += 1; 480 - str = substr + 1; 433 + if (*(substr + 1) != '%') { 434 + num_of_params += 1; 435 + str = substr + 1; 436 + } else { 437 + str = substr + 2; 438 + } 481 439 substr = strstr(str, PARAM_CHAR); 482 440 } 483 441 ··· 620 570 { 621 571 char tmp[512]; 622 572 623 - snprintf(tmp, sizeof(tmp), str_frmt->string, 624 - str_frmt->params[0], 625 - str_frmt->params[1], 626 - str_frmt->params[2], 627 - str_frmt->params[3], 628 - str_frmt->params[4], 629 - str_frmt->params[5], 630 - str_frmt->params[6]); 573 + if (str_frmt->invalid_string) 574 + snprintf(tmp, sizeof(tmp), "BAD_FORMAT: %s", str_frmt->string); 575 + else 576 + snprintf(tmp, sizeof(tmp), str_frmt->string, 577 + str_frmt->params[0], 578 + str_frmt->params[1], 579 + str_frmt->params[2], 580 + str_frmt->params[3], 581 + str_frmt->params[4], 582 + str_frmt->params[5], 583 + str_frmt->params[6]); 631 584 632 585 trace_mlx5_fw(dev->tracer, trace_timestamp, str_frmt->lost, 633 586 str_frmt->event_id, tmp); ··· 662 609 return 0; 663 610 } 664 611 612 + static void mlx5_tracer_handle_bad_format_string(struct mlx5_fw_tracer *tracer, 613 + struct tracer_string_format *cur_string) 614 + { 615 + cur_string->invalid_string = true; 616 + list_add_tail(&cur_string->list, &tracer->ready_strings_list); 617 + } 618 + 665 619 static int mlx5_tracer_handle_string_trace(struct mlx5_fw_tracer *tracer, 666 620 struct tracer_event *tracer_event) 667 621 { ··· 679 619 if (!cur_string) 680 620 return mlx5_tracer_handle_raw_string(tracer, tracer_event); 681 621 682 - cur_string->num_of_params = mlx5_tracer_get_num_of_params(cur_string->string); 683 - cur_string->last_param_num = 0; 684 622 cur_string->event_id = tracer_event->event_id; 685 623 cur_string->tmsn = tracer_event->string_event.tmsn; 686 624 cur_string->timestamp = tracer_event->string_event.timestamp; 687 625 cur_string->lost = tracer_event->lost_event; 626 + cur_string->last_param_num = 0; 627 + cur_string->num_of_params = mlx5_tracer_get_num_of_params(cur_string->string); 628 + if (cur_string->num_of_params < 0) { 629 + pr_debug("%s Invalid format string parameters\n", 630 + __func__); 631 + mlx5_tracer_handle_bad_format_string(tracer, cur_string); 632 + return 0; 633 + } 688 634 if (cur_string->num_of_params == 0) /* trace with no params */ 689 635 list_add_tail(&cur_string->list, &tracer->ready_strings_list); 690 636 } else { ··· 699 633 pr_debug("%s Got string event for unknown string tmsn: %d\n", 700 634 __func__, tracer_event->string_event.tmsn); 701 635 return mlx5_tracer_handle_raw_string(tracer, tracer_event); 636 + } 637 + if (cur_string->num_of_params < 0) { 638 + pr_debug("%s string parameter of invalid string, dumping\n", 639 + __func__); 640 + return 0; 702 641 } 703 642 cur_string->last_param_num += 1; 704 643 if (cur_string->last_param_num > TRACER_MAX_PARAMS) {
+1
drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.h
··· 125 125 struct list_head list; 126 126 u32 timestamp; 127 127 bool lost; 128 + bool invalid_string; 128 129 }; 129 130 130 131 enum mlx5_fw_tracer_ownership_state {
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/en.h
··· 69 69 #define MLX5E_METADATA_ETHER_TYPE (0x8CE4) 70 70 #define MLX5E_METADATA_ETHER_LEN 8 71 71 72 - #define MLX5E_ETH_HARD_MTU (ETH_HLEN + PSP_ENCAP_HLEN + PSP_TRL_SIZE + VLAN_HLEN + ETH_FCS_LEN) 72 + #define MLX5E_ETH_HARD_MTU (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN) 73 73 74 74 #define MLX5E_HW2SW_MTU(params, hwmtu) ((hwmtu) - ((params)->hard_mtu)) 75 75 #define MLX5E_SW2HW_MTU(params, swmtu) ((swmtu) + ((params)->hard_mtu))
+5 -3
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
··· 342 342 rt_dst_entry = &rt->dst; 343 343 break; 344 344 case AF_INET6: 345 - rt_dst_entry = ipv6_stub->ipv6_dst_lookup_flow( 346 - dev_net(netdev), NULL, &fl6, NULL); 347 - if (IS_ERR(rt_dst_entry)) 345 + if (!IS_ENABLED(CONFIG_IPV6) || 346 + ip6_dst_lookup(dev_net(netdev), NULL, &rt_dst_entry, &fl6)) 348 347 goto neigh; 349 348 break; 350 349 default: ··· 358 359 359 360 neigh_ha_snapshot(addr, n, netdev); 360 361 ether_addr_copy(dst, addr); 362 + if (attrs->dir == XFRM_DEV_OFFLOAD_OUT && 363 + is_zero_ether_addr(addr)) 364 + neigh_event_send(n, NULL); 361 365 dst_release(rt_dst_entry); 362 366 neigh_release(n); 363 367 return;
-1
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
··· 6825 6825 * is already unregistered before changing to NIC profile. 6826 6826 */ 6827 6827 if (priv->netdev->reg_state == NETREG_REGISTERED) { 6828 - mlx5e_psp_unregister(priv); 6829 6828 unregister_netdev(priv->netdev); 6830 6829 _mlx5e_suspend(adev, false); 6831 6830 } else {
+5 -1
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
··· 939 939 sq->dma_fifo_cc = dma_fifo_cc; 940 940 sq->cc = sqcc; 941 941 942 - netdev_tx_completed_queue(sq->txq, npkts, nbytes); 942 + /* Do not update BQL for TXQs that got replaced by new active ones, as 943 + * netdev_tx_reset_queue() is called for them in mlx5e_activate_txqsq(). 944 + */ 945 + if (sq == sq->priv->txq2sq[sq->txq_ix]) 946 + netdev_tx_completed_queue(sq->txq, npkts, nbytes); 943 947 } 944 948 945 949 #ifdef CONFIG_MLX5_CORE_IPOIB
+6
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
··· 52 52 #include "devlink.h" 53 53 #include "lag/lag.h" 54 54 #include "en/tc/post_meter.h" 55 + #include "fw_reset.h" 55 56 56 57 /* There are two match-all miss flows, one for unicast dst mac and 57 58 * one for multicast. ··· 3991 3990 esw = mlx5_devlink_eswitch_get(devlink); 3992 3991 if (IS_ERR(esw)) 3993 3992 return PTR_ERR(esw); 3993 + 3994 + if (mlx5_fw_reset_in_progress(esw->dev)) { 3995 + NL_SET_ERR_MSG_MOD(extack, "Can't change eswitch mode during firmware reset"); 3996 + return -EBUSY; 3997 + } 3994 3998 3995 3999 if (esw_mode_from_devlink(mode, &mlx5_mode)) 3996 4000 return -EINVAL;
+43 -5
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
··· 15 15 MLX5_FW_RESET_FLAGS_DROP_NEW_REQUESTS, 16 16 MLX5_FW_RESET_FLAGS_RELOAD_REQUIRED, 17 17 MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, 18 + MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, 18 19 }; 19 20 20 21 struct mlx5_fw_reset { ··· 127 126 int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type) 128 127 { 129 128 return mlx5_reg_mfrl_query(dev, reset_level, reset_type, NULL, NULL); 129 + } 130 + 131 + bool mlx5_fw_reset_in_progress(struct mlx5_core_dev *dev) 132 + { 133 + struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset; 134 + 135 + if (!fw_reset) 136 + return false; 137 + 138 + return test_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); 130 139 } 131 140 132 141 static int mlx5_fw_reset_get_reset_method(struct mlx5_core_dev *dev, ··· 254 243 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE)); 255 244 devl_unlock(devlink); 256 245 } 246 + 247 + clear_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); 257 248 } 258 249 259 250 static void mlx5_stop_sync_reset_poll(struct mlx5_core_dev *dev) ··· 475 462 struct mlx5_fw_reset *fw_reset = container_of(work, struct mlx5_fw_reset, 476 463 reset_request_work); 477 464 struct mlx5_core_dev *dev = fw_reset->dev; 465 + bool nack_request = false; 466 + struct devlink *devlink; 478 467 int err; 479 468 480 469 err = mlx5_fw_reset_get_reset_method(dev, &fw_reset->reset_method); 481 - if (err) 470 + if (err) { 471 + nack_request = true; 482 472 mlx5_core_warn(dev, "Failed reading MFRL, err %d\n", err); 473 + } else if (!mlx5_is_reset_now_capable(dev, fw_reset->reset_method) || 474 + test_bit(MLX5_FW_RESET_FLAGS_NACK_RESET_REQUEST, 475 + &fw_reset->reset_flags)) { 476 + nack_request = true; 477 + } 483 478 484 - if (err || test_bit(MLX5_FW_RESET_FLAGS_NACK_RESET_REQUEST, &fw_reset->reset_flags) || 485 - !mlx5_is_reset_now_capable(dev, fw_reset->reset_method)) { 479 + devlink = priv_to_devlink(dev); 480 + /* For external resets, try to acquire devl_lock. Skip if devlink reset is 481 + * pending (lock already held) 482 + */ 483 + if (nack_request || 484 + (!test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, 485 + &fw_reset->reset_flags) && 486 + !devl_trylock(devlink))) { 486 487 err = mlx5_fw_reset_set_reset_sync_nack(dev); 487 488 mlx5_core_warn(dev, "PCI Sync FW Update Reset Nack %s", 488 489 err ? "Failed" : "Sent"); 489 490 return; 490 491 } 492 + 491 493 if (mlx5_sync_reset_set_reset_requested(dev)) 492 - return; 494 + goto unlock; 495 + 496 + set_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); 493 497 494 498 err = mlx5_fw_reset_set_reset_sync_ack(dev); 495 499 if (err) 496 500 mlx5_core_warn(dev, "PCI Sync FW Update Reset Ack Failed. Error code: %d\n", err); 497 501 else 498 502 mlx5_core_warn(dev, "PCI Sync FW Update Reset Ack. Device reset is expected.\n"); 503 + 504 + unlock: 505 + if (!test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, &fw_reset->reset_flags)) 506 + devl_unlock(devlink); 499 507 } 500 508 501 509 static int mlx5_pci_link_toggle(struct mlx5_core_dev *dev, u16 dev_id) ··· 756 722 757 723 if (mlx5_sync_reset_clear_reset_requested(dev, true)) 758 724 return; 725 + 726 + clear_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); 759 727 mlx5_core_warn(dev, "PCI Sync FW Update Reset Aborted.\n"); 760 728 } 761 729 ··· 794 758 795 759 if (mlx5_sync_reset_clear_reset_requested(dev, true)) 796 760 return; 761 + clear_bit(MLX5_FW_RESET_FLAGS_RESET_IN_PROGRESS, &fw_reset->reset_flags); 797 762 mlx5_core_warn(dev, "PCI Sync FW Update Reset Timeout.\n"); 798 763 } 799 764 ··· 881 844 cancel_work_sync(&fw_reset->reset_reload_work); 882 845 cancel_work_sync(&fw_reset->reset_now_work); 883 846 cancel_work_sync(&fw_reset->reset_abort_work); 884 - cancel_delayed_work(&fw_reset->reset_timeout_work); 847 + if (test_bit(MLX5_FW_RESET_FLAGS_RESET_REQUESTED, &fw_reset->reset_flags)) 848 + mlx5_sync_reset_clear_reset_requested(dev, true); 885 849 } 886 850 887 851 static const struct devlink_param mlx5_fw_reset_devlink_params[] = {
+1
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h
··· 10 10 int mlx5_fw_reset_set_reset_sync(struct mlx5_core_dev *dev, u8 reset_type_sel, 11 11 struct netlink_ext_ack *extack); 12 12 int mlx5_fw_reset_set_live_patch(struct mlx5_core_dev *dev); 13 + bool mlx5_fw_reset_in_progress(struct mlx5_core_dev *dev); 13 14 14 15 int mlx5_fw_reset_wait_reset_done(struct mlx5_core_dev *dev); 15 16 void mlx5_sync_reset_unload_flow(struct mlx5_core_dev *dev, bool locked);
+1
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c
··· 1413 1413 static void mlx5_lag_unregister_hca_devcom_comp(struct mlx5_core_dev *dev) 1414 1414 { 1415 1415 mlx5_devcom_unregister_component(dev->priv.hca_devcom_comp); 1416 + dev->priv.hca_devcom_comp = NULL; 1416 1417 } 1417 1418 1418 1419 static int mlx5_lag_register_hca_devcom_comp(struct mlx5_core_dev *dev)
+9 -2
drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c
··· 67 67 68 68 static int enable_mpesw(struct mlx5_lag *ldev) 69 69 { 70 - int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1); 71 70 struct mlx5_core_dev *dev0; 72 71 int err; 72 + int idx; 73 73 int i; 74 74 75 - if (idx < 0 || ldev->mode != MLX5_LAG_MODE_NONE) 75 + if (ldev->mode == MLX5_LAG_MODE_MPESW) 76 + return 0; 77 + 78 + if (ldev->mode != MLX5_LAG_MODE_NONE) 79 + return -EINVAL; 80 + 81 + idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1); 82 + if (idx < 0) 76 83 return -EINVAL; 77 84 78 85 dev0 = ldev->pf[idx].dev;
+1
drivers/net/ethernet/mellanox/mlx5/core/main.c
··· 2231 2231 2232 2232 mlx5_core_info(dev, "Shutdown was called\n"); 2233 2233 set_bit(MLX5_BREAK_FW_WAIT, &dev->intf_state); 2234 + mlx5_drain_fw_reset(dev); 2234 2235 mlx5_drain_health_wq(dev); 2235 2236 err = mlx5_try_fast_unload(dev); 2236 2237 if (err)
+2
drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c
··· 440 440 rhashtable_remove_fast(&mr_table->route_ht, 441 441 &mr_orig_route->ht_node, 442 442 mlxsw_sp_mr_route_ht_params); 443 + mutex_lock(&mr_table->route_list_lock); 443 444 list_del(&mr_orig_route->node); 445 + mutex_unlock(&mr_table->route_list_lock); 444 446 mlxsw_sp_mr_route_destroy(mr_table, mr_orig_route); 445 447 } 446 448
+14 -13
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
··· 2265 2265 if (!neigh_entry) 2266 2266 return NULL; 2267 2267 2268 + neigh_hold(n); 2268 2269 neigh_entry->key.n = n; 2269 2270 neigh_entry->rif = rif; 2270 2271 INIT_LIST_HEAD(&neigh_entry->nexthop_list); ··· 2275 2274 2276 2275 static void mlxsw_sp_neigh_entry_free(struct mlxsw_sp_neigh_entry *neigh_entry) 2277 2276 { 2277 + neigh_release(neigh_entry->key.n); 2278 2278 kfree(neigh_entry); 2279 2279 } 2280 2280 ··· 2860 2858 if (!net_work) 2861 2859 return NOTIFY_BAD; 2862 2860 2861 + /* Take a reference to ensure the neighbour won't be destructed until 2862 + * we drop the reference in the work item. 2863 + */ 2864 + neigh_clone(n); 2865 + 2863 2866 INIT_WORK(&net_work->work, cb); 2864 2867 net_work->mlxsw_sp = router->mlxsw_sp; 2865 2868 net_work->n = n; ··· 2888 2881 struct net *net; 2889 2882 2890 2883 net = neigh_parms_net(n->parms); 2891 - 2892 - /* Take a reference to ensure the neighbour won't be destructed until we 2893 - * drop the reference in delayed work. 2894 - */ 2895 - neigh_clone(n); 2896 2884 return mlxsw_sp_router_schedule_work(net, router, n, 2897 2885 mlxsw_sp_router_neigh_event_work); 2898 2886 } ··· 4322 4320 if (err) 4323 4321 goto err_neigh_entry_insert; 4324 4322 4323 + neigh_release(old_n); 4324 + 4325 4325 read_lock_bh(&n->lock); 4326 4326 nud_state = n->nud_state; 4327 4327 dead = n->dead; ··· 4332 4328 4333 4329 list_for_each_entry(nh, &neigh_entry->nexthop_list, 4334 4330 neigh_list_node) { 4335 - neigh_release(old_n); 4336 - neigh_clone(n); 4337 4331 __mlxsw_sp_nexthop_neigh_update(nh, !entry_connected); 4338 4332 mlxsw_sp_nexthop_group_refresh(mlxsw_sp, nh->nhgi->nh_grp); 4339 4333 } 4340 - 4341 - neigh_release(n); 4342 4334 4343 4335 return 0; 4344 4336 ··· 4428 4428 } 4429 4429 } 4430 4430 4431 + /* Release the reference taken by neigh_lookup() / neigh_create() since 4432 + * neigh_entry already holds one. 4433 + */ 4434 + neigh_release(n); 4435 + 4431 4436 /* If that is the first nexthop connected to that neigh, add to 4432 4437 * nexthop_neighs_list 4433 4438 */ ··· 4459 4454 struct mlxsw_sp_nexthop *nh) 4460 4455 { 4461 4456 struct mlxsw_sp_neigh_entry *neigh_entry = nh->neigh_entry; 4462 - struct neighbour *n; 4463 4457 4464 4458 if (!neigh_entry) 4465 4459 return; 4466 - n = neigh_entry->key.n; 4467 4460 4468 4461 __mlxsw_sp_nexthop_neigh_update(nh, true); 4469 4462 list_del(&nh->neigh_list_node); ··· 4475 4472 4476 4473 if (!neigh_entry->connected && list_empty(&neigh_entry->nexthop_list)) 4477 4474 mlxsw_sp_neigh_entry_destroy(mlxsw_sp, neigh_entry); 4478 - 4479 - neigh_release(n); 4480 4475 } 4481 4476 4482 4477 static bool mlxsw_sp_ipip_netdev_ul_up(struct net_device *ol_dev)
+1 -4
drivers/net/ethernet/realtek/r8169_main.c
··· 2655 2655 2656 2656 static void rtl_prepare_power_down(struct rtl8169_private *tp) 2657 2657 { 2658 - if (tp->dash_enabled) 2659 - return; 2660 - 2661 2658 if (tp->mac_version == RTL_GIGA_MAC_VER_32 || 2662 2659 tp->mac_version == RTL_GIGA_MAC_VER_33) 2663 2660 rtl_ephy_write(tp, 0x19, 0xff64); ··· 4809 4812 rtl_disable_exit_l1(tp); 4810 4813 rtl_prepare_power_down(tp); 4811 4814 4812 - if (tp->dash_type != RTL_DASH_NONE) 4815 + if (tp->dash_type != RTL_DASH_NONE && !tp->saved_wolopts) 4813 4816 rtl8168_driver_stop(tp); 4814 4817 } 4815 4818
+2 -1
drivers/net/ethernet/ti/Kconfig
··· 209 209 depends on PRU_REMOTEPROC 210 210 depends on NET_SWITCHDEV 211 211 depends on ARCH_K3 && OF && TI_K3_UDMA_GLUE_LAYER 212 + depends on PTP_1588_CLOCK_OPTIONAL 212 213 help 213 214 Support dual Gigabit Ethernet ports over the ICSSG PRU Subsystem. 214 215 This subsystem is available on the AM65 SR1.0 platform. ··· 235 234 depends on PRU_REMOTEPROC 236 235 depends on NET_SWITCHDEV 237 236 select TI_ICSS_IEP 238 - imply PTP_1588_CLOCK 237 + depends on PTP_1588_CLOCK_OPTIONAL 239 238 help 240 239 Some TI SoCs has Programmable Realtime Unit (PRU) cores which can 241 240 support Single or Dual Ethernet ports with the help of firmware code
+3
drivers/net/ipvlan/ipvlan_core.c
··· 737 737 struct ethhdr *eth = eth_hdr(skb); 738 738 rx_handler_result_t ret = RX_HANDLER_PASS; 739 739 740 + if (unlikely(skb->pkt_type == PACKET_LOOPBACK)) 741 + return RX_HANDLER_PASS; 742 + 740 743 if (is_multicast_ether_addr(eth->h_dest)) { 741 744 if (ipvlan_external_frame(skb, port)) { 742 745 struct sk_buff *nskb = skb_clone(skb, GFP_ATOMIC);
+1 -1
drivers/net/phy/marvell-88q2xxx.c
··· 698 698 699 699 switch (attr) { 700 700 case hwmon_temp_max: 701 - clamp_val(val, -75000, 180000); 701 + val = clamp(val, -75000, 180000); 702 702 val = (val / 1000) + 75; 703 703 val = FIELD_PREP(MDIO_MMD_PCS_MV_TEMP_SENSOR3_INT_THRESH_MASK, 704 704 val);
-4
drivers/net/phy/realtek/realtek_main.c
··· 691 691 692 692 static int rtl8211f_config_phy_eee(struct phy_device *phydev) 693 693 { 694 - /* RTL8211FVD has no PHYCR2 register */ 695 - if (phydev->drv->phy_id == RTL_8211FVD_PHYID) 696 - return 0; 697 - 698 694 /* Disable PHY-mode EEE so LPI is passed to the MAC */ 699 695 return phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR2, 700 696 RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
+2
drivers/net/phy/sfp.c
··· 497 497 SFP_QUIRK("ALCATELLUCENT", "3FE46541AA", sfp_quirk_2500basex, 498 498 sfp_fixup_nokia), 499 499 500 + SFP_QUIRK_F("BIDB", "X-ONU-SFPP", sfp_fixup_potron), 501 + 500 502 // FLYPRO SFP-10GT-CS-30M uses Rollball protocol to talk to the PHY. 501 503 SFP_QUIRK_F("FLYPRO", "SFP-10GT-CS-30M", sfp_fixup_rollball), 502 504
+1 -1
drivers/nfc/pn533/usb.c
··· 406 406 if (rc || (transferred != sizeof(cmd))) { 407 407 nfc_err(&phy->udev->dev, 408 408 "Reader power on cmd error %d\n", rc); 409 - return rc; 409 + return rc ?: -EINVAL; 410 410 } 411 411 412 412 rc = usb_submit_urb(phy->in_urb, GFP_KERNEL);
+1 -1
drivers/of/fdt.c
··· 503 503 if (!initial_boot_params) 504 504 return; 505 505 506 - fdt_scan_reserved_mem(); 507 506 fdt_reserve_elfcorehdr(); 507 + fdt_scan_reserved_mem(); 508 508 509 509 /* Process header /memreserve/ fields */ 510 510 for (n = 0; ; n++) {
+2 -2
drivers/parisc/sba_iommu.c
··· 578 578 pba &= IOVP_MASK; 579 579 pba |= (ci >> PAGE_SHIFT) & 0xff; /* move CI (8 bits) into lowest byte */ 580 580 581 - pba |= SBA_PDIR_VALID_BIT; /* set "valid" bit */ 582 - *pdir_ptr = cpu_to_le64(pba); /* swap and store into I/O Pdir */ 581 + /* set "valid" bit, swap and store into I/O Pdir */ 582 + *pdir_ptr = cpu_to_le64((unsigned long)pba | SBA_PDIR_VALID_BIT); 583 583 584 584 /* 585 585 * If the PDC_MODEL capabilities has Non-coherent IO-PDIR bit set
+18 -6
drivers/powercap/intel_rapl_common.c
··· 2032 2032 return ret; 2033 2033 } 2034 2034 2035 - int rapl_package_add_pmu(struct rapl_package *rp) 2035 + int rapl_package_add_pmu_locked(struct rapl_package *rp) 2036 2036 { 2037 2037 struct rapl_package_pmu_data *data = &rp->pmu_data; 2038 2038 int idx; 2039 2039 2040 2040 if (rp->has_pmu) 2041 2041 return -EEXIST; 2042 - 2043 - guard(cpus_read_lock)(); 2044 2042 2045 2043 for (idx = 0; idx < rp->nr_domains; idx++) { 2046 2044 struct rapl_domain *rd = &rp->domains[idx]; ··· 2089 2091 2090 2092 return rapl_pmu_update(rp); 2091 2093 } 2094 + EXPORT_SYMBOL_GPL(rapl_package_add_pmu_locked); 2095 + 2096 + int rapl_package_add_pmu(struct rapl_package *rp) 2097 + { 2098 + guard(cpus_read_lock)(); 2099 + 2100 + return rapl_package_add_pmu_locked(rp); 2101 + } 2092 2102 EXPORT_SYMBOL_GPL(rapl_package_add_pmu); 2093 2103 2094 - void rapl_package_remove_pmu(struct rapl_package *rp) 2104 + void rapl_package_remove_pmu_locked(struct rapl_package *rp) 2095 2105 { 2096 2106 struct rapl_package *pos; 2097 2107 2098 2108 if (!rp->has_pmu) 2099 2109 return; 2100 - 2101 - guard(cpus_read_lock)(); 2102 2110 2103 2111 list_for_each_entry(pos, &rapl_packages, plist) { 2104 2112 /* PMU is still needed */ ··· 2114 2110 2115 2111 perf_pmu_unregister(&rapl_pmu.pmu); 2116 2112 memset(&rapl_pmu, 0, sizeof(struct rapl_pmu)); 2113 + } 2114 + EXPORT_SYMBOL_GPL(rapl_package_remove_pmu_locked); 2115 + 2116 + void rapl_package_remove_pmu(struct rapl_package *rp) 2117 + { 2118 + guard(cpus_read_lock)(); 2119 + 2120 + rapl_package_remove_pmu_locked(rp); 2117 2121 } 2118 2122 EXPORT_SYMBOL_GPL(rapl_package_remove_pmu); 2119 2123 #endif
+2 -2
drivers/powercap/intel_rapl_msr.c
··· 82 82 if (IS_ERR(rp)) 83 83 return PTR_ERR(rp); 84 84 if (rapl_msr_pmu) 85 - rapl_package_add_pmu(rp); 85 + rapl_package_add_pmu_locked(rp); 86 86 } 87 87 cpumask_set_cpu(cpu, &rp->cpumask); 88 88 return 0; ··· 101 101 lead_cpu = cpumask_first(&rp->cpumask); 102 102 if (lead_cpu >= nr_cpu_ids) { 103 103 if (rapl_msr_pmu) 104 - rapl_package_remove_pmu(rp); 104 + rapl_package_remove_pmu_locked(rp); 105 105 rapl_remove_package_cpuslocked(rp); 106 106 } else if (rp->lead_cpu == cpu) { 107 107 rp->lead_cpu = lead_cpu;
+14 -8
drivers/powercap/powercap_sys.c
··· 68 68 int id; \ 69 69 struct powercap_zone_constraint *pconst;\ 70 70 \ 71 - if (!sscanf(dev_attr->attr.name, "constraint_%d_", &id)) \ 71 + if (sscanf(dev_attr->attr.name, "constraint_%d_", &id) != 1) \ 72 72 return -EINVAL; \ 73 73 if (id >= power_zone->const_id_cnt) \ 74 74 return -EINVAL; \ ··· 93 93 int id; \ 94 94 struct powercap_zone_constraint *pconst;\ 95 95 \ 96 - if (!sscanf(dev_attr->attr.name, "constraint_%d_", &id)) \ 96 + if (sscanf(dev_attr->attr.name, "constraint_%d_", &id) != 1) \ 97 97 return -EINVAL; \ 98 98 if (id >= power_zone->const_id_cnt) \ 99 99 return -EINVAL; \ ··· 162 162 ssize_t len = -ENODATA; 163 163 struct powercap_zone_constraint *pconst; 164 164 165 - if (!sscanf(dev_attr->attr.name, "constraint_%d_", &id)) 165 + if (sscanf(dev_attr->attr.name, "constraint_%d_", &id) != 1) 166 166 return -EINVAL; 167 167 if (id >= power_zone->const_id_cnt) 168 168 return -EINVAL; ··· 625 625 INIT_LIST_HEAD(&control_type->node); 626 626 control_type->dev.class = &powercap_class; 627 627 dev_set_name(&control_type->dev, "%s", name); 628 - result = device_register(&control_type->dev); 629 - if (result) { 630 - put_device(&control_type->dev); 631 - return ERR_PTR(result); 632 - } 633 628 idr_init(&control_type->idr); 634 629 635 630 mutex_lock(&powercap_cntrl_list_lock); 636 631 list_add_tail(&control_type->node, &powercap_cntrl_list); 637 632 mutex_unlock(&powercap_cntrl_list_lock); 633 + 634 + result = device_register(&control_type->dev); 635 + if (result) { 636 + mutex_lock(&powercap_cntrl_list_lock); 637 + list_del(&control_type->node); 638 + mutex_unlock(&powercap_cntrl_list_lock); 639 + 640 + idr_destroy(&control_type->idr); 641 + put_device(&control_type->dev); 642 + return ERR_PTR(result); 643 + } 638 644 639 645 return control_type; 640 646 }
+3
drivers/regulator/fp9931.c
··· 391 391 { 392 392 .name = "v3p3", 393 393 .of_match = of_match_ptr("v3p3"), 394 + .regulators_node = of_match_ptr("regulators"), 394 395 .id = 0, 395 396 .ops = &fp9931_v3p3ops, 396 397 .type = REGULATOR_VOLTAGE, ··· 404 403 { 405 404 .name = "vposneg", 406 405 .of_match = of_match_ptr("vposneg"), 406 + .regulators_node = of_match_ptr("regulators"), 407 407 .id = 1, 408 408 .ops = &fp9931_vposneg_ops, 409 409 .type = REGULATOR_VOLTAGE, ··· 417 415 { 418 416 .name = "vcom", 419 417 .of_match = of_match_ptr("vcom"), 418 + .regulators_node = of_match_ptr("regulators"), 420 419 .id = 2, 421 420 .ops = &fp9931_vcom_ops, 422 421 .type = REGULATOR_VOLTAGE,
+1
drivers/scsi/mpi3mr/mpi/mpi30_ioc.h
··· 166 166 #define MPI3_IOCFACTS_FLAGS_SIGNED_NVDATA_REQUIRED (0x00010000) 167 167 #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK (0x0000ff00) 168 168 #define MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT (8) 169 + #define MPI3_IOCFACTS_FLAGS_MAX_REQ_PER_REPLY_QUEUE_LIMIT (0x00000040) 169 170 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK (0x00000030) 170 171 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_SHIFT (4) 171 172 #define MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_NOT_STARTED (0x00000000)
+2
drivers/scsi/mpi3mr/mpi3mr_fw.c
··· 3158 3158 mrioc->facts.dma_mask = (facts_flags & 3159 3159 MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK) >> 3160 3160 MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT; 3161 + mrioc->facts.max_req_limit = (facts_flags & 3162 + MPI3_IOCFACTS_FLAGS_MAX_REQ_PER_REPLY_QUEUE_LIMIT); 3161 3163 mrioc->facts.protocol_flags = facts_data->protocol_flags; 3162 3164 mrioc->facts.mpi_version = le32_to_cpu(facts_data->mpi_version.word); 3163 3165 mrioc->facts.max_reqs = le16_to_cpu(facts_data->max_outstanding_requests);
+1 -1
drivers/scsi/scsi_debug.c
··· 7459 7459 MODULE_PARM_DESC(lbpu, "enable LBP, support UNMAP command (def=0)"); 7460 7460 MODULE_PARM_DESC(lbpws, "enable LBP, support WRITE SAME(16) with UNMAP bit (def=0)"); 7461 7461 MODULE_PARM_DESC(lbpws10, "enable LBP, support WRITE SAME(10) with UNMAP bit (def=0)"); 7462 - MODULE_PARM_DESC(atomic_write, "enable ATOMIC WRITE support, support WRITE ATOMIC(16) (def=0)"); 7462 + MODULE_PARM_DESC(atomic_wr, "enable ATOMIC WRITE support, support WRITE ATOMIC(16) (def=0)"); 7463 7463 MODULE_PARM_DESC(lowest_aligned, "lowest aligned lba (def=0)"); 7464 7464 MODULE_PARM_DESC(lun_format, "LUN format: 0->peripheral (def); 1 --> flat address method"); 7465 7465 MODULE_PARM_DESC(max_luns, "number of LUNs per target to simulate(def=1)");
+13 -7
drivers/scsi/sg.c
··· 731 731 sg_remove_request(sfp, srp); 732 732 return -EFAULT; 733 733 } 734 + hp->duration = jiffies_to_msecs(jiffies); 735 + 734 736 if (hp->interface_id != 'S') { 735 737 sg_remove_request(sfp, srp); 736 738 return -ENOSYS; ··· 817 815 return -ENODEV; 818 816 } 819 817 820 - hp->duration = jiffies_to_msecs(jiffies); 821 818 if (hp->interface_id != '\0' && /* v3 (or later) interface */ 822 819 (SG_FLAG_Q_AT_TAIL & hp->flags)) 823 820 at_head = 0; ··· 1339 1338 "sg_cmd_done: pack_id=%d, res=0x%x\n", 1340 1339 srp->header.pack_id, result)); 1341 1340 srp->header.resid = resid; 1342 - ms = jiffies_to_msecs(jiffies); 1343 - srp->header.duration = (ms > srp->header.duration) ? 1344 - (ms - srp->header.duration) : 0; 1345 1341 if (0 != result) { 1346 1342 struct scsi_sense_hdr sshdr; 1347 1343 ··· 1387 1389 done = 0; 1388 1390 } 1389 1391 srp->done = done; 1392 + ms = jiffies_to_msecs(jiffies); 1393 + srp->header.duration = (ms > srp->header.duration) ? 1394 + (ms - srp->header.duration) : 0; 1390 1395 write_unlock_irqrestore(&sfp->rq_list_lock, iflags); 1391 1396 1392 1397 if (likely(done)) { ··· 2534 2533 const sg_io_hdr_t *hp; 2535 2534 const char * cp; 2536 2535 unsigned int ms; 2536 + unsigned int duration; 2537 2537 2538 2538 k = 0; 2539 2539 list_for_each_entry(fp, &sdp->sfds, sfd_siblings) { ··· 2572 2570 seq_printf(s, " id=%d blen=%d", 2573 2571 srp->header.pack_id, blen); 2574 2572 if (srp->done) 2575 - seq_printf(s, " dur=%d", hp->duration); 2573 + seq_printf(s, " dur=%u", hp->duration); 2576 2574 else { 2577 2575 ms = jiffies_to_msecs(jiffies); 2578 - seq_printf(s, " t_o/elap=%d/%d", 2576 + duration = READ_ONCE(hp->duration); 2577 + if (duration) 2578 + duration = (ms > duration ? 2579 + ms - duration : 0); 2580 + seq_printf(s, " t_o/elap=%u/%u", 2579 2581 (new_interface ? hp->timeout : 2580 2582 jiffies_to_msecs(fp->timeout)), 2581 - (ms > hp->duration ? ms - hp->duration : 0)); 2583 + duration); 2582 2584 } 2583 2585 seq_printf(s, "ms sgat=%d op=0x%02x\n", usg, 2584 2586 (int) srp->data.cmd_opcode);
+17 -14
drivers/spi/spi-cadence-quadspi.c
··· 300 300 CQSPI_REG_IRQ_IND_SRAM_FULL | \ 301 301 CQSPI_REG_IRQ_IND_COMP) 302 302 303 + #define CQSPI_IRQ_MASK_RD_SLOW_SRAM (CQSPI_REG_IRQ_WATERMARK | \ 304 + CQSPI_REG_IRQ_IND_COMP) 305 + 303 306 #define CQSPI_IRQ_MASK_WR (CQSPI_REG_IRQ_IND_COMP | \ 304 307 CQSPI_REG_IRQ_WATERMARK | \ 305 308 CQSPI_REG_IRQ_UNDERFLOW) ··· 384 381 else if (!cqspi->slow_sram) 385 382 irq_status &= CQSPI_IRQ_MASK_RD | CQSPI_IRQ_MASK_WR; 386 383 else 387 - irq_status &= CQSPI_REG_IRQ_WATERMARK | CQSPI_IRQ_MASK_WR; 384 + irq_status &= CQSPI_IRQ_MASK_RD_SLOW_SRAM | CQSPI_IRQ_MASK_WR; 388 385 389 386 if (irq_status) 390 387 complete(&cqspi->transfer_complete); ··· 760 757 */ 761 758 762 759 if (use_irq && cqspi->slow_sram) 763 - writel(CQSPI_REG_IRQ_WATERMARK, reg_base + CQSPI_REG_IRQMASK); 760 + writel(CQSPI_IRQ_MASK_RD_SLOW_SRAM, reg_base + CQSPI_REG_IRQMASK); 764 761 else if (use_irq) 765 762 writel(CQSPI_IRQ_MASK_RD, reg_base + CQSPI_REG_IRQMASK); 766 763 else ··· 772 769 readl(reg_base + CQSPI_REG_INDIRECTRD); /* Flush posted write. */ 773 770 774 771 while (remaining > 0) { 772 + ret = 0; 775 773 if (use_irq && 776 774 !wait_for_completion_timeout(&cqspi->transfer_complete, 777 775 msecs_to_jiffies(CQSPI_READ_TIMEOUT_MS))) 778 776 ret = -ETIMEDOUT; 779 777 780 778 /* 781 - * Disable all read interrupts until 782 - * we are out of "bytes to read" 779 + * Prevent lost interrupt and race condition by reinitializing early. 780 + * A spurious wakeup and another wait cycle can occur here, 781 + * which is preferable to waiting until timeout if interrupt is lost. 783 782 */ 784 - if (cqspi->slow_sram) 785 - writel(0x0, reg_base + CQSPI_REG_IRQMASK); 783 + if (use_irq) 784 + reinit_completion(&cqspi->transfer_complete); 786 785 787 786 bytes_to_read = cqspi_get_rd_sram_level(cqspi); 788 787 ··· 815 810 rxbuf += bytes_to_read; 816 811 remaining -= bytes_to_read; 817 812 bytes_to_read = cqspi_get_rd_sram_level(cqspi); 818 - } 819 - 820 - if (use_irq && remaining > 0) { 821 - reinit_completion(&cqspi->transfer_complete); 822 - if (cqspi->slow_sram) 823 - writel(CQSPI_REG_IRQ_WATERMARK, reg_base + CQSPI_REG_IRQMASK); 824 813 } 825 814 } 826 815 ··· 2000 2001 2001 2002 if (cqspi->use_direct_mode) { 2002 2003 ret = cqspi_request_mmap_dma(cqspi); 2003 - if (ret == -EPROBE_DEFER) 2004 + if (ret == -EPROBE_DEFER) { 2005 + dev_err_probe(&pdev->dev, ret, "Failed to request mmap DMA\n"); 2004 2006 goto probe_setup_failed; 2007 + } 2005 2008 } 2006 2009 2007 2010 ret = spi_register_controller(host); ··· 2025 2024 probe_reset_failed: 2026 2025 if (cqspi->is_jh7110) 2027 2026 cqspi_jh7110_disable_clk(pdev, cqspi); 2028 - clk_disable_unprepare(cqspi->clk); 2027 + 2028 + if (pm_runtime_get_sync(&pdev->dev) >= 0) 2029 + clk_disable_unprepare(cqspi->clk); 2029 2030 probe_clk_failed: 2030 2031 return ret; 2031 2032 }
+1 -1
drivers/spi/spi-fsl-spi.c
··· 335 335 if (t->bits_per_word == 16 || t->bits_per_word == 32) 336 336 t->bits_per_word = 8; /* pretend its 8 bits */ 337 337 if (t->bits_per_word == 8 && t->len >= 256 && 338 - (mpc8xxx_spi->flags & SPI_CPM1)) 338 + !(t->len & 1) && (mpc8xxx_spi->flags & SPI_CPM1)) 339 339 t->bits_per_word = 16; 340 340 } 341 341 }
+1
drivers/spi/spi-mpfs.c
··· 577 577 578 578 ret = devm_spi_register_controller(&pdev->dev, host); 579 579 if (ret) { 580 + mpfs_spi_disable_ints(spi); 580 581 mpfs_spi_disable(spi); 581 582 return dev_err_probe(&pdev->dev, ret, 582 583 "unable to register host for SPI controller\n");
+1 -1
drivers/spi/spi-mt65xx.c
··· 1320 1320 1321 1321 ret = devm_request_threaded_irq(dev, irq, mtk_spi_interrupt, 1322 1322 mtk_spi_interrupt_thread, 1323 - IRQF_TRIGGER_NONE, dev_name(dev), host); 1323 + IRQF_ONESHOT, dev_name(dev), host); 1324 1324 if (ret) 1325 1325 return dev_err_probe(dev, ret, "failed to register irq\n"); 1326 1326
+7 -4
drivers/spi/spi-sun6i.c
··· 795 795 static const struct of_device_id sun6i_spi_match[] = { 796 796 { .compatible = "allwinner,sun6i-a31-spi", .data = &sun6i_a31_spi_cfg }, 797 797 { .compatible = "allwinner,sun8i-h3-spi", .data = &sun8i_h3_spi_cfg }, 798 - { 799 - .compatible = "allwinner,sun50i-r329-spi", 800 - .data = &sun50i_r329_spi_cfg 801 - }, 798 + { .compatible = "allwinner,sun50i-r329-spi", .data = &sun50i_r329_spi_cfg }, 799 + /* 800 + * A523's SPI controller has a combined RX buffer + FIFO counter 801 + * at offset 0x400, instead of split buffer count in FIFO status 802 + * register. But in practice we only care about the FIFO level. 803 + */ 804 + { .compatible = "allwinner,sun55i-a523-spi", .data = &sun50i_r329_spi_cfg }, 802 805 {} 803 806 }; 804 807 MODULE_DEVICE_TABLE(of, sun6i_spi_match);
+2 -1
drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c
··· 503 503 { PCI_DEVICE_DATA(INTEL, WCL_THERMAL, PROC_THERMAL_FEATURE_MSI_SUPPORT | 504 504 PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_DLVR | 505 505 PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_WT_HINT | 506 - PROC_THERMAL_FEATURE_POWER_FLOOR | PROC_THERMAL_FEATURE_PTC) }, 506 + PROC_THERMAL_FEATURE_POWER_FLOOR | PROC_THERMAL_FEATURE_PTC | 507 + PROC_THERMAL_FEATURE_SOC_POWER_SLIDER) }, 507 508 { PCI_DEVICE_DATA(INTEL, NVL_H_THERMAL, PROC_THERMAL_FEATURE_RAPL | 508 509 PROC_THERMAL_FEATURE_DLVR | PROC_THERMAL_FEATURE_DVFS | 509 510 PROC_THERMAL_FEATURE_MSI_SUPPORT | PROC_THERMAL_FEATURE_WT_HINT |
+2 -2
drivers/thermal/thermal_core.c
··· 500 500 WRITE_ONCE(trip->hysteresis, hyst); 501 501 thermal_notify_tz_trip_change(tz, trip); 502 502 /* 503 - * If the zone temperature is above or at the trip tmperature, the trip 503 + * If the zone temperature is above or at the trip temperature, the trip 504 504 * is in the trips_reached list and its threshold is equal to its low 505 505 * temperature. It needs to stay in that list, but its threshold needs 506 506 * to be updated and the list ordering may need to be restored. ··· 1043 1043 * @np: a pointer to a device tree node. 1044 1044 * @type: the thermal cooling device type. 1045 1045 * @devdata: device private data. 1046 - * @ops: standard thermal cooling devices callbacks. 1046 + * @ops: standard thermal cooling devices callbacks. 1047 1047 * 1048 1048 * This interface function adds a new thermal cooling device (fan/processor/...) 1049 1049 * to /sys/class/thermal/ folder as cooling_device[0-*]. It tries to bind itself
+2 -2
drivers/tty/serial/8250/8250_loongson.c
··· 128 128 port->private_data = priv; 129 129 130 130 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &priv->res); 131 - if (!port->membase) 132 - return -ENOMEM; 131 + if (IS_ERR(port->membase)) 132 + return PTR_ERR(port->membase); 133 133 134 134 port->mapbase = priv->res->start; 135 135 port->mapsize = resource_size(priv->res);
+7 -4
drivers/tty/serial/serial_base_bus.c
··· 13 13 #include <linux/device.h> 14 14 #include <linux/idr.h> 15 15 #include <linux/module.h> 16 - #include <linux/of.h> 16 + #include <linux/property.h> 17 17 #include <linux/serial_core.h> 18 18 #include <linux/slab.h> 19 19 #include <linux/spinlock.h> ··· 60 60 driver_unregister(driver); 61 61 } 62 62 63 + /* On failure the caller must put device @dev with put_device() */ 63 64 static int serial_base_device_init(struct uart_port *port, 64 65 struct device *dev, 65 66 struct device *parent_dev, ··· 74 73 dev->parent = parent_dev; 75 74 dev->bus = &serial_base_bus_type; 76 75 dev->release = release; 77 - device_set_of_node_from_dev(dev, parent_dev); 76 + dev->of_node_reused = true; 77 + 78 + device_set_node(dev, fwnode_handle_get(dev_fwnode(parent_dev))); 78 79 79 80 if (!serial_base_initialized) { 80 81 dev_dbg(port->dev, "uart_add_one_port() called before arch_initcall()?\n"); ··· 97 94 { 98 95 struct serial_ctrl_device *ctrl_dev = to_serial_base_ctrl_device(dev); 99 96 100 - of_node_put(dev->of_node); 97 + fwnode_handle_put(dev_fwnode(dev)); 101 98 kfree(ctrl_dev); 102 99 } 103 100 ··· 145 142 { 146 143 struct serial_port_device *port_dev = to_serial_base_port_device(dev); 147 144 148 - of_node_put(dev->of_node); 145 + fwnode_handle_put(dev_fwnode(dev)); 149 146 kfree(port_dev); 150 147 } 151 148
+1 -1
drivers/tty/serial/sh-sci.c
··· 1914 1914 struct dma_tx_state state; 1915 1915 enum dma_status status; 1916 1916 1917 - if (!s->chan_tx) 1917 + if (!s->chan_tx || s->cookie_tx <= 0) 1918 1918 return; 1919 1919 1920 1920 status = dmaengine_tx_status(s->chan_tx, s->cookie_tx, &state);
+7 -7
drivers/tty/serial/xilinx_uartps.c
··· 428 428 struct tty_port *tport = &port->state->port; 429 429 unsigned int numbytes; 430 430 unsigned char ch; 431 + ktime_t rts_delay; 431 432 432 433 if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) { 433 434 /* Disable the TX Empty interrupt */ 434 435 writel(CDNS_UART_IXR_TXEMPTY, port->membase + CDNS_UART_IDR); 436 + /* Set RTS line after delay */ 437 + if (cdns_uart->port->rs485.flags & SER_RS485_ENABLED) { 438 + cdns_uart->tx_timer.function = &cdns_rs485_rx_callback; 439 + rts_delay = ns_to_ktime(cdns_calc_after_tx_delay(cdns_uart)); 440 + hrtimer_start(&cdns_uart->tx_timer, rts_delay, HRTIMER_MODE_REL); 441 + } 435 442 return; 436 443 } 437 444 ··· 455 448 456 449 /* Enable the TX Empty interrupt */ 457 450 writel(CDNS_UART_IXR_TXEMPTY, cdns_uart->port->membase + CDNS_UART_IER); 458 - 459 - if (cdns_uart->port->rs485.flags & SER_RS485_ENABLED && 460 - (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port))) { 461 - hrtimer_update_function(&cdns_uart->tx_timer, cdns_rs485_rx_callback); 462 - hrtimer_start(&cdns_uart->tx_timer, 463 - ns_to_ktime(cdns_calc_after_tx_delay(cdns_uart)), HRTIMER_MODE_REL); 464 - } 465 451 } 466 452 467 453 /**
+4 -1
drivers/ufs/core/ufshcd.c
··· 10359 10359 ret = ufshcd_setup_clocks(hba, false); 10360 10360 if (ret) { 10361 10361 ufshcd_enable_irq(hba); 10362 - return ret; 10362 + goto out; 10363 10363 } 10364 10364 if (ufshcd_is_clkgating_allowed(hba)) { 10365 10365 hba->clk_gating.state = CLKS_OFF; ··· 10371 10371 /* Put the host controller in low power mode if possible */ 10372 10372 ufshcd_hba_vreg_set_lpm(hba); 10373 10373 ufshcd_pm_qos_update(hba, false); 10374 + out: 10375 + if (ret) 10376 + ufshcd_update_evt_hist(hba, UFS_EVT_SUSPEND_ERR, (u32)ret); 10374 10377 return ret; 10375 10378 } 10376 10379
+4 -3
drivers/usb/dwc3/dwc3-of-simple.c
··· 70 70 simple->num_clocks = ret; 71 71 ret = clk_bulk_prepare_enable(simple->num_clocks, simple->clks); 72 72 if (ret) 73 - goto err_resetc_assert; 73 + goto err_clk_put_all; 74 74 75 75 ret = of_platform_populate(np, NULL, NULL, dev); 76 76 if (ret) 77 - goto err_clk_put; 77 + goto err_clk_disable; 78 78 79 79 pm_runtime_set_active(dev); 80 80 pm_runtime_enable(dev); ··· 82 82 83 83 return 0; 84 84 85 - err_clk_put: 85 + err_clk_disable: 86 86 clk_bulk_disable_unprepare(simple->num_clocks, simple->clks); 87 + err_clk_put_all: 87 88 clk_bulk_put_all(simple->num_clocks, simple->clks); 88 89 89 90 err_resetc_assert:
+1 -1
drivers/usb/dwc3/gadget.c
··· 4826 4826 if (!dwc->gadget) 4827 4827 return; 4828 4828 4829 - dwc3_enable_susphy(dwc, false); 4829 + dwc3_enable_susphy(dwc, true); 4830 4830 usb_del_gadget(dwc->gadget); 4831 4831 dwc3_gadget_free_endpoints(dwc); 4832 4832 usb_put_gadget(dwc->gadget);
+1 -1
drivers/usb/dwc3/host.c
··· 227 227 if (dwc->sys_wakeup) 228 228 device_init_wakeup(&dwc->xhci->dev, false); 229 229 230 - dwc3_enable_susphy(dwc, false); 230 + dwc3_enable_susphy(dwc, true); 231 231 platform_device_unregister(dwc->xhci); 232 232 dwc->xhci = NULL; 233 233 }
+25 -17
drivers/usb/gadget/udc/lpc32xx_udc.c
··· 3020 3020 pdev->dev.dma_mask = &lpc32xx_usbd_dmamask; 3021 3021 retval = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 3022 3022 if (retval) 3023 - return retval; 3023 + goto err_put_client; 3024 3024 3025 3025 udc->board = &lpc32xx_usbddata; 3026 3026 ··· 3038 3038 /* Get IRQs */ 3039 3039 for (i = 0; i < 4; i++) { 3040 3040 udc->udp_irq[i] = platform_get_irq(pdev, i); 3041 - if (udc->udp_irq[i] < 0) 3042 - return udc->udp_irq[i]; 3041 + if (udc->udp_irq[i] < 0) { 3042 + retval = udc->udp_irq[i]; 3043 + goto err_put_client; 3044 + } 3043 3045 } 3044 3046 3045 3047 udc->udp_baseaddr = devm_platform_ioremap_resource(pdev, 0); 3046 3048 if (IS_ERR(udc->udp_baseaddr)) { 3047 3049 dev_err(udc->dev, "IO map failure\n"); 3048 - return PTR_ERR(udc->udp_baseaddr); 3050 + retval = PTR_ERR(udc->udp_baseaddr); 3051 + goto err_put_client; 3049 3052 } 3050 3053 3051 3054 /* Get USB device clock */ 3052 3055 udc->usb_slv_clk = devm_clk_get(&pdev->dev, NULL); 3053 3056 if (IS_ERR(udc->usb_slv_clk)) { 3054 3057 dev_err(udc->dev, "failed to acquire USB device clock\n"); 3055 - return PTR_ERR(udc->usb_slv_clk); 3058 + retval = PTR_ERR(udc->usb_slv_clk); 3059 + goto err_put_client; 3056 3060 } 3057 3061 3058 3062 /* Enable USB device clock */ 3059 3063 retval = clk_prepare_enable(udc->usb_slv_clk); 3060 3064 if (retval < 0) { 3061 3065 dev_err(udc->dev, "failed to start USB device clock\n"); 3062 - return retval; 3066 + goto err_put_client; 3063 3067 } 3064 3068 3065 3069 /* Setup deferred workqueue data */ ··· 3084 3080 if (!udc->udca_v_base) { 3085 3081 dev_err(udc->dev, "error getting UDCA region\n"); 3086 3082 retval = -ENOMEM; 3087 - goto i2c_fail; 3083 + goto err_disable_clk; 3088 3084 } 3089 3085 udc->udca_p_base = dma_handle; 3090 3086 dev_dbg(udc->dev, "DMA buffer(0x%x bytes), P:0x%08x, V:0x%p\n", ··· 3097 3093 if (!udc->dd_cache) { 3098 3094 dev_err(udc->dev, "error getting DD DMA region\n"); 3099 3095 retval = -ENOMEM; 3100 - goto dma_alloc_fail; 3096 + goto err_free_dma; 3101 3097 } 3102 3098 3103 3099 /* Clear USB peripheral and initialize gadget endpoints */ ··· 3111 3107 if (retval < 0) { 3112 3108 dev_err(udc->dev, "LP request irq %d failed\n", 3113 3109 udc->udp_irq[IRQ_USB_LP]); 3114 - goto irq_req_fail; 3110 + goto err_destroy_pool; 3115 3111 } 3116 3112 retval = devm_request_irq(dev, udc->udp_irq[IRQ_USB_HP], 3117 3113 lpc32xx_usb_hp_irq, 0, "udc_hp", udc); 3118 3114 if (retval < 0) { 3119 3115 dev_err(udc->dev, "HP request irq %d failed\n", 3120 3116 udc->udp_irq[IRQ_USB_HP]); 3121 - goto irq_req_fail; 3117 + goto err_destroy_pool; 3122 3118 } 3123 3119 3124 3120 retval = devm_request_irq(dev, udc->udp_irq[IRQ_USB_DEVDMA], ··· 3126 3122 if (retval < 0) { 3127 3123 dev_err(udc->dev, "DEV request irq %d failed\n", 3128 3124 udc->udp_irq[IRQ_USB_DEVDMA]); 3129 - goto irq_req_fail; 3125 + goto err_destroy_pool; 3130 3126 } 3131 3127 3132 3128 /* The transceiver interrupt is used for VBUS detection and will ··· 3137 3133 if (retval < 0) { 3138 3134 dev_err(udc->dev, "VBUS request irq %d failed\n", 3139 3135 udc->udp_irq[IRQ_USB_ATX]); 3140 - goto irq_req_fail; 3136 + goto err_destroy_pool; 3141 3137 } 3142 3138 3143 3139 /* Initialize wait queue */ ··· 3146 3142 3147 3143 retval = usb_add_gadget_udc(dev, &udc->gadget); 3148 3144 if (retval < 0) 3149 - goto add_gadget_fail; 3145 + goto err_destroy_pool; 3150 3146 3151 3147 dev_set_drvdata(dev, udc); 3152 3148 device_init_wakeup(dev, 1); ··· 3158 3154 dev_info(udc->dev, "%s version %s\n", driver_name, DRIVER_VERSION); 3159 3155 return 0; 3160 3156 3161 - add_gadget_fail: 3162 - irq_req_fail: 3157 + err_destroy_pool: 3163 3158 dma_pool_destroy(udc->dd_cache); 3164 - dma_alloc_fail: 3159 + err_free_dma: 3165 3160 dma_free_coherent(&pdev->dev, UDCA_BUFF_SIZE, 3166 3161 udc->udca_v_base, udc->udca_p_base); 3167 - i2c_fail: 3162 + err_disable_clk: 3168 3163 clk_disable_unprepare(udc->usb_slv_clk); 3164 + err_put_client: 3165 + put_device(&udc->isp1301_i2c_client->dev); 3166 + 3169 3167 dev_err(udc->dev, "%s probe failed, %d\n", driver_name, retval); 3170 3168 3171 3169 return retval; ··· 3196 3190 udc->udca_v_base, udc->udca_p_base); 3197 3191 3198 3192 clk_disable_unprepare(udc->usb_slv_clk); 3193 + 3194 + put_device(&udc->isp1301_i2c_client->dev); 3199 3195 } 3200 3196 3201 3197 #ifdef CONFIG_PM
+10 -8
drivers/usb/host/ohci-nxp.c
··· 169 169 170 170 ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 171 171 if (ret) 172 - goto fail_disable; 172 + goto err_put_client; 173 173 174 174 dev_dbg(&pdev->dev, "%s: " DRIVER_DESC " (nxp)\n", hcd_name); 175 175 if (usb_disabled()) { 176 176 dev_err(&pdev->dev, "USB is disabled\n"); 177 177 ret = -ENODEV; 178 - goto fail_disable; 178 + goto err_put_client; 179 179 } 180 180 181 181 /* Enable USB host clock */ ··· 183 183 if (IS_ERR(usb_host_clk)) { 184 184 dev_err(&pdev->dev, "failed to acquire and start USB OHCI clock\n"); 185 185 ret = PTR_ERR(usb_host_clk); 186 - goto fail_disable; 186 + goto err_put_client; 187 187 } 188 188 189 189 isp1301_configure(); ··· 192 192 if (!hcd) { 193 193 dev_err(&pdev->dev, "Failed to allocate HC buffer\n"); 194 194 ret = -ENOMEM; 195 - goto fail_disable; 195 + goto err_put_client; 196 196 } 197 197 198 198 hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 199 199 if (IS_ERR(hcd->regs)) { 200 200 ret = PTR_ERR(hcd->regs); 201 - goto fail_resource; 201 + goto err_put_hcd; 202 202 } 203 203 hcd->rsrc_start = res->start; 204 204 hcd->rsrc_len = resource_size(res); ··· 206 206 irq = platform_get_irq(pdev, 0); 207 207 if (irq < 0) { 208 208 ret = -ENXIO; 209 - goto fail_resource; 209 + goto err_put_hcd; 210 210 } 211 211 212 212 ohci_nxp_start_hc(); ··· 220 220 } 221 221 222 222 ohci_nxp_stop_hc(); 223 - fail_resource: 223 + err_put_hcd: 224 224 usb_put_hcd(hcd); 225 - fail_disable: 225 + err_put_client: 226 + put_device(&isp1301_i2c_client->dev); 226 227 isp1301_i2c_client = NULL; 227 228 return ret; 228 229 } ··· 235 234 usb_remove_hcd(hcd); 236 235 ohci_nxp_stop_hc(); 237 236 usb_put_hcd(hcd); 237 + put_device(&isp1301_i2c_client->dev); 238 238 isp1301_i2c_client = NULL; 239 239 } 240 240
+1 -1
drivers/usb/host/xhci-dbgtty.c
··· 554 554 * Hang up the TTY. This wakes up any blocked 555 555 * writers and causes subsequent writes to fail. 556 556 */ 557 - tty_vhangup(port->port.tty); 557 + tty_port_tty_vhangup(&port->port); 558 558 559 559 tty_unregister_device(dbc_tty_driver, port->minor); 560 560 xhci_dbc_tty_exit_port(port);
+1
drivers/usb/phy/phy-fsl-usb.c
··· 988 988 { 989 989 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); 990 990 991 + disable_delayed_work_sync(&fsl_otg_dev->otg_event); 991 992 usb_remove_phy(&fsl_otg_dev->phy); 992 993 free_irq(fsl_otg_dev->irq, fsl_otg_dev); 993 994
+6 -1
drivers/usb/phy/phy-isp1301.c
··· 149 149 return client; 150 150 151 151 /* non-DT: only one ISP1301 chip supported */ 152 - return isp1301_i2c_client; 152 + if (isp1301_i2c_client) { 153 + get_device(&isp1301_i2c_client->dev); 154 + return isp1301_i2c_client; 155 + } 156 + 157 + return NULL; 153 158 } 154 159 EXPORT_SYMBOL_GPL(isp1301_get_client); 155 160
+2
drivers/usb/renesas_usbhs/pipe.c
··· 713 713 /* make sure pipe is not busy */ 714 714 ret = usbhsp_pipe_barrier(pipe); 715 715 if (ret < 0) { 716 + usbhsp_put_pipe(pipe); 716 717 dev_err(dev, "pipe setup failed %d\n", usbhs_pipe_number(pipe)); 717 718 return NULL; 718 719 } 719 720 720 721 if (usbhsp_setup_pipecfg(pipe, is_host, dir_in, &pipecfg)) { 722 + usbhsp_put_pipe(pipe); 721 723 dev_err(dev, "can't setup pipe\n"); 722 724 return NULL; 723 725 }
+1 -1
drivers/usb/storage/unusual_uas.h
··· 98 98 US_FL_NO_ATA_1X), 99 99 100 100 /* Reported-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> */ 101 - UNUSUAL_DEV(0x13fd, 0x3940, 0x0309, 0x0309, 101 + UNUSUAL_DEV(0x13fd, 0x3940, 0x0000, 0x0309, 102 102 "Initio Corporation", 103 103 "INIC-3069", 104 104 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
+6 -2
drivers/usb/typec/altmodes/displayport.c
··· 766 766 if (!(DP_CAP_PIN_ASSIGN_DFP_D(port->vdo) & 767 767 DP_CAP_PIN_ASSIGN_UFP_D(alt->vdo)) && 768 768 !(DP_CAP_PIN_ASSIGN_UFP_D(port->vdo) & 769 - DP_CAP_PIN_ASSIGN_DFP_D(alt->vdo))) 769 + DP_CAP_PIN_ASSIGN_DFP_D(alt->vdo))) { 770 + typec_altmode_put_plug(plug); 770 771 return -ENODEV; 772 + } 771 773 772 774 dp = devm_kzalloc(&alt->dev, sizeof(*dp), GFP_KERNEL); 773 - if (!dp) 775 + if (!dp) { 776 + typec_altmode_put_plug(plug); 774 777 return -ENOMEM; 778 + } 775 779 776 780 INIT_WORK(&dp->work, dp_altmode_work); 777 781 mutex_init(&dp->lock);
+1
drivers/usb/typec/ucsi/Kconfig
··· 96 96 config UCSI_HUAWEI_GAOKUN 97 97 tristate "UCSI Interface Driver for Huawei Matebook E Go" 98 98 depends on EC_HUAWEI_GAOKUN 99 + depends on DRM || !DRM 99 100 select DRM_AUX_HPD_BRIDGE if DRM_BRIDGE && OF 100 101 help 101 102 This driver enables UCSI support on the Huawei Matebook E Go tablet,
+3 -2
drivers/usb/typec/ucsi/cros_ec_ucsi.c
··· 105 105 return 0; 106 106 } 107 107 108 - static int cros_ucsi_sync_control(struct ucsi *ucsi, u64 cmd, u32 *cci) 108 + static int cros_ucsi_sync_control(struct ucsi *ucsi, u64 cmd, u32 *cci, 109 + void *data, size_t size) 109 110 { 110 111 struct cros_ucsi_data *udata = ucsi_get_drvdata(ucsi); 111 112 int ret; 112 113 113 - ret = ucsi_sync_control_common(ucsi, cmd, cci); 114 + ret = ucsi_sync_control_common(ucsi, cmd, cci, data, size); 114 115 switch (ret) { 115 116 case -EBUSY: 116 117 /* EC may return -EBUSY if CCI.busy is set.
+4 -32
drivers/usb/typec/ucsi/debugfs.c
··· 37 37 case UCSI_SET_USB: 38 38 case UCSI_SET_POWER_LEVEL: 39 39 case UCSI_READ_POWER_LEVEL: 40 - case UCSI_SET_PDOS: 41 - ucsi->message_in_size = 0; 42 - ret = ucsi_send_command(ucsi, val); 40 + ret = ucsi_send_command(ucsi, val, NULL, 0); 43 41 break; 44 42 case UCSI_GET_CAPABILITY: 45 43 case UCSI_GET_CONNECTOR_CAPABILITY: ··· 52 54 case UCSI_GET_ATTENTION_VDO: 53 55 case UCSI_GET_CAM_CS: 54 56 case UCSI_GET_LPM_PPM_INFO: 55 - ucsi->message_in_size = sizeof(ucsi->debugfs->response); 56 - ret = ucsi_send_command(ucsi, val); 57 - memcpy(&ucsi->debugfs->response, ucsi->message_in, sizeof(ucsi->debugfs->response)); 57 + ret = ucsi_send_command(ucsi, val, 58 + &ucsi->debugfs->response, 59 + sizeof(ucsi->debugfs->response)); 58 60 break; 59 61 default: 60 62 ret = -EOPNOTSUPP; ··· 109 111 } 110 112 DEFINE_SHOW_ATTRIBUTE(ucsi_vbus_volt); 111 113 112 - static ssize_t ucsi_message_out_write(struct file *file, 113 - const char __user *data, size_t count, loff_t *ppos) 114 - { 115 - struct ucsi *ucsi = file->private_data; 116 - int ret; 117 - 118 - char *buf __free(kfree) = memdup_user_nul(data, count); 119 - if (IS_ERR(buf)) 120 - return PTR_ERR(buf); 121 - 122 - ucsi->message_out_size = min(count / 2, UCSI_MAX_MESSAGE_OUT_LENGTH); 123 - ret = hex2bin(ucsi->message_out, buf, ucsi->message_out_size); 124 - if (ret) 125 - return ret; 126 - 127 - return count; 128 - } 129 - 130 - static const struct file_operations ucsi_message_out_fops = { 131 - .open = simple_open, 132 - .write = ucsi_message_out_write, 133 - .llseek = generic_file_llseek, 134 - }; 135 - 136 114 void ucsi_debugfs_register(struct ucsi *ucsi) 137 115 { 138 116 ucsi->debugfs = kzalloc(sizeof(*ucsi->debugfs), GFP_KERNEL); ··· 121 147 debugfs_create_file("peak_current", 0400, ucsi->debugfs->dentry, ucsi, &ucsi_peak_curr_fops); 122 148 debugfs_create_file("avg_current", 0400, ucsi->debugfs->dentry, ucsi, &ucsi_avg_curr_fops); 123 149 debugfs_create_file("vbus_voltage", 0400, ucsi->debugfs->dentry, ucsi, &ucsi_vbus_volt_fops); 124 - debugfs_create_file("message_out", 0200, ucsi->debugfs->dentry, ucsi, 125 - &ucsi_message_out_fops); 126 150 } 127 151 128 152 void ucsi_debugfs_unregister(struct ucsi *ucsi)
+3 -8
drivers/usb/typec/ucsi/displayport.c
··· 67 67 } 68 68 69 69 command = UCSI_GET_CURRENT_CAM | UCSI_CONNECTOR_NUMBER(dp->con->num); 70 - ucsi->message_in_size = sizeof(cur); 71 - ret = ucsi_send_command(ucsi, command); 70 + ret = ucsi_send_command(ucsi, command, &cur, sizeof(cur)); 72 71 if (ret < 0) { 73 72 if (ucsi->version > 0x0100) 74 73 goto err_unlock; 75 74 cur = 0xff; 76 - } else { 77 - memcpy(&cur, ucsi->message_in, ucsi->message_in_size); 78 75 } 79 76 80 77 if (cur != 0xff) { ··· 126 129 } 127 130 128 131 command = UCSI_CMD_SET_NEW_CAM(dp->con->num, 0, dp->offset, 0); 129 - dp->con->ucsi->message_in_size = 0; 130 - ret = ucsi_send_command(dp->con->ucsi, command); 132 + ret = ucsi_send_command(dp->con->ucsi, command, NULL, 0); 131 133 if (ret < 0) 132 134 goto out_unlock; 133 135 ··· 193 197 194 198 command = UCSI_CMD_SET_NEW_CAM(dp->con->num, 1, dp->offset, pins); 195 199 196 - dp->con->ucsi->message_in_size = 0; 197 - return ucsi_send_command(dp->con->ucsi, command); 200 + return ucsi_send_command(dp->con->ucsi, command, NULL, 0); 198 201 } 199 202 200 203 static int ucsi_displayport_vdm(struct typec_altmode *alt,
+36 -82
drivers/usb/typec/ucsi/ucsi.c
··· 55 55 } 56 56 EXPORT_SYMBOL_GPL(ucsi_notify_common); 57 57 58 - int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci) 58 + int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci, 59 + void *data, size_t size) 59 60 { 60 61 bool ack = UCSI_COMMAND(command) == UCSI_ACK_CC_CI; 61 62 int ret; ··· 67 66 set_bit(COMMAND_PENDING, &ucsi->flags); 68 67 69 68 reinit_completion(&ucsi->complete); 70 - 71 - if (ucsi->message_out_size > 0) { 72 - if (!ucsi->ops->write_message_out) { 73 - ucsi->message_out_size = 0; 74 - ret = -EOPNOTSUPP; 75 - goto out_clear_bit; 76 - } 77 - 78 - ret = ucsi->ops->write_message_out(ucsi, ucsi->message_out, 79 - ucsi->message_out_size); 80 - ucsi->message_out_size = 0; 81 - if (ret) 82 - goto out_clear_bit; 83 - } 84 69 85 70 ret = ucsi->ops->async_control(ucsi, command); 86 71 if (ret) ··· 84 97 if (!ret && cci) 85 98 ret = ucsi->ops->read_cci(ucsi, cci); 86 99 87 - if (!ret && ucsi->message_in_size > 0 && 100 + if (!ret && data && 88 101 (*cci & UCSI_CCI_COMMAND_COMPLETE)) 89 - ret = ucsi->ops->read_message_in(ucsi, ucsi->message_in, 90 - ucsi->message_in_size); 102 + ret = ucsi->ops->read_message_in(ucsi, data, size); 91 103 92 104 return ret; 93 105 } ··· 103 117 ctrl |= UCSI_ACK_CONNECTOR_CHANGE; 104 118 } 105 119 106 - ucsi->message_in_size = 0; 107 - return ucsi->ops->sync_control(ucsi, ctrl, NULL); 120 + return ucsi->ops->sync_control(ucsi, ctrl, NULL, NULL, 0); 108 121 } 109 122 110 - static int ucsi_run_command(struct ucsi *ucsi, u64 command, u32 *cci, bool conn_ack) 123 + static int ucsi_run_command(struct ucsi *ucsi, u64 command, u32 *cci, 124 + void *data, size_t size, bool conn_ack) 111 125 { 112 126 int ret, err; 113 127 114 128 *cci = 0; 115 129 116 - if (ucsi->message_in_size > UCSI_MAX_DATA_LENGTH(ucsi)) 130 + if (size > UCSI_MAX_DATA_LENGTH(ucsi)) 117 131 return -EINVAL; 118 132 119 - ret = ucsi->ops->sync_control(ucsi, command, cci); 133 + ret = ucsi->ops->sync_control(ucsi, command, cci, data, size); 120 134 121 - if (*cci & UCSI_CCI_BUSY) { 122 - ucsi->message_in_size = 0; 123 - return ucsi_run_command(ucsi, UCSI_CANCEL, cci, false) ?: -EBUSY; 124 - } 135 + if (*cci & UCSI_CCI_BUSY) 136 + return ucsi_run_command(ucsi, UCSI_CANCEL, cci, NULL, 0, false) ?: -EBUSY; 125 137 if (ret) 126 138 return ret; 127 139 ··· 151 167 int ret; 152 168 153 169 command = UCSI_GET_ERROR_STATUS | UCSI_CONNECTOR_NUMBER(connector_num); 154 - ucsi->message_in_size = sizeof(error); 155 - ret = ucsi_run_command(ucsi, command, &cci, false); 170 + ret = ucsi_run_command(ucsi, command, &cci, &error, sizeof(error), false); 156 171 if (ret < 0) 157 172 return ret; 158 - 159 - memcpy(&error, ucsi->message_in, sizeof(error)); 160 173 161 174 switch (error) { 162 175 case UCSI_ERROR_INCOMPATIBLE_PARTNER: ··· 200 219 return -EIO; 201 220 } 202 221 203 - static int ucsi_send_command_common(struct ucsi *ucsi, u64 cmd, bool conn_ack) 222 + static int ucsi_send_command_common(struct ucsi *ucsi, u64 cmd, 223 + void *data, size_t size, bool conn_ack) 204 224 { 205 225 u8 connector_num; 206 226 u32 cci; ··· 229 247 230 248 mutex_lock(&ucsi->ppm_lock); 231 249 232 - ret = ucsi_run_command(ucsi, cmd, &cci, conn_ack); 250 + ret = ucsi_run_command(ucsi, cmd, &cci, data, size, conn_ack); 233 251 234 252 if (cci & UCSI_CCI_ERROR) 235 253 ret = ucsi_read_error(ucsi, connector_num); ··· 238 256 return ret; 239 257 } 240 258 241 - int ucsi_send_command(struct ucsi *ucsi, u64 command) 259 + int ucsi_send_command(struct ucsi *ucsi, u64 command, 260 + void *data, size_t size) 242 261 { 243 - return ucsi_send_command_common(ucsi, command, false); 262 + return ucsi_send_command_common(ucsi, command, data, size, false); 244 263 } 245 264 EXPORT_SYMBOL_GPL(ucsi_send_command); 246 265 ··· 319 336 int i; 320 337 321 338 command = UCSI_GET_CURRENT_CAM | UCSI_CONNECTOR_NUMBER(con->num); 322 - con->ucsi->message_in_size = sizeof(cur); 323 - ret = ucsi_send_command(con->ucsi, command); 339 + ret = ucsi_send_command(con->ucsi, command, &cur, sizeof(cur)); 324 340 if (ret < 0) { 325 341 if (con->ucsi->version > 0x0100) { 326 342 dev_err(con->ucsi->dev, ··· 327 345 return; 328 346 } 329 347 cur = 0xff; 330 - } else { 331 - memcpy(&cur, con->ucsi->message_in, sizeof(cur)); 332 348 } 333 349 334 350 if (cur < UCSI_MAX_ALTMODES) ··· 510 530 command |= UCSI_GET_ALTMODE_RECIPIENT(recipient); 511 531 command |= UCSI_GET_ALTMODE_CONNECTOR_NUMBER(con->num); 512 532 command |= UCSI_GET_ALTMODE_OFFSET(i); 513 - ucsi->message_in_size = sizeof(alt); 514 - len = ucsi_send_command(con->ucsi, command); 533 + len = ucsi_send_command(con->ucsi, command, &alt, sizeof(alt)); 515 534 /* 516 535 * We are collecting all altmodes first and then registering. 517 536 * Some type-C device will return zero length data beyond last ··· 518 539 */ 519 540 if (len < 0) 520 541 return len; 521 - 522 - memcpy(&alt, ucsi->message_in, sizeof(alt)); 523 542 524 543 /* We got all altmodes, now break out and register them */ 525 544 if (!len || !alt.svid) ··· 586 609 command |= UCSI_GET_ALTMODE_RECIPIENT(recipient); 587 610 command |= UCSI_GET_ALTMODE_CONNECTOR_NUMBER(con->num); 588 611 command |= UCSI_GET_ALTMODE_OFFSET(i); 589 - con->ucsi->message_in_size = sizeof(alt); 590 - len = ucsi_send_command(con->ucsi, command); 612 + len = ucsi_send_command(con->ucsi, command, alt, sizeof(alt)); 591 613 if (len == -EBUSY) 592 614 continue; 593 615 if (len <= 0) 594 616 return len; 595 - 596 - memcpy(&alt, con->ucsi->message_in, sizeof(alt)); 597 617 598 618 /* 599 619 * This code is requesting one alt mode at a time, but some PPMs ··· 659 685 UCSI_MAX_DATA_LENGTH(con->ucsi)); 660 686 int ret; 661 687 662 - con->ucsi->message_in_size = size; 663 - ret = ucsi_send_command_common(con->ucsi, command, conn_ack); 664 - memcpy(&con->status, con->ucsi->message_in, size); 688 + ret = ucsi_send_command_common(con->ucsi, command, &con->status, size, conn_ack); 665 689 666 690 return ret < 0 ? ret : 0; 667 691 } ··· 682 710 command |= UCSI_GET_PDOS_PDO_OFFSET(offset); 683 711 command |= UCSI_GET_PDOS_NUM_PDOS(num_pdos - 1); 684 712 command |= is_source(role) ? UCSI_GET_PDOS_SRC_PDOS : 0; 685 - ucsi->message_in_size = num_pdos * sizeof(u32); 686 - ret = ucsi_send_command(ucsi, command); 687 - memcpy(pdos + offset, ucsi->message_in, num_pdos * sizeof(u32)); 713 + ret = ucsi_send_command(ucsi, command, pdos + offset, 714 + num_pdos * sizeof(u32)); 688 715 if (ret < 0 && ret != -ETIMEDOUT) 689 716 dev_err(ucsi->dev, "UCSI_GET_PDOS failed (%d)\n", ret); 690 717 ··· 770 799 command |= UCSI_GET_PD_MESSAGE_BYTES(len); 771 800 command |= UCSI_GET_PD_MESSAGE_TYPE(type); 772 801 773 - con->ucsi->message_in_size = len; 774 - ret = ucsi_send_command(con->ucsi, command); 775 - memcpy(data + offset, con->ucsi->message_in, len); 802 + ret = ucsi_send_command(con->ucsi, command, data + offset, len); 776 803 if (ret < 0) 777 804 return ret; 778 805 } ··· 935 966 int ret; 936 967 937 968 command = UCSI_GET_CABLE_PROPERTY | UCSI_CONNECTOR_NUMBER(con->num); 938 - con->ucsi->message_in_size = sizeof(cable_prop); 939 - ret = ucsi_send_command(con->ucsi, command); 940 - memcpy(&cable_prop, con->ucsi->message_in, sizeof(cable_prop)); 969 + ret = ucsi_send_command(con->ucsi, command, &cable_prop, sizeof(cable_prop)); 941 970 if (ret < 0) { 942 971 dev_err(con->ucsi->dev, "GET_CABLE_PROPERTY failed (%d)\n", ret); 943 972 return ret; ··· 996 1029 return 0; 997 1030 998 1031 command = UCSI_GET_CONNECTOR_CAPABILITY | UCSI_CONNECTOR_NUMBER(con->num); 999 - con->ucsi->message_in_size = sizeof(con->cap); 1000 - ret = ucsi_send_command(con->ucsi, command); 1001 - memcpy(&con->cap, con->ucsi->message_in, sizeof(con->cap)); 1032 + ret = ucsi_send_command(con->ucsi, command, &con->cap, sizeof(con->cap)); 1002 1033 if (ret < 0) { 1003 1034 dev_err(con->ucsi->dev, "GET_CONNECTOR_CAPABILITY failed (%d)\n", ret); 1004 1035 return ret; ··· 1380 1415 else if (con->ucsi->version >= UCSI_VERSION_2_0) 1381 1416 command |= hard ? 0 : UCSI_CONNECTOR_RESET_DATA_VER_2_0; 1382 1417 1383 - con->ucsi->message_in_size = 0; 1384 - return ucsi_send_command(con->ucsi, command); 1418 + return ucsi_send_command(con->ucsi, command, NULL, 0); 1385 1419 } 1386 1420 1387 1421 static int ucsi_reset_ppm(struct ucsi *ucsi) ··· 1461 1497 { 1462 1498 int ret; 1463 1499 1464 - con->ucsi->message_in_size = 0; 1465 - ret = ucsi_send_command(con->ucsi, command); 1500 + ret = ucsi_send_command(con->ucsi, command, NULL, 0); 1466 1501 if (ret == -ETIMEDOUT) { 1467 1502 u64 c; 1468 1503 ··· 1469 1506 ucsi_reset_ppm(con->ucsi); 1470 1507 1471 1508 c = UCSI_SET_NOTIFICATION_ENABLE | con->ucsi->ntfy; 1472 - con->ucsi->message_in_size = 0; 1473 - ucsi_send_command(con->ucsi, c); 1509 + ucsi_send_command(con->ucsi, c, NULL, 0); 1474 1510 1475 1511 ucsi_reset_connector(con, true); 1476 1512 } ··· 1622 1660 /* Get connector capability */ 1623 1661 command = UCSI_GET_CONNECTOR_CAPABILITY; 1624 1662 command |= UCSI_CONNECTOR_NUMBER(con->num); 1625 - ucsi->message_in_size = sizeof(con->cap); 1626 - ret = ucsi_send_command(ucsi, command); 1663 + ret = ucsi_send_command(ucsi, command, &con->cap, sizeof(con->cap)); 1627 1664 if (ret < 0) 1628 1665 goto out_unlock; 1629 - 1630 - memcpy(&con->cap, ucsi->message_in, sizeof(con->cap)); 1631 1666 1632 1667 if (UCSI_CONCAP(con, OPMODE_DRP)) 1633 1668 cap->data = TYPEC_PORT_DRD; ··· 1822 1863 /* Enable basic notifications */ 1823 1864 ntfy = UCSI_ENABLE_NTFY_CMD_COMPLETE | UCSI_ENABLE_NTFY_ERROR; 1824 1865 command = UCSI_SET_NOTIFICATION_ENABLE | ntfy; 1825 - ucsi->message_in_size = 0; 1826 - ret = ucsi_send_command(ucsi, command); 1866 + ret = ucsi_send_command(ucsi, command, NULL, 0); 1827 1867 if (ret < 0) 1828 1868 goto err_reset; 1829 1869 1830 1870 /* Get PPM capabilities */ 1831 1871 command = UCSI_GET_CAPABILITY; 1832 - ucsi->message_in_size = BITS_TO_BYTES(UCSI_GET_CAPABILITY_SIZE); 1833 - ret = ucsi_send_command(ucsi, command); 1872 + ret = ucsi_send_command(ucsi, command, &ucsi->cap, 1873 + BITS_TO_BYTES(UCSI_GET_CAPABILITY_SIZE)); 1834 1874 if (ret < 0) 1835 1875 goto err_reset; 1836 - 1837 - memcpy(&ucsi->cap, ucsi->message_in, BITS_TO_BYTES(UCSI_GET_CAPABILITY_SIZE)); 1838 1876 1839 1877 if (!ucsi->cap.num_connectors) { 1840 1878 ret = -ENODEV; ··· 1862 1906 /* Enable all supported notifications */ 1863 1907 ntfy = ucsi_get_supported_notifications(ucsi); 1864 1908 command = UCSI_SET_NOTIFICATION_ENABLE | ntfy; 1865 - ucsi->message_in_size = 0; 1866 - ret = ucsi_send_command(ucsi, command); 1909 + ret = ucsi_send_command(ucsi, command, NULL, 0); 1867 1910 if (ret < 0) 1868 1911 goto err_unregister; 1869 1912 ··· 1913 1958 1914 1959 /* Restore UCSI notification enable mask after system resume */ 1915 1960 command = UCSI_SET_NOTIFICATION_ENABLE | ucsi->ntfy; 1916 - ucsi->message_in_size = 0; 1917 - ret = ucsi_send_command(ucsi, command); 1961 + ret = ucsi_send_command(ucsi, command, NULL, 0); 1918 1962 if (ret < 0) { 1919 1963 dev_err(ucsi->dev, "failed to re-enable notifications (%d)\n", ret); 1920 1964 return;
+6 -16
drivers/usb/typec/ucsi/ucsi.h
··· 29 29 #define UCSI_MESSAGE_OUT 32 30 30 #define UCSIv2_MESSAGE_OUT 272 31 31 32 - /* Define maximum lengths for message buffers */ 33 - #define UCSI_MAX_MESSAGE_IN_LENGTH 256 34 - #define UCSI_MAX_MESSAGE_OUT_LENGTH 256 35 - 36 32 /* UCSI versions */ 37 33 #define UCSI_VERSION_1_0 0x0100 38 34 #define UCSI_VERSION_1_1 0x0110 ··· 65 69 * @read_cci: Read CCI register 66 70 * @poll_cci: Read CCI register while polling with notifications disabled 67 71 * @read_message_in: Read message data from UCSI 68 - * @write_message_out: Write message data to UCSI 69 72 * @sync_control: Blocking control operation 70 73 * @async_control: Non-blocking control operation 71 74 * @update_altmodes: Squashes duplicate DP altmodes ··· 80 85 int (*read_cci)(struct ucsi *ucsi, u32 *cci); 81 86 int (*poll_cci)(struct ucsi *ucsi, u32 *cci); 82 87 int (*read_message_in)(struct ucsi *ucsi, void *val, size_t val_len); 83 - int (*write_message_out)(struct ucsi *ucsi, void *data, size_t data_len); 84 - int (*sync_control)(struct ucsi *ucsi, u64 command, u32 *cci); 88 + int (*sync_control)(struct ucsi *ucsi, u64 command, u32 *cci, 89 + void *data, size_t size); 85 90 int (*async_control)(struct ucsi *ucsi, u64 command); 86 91 bool (*update_altmodes)(struct ucsi *ucsi, u8 recipient, 87 92 struct ucsi_altmode *orig, ··· 132 137 #define UCSI_GET_PD_MESSAGE 0x15 133 138 #define UCSI_GET_CAM_CS 0x18 134 139 #define UCSI_SET_SINK_PATH 0x1c 135 - #define UCSI_SET_PDOS 0x1d 136 140 #define UCSI_READ_POWER_LEVEL 0x1e 137 141 #define UCSI_SET_USB 0x21 138 142 #define UCSI_GET_LPM_PPM_INFO 0x22 ··· 493 499 unsigned long quirks; 494 500 #define UCSI_NO_PARTNER_PDOS BIT(0) /* Don't read partner's PDOs */ 495 501 #define UCSI_DELAY_DEVICE_PDOS BIT(1) /* Reading PDOs fails until the parter is in PD mode */ 496 - 497 - /* Fixed-size buffers for incoming and outgoing messages */ 498 - u8 message_in[UCSI_MAX_MESSAGE_IN_LENGTH]; 499 - size_t message_in_size; 500 - u8 message_out[UCSI_MAX_MESSAGE_OUT_LENGTH]; 501 - size_t message_out_size; 502 502 }; 503 503 504 504 #define UCSI_MAX_DATA_LENGTH(u) (((u)->version < UCSI_VERSION_2_0) ? 0x10 : 0xff) ··· 555 567 struct usb_pd_identity cable_identity; 556 568 }; 557 569 558 - int ucsi_send_command(struct ucsi *ucsi, u64 command); 570 + int ucsi_send_command(struct ucsi *ucsi, u64 command, 571 + void *retval, size_t size); 559 572 560 573 void ucsi_altmode_update_active(struct ucsi_connector *con); 561 574 int ucsi_resume(struct ucsi *ucsi); 562 575 563 576 void ucsi_notify_common(struct ucsi *ucsi, u32 cci); 564 - int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci); 577 + int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci, 578 + void *data, size_t size); 565 579 566 580 #if IS_ENABLED(CONFIG_POWER_SUPPLY) 567 581 int ucsi_register_port_psy(struct ucsi_connector *con);
+5 -20
drivers/usb/typec/ucsi/ucsi_acpi.c
··· 86 86 return 0; 87 87 } 88 88 89 - static int ucsi_acpi_write_message_out(struct ucsi *ucsi, void *data, size_t data_len) 90 - { 91 - struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi); 92 - 93 - if (!data || !data_len) 94 - return -EINVAL; 95 - 96 - if (ucsi->version <= UCSI_VERSION_1_2) 97 - memcpy(ua->base + UCSI_MESSAGE_OUT, data, data_len); 98 - else 99 - memcpy(ua->base + UCSIv2_MESSAGE_OUT, data, data_len); 100 - 101 - return 0; 102 - } 103 - 104 89 static int ucsi_acpi_async_control(struct ucsi *ucsi, u64 command) 105 90 { 106 91 struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi); ··· 101 116 .read_cci = ucsi_acpi_read_cci, 102 117 .poll_cci = ucsi_acpi_poll_cci, 103 118 .read_message_in = ucsi_acpi_read_message_in, 104 - .write_message_out = ucsi_acpi_write_message_out, 105 119 .sync_control = ucsi_sync_control_common, 106 120 .async_control = ucsi_acpi_async_control 107 121 }; 108 122 109 - static int ucsi_gram_sync_control(struct ucsi *ucsi, u64 command, u32 *cci) 123 + static int ucsi_gram_sync_control(struct ucsi *ucsi, u64 command, u32 *cci, 124 + void *val, size_t len) 110 125 { 111 126 u16 bogus_change = UCSI_CONSTAT_POWER_LEVEL_CHANGE | 112 127 UCSI_CONSTAT_PDOS_CHANGE; 113 128 struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi); 114 129 int ret; 115 130 116 - ret = ucsi_sync_control_common(ucsi, command, cci); 131 + ret = ucsi_sync_control_common(ucsi, command, cci, val, len); 117 132 if (ret < 0) 118 133 return ret; 119 134 ··· 125 140 if (UCSI_COMMAND(ua->cmd) == UCSI_GET_CONNECTOR_STATUS && 126 141 ua->check_bogus_event) { 127 142 /* Clear the bogus change */ 128 - if (*(u16 *)ucsi->message_in == bogus_change) 129 - *(u16 *)ucsi->message_in = 0; 143 + if (*(u16 *)val == bogus_change) 144 + *(u16 *)val = 0; 130 145 131 146 ua->check_bogus_event = false; 132 147 }
+6 -5
drivers/usb/typec/ucsi/ucsi_ccg.c
··· 606 606 return ccg_write(uc, reg, (u8 *)&command, sizeof(command)); 607 607 } 608 608 609 - static int ucsi_ccg_sync_control(struct ucsi *ucsi, u64 command, u32 *cci) 609 + static int ucsi_ccg_sync_control(struct ucsi *ucsi, u64 command, u32 *cci, 610 + void *data, size_t size) 610 611 { 611 612 struct ucsi_ccg *uc = ucsi_get_drvdata(ucsi); 612 613 struct ucsi_connector *con; ··· 629 628 ucsi_ccg_update_set_new_cam_cmd(uc, con, &command); 630 629 } 631 630 632 - ret = ucsi_sync_control_common(ucsi, command, cci); 631 + ret = ucsi_sync_control_common(ucsi, command, cci, data, size); 633 632 634 633 switch (UCSI_COMMAND(command)) { 635 634 case UCSI_GET_CURRENT_CAM: 636 635 if (uc->has_multiple_dp) 637 - ucsi_ccg_update_get_current_cam_cmd(uc, (u8 *)ucsi->message_in); 636 + ucsi_ccg_update_get_current_cam_cmd(uc, (u8 *)data); 638 637 break; 639 638 case UCSI_GET_ALTERNATE_MODES: 640 639 if (UCSI_ALTMODE_RECIPIENT(command) == UCSI_RECIPIENT_SOP) { 641 - struct ucsi_altmode *alt = (struct ucsi_altmode *)ucsi->message_in; 640 + struct ucsi_altmode *alt = data; 642 641 643 642 if (alt[0].svid == USB_TYPEC_NVIDIA_VLINK_SID) 644 643 ucsi_ccg_nvidia_altmode(uc, alt, command); ··· 646 645 break; 647 646 case UCSI_GET_CAPABILITY: 648 647 if (uc->fw_build == CCG_FW_BUILD_NVIDIA_TEGRA) { 649 - struct ucsi_capability *cap = (struct ucsi_capability *)ucsi->message_in; 648 + struct ucsi_capability *cap = data; 650 649 651 650 cap->features &= ~UCSI_CAP_ALT_MODE_DETAILS; 652 651 }
+8 -7
drivers/usb/typec/ucsi/ucsi_yoga_c630.c
··· 88 88 89 89 static int yoga_c630_ucsi_sync_control(struct ucsi *ucsi, 90 90 u64 command, 91 - u32 *cci) 91 + u32 *cci, 92 + void *data, size_t size) 92 93 { 93 94 int ret; 94 95 ··· 107 106 }; 108 107 109 108 dev_dbg(ucsi->dev, "faking DP altmode for con1\n"); 110 - memset(ucsi->message_in, 0, ucsi->message_in_size); 111 - memcpy(ucsi->message_in, &alt, min(sizeof(alt), ucsi->message_in_size)); 109 + memset(data, 0, size); 110 + memcpy(data, &alt, min(sizeof(alt), size)); 112 111 *cci = UCSI_CCI_COMMAND_COMPLETE | UCSI_SET_CCI_LENGTH(sizeof(alt)); 113 112 return 0; 114 113 } ··· 121 120 if (UCSI_COMMAND(command) == UCSI_GET_ALTERNATE_MODES && 122 121 UCSI_GET_ALTMODE_GET_CONNECTOR_NUMBER(command) == 2) { 123 122 dev_dbg(ucsi->dev, "ignoring altmodes for con2\n"); 124 - memset(ucsi->message_in, 0, ucsi->message_in_size); 123 + memset(data, 0, size); 125 124 *cci = UCSI_CCI_COMMAND_COMPLETE; 126 125 return 0; 127 126 } 128 127 129 - ret = ucsi_sync_control_common(ucsi, command, cci); 128 + ret = ucsi_sync_control_common(ucsi, command, cci, data, size); 130 129 if (ret < 0) 131 130 return ret; 132 131 133 132 /* UCSI_GET_CURRENT_CAM is off-by-one on all ports */ 134 - if (UCSI_COMMAND(command) == UCSI_GET_CURRENT_CAM && ucsi->message_in_size > 0) 135 - ucsi->message_in[0]--; 133 + if (UCSI_COMMAND(command) == UCSI_GET_CURRENT_CAM && data) 134 + ((u8 *)data)[0]--; 136 135 137 136 return ret; 138 137 }
+11 -4
drivers/vhost/vsock.c
··· 66 66 return VHOST_VSOCK_DEFAULT_HOST_CID; 67 67 } 68 68 69 - /* Callers that dereference the return value must hold vhost_vsock_mutex or the 70 - * RCU read lock. 69 + /* Callers must be in an RCU read section or hold the vhost_vsock_mutex. 70 + * The return value can only be dereferenced while within the section. 71 71 */ 72 72 static struct vhost_vsock *vhost_vsock_get(u32 guest_cid) 73 73 { 74 74 struct vhost_vsock *vsock; 75 75 76 - hash_for_each_possible_rcu(vhost_vsock_hash, vsock, hash, guest_cid) { 76 + hash_for_each_possible_rcu(vhost_vsock_hash, vsock, hash, guest_cid, 77 + lockdep_is_held(&vhost_vsock_mutex)) { 77 78 u32 other_cid = vsock->guest_cid; 78 79 79 80 /* Skip instances that have no CID yet */ ··· 710 709 * executing. 711 710 */ 712 711 712 + rcu_read_lock(); 713 + 713 714 /* If the peer is still valid, no need to reset connection */ 714 - if (vhost_vsock_get(vsk->remote_addr.svm_cid)) 715 + if (vhost_vsock_get(vsk->remote_addr.svm_cid)) { 716 + rcu_read_unlock(); 715 717 return; 718 + } 719 + 720 + rcu_read_unlock(); 716 721 717 722 /* If the close timeout is pending, let it expire. This avoids races 718 723 * with the timeout callback.
+2 -1
fs/btrfs/file.c
··· 2019 2019 else 2020 2020 btrfs_delalloc_release_space(inode, data_reserved, page_start, 2021 2021 reserved_space, true); 2022 - extent_changeset_free(data_reserved); 2023 2022 out_noreserve: 2024 2023 if (only_release_metadata) 2025 2024 btrfs_check_nocow_unlock(inode); 2026 2025 2027 2026 sb_end_pagefault(inode->vfs_inode.i_sb); 2027 + 2028 + extent_changeset_free(data_reserved); 2028 2029 2029 2030 if (ret < 0) 2030 2031 return vmf_error(ret);
+1
fs/btrfs/inode.c
··· 256 256 if (ret < 0) { 257 257 btrfs_err_rl(fs_info, "failed to lookup extent item for logical %llu: %d", 258 258 logical, ret); 259 + btrfs_release_path(&path); 259 260 return; 260 261 } 261 262 eb = path.nodes[0];
+4 -23
fs/btrfs/qgroup.c
··· 1243 1243 btrfs_end_transaction(trans); 1244 1244 else if (trans) 1245 1245 ret = btrfs_end_transaction(trans); 1246 - 1247 - /* 1248 - * At this point we either failed at allocating prealloc, or we 1249 - * succeeded and passed the ownership to it to add_qgroup_rb(). In any 1250 - * case, this needs to be NULL or there is something wrong. 1251 - */ 1252 - ASSERT(prealloc == NULL); 1253 - 1246 + kfree(prealloc); 1254 1247 return ret; 1255 1248 } 1256 1249 ··· 1675 1682 ret = btrfs_sysfs_add_one_qgroup(fs_info, qgroup); 1676 1683 out: 1677 1684 mutex_unlock(&fs_info->qgroup_ioctl_lock); 1678 - /* 1679 - * At this point we either failed at allocating prealloc, or we 1680 - * succeeded and passed the ownership to it to add_qgroup_rb(). In any 1681 - * case, this needs to be NULL or there is something wrong. 1682 - */ 1683 - ASSERT(prealloc == NULL); 1685 + kfree(prealloc); 1684 1686 return ret; 1685 1687 } 1686 1688 ··· 3267 3279 struct btrfs_root *quota_root; 3268 3280 struct btrfs_qgroup *srcgroup; 3269 3281 struct btrfs_qgroup *dstgroup; 3270 - struct btrfs_qgroup *prealloc = NULL; 3282 + struct btrfs_qgroup *prealloc; 3271 3283 struct btrfs_qgroup_list **qlist_prealloc = NULL; 3272 3284 bool free_inherit = false; 3273 3285 bool need_rescan = false; ··· 3508 3520 } 3509 3521 if (free_inherit) 3510 3522 kfree(inherit); 3511 - 3512 - /* 3513 - * At this point we either failed at allocating prealloc, or we 3514 - * succeeded and passed the ownership to it to add_qgroup_rb(). In any 3515 - * case, this needs to be NULL or there is something wrong. 3516 - */ 3517 - ASSERT(prealloc == NULL); 3518 - 3523 + kfree(prealloc); 3519 3524 return ret; 3520 3525 } 3521 3526
-1
fs/btrfs/tests/qgroup-tests.c
··· 187 187 ret = btrfs_search_slot(&trans, root, &key, path, -1, 1); 188 188 if (ret) { 189 189 test_err("couldn't find backref %d", ret); 190 - btrfs_free_path(path); 191 190 return ret; 192 191 } 193 192 btrfs_del_item(&trans, root, path);
+38 -8
fs/btrfs/tree-log.c
··· 5865 5865 struct btrfs_inode *curr_inode = start_inode; 5866 5866 int ret = 0; 5867 5867 5868 - /* 5869 - * If we are logging a new name, as part of a link or rename operation, 5870 - * don't bother logging new dentries, as we just want to log the names 5871 - * of an inode and that any new parents exist. 5872 - */ 5873 - if (ctx->logging_new_name) 5874 - return 0; 5875 - 5876 5868 path = btrfs_alloc_path(); 5877 5869 if (!path) 5878 5870 return -ENOMEM; ··· 6043 6051 return ret; 6044 6052 } 6045 6053 6054 + static bool can_log_conflicting_inode(const struct btrfs_trans_handle *trans, 6055 + const struct btrfs_inode *inode) 6056 + { 6057 + if (!S_ISDIR(inode->vfs_inode.i_mode)) 6058 + return true; 6059 + 6060 + if (inode->last_unlink_trans < trans->transid) 6061 + return true; 6062 + 6063 + /* 6064 + * If this is a directory and its unlink_trans is not from a past 6065 + * transaction then we must fallback to a transaction commit in order 6066 + * to avoid getting a directory with 2 hard links after log replay. 6067 + * 6068 + * This happens if a directory A is renamed, moved from one parent 6069 + * directory to another one, a new file is created in the old parent 6070 + * directory with the old name of our directory A, the new file is 6071 + * fsynced, then we moved the new file to some other parent directory 6072 + * and fsync again the new file. This results in a log tree where we 6073 + * logged that directory A existed, with the INODE_REF item for the 6074 + * new location but without having logged its old parent inode, so 6075 + * that on log replay we add a new link for the new location but the 6076 + * old link remains, resulting in a link count of 2. 6077 + */ 6078 + return false; 6079 + } 6080 + 6046 6081 static int add_conflicting_inode(struct btrfs_trans_handle *trans, 6047 6082 struct btrfs_root *root, 6048 6083 struct btrfs_path *path, ··· 6173 6154 return 0; 6174 6155 } 6175 6156 6157 + if (!can_log_conflicting_inode(trans, inode)) { 6158 + btrfs_add_delayed_iput(inode); 6159 + return BTRFS_LOG_FORCE_COMMIT; 6160 + } 6161 + 6176 6162 btrfs_add_delayed_iput(inode); 6177 6163 6178 6164 ino_elem = kmalloc(sizeof(*ino_elem), GFP_NOFS); ··· 6239 6215 inode = btrfs_iget_logging(parent, root); 6240 6216 if (IS_ERR(inode)) { 6241 6217 ret = PTR_ERR(inode); 6218 + break; 6219 + } 6220 + 6221 + if (!can_log_conflicting_inode(trans, inode)) { 6222 + btrfs_add_delayed_iput(inode); 6223 + ret = BTRFS_LOG_FORCE_COMMIT; 6242 6224 break; 6243 6225 } 6244 6226
+1
fs/btrfs/volumes.c
··· 7128 7128 7129 7129 fs_devices->seeding = true; 7130 7130 fs_devices->opened = 1; 7131 + list_add(&fs_devices->seed_list, &fs_info->fs_devices->seed_list); 7131 7132 return fs_devices; 7132 7133 } 7133 7134
+5 -2
fs/debugfs/inode.c
··· 841 841 rd.new_parent = rd.old_parent; 842 842 rd.flags = RENAME_NOREPLACE; 843 843 target = lookup_noperm_unlocked(&QSTR(new_name), rd.new_parent); 844 - if (IS_ERR(target)) 845 - return PTR_ERR(target); 844 + if (IS_ERR(target)) { 845 + error = PTR_ERR(target); 846 + goto out_free; 847 + } 846 848 847 849 error = start_renaming_two_dentries(&rd, dentry, target); 848 850 if (error) { ··· 864 862 out: 865 863 dput(rd.old_parent); 866 864 dput(target); 865 + out_free: 867 866 kfree_const(new_name); 868 867 return error; 869 868 }
+4 -4
fs/erofs/zdata.c
··· 1262 1262 return err; 1263 1263 } 1264 1264 1265 - static int z_erofs_decompress_pcluster(struct z_erofs_backend *be, int err) 1265 + static int z_erofs_decompress_pcluster(struct z_erofs_backend *be, bool eio) 1266 1266 { 1267 1267 struct erofs_sb_info *const sbi = EROFS_SB(be->sb); 1268 1268 struct z_erofs_pcluster *pcl = be->pcl; ··· 1270 1270 const struct z_erofs_decompressor *alg = 1271 1271 z_erofs_decomp[pcl->algorithmformat]; 1272 1272 bool try_free = true; 1273 - int i, j, jtop, err2; 1273 + int i, j, jtop, err2, err = eio ? -EIO : 0; 1274 1274 struct page *page; 1275 1275 bool overlapped; 1276 1276 const char *reason; ··· 1413 1413 .pcl = io->head, 1414 1414 }; 1415 1415 struct z_erofs_pcluster *next; 1416 - int err = io->eio ? -EIO : 0; 1416 + int err = 0; 1417 1417 1418 1418 for (; be.pcl != Z_EROFS_PCLUSTER_TAIL; be.pcl = next) { 1419 1419 DBG_BUGON(!be.pcl); 1420 1420 next = READ_ONCE(be.pcl->next); 1421 - err = z_erofs_decompress_pcluster(&be, err) ?: err; 1421 + err = z_erofs_decompress_pcluster(&be, io->eio) ?: err; 1422 1422 } 1423 1423 return err; 1424 1424 }
+2
fs/file_attr.c
··· 2 2 #include <linux/fs.h> 3 3 #include <linux/security.h> 4 4 #include <linux/fscrypt.h> 5 + #include <linux/fsnotify.h> 5 6 #include <linux/fileattr.h> 6 7 #include <linux/export.h> 7 8 #include <linux/syscalls.h> ··· 299 298 err = inode->i_op->fileattr_set(idmap, dentry, fa); 300 299 if (err) 301 300 goto out; 301 + fsnotify_xattr(dentry); 302 302 } 303 303 304 304 out:
+4 -2
fs/kernfs/dir.c
··· 681 681 return kn; 682 682 683 683 err_out4: 684 - simple_xattrs_free(&kn->iattr->xattrs, NULL); 685 - kmem_cache_free(kernfs_iattrs_cache, kn->iattr); 684 + if (kn->iattr) { 685 + simple_xattrs_free(&kn->iattr->xattrs, NULL); 686 + kmem_cache_free(kernfs_iattrs_cache, kn->iattr); 687 + } 686 688 err_out3: 687 689 spin_lock(&root->kernfs_idr_lock); 688 690 idr_remove(&root->ino_idr, (u32)kernfs_ino(kn));
+21 -29
fs/libfs.c
··· 346 346 * User space expects the directory offset value of the replaced 347 347 * (new) directory entry to be unchanged after a rename. 348 348 * 349 - * Returns zero on success, a negative errno value on failure. 349 + * Caller must have grabbed a slot for new_dentry in the maple_tree 350 + * associated with new_dir, even if dentry is negative. 350 351 */ 351 - int simple_offset_rename(struct inode *old_dir, struct dentry *old_dentry, 352 - struct inode *new_dir, struct dentry *new_dentry) 352 + void simple_offset_rename(struct inode *old_dir, struct dentry *old_dentry, 353 + struct inode *new_dir, struct dentry *new_dentry) 353 354 { 354 355 struct offset_ctx *old_ctx = old_dir->i_op->get_offset_ctx(old_dir); 355 356 struct offset_ctx *new_ctx = new_dir->i_op->get_offset_ctx(new_dir); 356 357 long new_offset = dentry2offset(new_dentry); 357 358 358 - simple_offset_remove(old_ctx, old_dentry); 359 + if (WARN_ON(!new_offset)) 360 + return; 359 361 360 - if (new_offset) { 361 - offset_set(new_dentry, 0); 362 - return simple_offset_replace(new_ctx, old_dentry, new_offset); 363 - } 364 - return simple_offset_add(new_ctx, old_dentry); 362 + simple_offset_remove(old_ctx, old_dentry); 363 + offset_set(new_dentry, 0); 364 + WARN_ON(simple_offset_replace(new_ctx, old_dentry, new_offset)); 365 365 } 366 366 367 367 /** ··· 388 388 long new_index = dentry2offset(new_dentry); 389 389 int ret; 390 390 391 - simple_offset_remove(old_ctx, old_dentry); 392 - simple_offset_remove(new_ctx, new_dentry); 391 + if (WARN_ON(!old_index || !new_index)) 392 + return -EINVAL; 393 393 394 - ret = simple_offset_replace(new_ctx, old_dentry, new_index); 395 - if (ret) 396 - goto out_restore; 394 + ret = mtree_store(&new_ctx->mt, new_index, old_dentry, GFP_KERNEL); 395 + if (WARN_ON(ret)) 396 + return ret; 397 397 398 - ret = simple_offset_replace(old_ctx, new_dentry, old_index); 399 - if (ret) { 400 - simple_offset_remove(new_ctx, old_dentry); 401 - goto out_restore; 398 + ret = mtree_store(&old_ctx->mt, old_index, new_dentry, GFP_KERNEL); 399 + if (WARN_ON(ret)) { 400 + mtree_store(&new_ctx->mt, new_index, new_dentry, GFP_KERNEL); 401 + return ret; 402 402 } 403 403 404 - ret = simple_rename_exchange(old_dir, old_dentry, new_dir, new_dentry); 405 - if (ret) { 406 - simple_offset_remove(new_ctx, old_dentry); 407 - simple_offset_remove(old_ctx, new_dentry); 408 - goto out_restore; 409 - } 404 + offset_set(old_dentry, new_index); 405 + offset_set(new_dentry, old_index); 406 + simple_rename_exchange(old_dir, old_dentry, new_dir, new_dentry); 410 407 return 0; 411 - 412 - out_restore: 413 - (void)simple_offset_replace(old_ctx, old_dentry, old_index); 414 - (void)simple_offset_replace(new_ctx, new_dentry, new_index); 415 - return ret; 416 408 } 417 409 418 410 /**
+1 -1
fs/nfsd/export.c
··· 1024 1024 { 1025 1025 struct svc_export *exp; 1026 1026 struct path path; 1027 - struct inode *inode; 1027 + struct inode *inode __maybe_unused; 1028 1028 struct svc_fh fh; 1029 1029 int err; 1030 1030 struct nfsd_net *nn = net_generic(net, nfsd_net_id);
+5
fs/nfsd/nfs4xdr.c
··· 3375 3375 u32 supp[3]; 3376 3376 3377 3377 memcpy(supp, nfsd_suppattrs[resp->cstate.minorversion], sizeof(supp)); 3378 + if (!IS_POSIXACL(d_inode(args->dentry))) 3379 + supp[0] &= ~FATTR4_WORD0_ACL; 3380 + if (!args->contextsupport) 3381 + supp[2] &= ~FATTR4_WORD2_SECURITY_LABEL; 3382 + 3378 3383 supp[0] &= NFSD_SUPPATTR_EXCLCREAT_WORD0; 3379 3384 supp[1] &= NFSD_SUPPATTR_EXCLCREAT_WORD1; 3380 3385 supp[2] &= NFSD_SUPPATTR_EXCLCREAT_WORD2;
+7 -1
fs/nfsd/nfsd.h
··· 547 547 #define NFSD_SUPPATTR_EXCLCREAT_WORD1 \ 548 548 (NFSD_WRITEABLE_ATTRS_WORD1 & \ 549 549 ~(FATTR4_WORD1_TIME_ACCESS_SET | FATTR4_WORD1_TIME_MODIFY_SET)) 550 + /* 551 + * The FATTR4_WORD2_TIME_DELEG attributes are not to be allowed for 552 + * OPEN(create) with EXCLUSIVE4_1. It doesn't make sense to set a 553 + * delegated timestamp on a new file. 554 + */ 550 555 #define NFSD_SUPPATTR_EXCLCREAT_WORD2 \ 551 - NFSD_WRITEABLE_ATTRS_WORD2 556 + (NFSD_WRITEABLE_ATTRS_WORD2 & \ 557 + ~(FATTR4_WORD2_TIME_DELEG_ACCESS | FATTR4_WORD2_TIME_DELEG_MODIFY)) 552 558 553 559 extern int nfsd4_is_junction(struct dentry *dentry); 554 560 extern int register_cld_notifier(void);
+4 -1
fs/nfsd/nfssvc.c
··· 615 615 serv = svc_create_pooled(nfsd_programs, ARRAY_SIZE(nfsd_programs), 616 616 &nn->nfsd_svcstats, 617 617 nfsd_max_blksize, nfsd); 618 - if (serv == NULL) 618 + if (serv == NULL) { 619 + percpu_ref_exit(&nn->nfsd_net_ref); 619 620 return -ENOMEM; 621 + } 620 622 621 623 error = svc_bind(serv, net); 622 624 if (error < 0) { 623 625 svc_destroy(&serv); 626 + percpu_ref_exit(&nn->nfsd_net_ref); 624 627 return error; 625 628 } 626 629 spin_lock(&nfsd_notifier_lock);
+2 -1
fs/nfsd/vfs.h
··· 67 67 struct iattr *iap = attrs->na_iattr; 68 68 69 69 return (iap->ia_valid || (attrs->na_seclabel && 70 - attrs->na_seclabel->len)); 70 + attrs->na_seclabel->len) || 71 + attrs->na_pacl || attrs->na_dpacl); 71 72 } 72 73 73 74 __be32 nfserrno (int errno);
+8 -1
fs/notify/fsnotify.c
··· 270 270 /* 271 271 * Include parent/name in notification either if some notification 272 272 * groups require parent info or the parent is interested in this event. 273 + * The parent interest in ACCESS/MODIFY events does not apply to special 274 + * files, where read/write are not on the filesystem of the parent and 275 + * events can provide an undesirable side-channel for information 276 + * exfiltration. 273 277 */ 274 - parent_interested = mask & p_mask & ALL_FSNOTIFY_EVENTS; 278 + parent_interested = mask & p_mask & ALL_FSNOTIFY_EVENTS && 279 + !(data_type == FSNOTIFY_EVENT_PATH && 280 + d_is_special(dentry) && 281 + (mask & (FS_ACCESS | FS_MODIFY))); 275 282 if (parent_needed || parent_interested) { 276 283 /* When notifying parent, child should be passed as data */ 277 284 WARN_ON_ONCE(inode != fsnotify_data_inode(data, data_type));
+2 -2
fs/smb/client/cifsfs.h
··· 145 145 #endif /* CONFIG_CIFS_NFSD_EXPORT */ 146 146 147 147 /* when changing internal version - update following two lines at same time */ 148 - #define SMB3_PRODUCT_BUILD 57 149 - #define CIFS_VERSION "2.57" 148 + #define SMB3_PRODUCT_BUILD 58 149 + #define CIFS_VERSION "2.58" 150 150 #endif /* _CIFSFS_H */
+1 -1
fs/smb/client/cifspdu.h
··· 12 12 #include <net/sock.h> 13 13 #include <linux/unaligned.h> 14 14 #include "../common/smbfsctl.h" 15 - #include "../common/smb2pdu.h" 15 + #include "../common/smb1pdu.h" 16 16 17 17 #define CIFS_PROT 0 18 18 #define POSIX_PROT (CIFS_PROT+1)
+2
fs/smb/client/fs_context.c
··· 1139 1139 rc = smb3_sync_session_ctx_passwords(cifs_sb, ses); 1140 1140 if (rc) { 1141 1141 mutex_unlock(&ses->session_mutex); 1142 + kfree_sensitive(new_password); 1143 + kfree_sensitive(new_password2); 1142 1144 return rc; 1143 1145 } 1144 1146
+56
fs/smb/common/smb1pdu.h
··· 1 + /* SPDX-License-Identifier: LGPL-2.1 */ 2 + /* 3 + * 4 + * Copyright (C) International Business Machines Corp., 2002,2009 5 + * 2018 Samsung Electronics Co., Ltd. 6 + * Author(s): Steve French <sfrench@us.ibm.com> 7 + * Namjae Jeon <linkinjeon@kernel.org> 8 + * 9 + */ 10 + 11 + #ifndef _COMMON_SMB1_PDU_H 12 + #define _COMMON_SMB1_PDU_H 13 + 14 + #define SMB1_PROTO_NUMBER cpu_to_le32(0x424d53ff) 15 + 16 + /* 17 + * See MS-CIFS 2.2.3.1 18 + * MS-SMB 2.2.3.1 19 + */ 20 + struct smb_hdr { 21 + __u8 Protocol[4]; 22 + __u8 Command; 23 + union { 24 + struct { 25 + __u8 ErrorClass; 26 + __u8 Reserved; 27 + __le16 Error; 28 + } __packed DosError; 29 + __le32 CifsError; 30 + } __packed Status; 31 + __u8 Flags; 32 + __le16 Flags2; /* note: le */ 33 + __le16 PidHigh; 34 + union { 35 + struct { 36 + __le32 SequenceNumber; /* le */ 37 + __u32 Reserved; /* zero */ 38 + } __packed Sequence; 39 + __u8 SecuritySignature[8]; /* le */ 40 + } __packed Signature; 41 + __u8 pad[2]; 42 + __u16 Tid; 43 + __le16 Pid; 44 + __u16 Uid; 45 + __le16 Mid; 46 + __u8 WordCount; 47 + } __packed; 48 + 49 + /* See MS-CIFS 2.2.4.52.1 */ 50 + typedef struct smb_negotiate_req { 51 + struct smb_hdr hdr; /* wct = 0 */ 52 + __le16 ByteCount; 53 + unsigned char DialectsArray[]; 54 + } __packed SMB_NEGOTIATE_REQ; 55 + 56 + #endif /* _COMMON_SMB1_PDU_H */
+1 -40
fs/smb/common/smb2pdu.h
··· 1293 1293 struct create_context_hdr ccontext; 1294 1294 __u8 Name[8]; 1295 1295 struct durable_reconnect_context_v2 dcontext; 1296 + __u8 Pad[4]; 1296 1297 } __packed; 1297 1298 1298 1299 /* See MS-SMB2 2.2.14.2.12 */ ··· 1986 1985 __le64 LeaseDuration; 1987 1986 } __packed; 1988 1987 1989 - /* 1990 - * See MS-CIFS 2.2.3.1 1991 - * MS-SMB 2.2.3.1 1992 - */ 1993 - struct smb_hdr { 1994 - __u8 Protocol[4]; 1995 - __u8 Command; 1996 - union { 1997 - struct { 1998 - __u8 ErrorClass; 1999 - __u8 Reserved; 2000 - __le16 Error; 2001 - } __packed DosError; 2002 - __le32 CifsError; 2003 - } __packed Status; 2004 - __u8 Flags; 2005 - __le16 Flags2; /* note: le */ 2006 - __le16 PidHigh; 2007 - union { 2008 - struct { 2009 - __le32 SequenceNumber; /* le */ 2010 - __u32 Reserved; /* zero */ 2011 - } __packed Sequence; 2012 - __u8 SecuritySignature[8]; /* le */ 2013 - } __packed Signature; 2014 - __u8 pad[2]; 2015 - __u16 Tid; 2016 - __le16 Pid; 2017 - __u16 Uid; 2018 - __le16 Mid; 2019 - __u8 WordCount; 2020 - } __packed; 2021 - 2022 1988 #define OP_BREAK_STRUCT_SIZE_20 24 2023 1989 #define OP_BREAK_STRUCT_SIZE_21 36 2024 1990 ··· 2089 2121 | WRITE_OWNER | SYNCHRONIZE) 2090 2122 #define SET_MINIMUM_RIGHTS (FILE_READ_EA | FILE_READ_ATTRIBUTES \ 2091 2123 | READ_CONTROL | SYNCHRONIZE) 2092 - 2093 - /* See MS-CIFS 2.2.4.52.1 */ 2094 - typedef struct smb_negotiate_req { 2095 - struct smb_hdr hdr; /* wct = 0 */ 2096 - __le16 ByteCount; 2097 - unsigned char DialectsArray[]; 2098 - } __packed SMB_NEGOTIATE_REQ; 2099 2124 2100 2125 #endif /* _COMMON_SMB2PDU_H */
+12
fs/smb/common/smbdirect/smbdirect_socket.h
··· 133 133 struct smbdirect_socket_parameters parameters; 134 134 135 135 /* 136 + * The state for connect/negotiation 137 + */ 138 + struct { 139 + spinlock_t lock; 140 + struct work_struct work; 141 + } connect; 142 + 143 + /* 136 144 * The state for keepalive and timeout handling 137 145 */ 138 146 struct { ··· 360 352 361 353 INIT_WORK(&sc->disconnect_work, __smbdirect_socket_disabled_work); 362 354 disable_work_sync(&sc->disconnect_work); 355 + 356 + spin_lock_init(&sc->connect.lock); 357 + INIT_WORK(&sc->connect.work, __smbdirect_socket_disabled_work); 358 + disable_work_sync(&sc->connect.work); 363 359 364 360 INIT_WORK(&sc->idle.immediate_work, __smbdirect_socket_disabled_work); 365 361 disable_work_sync(&sc->idle.immediate_work);
-2
fs/smb/common/smbglob.h
··· 11 11 #ifndef _COMMON_SMB_GLOB_H 12 12 #define _COMMON_SMB_GLOB_H 13 13 14 - #define SMB1_PROTO_NUMBER cpu_to_le32(0x424d53ff) 15 - 16 14 struct smb_version_values { 17 15 char *version_string; 18 16 __u16 protocol_id;
+2 -2
fs/smb/server/auth.c
··· 714 714 int ksmbd_gen_preauth_integrity_hash(struct ksmbd_conn *conn, char *buf, 715 715 __u8 *pi_hash) 716 716 { 717 - struct smb2_hdr *rcv_hdr = smb2_get_msg(buf); 717 + struct smb2_hdr *rcv_hdr = smb_get_msg(buf); 718 718 char *all_bytes_msg = (char *)&rcv_hdr->ProtocolId; 719 719 int msg_size = get_rfc1002_len(buf); 720 720 struct sha512_ctx sha_ctx; ··· 841 841 unsigned int nvec, int enc) 842 842 { 843 843 struct ksmbd_conn *conn = work->conn; 844 - struct smb2_transform_hdr *tr_hdr = smb2_get_msg(iov[0].iov_base); 844 + struct smb2_transform_hdr *tr_hdr = smb_get_msg(iov[0].iov_base); 845 845 unsigned int assoc_data_len = sizeof(struct smb2_transform_hdr) - 20; 846 846 int rc; 847 847 struct scatterlist *sg;
+6 -5
fs/smb/server/connection.c
··· 295 295 return true; 296 296 } 297 297 298 - #define SMB1_MIN_SUPPORTED_HEADER_SIZE (sizeof(struct smb_hdr)) 299 - #define SMB2_MIN_SUPPORTED_HEADER_SIZE (sizeof(struct smb2_hdr) + 4) 298 + /* "+2" for BCC field (ByteCount, 2 bytes) */ 299 + #define SMB1_MIN_SUPPORTED_PDU_SIZE (sizeof(struct smb_hdr) + 2) 300 + #define SMB2_MIN_SUPPORTED_PDU_SIZE (sizeof(struct smb2_pdu)) 300 301 301 302 /** 302 303 * ksmbd_conn_handler_loop() - session thread to listen on new smb requests ··· 364 363 if (pdu_size > MAX_STREAM_PROT_LEN) 365 364 break; 366 365 367 - if (pdu_size < SMB1_MIN_SUPPORTED_HEADER_SIZE) 366 + if (pdu_size < SMB1_MIN_SUPPORTED_PDU_SIZE) 368 367 break; 369 368 370 369 /* 4 for rfc1002 length field */ ··· 395 394 if (!ksmbd_smb_request(conn)) 396 395 break; 397 396 398 - if (((struct smb2_hdr *)smb2_get_msg(conn->request_buf))->ProtocolId == 397 + if (((struct smb2_hdr *)smb_get_msg(conn->request_buf))->ProtocolId == 399 398 SMB2_PROTO_NUMBER) { 400 - if (pdu_size < SMB2_MIN_SUPPORTED_HEADER_SIZE) 399 + if (pdu_size < SMB2_MIN_SUPPORTED_PDU_SIZE) 401 400 break; 402 401 } 403 402
+3 -1
fs/smb/server/mgmt/user_session.c
··· 325 325 sess = ksmbd_session_lookup(conn, id); 326 326 if (!sess && conn->binding) 327 327 sess = ksmbd_session_lookup_slowpath(id); 328 - if (sess && sess->state != SMB2_SESSION_VALID) 328 + if (sess && sess->state != SMB2_SESSION_VALID) { 329 + ksmbd_user_session_put(sess); 329 330 sess = NULL; 331 + } 330 332 return sess; 331 333 } 332 334
+4 -4
fs/smb/server/oplock.c
··· 637 637 goto out; 638 638 } 639 639 640 - rsp_hdr = smb2_get_msg(work->response_buf); 640 + rsp_hdr = smb_get_msg(work->response_buf); 641 641 memset(rsp_hdr, 0, sizeof(struct smb2_hdr) + 2); 642 642 rsp_hdr->ProtocolId = SMB2_PROTO_NUMBER; 643 643 rsp_hdr->StructureSize = SMB2_HEADER_STRUCTURE_SIZE; ··· 651 651 rsp_hdr->SessionId = 0; 652 652 memset(rsp_hdr->Signature, 0, 16); 653 653 654 - rsp = smb2_get_msg(work->response_buf); 654 + rsp = smb_get_msg(work->response_buf); 655 655 656 656 rsp->StructureSize = cpu_to_le16(24); 657 657 if (!br_info->open_trunc && ··· 744 744 goto out; 745 745 } 746 746 747 - rsp_hdr = smb2_get_msg(work->response_buf); 747 + rsp_hdr = smb_get_msg(work->response_buf); 748 748 memset(rsp_hdr, 0, sizeof(struct smb2_hdr) + 2); 749 749 rsp_hdr->ProtocolId = SMB2_PROTO_NUMBER; 750 750 rsp_hdr->StructureSize = SMB2_HEADER_STRUCTURE_SIZE; ··· 758 758 rsp_hdr->SessionId = 0; 759 759 memset(rsp_hdr->Signature, 0, 16); 760 760 761 - rsp = smb2_get_msg(work->response_buf); 761 + rsp = smb_get_msg(work->response_buf); 762 762 rsp->StructureSize = cpu_to_le16(44); 763 763 rsp->Epoch = br_info->epoch; 764 764 rsp->Flags = 0;
+1 -1
fs/smb/server/server.c
··· 95 95 96 96 if (ksmbd_conn_exiting(work->conn) || 97 97 ksmbd_conn_need_reconnect(work->conn)) { 98 - rsp_hdr = work->response_buf; 98 + rsp_hdr = smb_get_msg(work->response_buf); 99 99 rsp_hdr->Status.CifsError = STATUS_CONNECTION_DISCONNECTED; 100 100 return 1; 101 101 }
+37 -37
fs/smb/server/smb2pdu.c
··· 47 47 *req = ksmbd_req_buf_next(work); 48 48 *rsp = ksmbd_resp_buf_next(work); 49 49 } else { 50 - *req = smb2_get_msg(work->request_buf); 51 - *rsp = smb2_get_msg(work->response_buf); 50 + *req = smb_get_msg(work->request_buf); 51 + *rsp = smb_get_msg(work->response_buf); 52 52 } 53 53 } 54 54 ··· 146 146 if (work->next_smb2_rcv_hdr_off) 147 147 err_rsp = ksmbd_resp_buf_next(work); 148 148 else 149 - err_rsp = smb2_get_msg(work->response_buf); 149 + err_rsp = smb_get_msg(work->response_buf); 150 150 151 151 if (err_rsp->hdr.Status != STATUS_STOPPED_ON_SYMLINK) { 152 152 int err; ··· 172 172 */ 173 173 bool is_smb2_neg_cmd(struct ksmbd_work *work) 174 174 { 175 - struct smb2_hdr *hdr = smb2_get_msg(work->request_buf); 175 + struct smb2_hdr *hdr = smb_get_msg(work->request_buf); 176 176 177 177 /* is it SMB2 header ? */ 178 178 if (hdr->ProtocolId != SMB2_PROTO_NUMBER) ··· 196 196 */ 197 197 bool is_smb2_rsp(struct ksmbd_work *work) 198 198 { 199 - struct smb2_hdr *hdr = smb2_get_msg(work->response_buf); 199 + struct smb2_hdr *hdr = smb_get_msg(work->response_buf); 200 200 201 201 /* is it SMB2 header ? */ 202 202 if (hdr->ProtocolId != SMB2_PROTO_NUMBER) ··· 222 222 if (work->next_smb2_rcv_hdr_off) 223 223 rcv_hdr = ksmbd_req_buf_next(work); 224 224 else 225 - rcv_hdr = smb2_get_msg(work->request_buf); 225 + rcv_hdr = smb_get_msg(work->request_buf); 226 226 return le16_to_cpu(rcv_hdr->Command); 227 227 } 228 228 ··· 235 235 { 236 236 struct smb2_hdr *rsp_hdr; 237 237 238 - rsp_hdr = smb2_get_msg(work->response_buf); 238 + rsp_hdr = smb_get_msg(work->response_buf); 239 239 rsp_hdr->Status = err; 240 240 241 241 work->iov_idx = 0; ··· 258 258 struct ksmbd_conn *conn = work->conn; 259 259 int err; 260 260 261 - rsp_hdr = smb2_get_msg(work->response_buf); 261 + rsp_hdr = smb_get_msg(work->response_buf); 262 262 memset(rsp_hdr, 0, sizeof(struct smb2_hdr) + 2); 263 263 rsp_hdr->ProtocolId = SMB2_PROTO_NUMBER; 264 264 rsp_hdr->StructureSize = SMB2_HEADER_STRUCTURE_SIZE; ··· 272 272 rsp_hdr->SessionId = 0; 273 273 memset(rsp_hdr->Signature, 0, 16); 274 274 275 - rsp = smb2_get_msg(work->response_buf); 275 + rsp = smb_get_msg(work->response_buf); 276 276 277 277 WARN_ON(ksmbd_conn_good(conn)); 278 278 ··· 446 446 */ 447 447 bool is_chained_smb2_message(struct ksmbd_work *work) 448 448 { 449 - struct smb2_hdr *hdr = smb2_get_msg(work->request_buf); 449 + struct smb2_hdr *hdr = smb_get_msg(work->request_buf); 450 450 unsigned int len, next_cmd; 451 451 452 452 if (hdr->ProtocolId != SMB2_PROTO_NUMBER) ··· 497 497 */ 498 498 int init_smb2_rsp_hdr(struct ksmbd_work *work) 499 499 { 500 - struct smb2_hdr *rsp_hdr = smb2_get_msg(work->response_buf); 501 - struct smb2_hdr *rcv_hdr = smb2_get_msg(work->request_buf); 500 + struct smb2_hdr *rsp_hdr = smb_get_msg(work->response_buf); 501 + struct smb2_hdr *rcv_hdr = smb_get_msg(work->request_buf); 502 502 503 503 memset(rsp_hdr, 0, sizeof(struct smb2_hdr) + 2); 504 504 rsp_hdr->ProtocolId = rcv_hdr->ProtocolId; ··· 527 527 */ 528 528 int smb2_allocate_rsp_buf(struct ksmbd_work *work) 529 529 { 530 - struct smb2_hdr *hdr = smb2_get_msg(work->request_buf); 530 + struct smb2_hdr *hdr = smb_get_msg(work->request_buf); 531 531 size_t small_sz = MAX_CIFS_SMALL_BUFFER_SIZE; 532 532 size_t large_sz = small_sz + work->conn->vals->max_trans_size; 533 533 size_t sz = small_sz; ··· 543 543 offsetof(struct smb2_query_info_req, OutputBufferLength)) 544 544 return -EINVAL; 545 545 546 - req = smb2_get_msg(work->request_buf); 546 + req = smb_get_msg(work->request_buf); 547 547 if ((req->InfoType == SMB2_O_INFO_FILE && 548 548 (req->FileInfoClass == FILE_FULL_EA_INFORMATION || 549 549 req->FileInfoClass == FILE_ALL_INFORMATION)) || ··· 712 712 } 713 713 714 714 in_work->conn = work->conn; 715 - memcpy(smb2_get_msg(in_work->response_buf), ksmbd_resp_buf_next(work), 715 + memcpy(smb_get_msg(in_work->response_buf), ksmbd_resp_buf_next(work), 716 716 __SMB2_HEADER_STRUCTURE_SIZE); 717 717 718 - rsp_hdr = smb2_get_msg(in_work->response_buf); 718 + rsp_hdr = smb_get_msg(in_work->response_buf); 719 719 rsp_hdr->Flags |= SMB2_FLAGS_ASYNC_COMMAND; 720 720 rsp_hdr->Id.AsyncId = cpu_to_le64(work->async_id); 721 721 smb2_set_err_rsp(in_work); ··· 1093 1093 int smb2_handle_negotiate(struct ksmbd_work *work) 1094 1094 { 1095 1095 struct ksmbd_conn *conn = work->conn; 1096 - struct smb2_negotiate_req *req = smb2_get_msg(work->request_buf); 1097 - struct smb2_negotiate_rsp *rsp = smb2_get_msg(work->response_buf); 1096 + struct smb2_negotiate_req *req = smb_get_msg(work->request_buf); 1097 + struct smb2_negotiate_rsp *rsp = smb_get_msg(work->response_buf); 1098 1098 int rc = 0; 1099 1099 unsigned int smb2_buf_len, smb2_neg_size, neg_ctxt_len = 0; 1100 1100 __le32 status; ··· 2363 2363 int rc = 0; 2364 2364 unsigned int next = 0; 2365 2365 2366 - if (buf_len < sizeof(struct smb2_ea_info) + eabuf->EaNameLength + 2366 + if (buf_len < sizeof(struct smb2_ea_info) + eabuf->EaNameLength + 1 + 2367 2367 le16_to_cpu(eabuf->EaValueLength)) 2368 2368 return -EINVAL; 2369 2369 ··· 2440 2440 break; 2441 2441 } 2442 2442 2443 - if (buf_len < sizeof(struct smb2_ea_info) + eabuf->EaNameLength + 2443 + if (buf_len < sizeof(struct smb2_ea_info) + eabuf->EaNameLength + 1 + 2444 2444 le16_to_cpu(eabuf->EaValueLength)) { 2445 2445 rc = -EINVAL; 2446 2446 break; ··· 5967 5967 */ 5968 5968 int smb2_echo(struct ksmbd_work *work) 5969 5969 { 5970 - struct smb2_echo_rsp *rsp = smb2_get_msg(work->response_buf); 5970 + struct smb2_echo_rsp *rsp = smb_get_msg(work->response_buf); 5971 5971 5972 5972 ksmbd_debug(SMB, "Received smb2 echo request\n"); 5973 5973 ··· 6520 6520 pid = work->compound_pfid; 6521 6521 } 6522 6522 } else { 6523 - req = smb2_get_msg(work->request_buf); 6524 - rsp = smb2_get_msg(work->response_buf); 6523 + req = smb_get_msg(work->request_buf); 6524 + rsp = smb_get_msg(work->response_buf); 6525 6525 } 6526 6526 6527 6527 if (!test_tree_conn_flag(work->tcon, KSMBD_TREE_CONN_FLAG_WRITABLE)) { ··· 6754 6754 pid = work->compound_pfid; 6755 6755 } 6756 6756 } else { 6757 - req = smb2_get_msg(work->request_buf); 6758 - rsp = smb2_get_msg(work->response_buf); 6757 + req = smb_get_msg(work->request_buf); 6758 + rsp = smb_get_msg(work->response_buf); 6759 6759 } 6760 6760 6761 6761 if (!has_file_id(id)) { ··· 7183 7183 int smb2_cancel(struct ksmbd_work *work) 7184 7184 { 7185 7185 struct ksmbd_conn *conn = work->conn; 7186 - struct smb2_hdr *hdr = smb2_get_msg(work->request_buf); 7186 + struct smb2_hdr *hdr = smb_get_msg(work->request_buf); 7187 7187 struct smb2_hdr *chdr; 7188 7188 struct ksmbd_work *iter; 7189 7189 struct list_head *command_list; ··· 7200 7200 spin_lock(&conn->request_lock); 7201 7201 list_for_each_entry(iter, command_list, 7202 7202 async_request_entry) { 7203 - chdr = smb2_get_msg(iter->request_buf); 7203 + chdr = smb_get_msg(iter->request_buf); 7204 7204 7205 7205 if (iter->async_id != 7206 7206 le64_to_cpu(hdr->Id.AsyncId)) ··· 7221 7221 7222 7222 spin_lock(&conn->request_lock); 7223 7223 list_for_each_entry(iter, command_list, request_entry) { 7224 - chdr = smb2_get_msg(iter->request_buf); 7224 + chdr = smb_get_msg(iter->request_buf); 7225 7225 7226 7226 if (chdr->MessageId != hdr->MessageId || 7227 7227 iter == work) ··· 8151 8151 id = work->compound_fid; 8152 8152 } 8153 8153 } else { 8154 - req = smb2_get_msg(work->request_buf); 8155 - rsp = smb2_get_msg(work->response_buf); 8154 + req = smb_get_msg(work->request_buf); 8155 + rsp = smb_get_msg(work->response_buf); 8156 8156 } 8157 8157 8158 8158 if (!has_file_id(id)) ··· 8817 8817 */ 8818 8818 bool smb2_is_sign_req(struct ksmbd_work *work, unsigned int command) 8819 8819 { 8820 - struct smb2_hdr *rcv_hdr2 = smb2_get_msg(work->request_buf); 8820 + struct smb2_hdr *rcv_hdr2 = smb_get_msg(work->request_buf); 8821 8821 8822 8822 if ((rcv_hdr2->Flags & SMB2_FLAGS_SIGNED) && 8823 8823 command != SMB2_NEGOTIATE_HE && ··· 8842 8842 struct kvec iov[1]; 8843 8843 size_t len; 8844 8844 8845 - hdr = smb2_get_msg(work->request_buf); 8845 + hdr = smb_get_msg(work->request_buf); 8846 8846 if (work->next_smb2_rcv_hdr_off) 8847 8847 hdr = ksmbd_req_buf_next(work); 8848 8848 ··· 8916 8916 struct kvec iov[1]; 8917 8917 size_t len; 8918 8918 8919 - hdr = smb2_get_msg(work->request_buf); 8919 + hdr = smb_get_msg(work->request_buf); 8920 8920 if (work->next_smb2_rcv_hdr_off) 8921 8921 hdr = ksmbd_req_buf_next(work); 8922 8922 ··· 9049 9049 static void fill_transform_hdr(void *tr_buf, char *old_buf, __le16 cipher_type) 9050 9050 { 9051 9051 struct smb2_transform_hdr *tr_hdr = tr_buf + 4; 9052 - struct smb2_hdr *hdr = smb2_get_msg(old_buf); 9052 + struct smb2_hdr *hdr = smb_get_msg(old_buf); 9053 9053 unsigned int orig_len = get_rfc1002_len(old_buf); 9054 9054 9055 9055 /* tr_buf must be cleared by the caller */ ··· 9088 9088 9089 9089 bool smb3_is_transform_hdr(void *buf) 9090 9090 { 9091 - struct smb2_transform_hdr *trhdr = smb2_get_msg(buf); 9091 + struct smb2_transform_hdr *trhdr = smb_get_msg(buf); 9092 9092 9093 9093 return trhdr->ProtocolId == SMB2_TRANSFORM_PROTO_NUM; 9094 9094 } ··· 9100 9100 unsigned int pdu_length = get_rfc1002_len(buf); 9101 9101 struct kvec iov[2]; 9102 9102 int buf_data_size = pdu_length - sizeof(struct smb2_transform_hdr); 9103 - struct smb2_transform_hdr *tr_hdr = smb2_get_msg(buf); 9103 + struct smb2_transform_hdr *tr_hdr = smb_get_msg(buf); 9104 9104 int rc = 0; 9105 9105 9106 9106 if (pdu_length < sizeof(struct smb2_transform_hdr) || ··· 9141 9141 { 9142 9142 struct ksmbd_conn *conn = work->conn; 9143 9143 struct ksmbd_session *sess = work->sess; 9144 - struct smb2_hdr *rsp = smb2_get_msg(work->response_buf); 9144 + struct smb2_hdr *rsp = smb_get_msg(work->response_buf); 9145 9145 9146 9146 if (conn->dialect < SMB30_PROT_ID) 9147 9147 return false;
-9
fs/smb/server/smb2pdu.h
··· 383 383 int smb2_oplock_break(struct ksmbd_work *work); 384 384 int smb2_notify(struct ksmbd_work *ksmbd_work); 385 385 386 - /* 387 - * Get the body of the smb2 message excluding the 4 byte rfc1002 headers 388 - * from request/response buffer. 389 - */ 390 - static inline void *smb2_get_msg(void *buf) 391 - { 392 - return buf + 4; 393 - } 394 - 395 386 #define POSIX_TYPE_FILE 0 396 387 #define POSIX_TYPE_DIR 1 397 388 #define POSIX_TYPE_SYMLINK 2
+13 -13
fs/smb/server/smb_common.c
··· 140 140 if (smb2_hdr->ProtocolId == SMB2_PROTO_NUMBER) 141 141 return ksmbd_smb2_check_message(work); 142 142 143 - hdr = work->request_buf; 143 + hdr = smb_get_msg(work->request_buf); 144 144 if (*(__le32 *)hdr->Protocol == SMB1_PROTO_NUMBER && 145 145 hdr->Command == SMB_COM_NEGOTIATE) { 146 146 work->conn->outstanding_credits++; ··· 163 163 if (conn->request_buf[0] != 0) 164 164 return false; 165 165 166 - proto = (__le32 *)smb2_get_msg(conn->request_buf); 166 + proto = (__le32 *)smb_get_msg(conn->request_buf); 167 167 if (*proto == SMB2_COMPRESSION_TRANSFORM_ID) { 168 168 pr_err_ratelimited("smb2 compression not support yet"); 169 169 return false; ··· 259 259 static int ksmbd_negotiate_smb_dialect(void *buf) 260 260 { 261 261 int smb_buf_length = get_rfc1002_len(buf); 262 - __le32 proto = ((struct smb2_hdr *)smb2_get_msg(buf))->ProtocolId; 262 + __le32 proto = ((struct smb2_hdr *)smb_get_msg(buf))->ProtocolId; 263 263 264 264 if (proto == SMB2_PROTO_NUMBER) { 265 265 struct smb2_negotiate_req *req; 266 266 int smb2_neg_size = 267 267 offsetof(struct smb2_negotiate_req, Dialects); 268 268 269 - req = (struct smb2_negotiate_req *)smb2_get_msg(buf); 269 + req = (struct smb2_negotiate_req *)smb_get_msg(buf); 270 270 if (smb2_neg_size > smb_buf_length) 271 271 goto err_out; 272 272 ··· 278 278 req->DialectCount); 279 279 } 280 280 281 - proto = *(__le32 *)((struct smb_hdr *)buf)->Protocol; 282 281 if (proto == SMB1_PROTO_NUMBER) { 283 282 struct smb_negotiate_req *req; 284 283 285 - req = (struct smb_negotiate_req *)buf; 284 + req = (struct smb_negotiate_req *)smb_get_msg(buf); 286 285 if (le16_to_cpu(req->ByteCount) < 2) 287 286 goto err_out; 288 287 289 - if (offsetof(struct smb_negotiate_req, DialectsArray) - 4 + 288 + if (offsetof(struct smb_negotiate_req, DialectsArray) + 290 289 le16_to_cpu(req->ByteCount) > smb_buf_length) { 291 290 goto err_out; 292 291 } ··· 319 320 */ 320 321 static int init_smb1_rsp_hdr(struct ksmbd_work *work) 321 322 { 322 - struct smb_hdr *rsp_hdr = (struct smb_hdr *)work->response_buf; 323 - struct smb_hdr *rcv_hdr = (struct smb_hdr *)work->request_buf; 323 + struct smb_hdr *rsp_hdr = (struct smb_hdr *)smb_get_msg(work->response_buf); 324 + struct smb_hdr *rcv_hdr = (struct smb_hdr *)smb_get_msg(work->request_buf); 324 325 325 326 rsp_hdr->Command = SMB_COM_NEGOTIATE; 326 327 *(__le32 *)rsp_hdr->Protocol = SMB1_PROTO_NUMBER; ··· 411 412 412 413 int ksmbd_init_smb_server(struct ksmbd_conn *conn) 413 414 { 415 + struct smb_hdr *rcv_hdr = (struct smb_hdr *)smb_get_msg(conn->request_buf); 414 416 __le32 proto; 415 417 416 - proto = *(__le32 *)((struct smb_hdr *)conn->request_buf)->Protocol; 418 + proto = *(__le32 *)rcv_hdr->Protocol; 417 419 if (conn->need_neg == false) { 418 420 if (proto == SMB1_PROTO_NUMBER) 419 421 return -EINVAL; ··· 572 572 573 573 static int smb_handle_negotiate(struct ksmbd_work *work) 574 574 { 575 - struct smb_negotiate_rsp *neg_rsp = work->response_buf; 575 + struct smb_negotiate_rsp *neg_rsp = smb_get_msg(work->response_buf); 576 576 577 577 ksmbd_debug(SMB, "Unsupported SMB1 protocol\n"); 578 578 579 - if (ksmbd_iov_pin_rsp(work, (void *)neg_rsp + 4, 580 - sizeof(struct smb_negotiate_rsp) - 4)) 579 + if (ksmbd_iov_pin_rsp(work, (void *)neg_rsp, 580 + sizeof(struct smb_negotiate_rsp))) 581 581 return -ENOMEM; 582 582 583 583 neg_rsp->hdr.Status.CifsError = STATUS_SUCCESS;
+10
fs/smb/server/smb_common.h
··· 10 10 11 11 #include "glob.h" 12 12 #include "../common/smbglob.h" 13 + #include "../common/smb1pdu.h" 13 14 #include "../common/smb2pdu.h" 14 15 #include "../common/fscc.h" 15 16 #include "smb2pdu.h" ··· 203 202 unsigned int ksmbd_server_side_copy_max_total_size(void); 204 203 bool is_asterisk(char *p); 205 204 __le32 smb_map_generic_desired_access(__le32 daccess); 205 + 206 + /* 207 + * Get the body of the smb message excluding the 4 byte rfc1002 headers 208 + * from request/response buffer. 209 + */ 210 + static inline void *smb_get_msg(void *buf) 211 + { 212 + return buf + 4; 213 + } 206 214 #endif /* __SMB_SERVER_COMMON_H__ */
-3
fs/smb/server/smbacl.c
··· 1307 1307 granted |= le32_to_cpu(ace->access_req); 1308 1308 ace = (struct smb_ace *)((char *)ace + le16_to_cpu(ace->size)); 1309 1309 } 1310 - 1311 - if (!pdacl->num_aces) 1312 - granted = GENERIC_ALL_FLAGS; 1313 1310 } 1314 1311 1315 1312 if (!uid)
+146 -29
fs/smb/server/transport_rdma.c
··· 242 242 * disable[_delayed]_work_sync() 243 243 */ 244 244 disable_work(&sc->disconnect_work); 245 + disable_work(&sc->connect.work); 245 246 disable_work(&sc->recv_io.posted.refill_work); 246 247 disable_delayed_work(&sc->idle.timer_work); 247 248 disable_work(&sc->idle.immediate_work); ··· 298 297 * not queued again but here we don't block and avoid 299 298 * disable[_delayed]_work_sync() 300 299 */ 300 + disable_work(&sc->connect.work); 301 301 disable_work(&sc->recv_io.posted.refill_work); 302 302 disable_work(&sc->idle.immediate_work); 303 303 disable_delayed_work(&sc->idle.timer_work); ··· 469 467 */ 470 468 smb_direct_disconnect_wake_up_all(sc); 471 469 470 + disable_work_sync(&sc->connect.work); 472 471 disable_work_sync(&sc->recv_io.posted.refill_work); 473 472 disable_delayed_work_sync(&sc->idle.timer_work); 474 473 disable_work_sync(&sc->idle.immediate_work); ··· 638 635 639 636 switch (sc->recv_io.expected) { 640 637 case SMBDIRECT_EXPECT_NEGOTIATE_REQ: 641 - if (wc->byte_len < sizeof(struct smbdirect_negotiate_req)) { 642 - put_recvmsg(sc, recvmsg); 643 - smb_direct_disconnect_rdma_connection(sc); 644 - return; 645 - } 646 - sc->recv_io.reassembly.full_packet_received = true; 647 - /* 648 - * Some drivers (at least mlx5_ib) might post a 649 - * recv completion before RDMA_CM_EVENT_ESTABLISHED, 650 - * we need to adjust our expectation in that case. 651 - */ 652 - if (!sc->first_error && sc->status == SMBDIRECT_SOCKET_RDMA_CONNECT_RUNNING) 653 - sc->status = SMBDIRECT_SOCKET_NEGOTIATE_NEEDED; 654 - if (SMBDIRECT_CHECK_STATUS_WARN(sc, SMBDIRECT_SOCKET_NEGOTIATE_NEEDED)) { 655 - put_recvmsg(sc, recvmsg); 656 - smb_direct_disconnect_rdma_connection(sc); 657 - return; 658 - } 659 - sc->status = SMBDIRECT_SOCKET_NEGOTIATE_RUNNING; 660 - enqueue_reassembly(sc, recvmsg, 0); 661 - wake_up(&sc->status_wait); 662 - return; 638 + /* see smb_direct_negotiate_recv_done */ 639 + break; 663 640 case SMBDIRECT_EXPECT_DATA_TRANSFER: { 664 641 struct smbdirect_data_transfer *data_transfer = 665 642 (struct smbdirect_data_transfer *)recvmsg->packet; ··· 725 742 smb_direct_disconnect_rdma_connection(sc); 726 743 } 727 744 745 + static void smb_direct_negotiate_recv_work(struct work_struct *work); 746 + 747 + static void smb_direct_negotiate_recv_done(struct ib_cq *cq, struct ib_wc *wc) 748 + { 749 + struct smbdirect_recv_io *recv_io = 750 + container_of(wc->wr_cqe, struct smbdirect_recv_io, cqe); 751 + struct smbdirect_socket *sc = recv_io->socket; 752 + unsigned long flags; 753 + 754 + /* 755 + * reset the common recv_done for later reuse. 756 + */ 757 + recv_io->cqe.done = recv_done; 758 + 759 + if (wc->status != IB_WC_SUCCESS || wc->opcode != IB_WC_RECV) { 760 + put_recvmsg(sc, recv_io); 761 + if (wc->status != IB_WC_WR_FLUSH_ERR) { 762 + pr_err("Negotiate Recv error. status='%s (%d)' opcode=%d\n", 763 + ib_wc_status_msg(wc->status), wc->status, 764 + wc->opcode); 765 + smb_direct_disconnect_rdma_connection(sc); 766 + } 767 + return; 768 + } 769 + 770 + ksmbd_debug(RDMA, "Negotiate Recv completed. status='%s (%d)', opcode=%d\n", 771 + ib_wc_status_msg(wc->status), wc->status, 772 + wc->opcode); 773 + 774 + ib_dma_sync_single_for_cpu(sc->ib.dev, 775 + recv_io->sge.addr, 776 + recv_io->sge.length, 777 + DMA_FROM_DEVICE); 778 + 779 + /* 780 + * This is an internal error! 781 + */ 782 + if (WARN_ON_ONCE(sc->recv_io.expected != SMBDIRECT_EXPECT_NEGOTIATE_REQ)) { 783 + put_recvmsg(sc, recv_io); 784 + smb_direct_disconnect_rdma_connection(sc); 785 + return; 786 + } 787 + 788 + /* 789 + * Don't reset timer to the keepalive interval in 790 + * this will be done in smb_direct_negotiate_recv_work. 791 + */ 792 + 793 + /* 794 + * Only remember the recv_io if it has enough bytes, 795 + * this gives smb_direct_negotiate_recv_work enough 796 + * information in order to disconnect if it was not 797 + * valid. 798 + */ 799 + sc->recv_io.reassembly.full_packet_received = true; 800 + if (wc->byte_len >= sizeof(struct smbdirect_negotiate_req)) 801 + enqueue_reassembly(sc, recv_io, 0); 802 + else 803 + put_recvmsg(sc, recv_io); 804 + 805 + /* 806 + * Some drivers (at least mlx5_ib and irdma in roce mode) 807 + * might post a recv completion before RDMA_CM_EVENT_ESTABLISHED, 808 + * we need to adjust our expectation in that case. 809 + * 810 + * So we defer further processing of the negotiation 811 + * to smb_direct_negotiate_recv_work(). 812 + * 813 + * If we are already in SMBDIRECT_SOCKET_NEGOTIATE_NEEDED 814 + * we queue the work directly otherwise 815 + * smb_direct_cm_handler() will do it, when 816 + * RDMA_CM_EVENT_ESTABLISHED arrived. 817 + */ 818 + spin_lock_irqsave(&sc->connect.lock, flags); 819 + if (!sc->first_error) { 820 + INIT_WORK(&sc->connect.work, smb_direct_negotiate_recv_work); 821 + if (sc->status == SMBDIRECT_SOCKET_NEGOTIATE_NEEDED) 822 + queue_work(sc->workqueue, &sc->connect.work); 823 + } 824 + spin_unlock_irqrestore(&sc->connect.lock, flags); 825 + } 826 + 827 + static void smb_direct_negotiate_recv_work(struct work_struct *work) 828 + { 829 + struct smbdirect_socket *sc = 830 + container_of(work, struct smbdirect_socket, connect.work); 831 + const struct smbdirect_socket_parameters *sp = &sc->parameters; 832 + struct smbdirect_recv_io *recv_io; 833 + 834 + if (sc->first_error) 835 + return; 836 + 837 + ksmbd_debug(RDMA, "Negotiate Recv Work running\n"); 838 + 839 + /* 840 + * Reset timer to the keepalive interval in 841 + * order to trigger our next keepalive message. 842 + */ 843 + sc->idle.keepalive = SMBDIRECT_KEEPALIVE_NONE; 844 + mod_delayed_work(sc->workqueue, &sc->idle.timer_work, 845 + msecs_to_jiffies(sp->keepalive_interval_msec)); 846 + 847 + /* 848 + * If smb_direct_negotiate_recv_done() detected an 849 + * invalid request we want to disconnect. 850 + */ 851 + recv_io = get_first_reassembly(sc); 852 + if (!recv_io) { 853 + smb_direct_disconnect_rdma_connection(sc); 854 + return; 855 + } 856 + 857 + if (SMBDIRECT_CHECK_STATUS_WARN(sc, SMBDIRECT_SOCKET_NEGOTIATE_NEEDED)) { 858 + smb_direct_disconnect_rdma_connection(sc); 859 + return; 860 + } 861 + sc->status = SMBDIRECT_SOCKET_NEGOTIATE_RUNNING; 862 + wake_up(&sc->status_wait); 863 + } 864 + 728 865 static int smb_direct_post_recv(struct smbdirect_socket *sc, 729 866 struct smbdirect_recv_io *recvmsg) 730 867 { ··· 861 758 return ret; 862 759 recvmsg->sge.length = sp->max_recv_size; 863 760 recvmsg->sge.lkey = sc->ib.pd->local_dma_lkey; 864 - recvmsg->cqe.done = recv_done; 865 761 866 762 wr.wr_cqe = &recvmsg->cqe; 867 763 wr.next = NULL; ··· 1834 1732 struct rdma_cm_event *event) 1835 1733 { 1836 1734 struct smbdirect_socket *sc = cm_id->context; 1735 + unsigned long flags; 1837 1736 1838 1737 ksmbd_debug(RDMA, "RDMA CM event. cm_id=%p event=%s (%d)\n", 1839 1738 cm_id, rdma_event_msg(event->event), event->event); ··· 1842 1739 switch (event->event) { 1843 1740 case RDMA_CM_EVENT_ESTABLISHED: { 1844 1741 /* 1845 - * Some drivers (at least mlx5_ib) might post a 1846 - * recv completion before RDMA_CM_EVENT_ESTABLISHED, 1742 + * Some drivers (at least mlx5_ib and irdma in roce mode) 1743 + * might post a recv completion before RDMA_CM_EVENT_ESTABLISHED, 1847 1744 * we need to adjust our expectation in that case. 1848 1745 * 1849 - * As we already started the negotiation, we just 1850 - * ignore RDMA_CM_EVENT_ESTABLISHED here. 1746 + * If smb_direct_negotiate_recv_done was called first 1747 + * it initialized sc->connect.work only for us to 1748 + * start, so that we turned into 1749 + * SMBDIRECT_SOCKET_NEGOTIATE_NEEDED, before 1750 + * smb_direct_negotiate_recv_work() runs. 1751 + * 1752 + * If smb_direct_negotiate_recv_done didn't happen 1753 + * yet. sc->connect.work is still be disabled and 1754 + * queue_work() is a no-op. 1851 1755 */ 1852 - if (!sc->first_error && sc->status > SMBDIRECT_SOCKET_RDMA_CONNECT_RUNNING) 1853 - break; 1854 1756 if (SMBDIRECT_CHECK_STATUS_DISCONNECT(sc, SMBDIRECT_SOCKET_RDMA_CONNECT_RUNNING)) 1855 1757 break; 1856 1758 sc->status = SMBDIRECT_SOCKET_NEGOTIATE_NEEDED; 1759 + spin_lock_irqsave(&sc->connect.lock, flags); 1760 + if (!sc->first_error) 1761 + queue_work(sc->workqueue, &sc->connect.work); 1762 + spin_unlock_irqrestore(&sc->connect.lock, flags); 1857 1763 wake_up(&sc->status_wait); 1858 1764 break; 1859 1765 } ··· 2033 1921 recvmsg = get_free_recvmsg(sc); 2034 1922 if (!recvmsg) 2035 1923 return -ENOMEM; 1924 + recvmsg->cqe.done = smb_direct_negotiate_recv_done; 2036 1925 2037 1926 ret = smb_direct_post_recv(sc, recvmsg); 2038 1927 if (ret) { ··· 2452 2339 2453 2340 static int smb_direct_connect(struct smbdirect_socket *sc) 2454 2341 { 2342 + struct smbdirect_recv_io *recv_io; 2455 2343 int ret; 2456 2344 2457 2345 ret = smb_direct_init_params(sc); ··· 2466 2352 pr_err("Can't init RDMA pool: %d\n", ret); 2467 2353 return ret; 2468 2354 } 2355 + 2356 + list_for_each_entry(recv_io, &sc->recv_io.free.list, list) 2357 + recv_io->cqe.done = recv_done; 2469 2358 2470 2359 ret = smb_direct_create_qpair(sc); 2471 2360 if (ret) {
+1 -1
fs/smb/server/vfs.c
··· 702 702 rd.old_parent = NULL; 703 703 rd.new_parent = new_path.dentry; 704 704 rd.flags = flags; 705 - rd.delegated_inode = NULL, 705 + rd.delegated_inode = NULL; 706 706 err = start_renaming_dentry(&rd, lookup_flags, old_child, &new_last); 707 707 if (err) 708 708 goto out_drop_write;
+15
fs/xfs/libxfs/xfs_sb.c
··· 301 301 sbp->sb_rbmblocks != xfs_expected_rbmblocks(sbp)) 302 302 return false; 303 303 304 + if (xfs_sb_is_v5(sbp) && 305 + (sbp->sb_features_incompat & XFS_SB_FEAT_INCOMPAT_ZONED)) { 306 + uint32_t mod; 307 + 308 + /* 309 + * Zoned RT devices must be aligned to the RT group size, 310 + * because garbage collection assumes that all zones have the 311 + * same size to avoid insane complexity if that weren't the 312 + * case. 313 + */ 314 + div_u64_rem(sbp->sb_rextents, sbp->sb_rgextents, &mod); 315 + if (mod) 316 + return false; 317 + } 318 + 304 319 return true; 305 320 } 306 321
+1 -1
fs/xfs/scrub/attr_repair.c
··· 333 333 .attr_filter = ent->flags & XFS_ATTR_NSP_ONDISK_MASK, 334 334 .namelen = rentry->namelen, 335 335 .name = rentry->name, 336 - .value = ab->value, 337 336 .valuelen = be32_to_cpu(rentry->valuelen), 338 337 }; 339 338 unsigned int namesize; ··· 362 363 error = -EDEADLOCK; 363 364 if (error) 364 365 return error; 366 + args.value = ab->value; 365 367 366 368 /* Look up the remote value and stash it for reconstruction. */ 367 369 error = xfs_attr3_leaf_getvalue(leaf_bp, &args);
+1 -1
fs/xfs/xfs_attr_item.c
··· 737 737 struct xfs_attri_log_item *attrip = ATTRI_ITEM(lip); 738 738 struct xfs_attr_intent *attr; 739 739 struct xfs_mount *mp = lip->li_log->l_mp; 740 - struct xfs_inode *ip; 740 + struct xfs_inode *ip = NULL; 741 741 struct xfs_da_args *args; 742 742 struct xfs_trans *tp; 743 743 struct xfs_trans_res resv;
+1
fs/xfs/xfs_buf_item.c
··· 896 896 map_size = DIV_ROUND_UP(chunks, NBWORD); 897 897 898 898 if (map_size > XFS_BLF_DATAMAP_SIZE) { 899 + xfs_buf_item_free_format(bip); 899 900 kmem_cache_free(xfs_buf_item_cache, bip); 900 901 xfs_err(mp, 901 902 "buffer item dirty bitmap (%u uints) too small to reflect %u bytes!",
+5 -22
fs/xfs/xfs_discard.c
··· 108 108 * list. We plug and chain the bios so that we only need a single completion 109 109 * call to clear all the busy extents once the discards are complete. 110 110 */ 111 - int 111 + void 112 112 xfs_discard_extents( 113 113 struct xfs_mount *mp, 114 114 struct xfs_busy_extents *extents) ··· 116 116 struct xfs_extent_busy *busyp; 117 117 struct bio *bio = NULL; 118 118 struct blk_plug plug; 119 - int error = 0; 120 119 121 120 blk_start_plug(&plug); 122 121 list_for_each_entry(busyp, &extents->extent_list, list) { ··· 125 126 126 127 trace_xfs_discard_extent(xg, busyp->bno, busyp->length); 127 128 128 - error = __blkdev_issue_discard(btp->bt_bdev, 129 + __blkdev_issue_discard(btp->bt_bdev, 129 130 xfs_gbno_to_daddr(xg, busyp->bno), 130 131 XFS_FSB_TO_BB(mp, busyp->length), 131 132 GFP_KERNEL, &bio); 132 - if (error && error != -EOPNOTSUPP) { 133 - xfs_info(mp, 134 - "discard failed for extent [0x%llx,%u], error %d", 135 - (unsigned long long)busyp->bno, 136 - busyp->length, 137 - error); 138 - break; 139 - } 140 133 } 141 134 142 135 if (bio) { ··· 139 148 xfs_discard_endio_work(&extents->endio_work); 140 149 } 141 150 blk_finish_plug(&plug); 142 - 143 - return error; 144 151 } 145 152 146 153 /* ··· 374 385 * list after this function call, as it may have been freed by 375 386 * the time control returns to us. 376 387 */ 377 - error = xfs_discard_extents(pag_mount(pag), extents); 378 - if (error) 379 - break; 388 + xfs_discard_extents(pag_mount(pag), extents); 380 389 381 390 if (xfs_trim_should_stop()) 382 391 break; ··· 483 496 484 497 trace_xfs_discard_rtextent(mp, busyp->bno, busyp->length); 485 498 486 - error = __blkdev_issue_discard(bdev, 499 + __blkdev_issue_discard(bdev, 487 500 xfs_rtb_to_daddr(mp, busyp->bno), 488 501 XFS_FSB_TO_BB(mp, busyp->length), 489 502 GFP_NOFS, &bio); 490 - if (error) 491 - break; 492 503 } 493 504 xfs_discard_free_rtdev_extents(tr); 494 505 ··· 726 741 * list after this function call, as it may have been freed by 727 742 * the time control returns to us. 728 743 */ 729 - error = xfs_discard_extents(rtg_mount(rtg), tr.extents); 730 - if (error) 731 - break; 744 + xfs_discard_extents(rtg_mount(rtg), tr.extents); 732 745 733 746 low = tr.restart_rtx; 734 747 } while (!xfs_trim_should_stop() && low <= high);
+1 -1
fs/xfs/xfs_discard.h
··· 6 6 struct xfs_mount; 7 7 struct xfs_busy_extents; 8 8 9 - int xfs_discard_extents(struct xfs_mount *mp, struct xfs_busy_extents *busy); 9 + void xfs_discard_extents(struct xfs_mount *mp, struct xfs_busy_extents *busy); 10 10 int xfs_ioc_trim(struct xfs_mount *mp, struct fstrim_range __user *fstrim); 11 11 12 12 #endif /* XFS_DISCARD_H */
+48 -10
fs/xfs/xfs_file.c
··· 1241 1241 } 1242 1242 1243 1243 /* 1244 + * For various operations we need to zero up to one block at each end of 1245 + * the affected range. For zoned file systems this will require a space 1246 + * allocation, for which we need a reservation ahead of time. 1247 + */ 1248 + #define XFS_ZONED_ZERO_EDGE_SPACE_RES 2 1249 + 1250 + /* 1251 + * Zero range implements a full zeroing mechanism but is only used in limited 1252 + * situations. It is more efficient to allocate unwritten extents than to 1253 + * perform zeroing here, so use an errortag to randomly force zeroing on DEBUG 1254 + * kernels for added test coverage. 1255 + * 1256 + * On zoned file systems, the error is already injected by 1257 + * xfs_file_zoned_fallocate, which then reserves the additional space needed. 1258 + * We only check for this extra space reservation here. 1259 + */ 1260 + static inline bool 1261 + xfs_falloc_force_zero( 1262 + struct xfs_inode *ip, 1263 + struct xfs_zone_alloc_ctx *ac) 1264 + { 1265 + if (xfs_is_zoned_inode(ip)) { 1266 + if (ac->reserved_blocks > XFS_ZONED_ZERO_EDGE_SPACE_RES) { 1267 + ASSERT(IS_ENABLED(CONFIG_XFS_DEBUG)); 1268 + return true; 1269 + } 1270 + return false; 1271 + } 1272 + return XFS_TEST_ERROR(ip->i_mount, XFS_ERRTAG_FORCE_ZERO_RANGE); 1273 + } 1274 + 1275 + /* 1244 1276 * Punch a hole and prealloc the range. We use a hole punch rather than 1245 1277 * unwritten extent conversion for two reasons: 1246 1278 * ··· 1300 1268 if (error) 1301 1269 return error; 1302 1270 1303 - /* 1304 - * Zero range implements a full zeroing mechanism but is only used in 1305 - * limited situations. It is more efficient to allocate unwritten 1306 - * extents than to perform zeroing here, so use an errortag to randomly 1307 - * force zeroing on DEBUG kernels for added test coverage. 1308 - */ 1309 - if (XFS_TEST_ERROR(ip->i_mount, 1310 - XFS_ERRTAG_FORCE_ZERO_RANGE)) { 1271 + if (xfs_falloc_force_zero(ip, ac)) { 1311 1272 error = xfs_zero_range(ip, offset, len, ac, NULL); 1312 1273 } else { 1313 1274 error = xfs_free_file_space(ip, offset, len, ac); ··· 1448 1423 { 1449 1424 struct xfs_zone_alloc_ctx ac = { }; 1450 1425 struct xfs_inode *ip = XFS_I(file_inode(file)); 1426 + struct xfs_mount *mp = ip->i_mount; 1427 + xfs_filblks_t count_fsb; 1451 1428 int error; 1452 1429 1453 - error = xfs_zoned_space_reserve(ip->i_mount, 2, XFS_ZR_RESERVED, &ac); 1430 + /* 1431 + * If full zeroing is forced by the error injection knob, we need a 1432 + * space reservation that covers the entire range. See the comment in 1433 + * xfs_zoned_write_space_reserve for the rationale for the calculation. 1434 + * Otherwise just reserve space for the two boundary blocks. 1435 + */ 1436 + count_fsb = XFS_ZONED_ZERO_EDGE_SPACE_RES; 1437 + if ((mode & FALLOC_FL_MODE_MASK) == FALLOC_FL_ZERO_RANGE && 1438 + XFS_TEST_ERROR(mp, XFS_ERRTAG_FORCE_ZERO_RANGE)) 1439 + count_fsb += XFS_B_TO_FSB(mp, len) + 1; 1440 + 1441 + error = xfs_zoned_space_reserve(mp, count_fsb, XFS_ZR_RESERVED, &ac); 1454 1442 if (error) 1455 1443 return error; 1456 1444 error = __xfs_file_fallocate(file, mode, offset, len, &ac); 1457 - xfs_zoned_space_unreserve(ip->i_mount, &ac); 1445 + xfs_zoned_space_unreserve(mp, &ac); 1458 1446 return error; 1459 1447 } 1460 1448
+8 -6
fs/xfs/xfs_rtalloc.c
··· 1255 1255 min_logfsbs = min_t(xfs_extlen_t, xfs_log_calc_minimum_size(nmp), 1256 1256 nmp->m_rsumblocks * 2); 1257 1257 1258 - kfree(nmp); 1259 - 1260 1258 trace_xfs_growfs_check_rtgeom(mp, min_logfsbs); 1261 1259 1262 1260 if (min_logfsbs > mp->m_sb.sb_logblocks) 1263 - return -EINVAL; 1261 + goto out_inval; 1264 1262 1265 1263 if (xfs_has_zoned(mp)) { 1266 1264 uint32_t gblocks = mp->m_groups[XG_TYPE_RTG].blocks; ··· 1266 1268 1267 1269 if (rextsize != 1) 1268 1270 return -EINVAL; 1269 - div_u64_rem(mp->m_sb.sb_rblocks, gblocks, &rem); 1271 + div_u64_rem(nmp->m_sb.sb_rblocks, gblocks, &rem); 1270 1272 if (rem) { 1271 1273 xfs_warn(mp, 1272 1274 "new RT volume size (%lld) not aligned to RT group size (%d)", 1273 - mp->m_sb.sb_rblocks, gblocks); 1274 - return -EINVAL; 1275 + nmp->m_sb.sb_rblocks, gblocks); 1276 + goto out_inval; 1275 1277 } 1276 1278 } 1277 1279 1280 + kfree(nmp); 1278 1281 return 0; 1282 + out_inval: 1283 + kfree(nmp); 1284 + return -EINVAL; 1279 1285 } 1280 1286 1281 1287 /*
+15 -15
include/linux/bio.h
··· 46 46 #define bio_data_dir(bio) \ 47 47 (op_is_write(bio_op(bio)) ? WRITE : READ) 48 48 49 + static inline bool bio_flagged(const struct bio *bio, unsigned int bit) 50 + { 51 + return bio->bi_flags & (1U << bit); 52 + } 53 + 54 + static inline void bio_set_flag(struct bio *bio, unsigned int bit) 55 + { 56 + bio->bi_flags |= (1U << bit); 57 + } 58 + 59 + static inline void bio_clear_flag(struct bio *bio, unsigned int bit) 60 + { 61 + bio->bi_flags &= ~(1U << bit); 62 + } 63 + 49 64 /* 50 65 * Check whether this bio carries any data or not. A NULL bio is allowed. 51 66 */ ··· 238 223 smp_mb(); 239 224 } 240 225 atomic_set(&bio->__bi_cnt, count); 241 - } 242 - 243 - static inline bool bio_flagged(struct bio *bio, unsigned int bit) 244 - { 245 - return bio->bi_flags & (1U << bit); 246 - } 247 - 248 - static inline void bio_set_flag(struct bio *bio, unsigned int bit) 249 - { 250 - bio->bi_flags |= (1U << bit); 251 - } 252 - 253 - static inline void bio_clear_flag(struct bio *bio, unsigned int bit) 254 - { 255 - bio->bi_flags &= ~(1U << bit); 256 226 } 257 227 258 228 static inline struct bio_vec *bio_first_bvec_all(struct bio *bio)
+3
include/linux/bpf.h
··· 1283 1283 struct list_head lnode; 1284 1284 struct latch_tree_node tnode; 1285 1285 bool prog; 1286 + u32 fp_start; 1287 + u32 fp_end; 1286 1288 }; 1287 1289 1288 1290 enum bpf_tramp_prog_type { ··· 1513 1511 void bpf_image_ksym_del(struct bpf_ksym *ksym); 1514 1512 void bpf_ksym_add(struct bpf_ksym *ksym); 1515 1513 void bpf_ksym_del(struct bpf_ksym *ksym); 1514 + bool bpf_has_frame_pointer(unsigned long ip); 1516 1515 int bpf_jit_charge_modmem(u32 size); 1517 1516 void bpf_jit_uncharge_modmem(u32 size); 1518 1517 bool bpf_prog_has_trampoline(const struct bpf_prog *prog);
+1
include/linux/compiler-clang.h
··· 145 145 */ 146 146 #define ASM_INPUT_G "ir" 147 147 #define ASM_INPUT_RM "r" 148 + #define ASM_OUTPUT_RM "=r" 148 149 149 150 /* 150 151 * Declare compiler support for __typeof_unqual__() operator.
+2 -1
include/linux/compiler_types.h
··· 548 548 549 549 /* 550 550 * Clang has trouble with constraints with multiple 551 - * alternative behaviors (mainly "g" and "rm"). 551 + * alternative behaviors ("g" , "rm" and "=rm"). 552 552 */ 553 553 #ifndef ASM_INPUT_G 554 554 #define ASM_INPUT_G "g" 555 555 #define ASM_INPUT_RM "rm" 556 + #define ASM_OUTPUT_RM "=rm" 556 557 #endif 557 558 558 559 #ifdef CONFIG_CC_HAS_ASM_INLINE
+1 -1
include/linux/fs.h
··· 3247 3247 void simple_offset_init(struct offset_ctx *octx); 3248 3248 int simple_offset_add(struct offset_ctx *octx, struct dentry *dentry); 3249 3249 void simple_offset_remove(struct offset_ctx *octx, struct dentry *dentry); 3250 - int simple_offset_rename(struct inode *old_dir, struct dentry *old_dentry, 3250 + void simple_offset_rename(struct inode *old_dir, struct dentry *old_dentry, 3251 3251 struct inode *new_dir, struct dentry *new_dentry); 3252 3252 int simple_offset_rename_exchange(struct inode *old_dir, 3253 3253 struct dentry *old_dentry,
+4
include/linux/intel_rapl.h
··· 214 214 215 215 #ifdef CONFIG_PERF_EVENTS 216 216 int rapl_package_add_pmu(struct rapl_package *rp); 217 + int rapl_package_add_pmu_locked(struct rapl_package *rp); 217 218 void rapl_package_remove_pmu(struct rapl_package *rp); 219 + void rapl_package_remove_pmu_locked(struct rapl_package *rp); 218 220 #else 219 221 static inline int rapl_package_add_pmu(struct rapl_package *rp) { return 0; } 222 + static inline int rapl_package_add_pmu_locked(struct rapl_package *rp) { return 0; } 220 223 static inline void rapl_package_remove_pmu(struct rapl_package *rp) { } 224 + static inline void rapl_package_remove_pmu_locked(struct rapl_package *rp) { } 221 225 #endif 222 226 223 227 #endif /* __INTEL_RAPL_H__ */
-1
include/linux/mm_types.h
··· 1631 1631 TLB_LOCAL_MM_SHOOTDOWN, 1632 1632 TLB_REMOTE_SEND_IPI, 1633 1633 TLB_REMOTE_WRONG_CPU, 1634 - NR_TLB_FLUSH_REASONS, 1635 1634 }; 1636 1635 1637 1636 /**
+1
include/linux/property.h
··· 371 371 (const struct software_node_ref_args) { \ 372 372 .swnode = _Generic(_ref_, \ 373 373 const struct software_node *: _ref_, \ 374 + struct software_node *: _ref_, \ 374 375 default: NULL), \ 375 376 .fwnode = _Generic(_ref_, \ 376 377 struct fwnode_handle *: _ref_, \
+2
include/linux/virtio.h
··· 13 13 #include <linux/completion.h> 14 14 #include <linux/virtio_features.h> 15 15 16 + struct module; 17 + 16 18 /** 17 19 * struct virtqueue - a queue to register buffers for sending or receiving. 18 20 * @list: the chain of virtqueues for this device
+2
include/linux/virtio_features.h
··· 3 3 #define _LINUX_VIRTIO_FEATURES_H 4 4 5 5 #include <linux/bits.h> 6 + #include <linux/bug.h> 7 + #include <linux/string.h> 6 8 7 9 #define VIRTIO_FEATURES_U64S 2 8 10 #define VIRTIO_FEATURES_BITS (VIRTIO_FEATURES_U64S * 64)
+3 -15
include/net/inet_frag.h
··· 123 123 124 124 int fqdir_init(struct fqdir **fqdirp, struct inet_frags *f, struct net *net); 125 125 126 - static inline void fqdir_pre_exit(struct fqdir *fqdir) 127 - { 128 - /* Prevent creation of new frags. 129 - * Pairs with READ_ONCE() in inet_frag_find(). 130 - */ 131 - WRITE_ONCE(fqdir->high_thresh, 0); 132 - 133 - /* Pairs with READ_ONCE() in inet_frag_kill(), ip_expire() 134 - * and ip6frag_expire_frag_queue(). 135 - */ 136 - WRITE_ONCE(fqdir->dead, true); 137 - } 126 + void fqdir_pre_exit(struct fqdir *fqdir); 138 127 void fqdir_exit(struct fqdir *fqdir); 139 128 140 129 void inet_frag_kill(struct inet_frag_queue *q, int *refs); 141 130 void inet_frag_destroy(struct inet_frag_queue *q); 142 131 struct inet_frag_queue *inet_frag_find(struct fqdir *fqdir, void *key); 143 132 144 - /* Free all skbs in the queue; return the sum of their truesizes. */ 145 - unsigned int inet_frag_rbtree_purge(struct rb_root *root, 146 - enum skb_drop_reason reason); 133 + void inet_frag_queue_flush(struct inet_frag_queue *q, 134 + enum skb_drop_reason reason); 147 135 148 136 static inline void inet_frag_putn(struct inet_frag_queue *q, int refs) 149 137 {
+6 -3
include/net/ipv6_frag.h
··· 69 69 int refs = 1; 70 70 71 71 rcu_read_lock(); 72 - /* Paired with the WRITE_ONCE() in fqdir_pre_exit(). */ 73 - if (READ_ONCE(fq->q.fqdir->dead)) 74 - goto out_rcu_unlock; 75 72 spin_lock(&fq->q.lock); 76 73 77 74 if (fq->q.flags & INET_FRAG_COMPLETE) ··· 76 79 77 80 fq->q.flags |= INET_FRAG_DROP; 78 81 inet_frag_kill(&fq->q, &refs); 82 + 83 + /* Paired with the WRITE_ONCE() in fqdir_pre_exit(). */ 84 + if (READ_ONCE(fq->q.fqdir->dead)) { 85 + inet_frag_queue_flush(&fq->q, 0); 86 + goto out; 87 + } 79 88 80 89 dev = dev_get_by_index_rcu(net, fq->iif); 81 90 if (!dev)
+26 -8
include/net/netfilter/nf_tables.h
··· 1091 1091 __attribute__((aligned(__alignof__(struct nft_rule_dp)))); 1092 1092 }; 1093 1093 1094 + enum nft_chain_types { 1095 + NFT_CHAIN_T_DEFAULT = 0, 1096 + NFT_CHAIN_T_ROUTE, 1097 + NFT_CHAIN_T_NAT, 1098 + NFT_CHAIN_T_MAX 1099 + }; 1100 + 1101 + /** 1102 + * struct nft_chain_validate_state - validation state 1103 + * 1104 + * If a chain is encountered again during table validation it is 1105 + * possible to avoid revalidation provided the calling context is 1106 + * compatible. This structure stores relevant calling context of 1107 + * previous validations. 1108 + * 1109 + * @hook_mask: the hook numbers and locations the chain is linked to 1110 + * @depth: the deepest call chain level the chain is linked to 1111 + */ 1112 + struct nft_chain_validate_state { 1113 + u8 hook_mask[NFT_CHAIN_T_MAX]; 1114 + u8 depth; 1115 + }; 1116 + 1094 1117 /** 1095 1118 * struct nft_chain - nf_tables chain 1096 1119 * ··· 1132 1109 * @udlen: user data length 1133 1110 * @udata: user data in the chain 1134 1111 * @blob_next: rule blob pointer to the next in the chain 1112 + * @vstate: validation state 1135 1113 */ 1136 1114 struct nft_chain { 1137 1115 struct nft_rule_blob __rcu *blob_gen_0; ··· 1152 1128 1153 1129 /* Only used during control plane commit phase: */ 1154 1130 struct nft_rule_blob *blob_next; 1131 + struct nft_chain_validate_state vstate; 1155 1132 }; 1156 1133 1157 - int nft_chain_validate(const struct nft_ctx *ctx, const struct nft_chain *chain); 1134 + int nft_chain_validate(const struct nft_ctx *ctx, struct nft_chain *chain); 1158 1135 int nft_setelem_validate(const struct nft_ctx *ctx, struct nft_set *set, 1159 1136 const struct nft_set_iter *iter, 1160 1137 struct nft_elem_priv *elem_priv); 1161 1138 int nft_set_catchall_validate(const struct nft_ctx *ctx, struct nft_set *set); 1162 1139 int nf_tables_bind_chain(const struct nft_ctx *ctx, struct nft_chain *chain); 1163 1140 void nf_tables_unbind_chain(const struct nft_ctx *ctx, struct nft_chain *chain); 1164 - 1165 - enum nft_chain_types { 1166 - NFT_CHAIN_T_DEFAULT = 0, 1167 - NFT_CHAIN_T_ROUTE, 1168 - NFT_CHAIN_T_NAT, 1169 - NFT_CHAIN_T_MAX 1170 - }; 1171 1141 1172 1142 /** 1173 1143 * struct nft_chain_type - nf_tables chain type info
+4 -1
include/sound/soc-acpi.h
··· 203 203 * @mach: the pointer of the machine driver 204 204 * @prefix: the prefix of the topology file name. Typically, it is the path. 205 205 * @tplg_files: the pointer of the array of the topology file names. 206 + * @best_effort: ignore non supported links and try to build the card in best effort 207 + * with supported links 206 208 */ 207 209 /* Descriptor for SST ASoC machine driver */ 208 210 struct snd_soc_acpi_mach { ··· 226 224 const u32 tplg_quirk_mask; 227 225 int (*get_function_tplg_files)(struct snd_soc_card *card, 228 226 const struct snd_soc_acpi_mach *mach, 229 - const char *prefix, const char ***tplg_files); 227 + const char *prefix, const char ***tplg_files, 228 + bool best_effort); 230 229 }; 231 230 232 231 #define SND_SOC_ACPI_MAX_CODECS 3
+3 -2
include/trace/events/tlb.h
··· 12 12 EM( TLB_FLUSH_ON_TASK_SWITCH, "flush on task switch" ) \ 13 13 EM( TLB_REMOTE_SHOOTDOWN, "remote shootdown" ) \ 14 14 EM( TLB_LOCAL_SHOOTDOWN, "local shootdown" ) \ 15 - EM( TLB_LOCAL_MM_SHOOTDOWN, "local mm shootdown" ) \ 16 - EMe( TLB_REMOTE_SEND_IPI, "remote ipi send" ) 15 + EM( TLB_LOCAL_MM_SHOOTDOWN, "local MM shootdown" ) \ 16 + EM( TLB_REMOTE_SEND_IPI, "remote IPI send" ) \ 17 + EMe( TLB_REMOTE_WRONG_CPU, "remote wrong CPU" ) 17 18 18 19 /* 19 20 * First define the enums in TLB_FLUSH_REASON to be exported to userspace
+1
include/uapi/drm/xe_drm.h
··· 1463 1463 /** @exec_queue_id: Exec queue ID for the batch buffer */ 1464 1464 __u32 exec_queue_id; 1465 1465 1466 + #define DRM_XE_MAX_SYNCS 1024 1466 1467 /** @num_syncs: Amount of struct drm_xe_sync in array. */ 1467 1468 __u32 num_syncs; 1468 1469
+1
include/uapi/linux/energy_model.h
··· 2 2 /* Do not edit directly, auto-generated from: */ 3 3 /* Documentation/netlink/specs/em.yaml */ 4 4 /* YNL-GEN uapi header */ 5 + /* To regenerate run: tools/net/ynl/ynl-regen.sh */ 5 6 6 7 #ifndef _UAPI_LINUX_ENERGY_MODEL_H 7 8 #define _UAPI_LINUX_ENERGY_MODEL_H
+9
include/uapi/linux/input-event-codes.h
··· 891 891 892 892 #define ABS_VOLUME 0x20 893 893 #define ABS_PROFILE 0x21 894 + #define ABS_SND_PROFILE 0x22 894 895 895 896 #define ABS_MISC 0x28 896 897 ··· 1000 999 #define SND_TONE 0x02 1001 1000 #define SND_MAX 0x07 1002 1001 #define SND_CNT (SND_MAX+1) 1002 + 1003 + /* 1004 + * ABS_SND_PROFILE values 1005 + */ 1006 + 1007 + #define SND_PROFILE_SILENT 0x00 1008 + #define SND_PROFILE_VIBRATE 0x01 1009 + #define SND_PROFILE_RING 0x02 1003 1010 1004 1011 #endif
+1
include/uapi/linux/mptcp.h
··· 40 40 #define MPTCP_PM_ADDR_FLAG_FULLMESH _BITUL(3) 41 41 #define MPTCP_PM_ADDR_FLAG_IMPLICIT _BITUL(4) 42 42 #define MPTCP_PM_ADDR_FLAG_LAMINAR _BITUL(5) 43 + #define MPTCP_PM_ADDR_FLAGS_MASK GENMASK(5, 0) 43 44 44 45 struct mptcp_info { 45 46 __u8 mptcpi_subflows;
+2
include/uapi/linux/pr.h
··· 79 79 #define IOC_PR_READ_KEYS _IOWR('p', 206, struct pr_read_keys) 80 80 #define IOC_PR_READ_RESERVATION _IOR('p', 207, struct pr_read_reservation) 81 81 82 + #define PR_KEYS_MAX (1u << 16) 83 + 82 84 #endif /* _UAPI_PR_H */
+1 -5
include/uapi/regulator/regulator.h
··· 8 8 #ifndef _UAPI_REGULATOR_H 9 9 #define _UAPI_REGULATOR_H 10 10 11 - #ifdef __KERNEL__ 12 11 #include <linux/types.h> 13 - #else 14 - #include <stdint.h> 15 - #endif 16 12 17 13 /* 18 14 * Regulator notifier events. ··· 58 62 59 63 struct reg_genl_event { 60 64 char reg_name[32]; 61 - uint64_t event; 65 + __u64 event; 62 66 }; 63 67 64 68 /* attributes of reg_genl_family */
+1 -1
io_uring/openclose.c
··· 73 73 open->filename = NULL; 74 74 return ret; 75 75 } 76 + req->flags |= REQ_F_NEED_CLEANUP; 76 77 77 78 open->file_slot = READ_ONCE(sqe->file_index); 78 79 if (open->file_slot && (open->how.flags & O_CLOEXEC)) 79 80 return -EINVAL; 80 81 81 82 open->nofile = rlimit(RLIMIT_NOFILE); 82 - req->flags |= REQ_F_NEED_CLEANUP; 83 83 if (io_openat_force_async(open)) 84 84 req->flags |= REQ_F_FORCE_ASYNC; 85 85 return 0;
+1
io_uring/rsrc.c
··· 1059 1059 if (count < imu->len) { 1060 1060 const struct bio_vec *bvec = iter->bvec; 1061 1061 1062 + len += iter->iov_offset; 1062 1063 while (len > bvec->bv_len) { 1063 1064 len -= bvec->bv_len; 1064 1065 bvec++;
+16
kernel/bpf/core.c
··· 760 760 NULL; 761 761 } 762 762 763 + bool bpf_has_frame_pointer(unsigned long ip) 764 + { 765 + struct bpf_ksym *ksym; 766 + unsigned long offset; 767 + 768 + guard(rcu)(); 769 + 770 + ksym = bpf_ksym_find(ip); 771 + if (!ksym || !ksym->fp_start || !ksym->fp_end) 772 + return false; 773 + 774 + offset = ip - ksym->start; 775 + 776 + return offset >= ksym->fp_start && offset < ksym->fp_end; 777 + } 778 + 763 779 const struct exception_table_entry *search_bpf_extables(unsigned long addr) 764 780 { 765 781 const struct exception_table_entry *e = NULL;
+49 -7
kernel/bpf/dmabuf_iter.c
··· 6 6 #include <linux/kernel.h> 7 7 #include <linux/seq_file.h> 8 8 9 + struct dmabuf_iter_priv { 10 + /* 11 + * If this pointer is non-NULL, the buffer's refcount is elevated to 12 + * prevent destruction between stop/start. If reading is not resumed and 13 + * start is never called again, then dmabuf_iter_seq_fini drops the 14 + * reference when the iterator is released. 15 + */ 16 + struct dma_buf *dmabuf; 17 + }; 18 + 9 19 static void *dmabuf_iter_seq_start(struct seq_file *seq, loff_t *pos) 10 20 { 11 - if (*pos) 12 - return NULL; 21 + struct dmabuf_iter_priv *p = seq->private; 22 + 23 + if (*pos) { 24 + struct dma_buf *dmabuf = p->dmabuf; 25 + 26 + if (!dmabuf) 27 + return NULL; 28 + 29 + /* 30 + * Always resume from where we stopped, regardless of the value 31 + * of pos. 32 + */ 33 + p->dmabuf = NULL; 34 + return dmabuf; 35 + } 13 36 14 37 return dma_buf_iter_begin(); 15 38 } ··· 77 54 { 78 55 struct dma_buf *dmabuf = v; 79 56 80 - if (dmabuf) 81 - dma_buf_put(dmabuf); 57 + if (dmabuf) { 58 + struct dmabuf_iter_priv *p = seq->private; 59 + 60 + p->dmabuf = dmabuf; 61 + } 82 62 } 83 63 84 64 static const struct seq_operations dmabuf_iter_seq_ops = { ··· 97 71 seq_puts(seq, "dmabuf iter\n"); 98 72 } 99 73 74 + static int dmabuf_iter_seq_init(void *priv, struct bpf_iter_aux_info *aux) 75 + { 76 + struct dmabuf_iter_priv *p = (struct dmabuf_iter_priv *)priv; 77 + 78 + p->dmabuf = NULL; 79 + return 0; 80 + } 81 + 82 + static void dmabuf_iter_seq_fini(void *priv) 83 + { 84 + struct dmabuf_iter_priv *p = (struct dmabuf_iter_priv *)priv; 85 + 86 + if (p->dmabuf) 87 + dma_buf_put(p->dmabuf); 88 + } 89 + 100 90 static const struct bpf_iter_seq_info dmabuf_iter_seq_info = { 101 91 .seq_ops = &dmabuf_iter_seq_ops, 102 - .init_seq_private = NULL, 103 - .fini_seq_private = NULL, 104 - .seq_priv_size = 0, 92 + .init_seq_private = dmabuf_iter_seq_init, 93 + .fini_seq_private = dmabuf_iter_seq_fini, 94 + .seq_priv_size = sizeof(struct dmabuf_iter_priv), 105 95 }; 106 96 107 97 static struct bpf_iter_reg bpf_dmabuf_reg_info = {
+8 -5
kernel/cgroup/rstat.c
··· 71 71 { 72 72 struct llist_head *lhead; 73 73 struct css_rstat_cpu *rstatc; 74 - struct css_rstat_cpu __percpu *rstatc_pcpu; 75 74 struct llist_node *self; 76 75 77 76 /* ··· 103 104 /* 104 105 * This function can be renentered by irqs and nmis for the same cgroup 105 106 * and may try to insert the same per-cpu lnode into the llist. Note 106 - * that llist_add() does not protect against such scenarios. 107 + * that llist_add() does not protect against such scenarios. In addition 108 + * this same per-cpu lnode can be modified through init_llist_node() 109 + * from css_rstat_flush() running on a different CPU. 107 110 * 108 111 * To protect against such stacked contexts of irqs/nmis, we use the 109 112 * fact that lnode points to itself when not on a list and then use 110 - * this_cpu_cmpxchg() to atomically set to NULL to select the winner 113 + * try_cmpxchg() to atomically set to NULL to select the winner 111 114 * which will call llist_add(). The losers can assume the insertion is 112 115 * successful and the winner will eventually add the per-cpu lnode to 113 116 * the llist. 117 + * 118 + * Please note that we can not use this_cpu_cmpxchg() here as on some 119 + * archs it is not safe against modifications from multiple CPUs. 114 120 */ 115 121 self = &rstatc->lnode; 116 - rstatc_pcpu = css->rstat_cpu; 117 - if (this_cpu_cmpxchg(rstatc_pcpu->lnode.next, self, NULL) != self) 122 + if (!try_cmpxchg(&rstatc->lnode.next, &self, NULL)) 118 123 return; 119 124 120 125 lhead = ss_lhead_cpu(css->ss, cpu);
+1 -1
kernel/irq/manage.c
··· 1414 1414 * Ensure the thread adjusts the affinity once it reaches the 1415 1415 * thread function. 1416 1416 */ 1417 - new->thread_flags = BIT(IRQTF_AFFINITY); 1417 + set_bit(IRQTF_AFFINITY, &new->thread_flags); 1418 1418 1419 1419 return 0; 1420 1420 }
+1
kernel/kthread.c
··· 1599 1599 1600 1600 WARN_ON_ONCE(!(tsk->flags & PF_KTHREAD)); 1601 1601 WARN_ON_ONCE(tsk->mm); 1602 + WARN_ON_ONCE(!mm->user_ns); 1602 1603 1603 1604 /* 1604 1605 * It is possible for mm to be the same as tsk->active_mm, but
+48 -24
kernel/sched/ext.c
··· 41 41 static bool scx_switching_all; 42 42 DEFINE_STATIC_KEY_FALSE(__scx_switched_all); 43 43 44 + /* 45 + * Tracks whether scx_enable() called scx_bypass(true). Used to balance bypass 46 + * depth on enable failure. Will be removed when bypass depth is moved into the 47 + * sched instance. 48 + */ 49 + static bool scx_bypassed_for_enable; 50 + 44 51 static atomic_long_t scx_nr_rejected = ATOMIC_LONG_INIT(0); 45 52 static atomic_long_t scx_hotplug_seq = ATOMIC_LONG_INIT(0); 46 53 ··· 982 975 __scx_add_event(sch, SCX_EV_REFILL_SLICE_DFL, 1); 983 976 } 984 977 978 + static void local_dsq_post_enq(struct scx_dispatch_q *dsq, struct task_struct *p, 979 + u64 enq_flags) 980 + { 981 + struct rq *rq = container_of(dsq, struct rq, scx.local_dsq); 982 + bool preempt = false; 983 + 984 + /* 985 + * If @rq is in balance, the CPU is already vacant and looking for the 986 + * next task to run. No need to preempt or trigger resched after moving 987 + * @p into its local DSQ. 988 + */ 989 + if (rq->scx.flags & SCX_RQ_IN_BALANCE) 990 + return; 991 + 992 + if ((enq_flags & SCX_ENQ_PREEMPT) && p != rq->curr && 993 + rq->curr->sched_class == &ext_sched_class) { 994 + rq->curr->scx.slice = 0; 995 + preempt = true; 996 + } 997 + 998 + if (preempt || sched_class_above(&ext_sched_class, rq->curr->sched_class)) 999 + resched_curr(rq); 1000 + } 1001 + 985 1002 static void dispatch_enqueue(struct scx_sched *sch, struct scx_dispatch_q *dsq, 986 1003 struct task_struct *p, u64 enq_flags) 987 1004 { ··· 1117 1086 if (enq_flags & SCX_ENQ_CLEAR_OPSS) 1118 1087 atomic_long_set_release(&p->scx.ops_state, SCX_OPSS_NONE); 1119 1088 1120 - if (is_local) { 1121 - struct rq *rq = container_of(dsq, struct rq, scx.local_dsq); 1122 - bool preempt = false; 1123 - 1124 - if ((enq_flags & SCX_ENQ_PREEMPT) && p != rq->curr && 1125 - rq->curr->sched_class == &ext_sched_class) { 1126 - rq->curr->scx.slice = 0; 1127 - preempt = true; 1128 - } 1129 - 1130 - if (preempt || sched_class_above(&ext_sched_class, 1131 - rq->curr->sched_class)) 1132 - resched_curr(rq); 1133 - } else { 1089 + if (is_local) 1090 + local_dsq_post_enq(dsq, p, enq_flags); 1091 + else 1134 1092 raw_spin_unlock(&dsq->lock); 1135 - } 1136 1093 } 1137 1094 1138 1095 static void task_unlink_from_dsq(struct task_struct *p, ··· 1644 1625 1645 1626 dsq_mod_nr(dst_dsq, 1); 1646 1627 p->scx.dsq = dst_dsq; 1628 + 1629 + local_dsq_post_enq(dst_dsq, p, enq_flags); 1647 1630 } 1648 1631 1649 1632 /** ··· 2423 2402 * ops.enqueue() that @p is the only one available for this cpu, 2424 2403 * which should trigger an explicit follow-up scheduling event. 2425 2404 */ 2426 - if (sched_class_above(&ext_sched_class, next->sched_class)) { 2405 + if (next && sched_class_above(&ext_sched_class, next->sched_class)) { 2427 2406 WARN_ON_ONCE(!(sch->ops.flags & SCX_OPS_ENQ_LAST)); 2428 2407 do_enqueue_task(rq, p, SCX_ENQ_LAST, -1); 2429 2408 } else { ··· 2446 2425 do_pick_task_scx(struct rq *rq, struct rq_flags *rf, bool force_scx) 2447 2426 { 2448 2427 struct task_struct *prev = rq->curr; 2449 - bool keep_prev, kick_idle = false; 2428 + bool keep_prev; 2450 2429 struct task_struct *p; 2451 2430 2452 2431 /* see kick_cpus_irq_workfn() */ ··· 2488 2467 refill_task_slice_dfl(rcu_dereference_sched(scx_root), p); 2489 2468 } else { 2490 2469 p = first_local_task(rq); 2491 - if (!p) { 2492 - if (kick_idle) 2493 - scx_kick_cpu(rcu_dereference_sched(scx_root), 2494 - cpu_of(rq), SCX_KICK_IDLE); 2470 + if (!p) 2495 2471 return NULL; 2496 - } 2497 2472 2498 2473 if (unlikely(!p->scx.slice)) { 2499 2474 struct scx_sched *sch = rcu_dereference_sched(scx_root); ··· 3592 3575 int node; 3593 3576 3594 3577 irq_work_sync(&sch->error_irq_work); 3595 - kthread_stop(sch->helper->task); 3578 + kthread_destroy_worker(sch->helper); 3596 3579 3597 3580 free_percpu(sch->pcpu); 3598 3581 ··· 4335 4318 scx_dsp_max_batch = 0; 4336 4319 free_kick_syncs(); 4337 4320 4321 + if (scx_bypassed_for_enable) { 4322 + scx_bypassed_for_enable = false; 4323 + scx_bypass(false); 4324 + } 4325 + 4338 4326 mutex_unlock(&scx_enable_mutex); 4339 4327 4340 4328 WARN_ON_ONCE(scx_set_enable_state(SCX_DISABLED) != SCX_DISABLING); ··· 4808 4786 return sch; 4809 4787 4810 4788 err_stop_helper: 4811 - kthread_stop(sch->helper->task); 4789 + kthread_destroy_worker(sch->helper); 4812 4790 err_free_pcpu: 4813 4791 free_percpu(sch->pcpu); 4814 4792 err_free_gdsqs: ··· 4992 4970 * Init in bypass mode to guarantee forward progress. 4993 4971 */ 4994 4972 scx_bypass(true); 4973 + scx_bypassed_for_enable = true; 4995 4974 4996 4975 for (i = SCX_OPI_NORMAL_BEGIN; i < SCX_OPI_NORMAL_END; i++) 4997 4976 if (((void (**)(void))ops)[i]) ··· 5090 5067 scx_task_iter_stop(&sti); 5091 5068 percpu_up_write(&scx_fork_rwsem); 5092 5069 5070 + scx_bypassed_for_enable = false; 5093 5071 scx_bypass(false); 5094 5072 5095 5073 if (!scx_tryset_enable_state(SCX_ENABLED, SCX_ENABLING)) {
+1 -1
kernel/trace/bpf_trace.c
··· 965 965 .ret_type = RET_INTEGER, 966 966 .arg1_type = ARG_PTR_TO_BTF_ID, 967 967 .arg1_btf_id = &bpf_d_path_btf_ids[0], 968 - .arg2_type = ARG_PTR_TO_MEM, 968 + .arg2_type = ARG_PTR_TO_MEM | MEM_WRITE, 969 969 .arg3_type = ARG_CONST_SIZE_OR_ZERO, 970 970 .allowed = bpf_d_path_allowed, 971 971 };
+5 -2
kernel/trace/ftrace.c
··· 4518 4518 unsigned long direct; 4519 4519 4520 4520 direct = ftrace_find_rec_direct(rec->ip); 4521 - if (direct) 4522 - seq_printf(m, "\n\tdirect-->%pS", (void *)direct); 4521 + if (direct) { 4522 + seq_printf(m, "\n\tdirect%s-->%pS", 4523 + ftrace_is_jmp(direct) ? "(jmp)" : "", 4524 + (void *)ftrace_jmp_get(direct)); 4525 + } 4523 4526 } 4524 4527 } 4525 4528
+1 -1
kernel/trace/trace.c
··· 10507 10507 10508 10508 /* Disable all the flags that were enabled coming in */ 10509 10509 for (i = 0; i < TRACE_FLAGS_MAX_SIZE; i++) { 10510 - if ((1 << i) & ZEROED_TRACE_FLAGS) 10510 + if ((1ULL << i) & ZEROED_TRACE_FLAGS) 10511 10511 set_tracer_flag(tr, 1ULL << i, 0); 10512 10512 } 10513 10513
+2
kernel/trace/trace_events.c
··· 700 700 701 701 #ifdef CONFIG_PERF_EVENTS 702 702 case TRACE_REG_PERF_REGISTER: 703 + if (!call->class->perf_probe) 704 + return -ENODEV; 703 705 return tracepoint_probe_register(call->tp, 704 706 call->class->perf_probe, 705 707 call);
+2
lib/crypto/riscv/.gitignore
··· 1 + # SPDX-License-Identifier: GPL-2.0-only 2 + poly1305-core.S
+1 -1
lib/kunit/Kconfig
··· 28 28 bool "Enable KUnit tests which print BUG stacktraces" 29 29 depends on KUNIT_TEST 30 30 depends on !UML 31 - default y 31 + default !PANIC_ON_OOPS 32 32 help 33 33 Enables fault handling tests for the KUnit framework. These tests may 34 34 trigger a kernel BUG(), and the associated stack trace, even when they
+3 -4
lib/kunit/device.c
··· 106 106 107 107 /* Helper which creates a kunit_device, attaches it to the kunit_bus*/ 108 108 static struct kunit_device *kunit_device_register_internal(struct kunit *test, 109 - const char *name, 110 - const struct device_driver *drv) 109 + const char *name) 111 110 { 112 111 struct kunit_device *kunit_dev; 113 112 int err = -ENOMEM; ··· 149 150 const char *name, 150 151 const struct device_driver *drv) 151 152 { 152 - struct kunit_device *kunit_dev = kunit_device_register_internal(test, name, drv); 153 + struct kunit_device *kunit_dev = kunit_device_register_internal(test, name); 153 154 154 155 if (IS_ERR_OR_NULL(kunit_dev)) 155 156 return ERR_CAST(kunit_dev); ··· 171 172 if (IS_ERR(drv)) 172 173 return ERR_CAST(drv); 173 174 174 - dev = kunit_device_register_internal(test, name, drv); 175 + dev = kunit_device_register_internal(test, name); 175 176 if (IS_ERR(dev)) { 176 177 kunit_release_action(test, driver_unregister_wrapper, (void *)drv); 177 178 return ERR_CAST(dev);
+17 -21
mm/shmem.c
··· 4019 4019 whiteout = d_alloc(old_dentry->d_parent, &old_dentry->d_name); 4020 4020 if (!whiteout) 4021 4021 return -ENOMEM; 4022 - 4023 4022 error = shmem_mknod(idmap, old_dir, whiteout, 4024 4023 S_IFCHR | WHITEOUT_MODE, WHITEOUT_DEV); 4025 4024 dput(whiteout); 4026 - if (error) 4027 - return error; 4028 - 4029 - /* 4030 - * Cheat and hash the whiteout while the old dentry is still in 4031 - * place, instead of playing games with FS_RENAME_DOES_D_MOVE. 4032 - * 4033 - * d_lookup() will consistently find one of them at this point, 4034 - * not sure which one, but that isn't even important. 4035 - */ 4036 - d_rehash(whiteout); 4037 - return 0; 4025 + return error; 4038 4026 } 4039 4027 4040 4028 /* ··· 4038 4050 { 4039 4051 struct inode *inode = d_inode(old_dentry); 4040 4052 int they_are_dirs = S_ISDIR(inode->i_mode); 4053 + bool had_offset = false; 4041 4054 int error; 4042 4055 4043 4056 if (flags & ~(RENAME_NOREPLACE | RENAME_EXCHANGE | RENAME_WHITEOUT)) ··· 4051 4062 if (!simple_empty(new_dentry)) 4052 4063 return -ENOTEMPTY; 4053 4064 4054 - if (flags & RENAME_WHITEOUT) { 4055 - error = shmem_whiteout(idmap, old_dir, old_dentry); 4056 - if (error) 4057 - return error; 4058 - } 4059 - 4060 - error = simple_offset_rename(old_dir, old_dentry, new_dir, new_dentry); 4061 - if (error) 4065 + error = simple_offset_add(shmem_get_offset_ctx(new_dir), new_dentry); 4066 + if (error == -EBUSY) 4067 + had_offset = true; 4068 + else if (unlikely(error)) 4062 4069 return error; 4063 4070 4071 + if (flags & RENAME_WHITEOUT) { 4072 + error = shmem_whiteout(idmap, old_dir, old_dentry); 4073 + if (error) { 4074 + if (!had_offset) 4075 + simple_offset_remove(shmem_get_offset_ctx(new_dir), 4076 + new_dentry); 4077 + return error; 4078 + } 4079 + } 4080 + 4081 + simple_offset_rename(old_dir, old_dentry, new_dir, new_dentry); 4064 4082 if (d_really_is_positive(new_dentry)) { 4065 4083 (void) shmem_unlink(new_dir, new_dentry); 4066 4084 if (they_are_dirs) {
+2
mm/slub.c
··· 6539 6539 6540 6540 guard(preempt)(); 6541 6541 6542 + head = kasan_reset_tag(head); 6543 + 6542 6544 df = this_cpu_ptr(&defer_free_objects); 6543 6545 if (llist_add(head + s->offset, &df->objects)) 6544 6546 irq_work_queue(&df->work);
+8 -1
net/caif/cffrml.c
··· 92 92 len = le16_to_cpu(tmp); 93 93 94 94 /* Subtract for FCS on length if FCS is not used. */ 95 - if (!this->dofcs) 95 + if (!this->dofcs) { 96 + if (len < 2) { 97 + ++cffrml_rcv_error; 98 + pr_err("Invalid frame length (%d)\n", len); 99 + cfpkt_destroy(pkt); 100 + return -EPROTO; 101 + } 96 102 len -= 2; 103 + } 97 104 98 105 if (cfpkt_setlen(pkt, len) < 0) { 99 106 ++cffrml_rcv_error;
-1
net/can/Kconfig
··· 5 5 6 6 menuconfig CAN 7 7 tristate "CAN bus subsystem support" 8 - select CAN_DEV 9 8 help 10 9 Controller Area Network (CAN) is a slow (up to 1Mbit/s) serial 11 10 communications protocol. Development of the CAN bus started in
+6
net/can/j1939/socket.c
··· 482 482 goto out_release_sock; 483 483 } 484 484 485 + if (ndev->reg_state != NETREG_REGISTERED) { 486 + dev_put(ndev); 487 + ret = -ENODEV; 488 + goto out_release_sock; 489 + } 490 + 485 491 can_ml = can_get_ml_priv(ndev); 486 492 if (!can_ml) { 487 493 dev_put(ndev);
+2
net/can/j1939/transport.c
··· 1567 1567 if (active) { 1568 1568 j1939_session_put(active); 1569 1569 ret = -EAGAIN; 1570 + } else if (priv->ndev->reg_state != NETREG_REGISTERED) { 1571 + ret = -ENODEV; 1570 1572 } else { 1571 1573 WARN_ON_ONCE(session->state != J1939_SESSION_NEW); 1572 1574 list_add_tail(&session->active_session_list_entry,
+24 -6
net/ethtool/ioctl.c
··· 2383 2383 return -ENOMEM; 2384 2384 WARN_ON_ONCE(!ret); 2385 2385 2386 - gstrings.len = ret; 2386 + if (gstrings.len && gstrings.len != ret) 2387 + gstrings.len = 0; 2388 + else 2389 + gstrings.len = ret; 2387 2390 2388 2391 if (gstrings.len) { 2389 2392 data = vzalloc(array_size(gstrings.len, ETH_GSTRING_LEN)); ··· 2512 2509 if (copy_from_user(&stats, useraddr, sizeof(stats))) 2513 2510 return -EFAULT; 2514 2511 2515 - stats.n_stats = n_stats; 2512 + if (stats.n_stats && stats.n_stats != n_stats) 2513 + stats.n_stats = 0; 2514 + else 2515 + stats.n_stats = n_stats; 2516 2516 2517 - if (n_stats) { 2518 - data = vzalloc(array_size(n_stats, sizeof(u64))); 2517 + if (stats.n_stats) { 2518 + data = vzalloc(array_size(stats.n_stats, sizeof(u64))); 2519 2519 if (!data) 2520 2520 return -ENOMEM; 2521 2521 ops->get_ethtool_stats(dev, &stats, data); ··· 2530 2524 if (copy_to_user(useraddr, &stats, sizeof(stats))) 2531 2525 goto out; 2532 2526 useraddr += sizeof(stats); 2533 - if (n_stats && copy_to_user(useraddr, data, array_size(n_stats, sizeof(u64)))) 2527 + if (stats.n_stats && 2528 + copy_to_user(useraddr, data, 2529 + array_size(stats.n_stats, sizeof(u64)))) 2534 2530 goto out; 2535 2531 ret = 0; 2536 2532 ··· 2568 2560 return -EOPNOTSUPP; 2569 2561 2570 2562 n_stats = phy_ops->get_sset_count(phydev); 2563 + if (stats->n_stats && stats->n_stats != n_stats) { 2564 + stats->n_stats = 0; 2565 + return 0; 2566 + } 2571 2567 2572 2568 ret = ethtool_vzalloc_stats_array(n_stats, data); 2573 2569 if (ret) ··· 2592 2580 return -EOPNOTSUPP; 2593 2581 2594 2582 n_stats = ops->get_sset_count(dev, ETH_SS_PHY_STATS); 2583 + if (stats->n_stats && stats->n_stats != n_stats) { 2584 + stats->n_stats = 0; 2585 + return 0; 2586 + } 2595 2587 2596 2588 ret = ethtool_vzalloc_stats_array(n_stats, data); 2597 2589 if (ret) ··· 2632 2616 } 2633 2617 2634 2618 useraddr += sizeof(stats); 2635 - if (copy_to_user(useraddr, data, array_size(stats.n_stats, sizeof(u64)))) 2619 + if (stats.n_stats && 2620 + copy_to_user(useraddr, data, 2621 + array_size(stats.n_stats, sizeof(u64)))) 2636 2622 ret = -EFAULT; 2637 2623 2638 2624 out:
+7 -1
net/handshake/request.c
··· 276 276 out_unlock: 277 277 spin_unlock(&hn->hn_lock); 278 278 out_err: 279 + /* Restore original destructor so socket teardown still runs on failure */ 280 + req->hr_sk->sk_destruct = req->hr_odestruct; 279 281 trace_handshake_submit_err(net, req, req->hr_sk, ret); 280 282 handshake_req_destroy(req); 281 283 return ret; ··· 326 324 327 325 hn = handshake_pernet(net); 328 326 if (hn && remove_pending(hn, req)) { 329 - /* Request hadn't been accepted */ 327 + /* Request hadn't been accepted - mark cancelled */ 328 + if (test_and_set_bit(HANDSHAKE_F_REQ_COMPLETED, &req->hr_flags)) { 329 + trace_handshake_cancel_busy(net, req, sk); 330 + return false; 331 + } 330 332 goto out_true; 331 333 } 332 334 if (test_and_set_bit(HANDSHAKE_F_REQ_COMPLETED, &req->hr_flags)) {
+2
net/hsr/hsr_forward.c
··· 205 205 __pskb_copy(frame->skb_prp, 206 206 skb_headroom(frame->skb_prp), 207 207 GFP_ATOMIC); 208 + if (!frame->skb_std) 209 + return NULL; 208 210 } else { 209 211 /* Unexpected */ 210 212 WARN_ONCE(1, "%s:%d: Unexpected frame received (port_src %s)\n",
+51 -4
net/ipv4/inet_fragment.c
··· 218 218 219 219 pure_initcall(inet_frag_wq_init); 220 220 221 + void fqdir_pre_exit(struct fqdir *fqdir) 222 + { 223 + struct inet_frag_queue *fq; 224 + struct rhashtable_iter hti; 225 + 226 + /* Prevent creation of new frags. 227 + * Pairs with READ_ONCE() in inet_frag_find(). 228 + */ 229 + WRITE_ONCE(fqdir->high_thresh, 0); 230 + 231 + /* Pairs with READ_ONCE() in inet_frag_kill(), ip_expire() 232 + * and ip6frag_expire_frag_queue(). 233 + */ 234 + WRITE_ONCE(fqdir->dead, true); 235 + 236 + rhashtable_walk_enter(&fqdir->rhashtable, &hti); 237 + rhashtable_walk_start(&hti); 238 + 239 + while ((fq = rhashtable_walk_next(&hti))) { 240 + if (IS_ERR(fq)) { 241 + if (PTR_ERR(fq) != -EAGAIN) 242 + break; 243 + continue; 244 + } 245 + spin_lock_bh(&fq->lock); 246 + if (!(fq->flags & INET_FRAG_COMPLETE)) 247 + inet_frag_queue_flush(fq, 0); 248 + spin_unlock_bh(&fq->lock); 249 + } 250 + 251 + rhashtable_walk_stop(&hti); 252 + rhashtable_walk_exit(&hti); 253 + } 254 + EXPORT_SYMBOL(fqdir_pre_exit); 255 + 221 256 void fqdir_exit(struct fqdir *fqdir) 222 257 { 223 258 INIT_WORK(&fqdir->destroy_work, fqdir_work_fn); ··· 298 263 kmem_cache_free(f->frags_cachep, q); 299 264 } 300 265 301 - unsigned int inet_frag_rbtree_purge(struct rb_root *root, 302 - enum skb_drop_reason reason) 266 + static unsigned int 267 + inet_frag_rbtree_purge(struct rb_root *root, enum skb_drop_reason reason) 303 268 { 304 269 struct rb_node *p = rb_first(root); 305 270 unsigned int sum = 0; ··· 319 284 } 320 285 return sum; 321 286 } 322 - EXPORT_SYMBOL(inet_frag_rbtree_purge); 287 + 288 + void inet_frag_queue_flush(struct inet_frag_queue *q, 289 + enum skb_drop_reason reason) 290 + { 291 + unsigned int sum; 292 + 293 + reason = reason ?: SKB_DROP_REASON_FRAG_REASM_TIMEOUT; 294 + sum = inet_frag_rbtree_purge(&q->rb_fragments, reason); 295 + sub_frag_mem_limit(q->fqdir, sum); 296 + } 297 + EXPORT_SYMBOL(inet_frag_queue_flush); 323 298 324 299 void inet_frag_destroy(struct inet_frag_queue *q) 325 300 { ··· 372 327 373 328 timer_setup(&q->timer, f->frag_expire, 0); 374 329 spin_lock_init(&q->lock); 375 - /* One reference for the timer, one for the hash table. */ 330 + /* One reference for the timer, one for the hash table. 331 + * We never take any extra references, only decrement this field. 332 + */ 376 333 refcount_set(&q->refcnt, 2); 377 334 378 335 return q;
+9 -13
net/ipv4/ip_fragment.c
··· 134 134 net = qp->q.fqdir->net; 135 135 136 136 rcu_read_lock(); 137 - 138 - /* Paired with WRITE_ONCE() in fqdir_pre_exit(). */ 139 - if (READ_ONCE(qp->q.fqdir->dead)) 140 - goto out_rcu_unlock; 141 - 142 137 spin_lock(&qp->q.lock); 143 138 144 139 if (qp->q.flags & INET_FRAG_COMPLETE) ··· 141 146 142 147 qp->q.flags |= INET_FRAG_DROP; 143 148 inet_frag_kill(&qp->q, &refs); 149 + 150 + /* Paired with WRITE_ONCE() in fqdir_pre_exit(). */ 151 + if (READ_ONCE(qp->q.fqdir->dead)) { 152 + inet_frag_queue_flush(&qp->q, 0); 153 + goto out; 154 + } 155 + 144 156 __IP_INC_STATS(net, IPSTATS_MIB_REASMFAILS); 145 157 __IP_INC_STATS(net, IPSTATS_MIB_REASMTIMEOUT); 146 158 ··· 242 240 243 241 static int ip_frag_reinit(struct ipq *qp) 244 242 { 245 - unsigned int sum_truesize = 0; 246 - 247 - if (!mod_timer(&qp->q.timer, jiffies + qp->q.fqdir->timeout)) { 248 - refcount_inc(&qp->q.refcnt); 243 + if (!mod_timer_pending(&qp->q.timer, jiffies + qp->q.fqdir->timeout)) 249 244 return -ETIMEDOUT; 250 - } 251 245 252 - sum_truesize = inet_frag_rbtree_purge(&qp->q.rb_fragments, 253 - SKB_DROP_REASON_FRAG_TOO_FAR); 254 - sub_frag_mem_limit(qp->q.fqdir, sum_truesize); 246 + inet_frag_queue_flush(&qp->q, SKB_DROP_REASON_FRAG_TOO_FAR); 255 247 256 248 qp->q.flags = 0; 257 249 qp->q.len = 0;
+1 -1
net/mptcp/Kconfig
··· 4 4 depends on INET 5 5 select SKB_EXTENSIONS 6 6 select CRYPTO_LIB_SHA256 7 - select CRYPTO 7 + select CRYPTO_LIB_UTILS 8 8 help 9 9 Multipath TCP (MPTCP) connections send and receive data over multiple 10 10 subflows in order to utilize multiple network paths. Each subflow
+2 -1
net/mptcp/pm_netlink.c
··· 119 119 } 120 120 121 121 if (tb[MPTCP_PM_ADDR_ATTR_FLAGS]) 122 - entry->flags = nla_get_u32(tb[MPTCP_PM_ADDR_ATTR_FLAGS]); 122 + entry->flags = nla_get_u32(tb[MPTCP_PM_ADDR_ATTR_FLAGS]) & 123 + MPTCP_PM_ADDR_FLAGS_MASK; 123 124 124 125 if (tb[MPTCP_PM_ADDR_ATTR_PORT]) 125 126 entry->addr.port = htons(nla_get_u16(tb[MPTCP_PM_ADDR_ATTR_PORT]));
+14 -8
net/mptcp/protocol.c
··· 1623 1623 struct mptcp_sendmsg_info info = { 1624 1624 .flags = flags, 1625 1625 }; 1626 - bool do_check_data_fin = false; 1626 + bool copied = false; 1627 1627 int push_count = 1; 1628 1628 1629 1629 while (mptcp_send_head(sk) && (push_count > 0)) { ··· 1665 1665 push_count--; 1666 1666 continue; 1667 1667 } 1668 - do_check_data_fin = true; 1668 + copied = true; 1669 1669 } 1670 1670 } 1671 1671 } ··· 1674 1674 if (ssk) 1675 1675 mptcp_push_release(ssk, &info); 1676 1676 1677 - /* ensure the rtx timer is running */ 1678 - if (!mptcp_rtx_timer_pending(sk)) 1679 - mptcp_reset_rtx_timer(sk); 1680 - if (do_check_data_fin) 1677 + /* Avoid scheduling the rtx timer if no data has been pushed; the timer 1678 + * will be updated on positive acks by __mptcp_cleanup_una(). 1679 + */ 1680 + if (copied) { 1681 + if (!mptcp_rtx_timer_pending(sk)) 1682 + mptcp_reset_rtx_timer(sk); 1681 1683 mptcp_check_send_data_fin(sk); 1684 + } 1682 1685 } 1683 1686 1684 1687 static void __mptcp_subflow_push_pending(struct sock *sk, struct sock *ssk, bool first) ··· 2769 2766 2770 2767 /* 2771 2768 * make the whole retrans decision, xmit, disallow 2772 - * fallback atomic 2769 + * fallback atomic, note that we can't retrans even 2770 + * when an infinite fallback is in progress, i.e. new 2771 + * subflows are disallowed. 2773 2772 */ 2774 2773 spin_lock_bh(&msk->fallback_lock); 2775 - if (__mptcp_check_fallback(msk)) { 2774 + if (__mptcp_check_fallback(msk) || 2775 + !msk->allow_subflows) { 2776 2776 spin_unlock_bh(&msk->fallback_lock); 2777 2777 release_sock(ssk); 2778 2778 goto clear_scheduled;
+3
net/netfilter/ipvs/ip_vs_xmit.c
··· 408 408 return -1; 409 409 410 410 err_unreach: 411 + if (!skb->dev) 412 + skb->dev = skb_dst(skb)->dev; 413 + 411 414 dst_link_failure(skb); 412 415 return -1; 413 416 }
+14 -11
net/netfilter/nf_conncount.c
··· 172 172 struct nf_conn *found_ct; 173 173 unsigned int collect = 0; 174 174 bool refcounted = false; 175 + int err = 0; 175 176 176 177 if (!get_ct_or_tuple_from_skb(net, skb, l3num, &ct, &tuple, &zone, &refcounted)) 177 178 return -ENOENT; 178 179 179 180 if (ct && nf_ct_is_confirmed(ct)) { 180 - if (refcounted) 181 - nf_ct_put(ct); 182 - return -EEXIST; 181 + err = -EEXIST; 182 + goto out_put; 183 183 } 184 184 185 185 if ((u32)jiffies == list->last_gc) ··· 231 231 } 232 232 233 233 add_new_node: 234 - if (WARN_ON_ONCE(list->count > INT_MAX)) 235 - return -EOVERFLOW; 234 + if (WARN_ON_ONCE(list->count > INT_MAX)) { 235 + err = -EOVERFLOW; 236 + goto out_put; 237 + } 236 238 237 239 conn = kmem_cache_alloc(conncount_conn_cachep, GFP_ATOMIC); 238 - if (conn == NULL) 239 - return -ENOMEM; 240 + if (conn == NULL) { 241 + err = -ENOMEM; 242 + goto out_put; 243 + } 240 244 241 245 conn->tuple = tuple; 242 246 conn->zone = *zone; ··· 253 249 out_put: 254 250 if (refcounted) 255 251 nf_ct_put(ct); 256 - return 0; 252 + return err; 257 253 } 258 254 259 255 int nf_conncount_add_skb(struct net *net, ··· 460 456 461 457 rb_link_node_rcu(&rbconn->node, parent, rbnode); 462 458 rb_insert_color(&rbconn->node, root); 463 - 464 - if (refcounted) 465 - nf_ct_put(ct); 466 459 } 467 460 out_unlock: 461 + if (refcounted) 462 + nf_ct_put(ct); 468 463 spin_unlock_bh(&nf_conncount_locks[hash]); 469 464 return count; 470 465 }
+3
net/netfilter/nf_conntrack_core.c
··· 2487 2487 void nf_conntrack_cleanup_net_list(struct list_head *net_exit_list) 2488 2488 { 2489 2489 struct nf_ct_iter_data iter_data = {}; 2490 + unsigned long start = jiffies; 2490 2491 struct net *net; 2491 2492 int busy; 2492 2493 ··· 2508 2507 busy = 1; 2509 2508 } 2510 2509 if (busy) { 2510 + DEBUG_NET_WARN_ONCE(time_after(jiffies, start + 60 * HZ), 2511 + "conntrack cleanup blocked for 60s"); 2511 2512 schedule(); 2512 2513 goto i_see_dead_people; 2513 2514 }
+3 -1
net/netfilter/nf_flow_table_path.c
··· 250 250 if (nft_dev_fill_forward_path(route, dst, ct, dir, ha, &stack) >= 0) 251 251 nft_dev_path_info(&stack, &info, ha, &ft->data); 252 252 253 + if (info.outdev) 254 + route->tuple[dir].out.ifindex = info.outdev->ifindex; 255 + 253 256 if (!info.indev || !nft_flowtable_find_dev(info.indev, ft)) 254 257 return; 255 258 ··· 272 269 273 270 route->tuple[!dir].in.num_encaps = info.num_encaps; 274 271 route->tuple[!dir].in.ingress_vlans = info.ingress_vlans; 275 - route->tuple[dir].out.ifindex = info.outdev->ifindex; 276 272 277 273 if (info.xmit_type == FLOW_OFFLOAD_XMIT_DIRECT) { 278 274 memcpy(route->tuple[dir].out.h_source, info.h_source, ETH_ALEN);
+1 -13
net/netfilter/nf_nat_core.c
··· 294 294 295 295 ct = nf_ct_tuplehash_to_ctrack(thash); 296 296 297 - /* NB: IP_CT_DIR_ORIGINAL should be impossible because 298 - * nf_nat_used_tuple() handles origin collisions. 299 - * 300 - * Handle remote chance other CPU confirmed its ct right after. 301 - */ 302 - if (thash->tuple.dst.dir != IP_CT_DIR_REPLY) 303 - goto out; 304 - 305 297 /* clashing connection subject to NAT? Retry with new tuple. */ 306 298 if (READ_ONCE(ct->status) & uses_nat) 307 299 goto out; 308 300 309 301 if (nf_ct_tuple_equal(&ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple, 310 - &ignored_ct->tuplehash[IP_CT_DIR_REPLY].tuple) && 311 - nf_ct_tuple_equal(&ct->tuplehash[IP_CT_DIR_REPLY].tuple, 312 - &ignored_ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple)) { 302 + &ignored_ct->tuplehash[IP_CT_DIR_REPLY].tuple)) 313 303 taken = false; 314 - goto out; 315 - } 316 304 out: 317 305 nf_ct_put(ct); 318 306 return taken;
+67 -17
net/netfilter/nf_tables_api.c
··· 123 123 124 124 table->validate_state = new_validate_state; 125 125 } 126 + 127 + static bool nft_chain_vstate_valid(const struct nft_ctx *ctx, 128 + const struct nft_chain *chain) 129 + { 130 + const struct nft_base_chain *base_chain; 131 + enum nft_chain_types type; 132 + u8 hooknum; 133 + 134 + if (WARN_ON_ONCE(!nft_is_base_chain(ctx->chain))) 135 + return false; 136 + 137 + base_chain = nft_base_chain(ctx->chain); 138 + hooknum = base_chain->ops.hooknum; 139 + type = base_chain->type->type; 140 + 141 + /* chain is already validated for this call depth */ 142 + if (chain->vstate.depth >= ctx->level && 143 + chain->vstate.hook_mask[type] & BIT(hooknum)) 144 + return true; 145 + 146 + return false; 147 + } 148 + 126 149 static void nf_tables_trans_destroy_work(struct work_struct *w); 127 150 128 151 static void nft_trans_gc_work(struct work_struct *work); ··· 4102 4079 nf_tables_rule_destroy(ctx, rule); 4103 4080 } 4104 4081 4082 + static void nft_chain_vstate_update(const struct nft_ctx *ctx, struct nft_chain *chain) 4083 + { 4084 + const struct nft_base_chain *base_chain; 4085 + enum nft_chain_types type; 4086 + u8 hooknum; 4087 + 4088 + /* ctx->chain must hold the calling base chain. */ 4089 + if (WARN_ON_ONCE(!nft_is_base_chain(ctx->chain))) { 4090 + memset(&chain->vstate, 0, sizeof(chain->vstate)); 4091 + return; 4092 + } 4093 + 4094 + base_chain = nft_base_chain(ctx->chain); 4095 + hooknum = base_chain->ops.hooknum; 4096 + type = base_chain->type->type; 4097 + 4098 + BUILD_BUG_ON(BIT(NF_INET_NUMHOOKS) > U8_MAX); 4099 + 4100 + chain->vstate.hook_mask[type] |= BIT(hooknum); 4101 + if (chain->vstate.depth < ctx->level) 4102 + chain->vstate.depth = ctx->level; 4103 + } 4104 + 4105 4105 /** nft_chain_validate - loop detection and hook validation 4106 4106 * 4107 4107 * @ctx: context containing call depth and base chain ··· 4134 4088 * and set lookups until either the jump limit is hit or all reachable 4135 4089 * chains have been validated. 4136 4090 */ 4137 - int nft_chain_validate(const struct nft_ctx *ctx, const struct nft_chain *chain) 4091 + int nft_chain_validate(const struct nft_ctx *ctx, struct nft_chain *chain) 4138 4092 { 4139 4093 struct nft_expr *expr, *last; 4140 4094 struct nft_rule *rule; 4141 4095 int err; 4142 4096 4097 + BUILD_BUG_ON(NFT_JUMP_STACK_SIZE > 255); 4143 4098 if (ctx->level == NFT_JUMP_STACK_SIZE) 4144 4099 return -EMLINK; 4100 + 4101 + if (ctx->level > 0) { 4102 + /* jumps to base chains are not allowed. */ 4103 + if (nft_is_base_chain(chain)) 4104 + return -ELOOP; 4105 + 4106 + if (nft_chain_vstate_valid(ctx, chain)) 4107 + return 0; 4108 + } 4145 4109 4146 4110 list_for_each_entry(rule, &chain->rules, list) { 4147 4111 if (fatal_signal_pending(current)) ··· 4171 4115 if (err < 0) 4172 4116 return err; 4173 4117 } 4118 + 4119 + cond_resched(); 4174 4120 } 4175 4121 4122 + nft_chain_vstate_update(ctx, chain); 4176 4123 return 0; 4177 4124 } 4178 4125 EXPORT_SYMBOL_GPL(nft_chain_validate); ··· 4187 4128 .net = net, 4188 4129 .family = table->family, 4189 4130 }; 4190 - int err; 4131 + int err = 0; 4191 4132 4192 4133 list_for_each_entry(chain, &table->chains, list) { 4193 4134 if (!nft_is_base_chain(chain)) ··· 4196 4137 ctx.chain = chain; 4197 4138 err = nft_chain_validate(&ctx, chain); 4198 4139 if (err < 0) 4199 - return err; 4200 - 4201 - cond_resched(); 4140 + goto err; 4202 4141 } 4203 4142 4204 - return 0; 4143 + err: 4144 + list_for_each_entry(chain, &table->chains, list) 4145 + memset(&chain->vstate, 0, sizeof(chain->vstate)); 4146 + 4147 + return err; 4205 4148 } 4206 4149 4207 4150 int nft_setelem_validate(const struct nft_ctx *ctx, struct nft_set *set, ··· 11737 11676 enum nft_data_types type, 11738 11677 unsigned int len) 11739 11678 { 11740 - int err; 11741 - 11742 11679 switch (reg) { 11743 11680 case NFT_REG_VERDICT: 11744 11681 if (type != NFT_DATA_VERDICT) 11745 11682 return -EINVAL; 11746 - 11747 - if (data != NULL && 11748 - (data->verdict.code == NFT_GOTO || 11749 - data->verdict.code == NFT_JUMP)) { 11750 - err = nft_chain_validate(ctx, data->verdict.chain); 11751 - if (err < 0) 11752 - return err; 11753 - } 11754 - 11755 11683 break; 11756 11684 default: 11757 11685 if (type != NFT_DATA_VALUE)
+3 -1
net/netrom/nr_out.c
··· 43 43 frontlen = skb_headroom(skb); 44 44 45 45 while (skb->len > 0) { 46 - if ((skbn = sock_alloc_send_skb(sk, frontlen + NR_MAX_PACKET_SIZE, 0, &err)) == NULL) 46 + if ((skbn = sock_alloc_send_skb(sk, frontlen + NR_MAX_PACKET_SIZE, 0, &err)) == NULL) { 47 + kfree_skb(skb); 47 48 return; 49 + } 48 50 49 51 skb_reserve(skbn, frontlen); 50 52
+10 -3
net/openvswitch/flow_netlink.c
··· 2802 2802 return err; 2803 2803 } 2804 2804 2805 - static bool validate_push_nsh(const struct nlattr *attr, bool log) 2805 + static bool validate_push_nsh(const struct nlattr *a, bool log) 2806 2806 { 2807 + struct nlattr *nsh_key = nla_data(a); 2807 2808 struct sw_flow_match match; 2808 2809 struct sw_flow_key key; 2809 2810 2811 + /* There must be one and only one NSH header. */ 2812 + if (!nla_ok(nsh_key, nla_len(a)) || 2813 + nla_total_size(nla_len(nsh_key)) != nla_len(a) || 2814 + nla_type(nsh_key) != OVS_KEY_ATTR_NSH) 2815 + return false; 2816 + 2810 2817 ovs_match_init(&match, &key, true, NULL); 2811 - return !nsh_key_put_from_nlattr(attr, &match, false, true, log); 2818 + return !nsh_key_put_from_nlattr(nsh_key, &match, false, true, log); 2812 2819 } 2813 2820 2814 2821 /* Return false if there are any non-masked bits set. ··· 3396 3389 return -EINVAL; 3397 3390 } 3398 3391 mac_proto = MAC_PROTO_NONE; 3399 - if (!validate_push_nsh(nla_data(a), log)) 3392 + if (!validate_push_nsh(a, log)) 3400 3393 return -EINVAL; 3401 3394 break; 3402 3395
+9
net/sched/act_mirred.c
··· 281 281 282 282 want_ingress = tcf_mirred_act_wants_ingress(m_eaction); 283 283 284 + if (dev == skb->dev && want_ingress == at_ingress) { 285 + pr_notice_once("tc mirred: Loop (%s:%s --> %s:%s)\n", 286 + netdev_name(skb->dev), 287 + at_ingress ? "ingress" : "egress", 288 + netdev_name(dev), 289 + want_ingress ? "ingress" : "egress"); 290 + goto err_cant_do; 291 + } 292 + 284 293 /* All mirred/redirected skbs should clear previous ct info */ 285 294 nf_reset_ct(skb_to_send); 286 295 if (want_ingress && !at_ingress) /* drop dst for egress -> ingress */
+5 -1
net/sched/sch_ets.c
··· 652 652 sch_tree_lock(sch); 653 653 654 654 for (i = nbands; i < oldbands; i++) { 655 - if (i >= q->nstrict && q->classes[i].qdisc->q.qlen) 655 + if (cl_is_active(&q->classes[i])) 656 656 list_del_init(&q->classes[i].alist); 657 657 qdisc_purge_queue(q->classes[i].qdisc); 658 658 } ··· 663 663 list_add_tail(&q->classes[i].alist, &q->active); 664 664 q->classes[i].deficit = quanta[i]; 665 665 } 666 + } 667 + for (i = q->nstrict; i < nstrict; i++) { 668 + if (cl_is_active(&q->classes[i])) 669 + list_del_init(&q->classes[i].alist); 666 670 } 667 671 WRITE_ONCE(q->nstrict, nstrict); 668 672 memcpy(q->prio2band, priomap, sizeof(priomap));
+2
net/sctp/ipv6.c
··· 492 492 struct ipv6_pinfo *newnp, *np = inet6_sk(sk); 493 493 struct ipv6_txoptions *opt; 494 494 495 + inet_sk(newsk)->inet_opt = NULL; 496 + 495 497 newnp = inet6_sk(newsk); 496 498 497 499 rcu_read_lock();
+4 -3
net/sctp/socket.c
··· 4863 4863 4864 4864 newsp->pf->to_sk_daddr(&asoc->peer.primary_addr, newsk); 4865 4865 newinet->inet_dport = htons(asoc->peer.port); 4866 - 4867 - newsp->pf->copy_ip_options(sk, newsk); 4868 4866 atomic_set(&newinet->inet_id, get_random_u16()); 4869 4867 4870 4868 inet_set_bit(MC_LOOP, newsk); ··· 4872 4874 4873 4875 #if IS_ENABLED(CONFIG_IPV6) 4874 4876 if (sk->sk_family == AF_INET6) { 4875 - struct ipv6_pinfo *newnp = inet6_sk(newsk); 4877 + struct ipv6_pinfo *newnp; 4876 4878 4877 4879 newinet->pinet6 = &((struct sctp6_sock *)newsk)->inet6; 4878 4880 newinet->ipv6_fl_list = NULL; 4879 4881 4882 + newnp = inet6_sk(newsk); 4880 4883 memcpy(newnp, inet6_sk(sk), sizeof(struct ipv6_pinfo)); 4881 4884 newnp->ipv6_mc_list = NULL; 4882 4885 newnp->ipv6_ac_list = NULL; 4883 4886 } 4884 4887 #endif 4888 + 4889 + newsp->pf->copy_ip_options(sk, newsk); 4885 4890 4886 4891 newsp->do_auto_asconf = 0; 4887 4892 skb_queue_head_init(&newsp->pd_lobby);
+1 -1
net/smc/Kconfig
··· 22 22 23 23 config SMC_HS_CTRL_BPF 24 24 bool "Generic eBPF hook for SMC handshake flow" 25 - depends on SMC && BPF_SYSCALL 25 + depends on SMC && BPF_JIT && BPF_SYSCALL 26 26 default y 27 27 help 28 28 SMC_HS_CTRL_BPF enables support to register generic eBPF hook for SMC
+2 -1
net/sunrpc/auth_gss/svcauth_gss.c
··· 1083 1083 } 1084 1084 1085 1085 length = min_t(unsigned int, inlen, (char *)xdr->end - (char *)xdr->p); 1086 - memcpy(page_address(in_token->pages[0]), xdr->p, length); 1086 + if (length) 1087 + memcpy(page_address(in_token->pages[0]), xdr->p, length); 1087 1088 inlen -= length; 1088 1089 1089 1090 to_offs = length;
+5 -2
net/sunrpc/xprtrdma/svc_rdma_rw.c
··· 841 841 for (page_no = 0; page_no < numpages; page_no++) { 842 842 unsigned int page_len; 843 843 844 + if (head->rc_curpage >= rqstp->rq_maxpages) 845 + return -EINVAL; 846 + 844 847 page_len = min_t(unsigned int, remaining, 845 848 PAGE_SIZE - head->rc_pageoff); 846 849 ··· 851 848 head->rc_page_count++; 852 849 853 850 dst = page_address(rqstp->rq_pages[head->rc_curpage]); 854 - memcpy(dst + head->rc_curpage, src + offset, page_len); 851 + memcpy((unsigned char *)dst + head->rc_pageoff, src + offset, page_len); 855 852 856 853 head->rc_readbytes += page_len; 857 854 head->rc_pageoff += page_len; ··· 863 860 offset += page_len; 864 861 } 865 862 866 - return -EINVAL; 863 + return 0; 867 864 } 868 865 869 866 /**
+1 -1
net/unix/garbage.c
··· 199 199 } 200 200 } 201 201 202 - static DEFINE_SPINLOCK(unix_gc_lock); 202 + static __cacheline_aligned_in_smp DEFINE_SPINLOCK(unix_gc_lock); 203 203 204 204 void unix_add_edges(struct scm_fp_list *fpl, struct unix_sock *receiver) 205 205 {
+21
rust/helpers/dma.c
··· 22 22 { 23 23 return dma_set_mask_and_coherent(dev, mask); 24 24 } 25 + 26 + int rust_helper_dma_set_mask(struct device *dev, u64 mask) 27 + { 28 + return dma_set_mask(dev, mask); 29 + } 30 + 31 + int rust_helper_dma_set_coherent_mask(struct device *dev, u64 mask) 32 + { 33 + return dma_set_coherent_mask(dev, mask); 34 + } 35 + 36 + int rust_helper_dma_map_sgtable(struct device *dev, struct sg_table *sgt, 37 + enum dma_data_direction dir, unsigned long attrs) 38 + { 39 + return dma_map_sgtable(dev, sgt, dir, attrs); 40 + } 41 + 42 + size_t rust_helper_dma_max_mapping_size(struct device *dev) 43 + { 44 + return dma_max_mapping_size(dev); 45 + }
+1 -1
samples/rust/rust_driver_pci.rs
··· 54 54 // Select the test. 55 55 bar.write8(index.0, Regs::TEST); 56 56 57 - let offset = u32::from_le(bar.read32(Regs::OFFSET)) as usize; 57 + let offset = bar.read32(Regs::OFFSET) as usize; 58 58 let data = bar.read8(Regs::DATA); 59 59 60 60 // Write `data` to `offset` to increase `count` by one.
+5 -1
scripts/coccicheck
··· 270 270 271 271 if [ "$COCCI" = "" ] ; then 272 272 for f in `find $srctree/scripts/coccinelle/ -name '*.cocci' -type f | sort`; do 273 - coccinelle $f 273 + if grep -q "virtual[[:space:]]\+$MODE" "$f"; then 274 + coccinelle $f 275 + else 276 + echo "warning: Skipping $f as it does not match mode '$MODE'" 277 + fi 274 278 done 275 279 else 276 280 coccinelle $COCCI
+1 -1
scripts/coccinelle/api/pm_runtime.cocci
··· 109 109 pm_runtime_api << r.pm_runtime_api; 110 110 @@ 111 111 112 - msg = "%s returns < 0 as error. Unecessary IS_ERR_VALUE at line %s" % (pm_runtime_api, p2[0].line) 112 + msg = "%s returns < 0 as error. Unnecessary IS_ERR_VALUE at line %s" % (pm_runtime_api, p2[0].line) 113 113 coccilib.report.print_report(p1[0],msg)
+26 -6
sound/hda/codecs/realtek/alc269.c
··· 1656 1656 alc236_fixup_hp_micmute_led_vref(codec, fix, action); 1657 1657 } 1658 1658 1659 + static void alc236_fixup_hp_mute_led_micmute_gpio(struct hda_codec *codec, 1660 + const struct hda_fixup *fix, int action) 1661 + { 1662 + struct alc_spec *spec = codec->spec; 1663 + 1664 + if (action == HDA_FIXUP_ACT_PRE_PROBE) 1665 + spec->micmute_led_polarity = 1; 1666 + 1667 + alc236_fixup_hp_mute_led_coefbit2(codec, fix, action); 1668 + alc_fixup_hp_gpio_led(codec, action, 0x00, 0x01); 1669 + } 1670 + 1659 1671 static inline void alc298_samsung_write_coef_pack(struct hda_codec *codec, 1660 1672 const unsigned short coefs[2]) 1661 1673 { ··· 3765 3753 ALC295_FIXUP_DELL_TAS2781_I2C, 3766 3754 ALC245_FIXUP_TAS2781_SPI_2, 3767 3755 ALC287_FIXUP_TXNW2781_I2C, 3756 + ALC287_FIXUP_TXNW2781_I2C_ASUS, 3768 3757 ALC287_FIXUP_YOGA7_14ARB7_I2C, 3769 3758 ALC245_FIXUP_HP_MUTE_LED_COEFBIT, 3770 3759 ALC245_FIXUP_HP_MUTE_LED_V1_COEFBIT, ··· 5339 5326 }, 5340 5327 [ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO] = { 5341 5328 .type = HDA_FIXUP_FUNC, 5342 - .v.func = alc236_fixup_hp_mute_led_coefbit2, 5343 - .chained = true, 5344 - .chain_id = ALC236_FIXUP_HP_GPIO_LED, 5329 + .v.func = alc236_fixup_hp_mute_led_micmute_gpio, 5345 5330 }, 5346 5331 [ALC236_FIXUP_LENOVO_INV_DMIC] = { 5347 5332 .type = HDA_FIXUP_FUNC, ··· 6064 6053 .chained = true, 6065 6054 .chain_id = ALC285_FIXUP_THINKPAD_HEADSET_JACK, 6066 6055 }, 6056 + [ALC287_FIXUP_TXNW2781_I2C_ASUS] = { 6057 + .type = HDA_FIXUP_FUNC, 6058 + .v.func = tas2781_fixup_txnw_i2c, 6059 + .chained = true, 6060 + .chain_id = ALC294_FIXUP_ASUS_SPK, 6061 + }, 6067 6062 [ALC287_FIXUP_YOGA7_14ARB7_I2C] = { 6068 6063 .type = HDA_FIXUP_FUNC, 6069 6064 .v.func = yoga7_14arb7_fixup_i2c, ··· 6788 6771 SND_PCI_QUIRK(0x103c, 0x8e61, "HP Trekker ", ALC287_FIXUP_CS35L41_I2C_2), 6789 6772 SND_PCI_QUIRK(0x103c, 0x8e62, "HP Trekker ", ALC287_FIXUP_CS35L41_I2C_2), 6790 6773 SND_PCI_QUIRK(0x103c, 0x8e8a, "HP NexusX", ALC245_FIXUP_HP_TAS2781_I2C_MUTE_LED), 6774 + SND_PCI_QUIRK(0x103c, 0x8e9c, "HP 16 Clipper OmniBook X X360", ALC287_FIXUP_CS35L41_I2C_2), 6791 6775 SND_PCI_QUIRK(0x103c, 0x8e9d, "HP 17 Turbine OmniBook X UMA", ALC287_FIXUP_CS35L41_I2C_2), 6792 6776 SND_PCI_QUIRK(0x103c, 0x8e9e, "HP 17 Turbine OmniBook X UMA", ALC287_FIXUP_CS35L41_I2C_2), 6793 6777 SND_PCI_QUIRK(0x103c, 0x8eb6, "HP Abe A6U", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO), 6794 - SND_PCI_QUIRK(0x103c, 0x8eb7, "HP Abe A6U", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO), 6795 6778 SND_PCI_QUIRK(0x103c, 0x8eb8, "HP Abe A6U", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO), 6796 6779 SND_PCI_QUIRK(0x103c, 0x8ec1, "HP 200 G2i", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO), 6797 6780 SND_PCI_QUIRK(0x103c, 0x8ec4, "HP Bantie I6U", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO), ··· 6807 6790 SND_PCI_QUIRK(0x103c, 0x8eda, "HP ZBook Firefly 16W", ALC245_FIXUP_HP_TAS2781_SPI_MUTE_LED), 6808 6791 SND_PCI_QUIRK(0x103c, 0x8ee4, "HP Bantie A6U", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO), 6809 6792 SND_PCI_QUIRK(0x103c, 0x8ee5, "HP Bantie A6U", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO), 6793 + SND_PCI_QUIRK(0x103c, 0x8ee7, "HP Abe A6U", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_GPIO), 6810 6794 SND_PCI_QUIRK(0x103c, 0x8f0c, "HP ZBook X G2i 16W", ALC236_FIXUP_HP_GPIO_LED), 6811 6795 SND_PCI_QUIRK(0x103c, 0x8f0e, "HP ZBook X G2i 16W", ALC236_FIXUP_HP_GPIO_LED), 6812 6796 SND_PCI_QUIRK(0x103c, 0x8f40, "HP ZBook 8 G2a 14", ALC245_FIXUP_HP_TAS2781_I2C_MUTE_LED), 6813 6797 SND_PCI_QUIRK(0x103c, 0x8f41, "HP ZBook 8 G2a 16", ALC245_FIXUP_HP_TAS2781_I2C_MUTE_LED), 6814 6798 SND_PCI_QUIRK(0x103c, 0x8f42, "HP ZBook 8 G2a 14W", ALC245_FIXUP_HP_TAS2781_I2C_MUTE_LED), 6799 + SND_PCI_QUIRK(0x103c, 0x8f57, "HP Trekker G7JC", ALC287_FIXUP_CS35L41_I2C_2), 6815 6800 SND_PCI_QUIRK(0x103c, 0x8f62, "HP ZBook 8 G2a 16W", ALC245_FIXUP_HP_TAS2781_I2C_MUTE_LED), 6816 6801 SND_PCI_QUIRK(0x1043, 0x1032, "ASUS VivoBook X513EA", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE), 6817 6802 SND_PCI_QUIRK(0x1043, 0x1034, "ASUS GU605C", ALC285_FIXUP_ASUS_GU605_SPI_SPEAKER2_TO_DAC1), ··· 6846 6827 SND_PCI_QUIRK(0x1043, 0x12f0, "ASUS X541UV", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE), 6847 6828 SND_PCI_QUIRK(0x1043, 0x1313, "Asus K42JZ", ALC269VB_FIXUP_ASUS_MIC_NO_PRESENCE), 6848 6829 SND_PCI_QUIRK(0x1043, 0x1314, "ASUS GA605K", ALC285_FIXUP_ASUS_GA605K_HEADSET_MIC), 6849 - SND_PCI_QUIRK(0x1043, 0x1384, "ASUS RC73XA", ALC287_FIXUP_TXNW2781_I2C), 6850 - SND_PCI_QUIRK(0x1043, 0x1394, "ASUS RC73YA", ALC287_FIXUP_TXNW2781_I2C), 6830 + SND_PCI_QUIRK(0x1043, 0x1384, "ASUS RC73XA", ALC287_FIXUP_TXNW2781_I2C_ASUS), 6831 + SND_PCI_QUIRK(0x1043, 0x1394, "ASUS RC73YA", ALC287_FIXUP_TXNW2781_I2C_ASUS), 6851 6832 SND_PCI_QUIRK(0x1043, 0x13b0, "ASUS Z550SA", ALC256_FIXUP_ASUS_MIC_NO_PRESENCE), 6852 6833 SND_PCI_QUIRK(0x1043, 0x1427, "Asus Zenbook UX31E", ALC269VB_FIXUP_ASUS_ZENBOOK), 6853 6834 SND_PCI_QUIRK(0x1043, 0x1433, "ASUS GX650PY/PZ/PV/PU/PYV/PZV/PIV/PVV", ALC285_FIXUP_ASUS_I2C_HEADSET_MIC), ··· 7315 7296 SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC), 7316 7297 SND_PCI_QUIRK(0x1d72, 0x1945, "Redmi G", ALC256_FIXUP_ASUS_HEADSET_MIC), 7317 7298 SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC), 7299 + SND_PCI_QUIRK(0x1e39, 0xca14, "MEDION NM14LNL", ALC233_FIXUP_MEDION_MTL_SPK), 7318 7300 SND_PCI_QUIRK(0x1ee7, 0x2078, "HONOR BRB-X M1010", ALC2XX_FIXUP_HEADSET_MIC), 7319 7301 SND_PCI_QUIRK(0x1f66, 0x0105, "Ayaneo Portable Game Player", ALC287_FIXUP_CS35L41_I2C_2), 7320 7302 SND_PCI_QUIRK(0x2014, 0x800a, "Positivo ARN50", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
+1 -3
sound/hda/controllers/cix-ipbloq.c
··· 115 115 bus->addr = res->start; 116 116 117 117 irq_id = platform_get_irq(pdev, 0); 118 - if (irq_id < 0) { 119 - dev_err(hda->dev, "failed to get the irq, err = %d\n", irq_id); 118 + if (irq_id < 0) 120 119 return irq_id; 121 - } 122 120 123 121 err = devm_request_irq(hda->dev, irq_id, azx_interrupt, 124 122 0, KBUILD_MODNAME, chip);
+7 -1
sound/pcmcia/pdaudiocf/pdaudiocf.c
··· 131 131 link->config_index = 1; 132 132 link->config_regs = PRESENT_OPTION; 133 133 134 - return pdacf_config(link); 134 + err = pdacf_config(link); 135 + if (err < 0) { 136 + card_list[i] = NULL; 137 + snd_card_free(card); 138 + return err; 139 + } 140 + return 0; 135 141 } 136 142 137 143
+7 -1
sound/pcmcia/vx/vxpocket.c
··· 284 284 285 285 vxp->p_dev = p_dev; 286 286 287 - return vxpocket_config(p_dev); 287 + err = vxpocket_config(p_dev); 288 + if (err < 0) { 289 + card_alloc &= ~(1 << i); 290 + snd_card_free(card); 291 + return err; 292 + } 293 + return 0; 288 294 } 289 295 290 296 static void vxpocket_detach(struct pcmcia_device *link)
+7
sound/soc/amd/yc/acp6x-mach.c
··· 661 661 DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 15 C7UCX"), 662 662 } 663 663 }, 664 + { 665 + .driver_data = &acp6x_card, 666 + .matches = { 667 + DMI_MATCH(DMI_BOARD_VENDOR, "HONOR"), 668 + DMI_MATCH(DMI_PRODUCT_NAME, "GOH-X"), 669 + } 670 + }, 664 671 {} 665 672 }; 666 673
-4
sound/soc/codecs/ak4458.c
··· 783 783 784 784 pm_runtime_enable(&i2c->dev); 785 785 regcache_cache_only(ak4458->regmap, true); 786 - ak4458_reset(ak4458, false); 787 786 788 787 return 0; 789 788 } 790 789 791 790 static void ak4458_i2c_remove(struct i2c_client *i2c) 792 791 { 793 - struct ak4458_priv *ak4458 = i2c_get_clientdata(i2c); 794 - 795 - ak4458_reset(ak4458, true); 796 792 pm_runtime_disable(&i2c->dev); 797 793 } 798 794
+7 -9
sound/soc/codecs/rt1320-sdw.c
··· 115 115 static const struct reg_sequence rt1320_vc_blind_write[] = { 116 116 { 0xc003, 0xe0 }, 117 117 { 0xe80a, 0x01 }, 118 - { 0xc5c3, 0xf3 }, 118 + { 0xc5c3, 0xf2 }, 119 + { 0xc5c8, 0x03 }, 119 120 { 0xc057, 0x51 }, 120 121 { 0xc054, 0x35 }, 121 122 { 0xca05, 0xd6 }, ··· 127 126 { 0xc609, 0x40 }, 128 127 { 0xc046, 0xff }, 129 128 { 0xc045, 0xff }, 130 - { 0xda81, 0x14 }, 131 - { 0xda8d, 0x14 }, 132 129 { 0xc044, 0xff }, 133 130 { 0xc043, 0xff }, 134 131 { 0xc042, 0xff }, ··· 135 136 { 0xcc10, 0x01 }, 136 137 { 0xc700, 0xf0 }, 137 138 { 0xc701, 0x13 }, 138 - { 0xc901, 0x09 }, 139 - { 0xc900, 0xd0 }, 139 + { 0xc901, 0x04 }, 140 + { 0xc900, 0x73 }, 140 141 { 0xde03, 0x05 }, 141 142 { 0xdd0b, 0x0d }, 142 143 { 0xdd0a, 0xff }, ··· 152 153 { 0xf082, 0xff }, 153 154 { 0xf081, 0xff }, 154 155 { 0xf080, 0xff }, 156 + { 0xe801, 0x01 }, 155 157 { 0xe802, 0xf8 }, 156 158 { 0xe803, 0xbe }, 157 159 { 0xc003, 0xc0 }, ··· 202 202 { 0x3fc2bfc3, 0x00 }, 203 203 { 0x3fc2bfc2, 0x00 }, 204 204 { 0x3fc2bfc1, 0x00 }, 205 - { 0x3fc2bfc0, 0x03 }, 205 + { 0x3fc2bfc0, 0x07 }, 206 206 { 0x0000d486, 0x43 }, 207 207 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_REQ_POWER_STATE, 0), 0x00 }, 208 208 { 0x1000db00, 0x07 }, ··· 241 241 { 0x1000db21, 0x00 }, 242 242 { 0x1000db22, 0x00 }, 243 243 { 0x1000db23, 0x00 }, 244 - { 0x0000d540, 0x01 }, 245 - { 0x0000c081, 0xfc }, 246 - { 0x0000f01e, 0x80 }, 244 + { 0x0000d540, 0x21 }, 247 245 { 0xc01b, 0xfc }, 248 246 { 0xc5d1, 0x89 }, 249 247 { 0xc5d8, 0x0a },
+4 -4
sound/soc/fsl/fsl-asoc-card.c
··· 1045 1045 * The notifier is initialized in snd_soc_card_jack_new(), then 1046 1046 * snd_soc_jack_notifier_register can be called. 1047 1047 */ 1048 - if (of_property_read_bool(np, "hp-det-gpios") || 1049 - of_property_read_bool(np, "hp-det-gpio") /* deprecated */) { 1048 + if (of_property_present(np, "hp-det-gpios") || 1049 + of_property_present(np, "hp-det-gpio") /* deprecated */) { 1050 1050 ret = simple_util_init_jack(&priv->card, &priv->hp_jack, 1051 1051 1, NULL, "Headphone Jack"); 1052 1052 if (ret) ··· 1055 1055 snd_soc_jack_notifier_register(&priv->hp_jack.jack, &hp_jack_nb); 1056 1056 } 1057 1057 1058 - if (of_property_read_bool(np, "mic-det-gpios") || 1059 - of_property_read_bool(np, "mic-det-gpio") /* deprecated */) { 1058 + if (of_property_present(np, "mic-det-gpios") || 1059 + of_property_present(np, "mic-det-gpio") /* deprecated */) { 1060 1060 ret = simple_util_init_jack(&priv->card, &priv->mic_jack, 1061 1061 0, NULL, "Mic Jack"); 1062 1062 if (ret)
+3
sound/soc/fsl/fsl_asrc_dma.c
··· 473 473 .pointer = fsl_asrc_dma_pcm_pointer, 474 474 .pcm_construct = fsl_asrc_dma_pcm_new, 475 475 .legacy_dai_naming = 1, 476 + #ifdef CONFIG_DEBUG_FS 477 + .debugfs_prefix = "asrc", 478 + #endif 476 479 }; 477 480 EXPORT_SYMBOL_GPL(fsl_asrc_component);
+3
sound/soc/fsl/fsl_easrc.c
··· 1577 1577 .controls = fsl_easrc_snd_controls, 1578 1578 .num_controls = ARRAY_SIZE(fsl_easrc_snd_controls), 1579 1579 .legacy_dai_naming = 1, 1580 + #ifdef CONFIG_DEBUG_FS 1581 + .debugfs_prefix = "easrc", 1582 + #endif 1580 1583 }; 1581 1584 1582 1585 static const struct reg_default fsl_easrc_reg_defaults[] = {
+11 -2
sound/soc/fsl/fsl_sai.c
··· 917 917 tx ? sai->dma_params_tx.maxburst : 918 918 sai->dma_params_rx.maxburst); 919 919 920 - ret = snd_pcm_hw_constraint_list(substream->runtime, 0, 921 - SNDRV_PCM_HW_PARAM_RATE, &sai->constraint_rates); 920 + if (sai->is_consumer_mode[tx]) 921 + ret = snd_pcm_hw_constraint_list(substream->runtime, 0, 922 + SNDRV_PCM_HW_PARAM_RATE, 923 + &fsl_sai_rate_constraints); 924 + else 925 + ret = snd_pcm_hw_constraint_list(substream->runtime, 0, 926 + SNDRV_PCM_HW_PARAM_RATE, 927 + &sai->constraint_rates); 922 928 923 929 return ret; 924 930 } ··· 1081 1075 {FSL_SAI_TDR6, 0}, 1082 1076 {FSL_SAI_TDR7, 0}, 1083 1077 {FSL_SAI_TMR, 0}, 1078 + {FSL_SAI_TTCTL, 0}, 1084 1079 {FSL_SAI_RCR1(0), 0}, 1085 1080 {FSL_SAI_RCR2(0), 0}, 1086 1081 {FSL_SAI_RCR3(0), 0}, ··· 1105 1098 {FSL_SAI_TDR6, 0}, 1106 1099 {FSL_SAI_TDR7, 0}, 1107 1100 {FSL_SAI_TMR, 0}, 1101 + {FSL_SAI_TTCTL, 0}, 1108 1102 {FSL_SAI_RCR1(8), 0}, 1109 1103 {FSL_SAI_RCR2(8), 0}, 1110 1104 {FSL_SAI_RCR3(8), 0}, 1111 1105 {FSL_SAI_RCR4(8), 0}, 1112 1106 {FSL_SAI_RCR5(8), 0}, 1113 1107 {FSL_SAI_RMR, 0}, 1108 + {FSL_SAI_RTCTL, 0}, 1114 1109 {FSL_SAI_MCTL, 0}, 1115 1110 {FSL_SAI_MDIV, 0}, 1116 1111 };
+3
sound/soc/fsl/fsl_xcvr.c
··· 1323 1323 }; 1324 1324 1325 1325 static const struct regmap_config fsl_xcvr_regmap_phy_cfg = { 1326 + .name = "phy", 1326 1327 .reg_bits = 8, 1327 1328 .reg_stride = 4, 1328 1329 .val_bits = 32, ··· 1336 1335 }; 1337 1336 1338 1337 static const struct regmap_config fsl_xcvr_regmap_pllv0_cfg = { 1338 + .name = "pllv0", 1339 1339 .reg_bits = 8, 1340 1340 .reg_stride = 4, 1341 1341 .val_bits = 32, ··· 1347 1345 }; 1348 1346 1349 1347 static const struct regmap_config fsl_xcvr_regmap_pllv1_cfg = { 1348 + .name = "pllv1", 1350 1349 .reg_bits = 8, 1351 1350 .reg_stride = 4, 1352 1351 .val_bits = 32,
+104
sound/soc/intel/common/soc-acpi-intel-mtl-match.c
··· 699 699 }, 700 700 }; 701 701 702 + static const struct snd_soc_acpi_adr_device cs35l56_6amp_1_fb_adr[] = { 703 + { 704 + .adr = 0x00013701FA355601ull, 705 + .num_endpoints = ARRAY_SIZE(cs35l56_r_fb_endpoints), 706 + .endpoints = cs35l56_r_fb_endpoints, 707 + .name_prefix = "AMP6" 708 + }, 709 + { 710 + .adr = 0x00013601FA355601ull, 711 + .num_endpoints = ARRAY_SIZE(cs35l56_3_fb_endpoints), 712 + .endpoints = cs35l56_3_fb_endpoints, 713 + .name_prefix = "AMP5" 714 + }, 715 + { 716 + .adr = 0x00013501FA355601ull, 717 + .num_endpoints = ARRAY_SIZE(cs35l56_5_fb_endpoints), 718 + .endpoints = cs35l56_5_fb_endpoints, 719 + .name_prefix = "AMP4" 720 + }, 721 + }; 722 + 723 + static const struct snd_soc_acpi_adr_device cs35l63_6amp_3_fb_adr[] = { 724 + { 725 + .adr = 0x00033001FA356301ull, 726 + .num_endpoints = ARRAY_SIZE(cs35l56_l_fb_endpoints), 727 + .endpoints = cs35l56_l_fb_endpoints, 728 + .name_prefix = "AMP1" 729 + }, 730 + { 731 + .adr = 0x00033201FA356301ull, 732 + .num_endpoints = ARRAY_SIZE(cs35l56_2_fb_endpoints), 733 + .endpoints = cs35l56_2_fb_endpoints, 734 + .name_prefix = "AMP3" 735 + }, 736 + { 737 + .adr = 0x00033401FA356301ull, 738 + .num_endpoints = ARRAY_SIZE(cs35l56_4_fb_endpoints), 739 + .endpoints = cs35l56_4_fb_endpoints, 740 + .name_prefix = "AMP5" 741 + }, 742 + }; 743 + 744 + static const struct snd_soc_acpi_adr_device cs35l63_6amp_2_fb_adr[] = { 745 + { 746 + .adr = 0x00023101FA356301ull, 747 + .num_endpoints = ARRAY_SIZE(cs35l56_r_fb_endpoints), 748 + .endpoints = cs35l56_r_fb_endpoints, 749 + .name_prefix = "AMP2" 750 + }, 751 + { 752 + .adr = 0x00023301FA356301ull, 753 + .num_endpoints = ARRAY_SIZE(cs35l56_3_fb_endpoints), 754 + .endpoints = cs35l56_3_fb_endpoints, 755 + .name_prefix = "AMP4" 756 + }, 757 + { 758 + .adr = 0x00023501FA356301ull, 759 + .num_endpoints = ARRAY_SIZE(cs35l56_5_fb_endpoints), 760 + .endpoints = cs35l56_5_fb_endpoints, 761 + .name_prefix = "AMP6" 762 + }, 763 + }; 764 + 702 765 static const struct snd_soc_acpi_adr_device cs35l56_2_r_adr[] = { 703 766 { 704 767 .adr = 0x00023201FA355601ull, ··· 1132 1069 {} 1133 1070 }; 1134 1071 1072 + static const struct snd_soc_acpi_link_adr mtl_cs35l56_x6_link0_link1_fb[] = { 1073 + { 1074 + .mask = BIT(1), 1075 + .num_adr = ARRAY_SIZE(cs35l56_6amp_1_fb_adr), 1076 + .adr_d = cs35l56_6amp_1_fb_adr, 1077 + }, 1078 + { 1079 + .mask = BIT(0), 1080 + /* First 3 amps in cs35l56_0_fb_adr */ 1081 + .num_adr = 3, 1082 + .adr_d = cs35l56_0_fb_adr, 1083 + }, 1084 + {} 1085 + }; 1086 + 1087 + static const struct snd_soc_acpi_link_adr mtl_cs35l63_x6_link2_link3_fb[] = { 1088 + { 1089 + .mask = BIT(3), 1090 + .num_adr = ARRAY_SIZE(cs35l63_6amp_3_fb_adr), 1091 + .adr_d = cs35l63_6amp_3_fb_adr, 1092 + }, 1093 + { 1094 + .mask = BIT(2), 1095 + .num_adr = ARRAY_SIZE(cs35l63_6amp_2_fb_adr), 1096 + .adr_d = cs35l63_6amp_2_fb_adr, 1097 + }, 1098 + {} 1099 + }; 1100 + 1135 1101 static const struct snd_soc_acpi_link_adr mtl_cs35l63_x2_link1_link3_fb[] = { 1136 1102 { 1137 1103 .mask = BIT(3), ··· 1282 1190 .get_function_tplg_files = sof_sdw_get_tplg_files, 1283 1191 }, 1284 1192 { 1193 + .link_mask = BIT(0) | BIT(1), 1194 + .links = mtl_cs35l56_x6_link0_link1_fb, 1195 + .drv_name = "sof_sdw", 1196 + .sof_tplg_filename = "sof-mtl-cs35l56-l01-fb6.tplg" 1197 + }, 1198 + { 1285 1199 .link_mask = BIT(0), 1286 1200 .links = mtl_cs42l43_l0, 1287 1201 .drv_name = "sof_sdw", ··· 1299 1201 .links = mtl_cs35l63_x2_link1_link3_fb, 1300 1202 .drv_name = "sof_sdw", 1301 1203 .sof_tplg_filename = "sof-mtl-cs35l56-l01-fb8.tplg", 1204 + }, 1205 + { 1206 + .link_mask = BIT(2) | BIT(3), 1207 + .links = mtl_cs35l63_x6_link2_link3_fb, 1208 + .drv_name = "sof_sdw", 1209 + .sof_tplg_filename = "sof-mtl-cs35l56-l01-fb6.tplg", 1302 1210 }, 1303 1211 { 1304 1212 .link_mask = GENMASK(3, 0),
-49
sound/soc/intel/common/soc-acpi-intel-nvl-match.c
··· 15 15 }; 16 16 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_nvl_machines); 17 17 18 - /* 19 - * Multi-function codecs with three endpoints created for 20 - * headset, amp and dmic functions. 21 - */ 22 - static const struct snd_soc_acpi_endpoint rt_mf_endpoints[] = { 23 - { 24 - .num = 0, 25 - .aggregated = 0, 26 - .group_position = 0, 27 - .group_id = 0, 28 - }, 29 - { 30 - .num = 1, 31 - .aggregated = 0, 32 - .group_position = 0, 33 - .group_id = 0, 34 - }, 35 - { 36 - .num = 2, 37 - .aggregated = 0, 38 - .group_position = 0, 39 - .group_id = 0, 40 - }, 41 - }; 42 - 43 - static const struct snd_soc_acpi_adr_device rt722_3_single_adr[] = { 44 - { 45 - .adr = 0x000330025d072201ull, 46 - .num_endpoints = ARRAY_SIZE(rt_mf_endpoints), 47 - .endpoints = rt_mf_endpoints, 48 - .name_prefix = "rt722" 49 - } 50 - }; 51 - 52 - static const struct snd_soc_acpi_link_adr nvl_rt722_l3[] = { 53 - { 54 - .mask = BIT(3), 55 - .num_adr = ARRAY_SIZE(rt722_3_single_adr), 56 - .adr_d = rt722_3_single_adr, 57 - }, 58 - {} 59 - }; 60 - 61 18 /* this table is used when there is no I2S codec present */ 62 19 struct snd_soc_acpi_mach snd_soc_acpi_intel_nvl_sdw_machines[] = { 63 20 /* mockup tests need to be first */ ··· 35 78 .links = sdw_mockup_mic_headset_1amp, 36 79 .drv_name = "sof_sdw", 37 80 .sof_tplg_filename = "sof-nvl-rt715-rt711-rt1308-mono.tplg", 38 - }, 39 - { 40 - .link_mask = BIT(3), 41 - .links = nvl_rt722_l3, 42 - .drv_name = "sof_sdw", 43 - .sof_tplg_filename = "sof-nvl-rt722.tplg", 44 81 }, 45 82 {}, 46 83 };
+4 -1
sound/soc/intel/common/sof-function-topology-lib.c
··· 28 28 #define SOF_INTEL_PLATFORM_NAME_MAX 4 29 29 30 30 int sof_sdw_get_tplg_files(struct snd_soc_card *card, const struct snd_soc_acpi_mach *mach, 31 - const char *prefix, const char ***tplg_files) 31 + const char *prefix, const char ***tplg_files, bool best_effort) 32 32 { 33 33 struct snd_soc_acpi_mach_params mach_params = mach->mach_params; 34 34 struct snd_soc_dai_link *dai_link; ··· 87 87 dev_dbg(card->dev, 88 88 "dai_link %s is not supported by separated tplg yet\n", 89 89 dai_link->name); 90 + if (best_effort) 91 + continue; 92 + 90 93 return 0; 91 94 } 92 95 if (tplg_mask & BIT(tplg_dev))
+1 -1
sound/soc/intel/common/sof-function-topology-lib.h
··· 10 10 #define _SND_SOC_ACPI_INTEL_GET_TPLG_H 11 11 12 12 int sof_sdw_get_tplg_files(struct snd_soc_card *card, const struct snd_soc_acpi_mach *mach, 13 - const char *prefix, const char ***tplg_files); 13 + const char *prefix, const char ***tplg_files, bool best_effort); 14 14 15 15 #endif
+2
sound/soc/qcom/sdm845.c
··· 365 365 snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt); 366 366 break; 367 367 case QUATERNARY_MI2S_RX: 368 + codec_dai_fmt |= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S; 368 369 snd_soc_dai_set_sysclk(cpu_dai, 369 370 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT, 370 371 MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK); 371 372 snd_soc_dai_set_fmt(cpu_dai, fmt); 373 + snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt); 372 374 break; 373 375 374 376 case QUATERNARY_TDM_RX_0:
+6 -2
sound/soc/sdw_utils/soc_sdw_utils.c
··· 1534 1534 * endpoint check is not necessary 1535 1535 */ 1536 1536 if (dai_info->quirk && 1537 - !(dai_info->quirk_exclude ^ !!(dai_info->quirk & ctx->mc_quirk))) 1537 + !(dai_info->quirk_exclude ^ !!(dai_info->quirk & ctx->mc_quirk))) { 1538 + (*num_devs)--; 1538 1539 continue; 1540 + } 1539 1541 } else { 1540 1542 /* Check SDCA codec endpoint if there is no matching quirk */ 1541 1543 ret = is_sdca_endpoint_present(dev, codec_info, adr_link, i, j); ··· 1545 1543 return ret; 1546 1544 1547 1545 /* The endpoint is not present, skip */ 1548 - if (!ret) 1546 + if (!ret) { 1547 + (*num_devs)--; 1549 1548 continue; 1549 + } 1550 1550 } 1551 1551 1552 1552 dev_dbg(dev,
+20 -12
sound/soc/soc-ops.c
··· 111 111 EXPORT_SYMBOL_GPL(snd_soc_put_enum_double); 112 112 113 113 static int sdca_soc_q78_reg_to_ctl(struct soc_mixer_control *mc, unsigned int reg_val, 114 - unsigned int mask, unsigned int shift, int max) 114 + unsigned int mask, unsigned int shift, int max, 115 + bool sx) 115 116 { 116 117 int val = reg_val; 117 118 ··· 142 141 } 143 142 144 143 static int soc_mixer_reg_to_ctl(struct soc_mixer_control *mc, unsigned int reg_val, 145 - unsigned int mask, unsigned int shift, int max) 144 + unsigned int mask, unsigned int shift, int max, 145 + bool sx) 146 146 { 147 147 int val = (reg_val >> shift) & mask; 148 148 149 149 if (mc->sign_bit) 150 150 val = sign_extend32(val, mc->sign_bit); 151 151 152 - val = clamp(val, mc->min, mc->max); 153 - val -= mc->min; 152 + if (sx) { 153 + val -= mc->min; // SX controls intentionally can overflow here 154 + val = min_t(unsigned int, val & mask, max); 155 + } else { 156 + val = clamp(val, mc->min, mc->max); 157 + val -= mc->min; 158 + } 154 159 155 160 if (mc->invert) 156 161 val = max - val; 157 162 158 - return val & mask; 163 + return val; 159 164 } 160 165 161 166 static unsigned int soc_mixer_ctl_to_reg(struct soc_mixer_control *mc, int val, ··· 287 280 288 281 static int soc_get_volsw(struct snd_kcontrol *kcontrol, 289 282 struct snd_ctl_elem_value *ucontrol, 290 - struct soc_mixer_control *mc, int mask, int max) 283 + struct soc_mixer_control *mc, int mask, int max, bool sx) 291 284 { 292 - int (*reg_to_ctl)(struct soc_mixer_control *, unsigned int, unsigned int, unsigned int, int); 285 + int (*reg_to_ctl)(struct soc_mixer_control *, unsigned int, unsigned int, 286 + unsigned int, int, bool); 293 287 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 294 288 unsigned int reg_val; 295 289 int val; ··· 301 293 reg_to_ctl = soc_mixer_reg_to_ctl; 302 294 303 295 reg_val = snd_soc_component_read(component, mc->reg); 304 - val = reg_to_ctl(mc, reg_val, mask, mc->shift, max); 296 + val = reg_to_ctl(mc, reg_val, mask, mc->shift, max, sx); 305 297 306 298 ucontrol->value.integer.value[0] = val; 307 299 308 300 if (snd_soc_volsw_is_stereo(mc)) { 309 301 if (mc->reg == mc->rreg) { 310 - val = reg_to_ctl(mc, reg_val, mask, mc->rshift, max); 302 + val = reg_to_ctl(mc, reg_val, mask, mc->rshift, max, sx); 311 303 } else { 312 304 reg_val = snd_soc_component_read(component, mc->rreg); 313 - val = reg_to_ctl(mc, reg_val, mask, mc->shift, max); 305 + val = reg_to_ctl(mc, reg_val, mask, mc->shift, max, sx); 314 306 } 315 307 316 308 ucontrol->value.integer.value[1] = val; ··· 379 371 (struct soc_mixer_control *)kcontrol->private_value; 380 372 unsigned int mask = soc_mixer_mask(mc); 381 373 382 - return soc_get_volsw(kcontrol, ucontrol, mc, mask, mc->max - mc->min); 374 + return soc_get_volsw(kcontrol, ucontrol, mc, mask, mc->max - mc->min, false); 383 375 } 384 376 EXPORT_SYMBOL_GPL(snd_soc_get_volsw); 385 377 ··· 421 413 (struct soc_mixer_control *)kcontrol->private_value; 422 414 unsigned int mask = soc_mixer_sx_mask(mc); 423 415 424 - return soc_get_volsw(kcontrol, ucontrol, mc, mask, mc->max); 416 + return soc_get_volsw(kcontrol, ucontrol, mc, mask, mc->max, true); 425 417 } 426 418 EXPORT_SYMBOL_GPL(snd_soc_get_volsw_sx); 427 419
+3 -3
sound/soc/sof/intel/pci-mtl.c
··· 47 47 [SOF_IPC_TYPE_4] = "intel/sof-ipc4-lib/mtl", 48 48 }, 49 49 .default_tplg_path = { 50 - [SOF_IPC_TYPE_4] = "intel/sof-ace-tplg", 50 + [SOF_IPC_TYPE_4] = "intel/sof-ipc4-tplg", 51 51 }, 52 52 .default_fw_filename = { 53 53 [SOF_IPC_TYPE_4] = "sof-mtl.ri", ··· 77 77 [SOF_IPC_TYPE_4] = "intel/sof-ipc4-lib/arl", 78 78 }, 79 79 .default_tplg_path = { 80 - [SOF_IPC_TYPE_4] = "intel/sof-ace-tplg", 80 + [SOF_IPC_TYPE_4] = "intel/sof-ipc4-tplg", 81 81 }, 82 82 .default_fw_filename = { 83 83 [SOF_IPC_TYPE_4] = "sof-arl.ri", ··· 107 107 [SOF_IPC_TYPE_4] = "intel/sof-ipc4-lib/arl-s", 108 108 }, 109 109 .default_tplg_path = { 110 - [SOF_IPC_TYPE_4] = "intel/sof-ace-tplg", 110 + [SOF_IPC_TYPE_4] = "intel/sof-ipc4-tplg", 111 111 }, 112 112 .default_fw_filename = { 113 113 [SOF_IPC_TYPE_4] = "sof-arl-s.ri",
+32 -17
sound/soc/sof/ipc4-topology.c
··· 1752 1752 channel_count = params_channels(params); 1753 1753 sample_rate = params_rate(params); 1754 1754 bit_depth = params_width(params); 1755 - /* 1756 - * Look for 32-bit blob first instead of 16-bit if copier 1757 - * supports multiple formats 1758 - */ 1759 - if (bit_depth == 16 && !single_bitdepth) { 1755 + 1756 + /* Prefer 32-bit blob if copier supports multiple formats */ 1757 + if (bit_depth <= 16 && !single_bitdepth) { 1760 1758 dev_dbg(sdev->dev, "Looking for 32-bit blob first for DMIC\n"); 1761 1759 format_change = true; 1762 1760 bit_depth = 32; ··· 1797 1799 if (format_change) { 1798 1800 /* 1799 1801 * The 32-bit blob was not found in NHLT table, try to 1800 - * look for one based on the params 1802 + * look for 16-bit for DMIC or based on the params for 1803 + * SSP 1801 1804 */ 1802 - bit_depth = params_width(params); 1803 - format_change = false; 1805 + if (linktype == SOF_DAI_INTEL_DMIC) { 1806 + bit_depth = 16; 1807 + if (params_width(params) == 16) 1808 + format_change = false; 1809 + } else { 1810 + bit_depth = params_width(params); 1811 + format_change = false; 1812 + } 1813 + 1804 1814 get_new_blob = true; 1805 1815 } else if (linktype == SOF_DAI_INTEL_DMIC && !single_bitdepth) { 1806 1816 /* ··· 1843 1837 *len = cfg->size >> 2; 1844 1838 *dst = (u32 *)cfg->caps; 1845 1839 1846 - if (format_change) { 1840 + if (format_change || params_format(params) == SNDRV_PCM_FORMAT_FLOAT_LE) { 1847 1841 /* 1848 1842 * Update the params to reflect that different blob was loaded 1849 1843 * instead of the requested bit depth (16 -> 32 or 32 -> 16). ··· 2286 2280 ch_map >>= 4; 2287 2281 } 2288 2282 2289 - step = ch_count / blob->alh_cfg.device_count; 2290 - mask = GENMASK(step - 1, 0); 2283 + if (swidget->id == snd_soc_dapm_dai_in && ch_count == out_ref_channels) { 2284 + /* 2285 + * For playback DAI widgets where the channel number is equal to 2286 + * the output reference channels, set the step = 0 to ensure all 2287 + * the ch_mask is applied to all alh mappings. 2288 + */ 2289 + mask = ch_mask; 2290 + step = 0; 2291 + } else { 2292 + step = ch_count / blob->alh_cfg.device_count; 2293 + mask = GENMASK(step - 1, 0); 2294 + } 2295 + 2291 2296 /* 2292 2297 * Set each gtw_cfg.node_id to blob->alh_cfg.mapping[] 2293 2298 * for all widgets with the same stream name ··· 2333 2316 } 2334 2317 2335 2318 /* 2336 - * Set the same channel mask for playback as the audio data is 2337 - * duplicated for all speakers. For capture, split the channels 2319 + * Set the same channel mask if the widget channel count is the same 2320 + * as the FE channels for playback as the audio data is duplicated 2321 + * for all speakers in this case. Otherwise, split the channels 2338 2322 * among the aggregated DAIs. For example, with 4 channels on 2 2339 2323 * aggregated DAIs, the channel_mask should be 0x3 and 0xc for the 2340 2324 * two DAI's. ··· 2344 2326 * the tables in soc_acpi files depending on the _ADR and devID 2345 2327 * registers for each codec. 2346 2328 */ 2347 - if (w->id == snd_soc_dapm_dai_in) 2348 - blob->alh_cfg.mapping[i].channel_mask = ch_mask; 2349 - else 2350 - blob->alh_cfg.mapping[i].channel_mask = mask << (step * i); 2329 + blob->alh_cfg.mapping[i].channel_mask = mask << (step * i); 2351 2330 2352 2331 i++; 2353 2332 }
+21 -5
sound/soc/sof/topology.c
··· 2106 2106 /* source component */ 2107 2107 source_swidget = snd_sof_find_swidget(scomp, (char *)route->source); 2108 2108 if (!source_swidget) { 2109 - dev_err(scomp->dev, "error: source %s not found\n", 2110 - route->source); 2109 + dev_err(scomp->dev, "source %s for sink %s is not found\n", 2110 + route->source, route->sink); 2111 2111 ret = -EINVAL; 2112 2112 goto err; 2113 2113 } ··· 2125 2125 /* sink component */ 2126 2126 sink_swidget = snd_sof_find_swidget(scomp, (char *)route->sink); 2127 2127 if (!sink_swidget) { 2128 - dev_err(scomp->dev, "error: sink %s not found\n", 2129 - route->sink); 2128 + dev_err(scomp->dev, "sink %s for source %s is not found\n", 2129 + route->sink, route->source); 2130 2130 ret = -EINVAL; 2131 2131 goto err; 2132 2132 } ··· 2506 2506 if (!tplg_files) 2507 2507 return -ENOMEM; 2508 2508 2509 + /* Try to use function topologies if possible */ 2509 2510 if (!sof_pdata->disable_function_topology && !disable_function_topology && 2510 2511 sof_pdata->machine && sof_pdata->machine->get_function_tplg_files) { 2512 + /* 2513 + * When the topology name contains 'dummy' word, it means that 2514 + * there is no fallback option to monolithic topology in case 2515 + * any of the function topologies might be missing. 2516 + * In this case we should use best effort to form the card, 2517 + * ignoring functionalities that we are missing a fragment for. 2518 + * 2519 + * Note: monolithic topologies also ignore these possibly 2520 + * missing functions, so the functionality of the card would be 2521 + * identical to the case if there would be a fallback monolithic 2522 + * topology created for the configuration. 2523 + */ 2524 + bool no_fallback = strstr(file, "dummy"); 2525 + 2511 2526 tplg_cnt = sof_pdata->machine->get_function_tplg_files(scomp->card, 2512 2527 sof_pdata->machine, 2513 2528 tplg_filename_prefix, 2514 - &tplg_files); 2529 + &tplg_files, 2530 + no_fallback); 2515 2531 if (tplg_cnt < 0) { 2516 2532 kfree(tplg_files); 2517 2533 return tplg_cnt;
+3 -3
sound/soc/tegra/tegra210_ahub.c
··· 2077 2077 .val_bits = 32, 2078 2078 .reg_stride = 4, 2079 2079 .max_register = TEGRA210_MAX_REGISTER_ADDR, 2080 - .cache_type = REGCACHE_FLAT, 2080 + .cache_type = REGCACHE_FLAT_S, 2081 2081 }; 2082 2082 2083 2083 static const struct regmap_config tegra186_ahub_regmap_config = { ··· 2085 2085 .val_bits = 32, 2086 2086 .reg_stride = 4, 2087 2087 .max_register = TEGRA186_MAX_REGISTER_ADDR, 2088 - .cache_type = REGCACHE_FLAT, 2088 + .cache_type = REGCACHE_FLAT_S, 2089 2089 }; 2090 2090 2091 2091 static const struct regmap_config tegra264_ahub_regmap_config = { ··· 2094 2094 .reg_stride = 4, 2095 2095 .writeable_reg = tegra264_ahub_wr_reg, 2096 2096 .max_register = TEGRA264_MAX_REGISTER_ADDR, 2097 - .cache_type = REGCACHE_FLAT, 2097 + .cache_type = REGCACHE_FLAT_S, 2098 2098 }; 2099 2099 2100 2100 static const struct tegra_ahub_soc_data soc_data_tegra210 = {
+4 -4
sound/usb/endpoint.c
··· 1481 1481 return err; 1482 1482 } 1483 1483 1484 + err = snd_usb_select_mode_quirk(chip, ep->cur_audiofmt); 1485 + if (err < 0) 1486 + return err; 1487 + 1484 1488 err = snd_usb_init_pitch(chip, ep->cur_audiofmt); 1485 1489 if (err < 0) 1486 1490 return err; 1487 1491 1488 1492 err = init_sample_rate(chip, ep); 1489 - if (err < 0) 1490 - return err; 1491 - 1492 - err = snd_usb_select_mode_quirk(chip, ep->cur_audiofmt); 1493 1493 if (err < 0) 1494 1494 return err; 1495 1495
+4 -1
sound/usb/format.c
··· 34 34 { 35 35 int sample_width, sample_bytes; 36 36 u64 pcm_formats = 0; 37 + u64 dsd_formats = 0; 37 38 38 39 switch (fp->protocol) { 39 40 case UAC_VERSION_1: ··· 155 154 fp->iface, fp->altsetting, format); 156 155 } 157 156 158 - pcm_formats |= snd_usb_interface_dsd_format_quirks(chip, fp, sample_bytes); 157 + dsd_formats |= snd_usb_interface_dsd_format_quirks(chip, fp, sample_bytes); 158 + if (dsd_formats && !fp->dsd_dop) 159 + pcm_formats = dsd_formats; 159 160 160 161 return pcm_formats; 161 162 }
+14 -6
sound/usb/mixer_us16x08.c
··· 655 655 u8 *meter_urb) 656 656 { 657 657 int val = MUC2(meter_urb, s) + (MUC3(meter_urb, s) << 8); 658 + int ch = MUB2(meter_urb, s) - 1; 659 + 660 + if (ch < 0) 661 + return; 658 662 659 663 if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && 660 664 MUA2(meter_urb, s) == 0x04 && MUB0(meter_urb, s) == 0x62) { 661 - if (MUC0(meter_urb, s) == 0x72) 662 - store->meter_level[MUB2(meter_urb, s) - 1] = val; 663 - if (MUC0(meter_urb, s) == 0xb2) 664 - store->comp_level[MUB2(meter_urb, s) - 1] = val; 665 + if (ch < SND_US16X08_MAX_CHANNELS) { 666 + if (MUC0(meter_urb, s) == 0x72) 667 + store->meter_level[ch] = val; 668 + if (MUC0(meter_urb, s) == 0xb2) 669 + store->comp_level[ch] = val; 670 + } 665 671 } 666 672 if (MUA0(meter_urb, s) == 0x61 && MUA1(meter_urb, s) == 0x02 && 667 - MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) 668 - store->master_level[MUB2(meter_urb, s) - 1] = val; 673 + MUA2(meter_urb, s) == 0x02 && MUB0(meter_urb, s) == 0x62) { 674 + if (ch < ARRAY_SIZE(store->master_level)) 675 + store->master_level[ch] = val; 676 + } 669 677 } 670 678 671 679 /* Function to retrieve current meter values from the device.
+12 -2
sound/usb/quirks.c
··· 2221 2221 QUIRK_FLAG_IFACE_DELAY), 2222 2222 DEVICE_FLG(0x0644, 0x8044, /* Esoteric D-05X */ 2223 2223 QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY | 2224 - QUIRK_FLAG_IFACE_DELAY), 2224 + QUIRK_FLAG_IFACE_DELAY | QUIRK_FLAG_FORCE_IFACE_RESET), 2225 2225 DEVICE_FLG(0x0644, 0x804a, /* TEAC UD-301 */ 2226 2226 QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY | 2227 2227 QUIRK_FLAG_IFACE_DELAY), ··· 2229 2229 QUIRK_FLAG_FORCE_IFACE_RESET), 2230 2230 DEVICE_FLG(0x0644, 0x806b, /* TEAC UD-701 */ 2231 2231 QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY | 2232 - QUIRK_FLAG_IFACE_DELAY), 2232 + QUIRK_FLAG_IFACE_DELAY | QUIRK_FLAG_FORCE_IFACE_RESET), 2233 + DEVICE_FLG(0x0644, 0x807d, /* TEAC UD-507 */ 2234 + QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY | 2235 + QUIRK_FLAG_IFACE_DELAY | QUIRK_FLAG_FORCE_IFACE_RESET), 2236 + DEVICE_FLG(0x0644, 0x806c, /* Esoteric XD */ 2237 + QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY | 2238 + QUIRK_FLAG_IFACE_DELAY | QUIRK_FLAG_FORCE_IFACE_RESET), 2233 2239 DEVICE_FLG(0x06f8, 0xb000, /* Hercules DJ Console (Windows Edition) */ 2234 2240 QUIRK_FLAG_IGNORE_CTL_ERROR), 2235 2241 DEVICE_FLG(0x06f8, 0xd002, /* Hercules DJ Console (Macintosh Edition) */ ··· 2394 2388 QUIRK_FLAG_CTL_MSG_DELAY_1M), 2395 2389 DEVICE_FLG(0x30be, 0x0101, /* Schiit Hel */ 2396 2390 QUIRK_FLAG_IGNORE_CTL_ERROR), 2391 + DEVICE_FLG(0x3255, 0x0000, /* Luxman D-10X */ 2392 + QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY), 2397 2393 DEVICE_FLG(0x339b, 0x3a07, /* Synaptics HONOR USB-C HEADSET */ 2398 2394 QUIRK_FLAG_MIXER_PLAYBACK_MIN_MUTE), 2399 2395 DEVICE_FLG(0x413c, 0xa506, /* Dell AE515 sound bar */ ··· 2438 2430 VENDOR_FLG(0x25ce, /* Mytek devices */ 2439 2431 QUIRK_FLAG_DSD_RAW), 2440 2432 VENDOR_FLG(0x2622, /* IAG Limited devices */ 2433 + QUIRK_FLAG_DSD_RAW), 2434 + VENDOR_FLG(0x2772, /* Musical Fidelity devices */ 2441 2435 QUIRK_FLAG_DSD_RAW), 2442 2436 VENDOR_FLG(0x278b, /* Rotel? */ 2443 2437 QUIRK_FLAG_DSD_RAW),
+2
tools/bpf/bpftool/Makefile
··· 224 224 225 225 $(OUTPUT)%.bpf.o: skeleton/%.bpf.c $(OUTPUT)vmlinux.h $(LIBBPF_BOOTSTRAP) 226 226 $(QUIET_CLANG)$(CLANG) \ 227 + -Wno-microsoft-anon-tag \ 228 + -fms-extensions \ 227 229 -I$(or $(OUTPUT),.) \ 228 230 -I$(srctree)/tools/include/uapi/ \ 229 231 -I$(LIBBPF_BOOTSTRAP_INCLUDE) \
+4 -3
tools/lib/bpf/libbpf.c
··· 8484 8484 struct bpf_object *obj = ctx; 8485 8485 const struct btf_type *t; 8486 8486 struct extern_desc *ext; 8487 - char *res; 8487 + const char *res; 8488 8488 8489 8489 res = strstr(sym_name, ".llvm."); 8490 8490 if (sym_type == 'd' && res) ··· 11818 11818 * 11819 11819 * [0] fb6a421fb615 ("kallsyms: Match symbols exactly with CONFIG_LTO_CLANG") 11820 11820 */ 11821 - char sym_trim[256], *psym_trim = sym_trim, *sym_sfx; 11821 + char sym_trim[256], *psym_trim = sym_trim; 11822 + const char *sym_sfx; 11822 11823 11823 11824 if (!(sym_sfx = strstr(sym_name, ".llvm."))) 11824 11825 return 0; ··· 12402 12401 if (!search_paths[i]) 12403 12402 continue; 12404 12403 for (s = search_paths[i]; s != NULL; s = strchr(s, ':')) { 12405 - char *next_path; 12404 + const char *next_path; 12406 12405 int seg_len; 12407 12406 12408 12407 if (s[0] == ':')
+2
tools/net/ynl/Makefile.deps
··· 13 13 # need the explicit -D matching what's in /usr, to avoid multiple definitions. 14 14 15 15 get_hdr_inc=-D$(1) -include $(UAPI_PATH)/linux/$(2) 16 + get_hdr_inc2=-D$(1) -D$(2) -include $(UAPI_PATH)/linux/$(3) 16 17 17 18 CFLAGS_devlink:=$(call get_hdr_inc,_LINUX_DEVLINK_H_,devlink.h) 18 19 CFLAGS_dpll:=$(call get_hdr_inc,_LINUX_DPLL_H,dpll.h) ··· 49 48 $(call get_hdr_inc,_TC_SKBEDIT_H,tc_act/tc_skbedit.h) \ 50 49 $(call get_hdr_inc,_TC_TUNNEL_KEY_H,tc_act/tc_tunnel_key.h) 51 50 CFLAGS_tcp_metrics:=$(call get_hdr_inc,_LINUX_TCP_METRICS_H,tcp_metrics.h) 51 + CFLAGS_wireguard:=$(call get_hdr_inc2,_LINUX_WIREGUARD_H,_WG_UAPI_WIREGUARD_H,wireguard.h)
+2
tools/testing/selftests/bpf/Makefile
··· 437 437 -I$(abspath $(OUTPUT)/../usr/include) \ 438 438 -std=gnu11 \ 439 439 -fno-strict-aliasing \ 440 + -Wno-microsoft-anon-tag \ 441 + -fms-extensions \ 440 442 -Wno-compare-distinct-pointer-types \ 441 443 -Wno-initializer-overrides \ 442 444 #
+73 -18
tools/testing/selftests/bpf/prog_tests/d_path.c
··· 38 38 return readlink(buf, src.paths[src.cnt++], MAX_PATH_LEN); 39 39 } 40 40 41 + static inline long syscall_close(int fd) 42 + { 43 + return syscall(__NR_close_range, 44 + (unsigned int)fd, 45 + (unsigned int)fd, 46 + 0u); 47 + } 48 + 41 49 static int trigger_fstat_events(pid_t pid) 42 50 { 43 51 int sockfd = -1, procfd = -1, devfd = -1; ··· 112 104 /* sys_close no longer triggers filp_close, but we can 113 105 * call sys_close_range instead which still does 114 106 */ 115 - #define close(fd) syscall(__NR_close_range, fd, fd, 0) 116 - 117 - close(pipefd[0]); 118 - close(pipefd[1]); 119 - close(sockfd); 120 - close(procfd); 121 - close(devfd); 122 - close(localfd); 123 - close(indicatorfd); 124 - 125 - #undef close 107 + syscall_close(pipefd[0]); 108 + syscall_close(pipefd[1]); 109 + syscall_close(sockfd); 110 + syscall_close(procfd); 111 + syscall_close(devfd); 112 + syscall_close(localfd); 113 + syscall_close(indicatorfd); 126 114 return ret; 115 + } 116 + 117 + static void attach_and_load(struct test_d_path **skel) 118 + { 119 + int err; 120 + 121 + *skel = test_d_path__open_and_load(); 122 + if (CHECK(!*skel, "setup", "d_path skeleton failed\n")) 123 + goto cleanup; 124 + 125 + err = test_d_path__attach(*skel); 126 + if (CHECK(err, "setup", "attach failed: %d\n", err)) 127 + goto cleanup; 128 + 129 + (*skel)->bss->my_pid = getpid(); 130 + return; 131 + 132 + cleanup: 133 + test_d_path__destroy(*skel); 134 + *skel = NULL; 127 135 } 128 136 129 137 static void test_d_path_basic(void) ··· 148 124 struct test_d_path *skel; 149 125 int err; 150 126 151 - skel = test_d_path__open_and_load(); 152 - if (CHECK(!skel, "setup", "d_path skeleton failed\n")) 153 - goto cleanup; 154 - 155 - err = test_d_path__attach(skel); 156 - if (CHECK(err, "setup", "attach failed: %d\n", err)) 127 + attach_and_load(&skel); 128 + if (!skel) 157 129 goto cleanup; 158 130 159 131 bss = skel->bss; 160 - bss->my_pid = getpid(); 161 132 162 133 err = trigger_fstat_events(bss->my_pid); 163 134 if (err < 0) ··· 214 195 test_d_path_check_types__destroy(skel); 215 196 } 216 197 198 + /* Check if the verifier correctly generates code for 199 + * accessing the memory modified by d_path helper. 200 + */ 201 + static void test_d_path_mem_access(void) 202 + { 203 + int localfd = -1; 204 + char path_template[] = "/dev/shm/d_path_loadgen.XXXXXX"; 205 + struct test_d_path__bss *bss; 206 + struct test_d_path *skel; 207 + 208 + attach_and_load(&skel); 209 + if (!skel) 210 + goto cleanup; 211 + 212 + bss = skel->bss; 213 + 214 + localfd = mkstemp(path_template); 215 + if (CHECK(localfd < 0, "trigger", "mkstemp failed\n")) 216 + goto cleanup; 217 + 218 + if (CHECK(fallocate(localfd, 0, 0, 1024) < 0, "trigger", "fallocate failed\n")) 219 + goto cleanup; 220 + remove(path_template); 221 + 222 + if (CHECK(!bss->path_match_fallocate, "check", 223 + "failed to read fallocate path")) 224 + goto cleanup; 225 + 226 + cleanup: 227 + syscall_close(localfd); 228 + test_d_path__destroy(skel); 229 + } 230 + 217 231 void test_d_path(void) 218 232 { 219 233 if (test__start_subtest("basic")) ··· 257 205 258 206 if (test__start_subtest("check_alloc_mem")) 259 207 test_d_path_check_types(); 208 + 209 + if (test__start_subtest("check_mem_access")) 210 + test_d_path_mem_access(); 260 211 }
+42 -5
tools/testing/selftests/bpf/prog_tests/dmabuf_iter.c
··· 73 73 return -1; 74 74 } 75 75 76 - static int create_sys_heap_dmabuf(void) 76 + static int create_sys_heap_dmabuf(size_t bytes) 77 77 { 78 - sysheap_test_buffer_size = 20 * getpagesize(); 79 - 80 78 struct dma_heap_allocation_data data = { 81 - .len = sysheap_test_buffer_size, 79 + .len = bytes, 82 80 .fd = 0, 83 81 .fd_flags = O_RDWR | O_CLOEXEC, 84 82 .heap_flags = 0, ··· 108 110 static int create_test_buffers(void) 109 111 { 110 112 udmabuf = create_udmabuf(); 111 - sysheap_dmabuf = create_sys_heap_dmabuf(); 113 + 114 + sysheap_test_buffer_size = 20 * getpagesize(); 115 + sysheap_dmabuf = create_sys_heap_dmabuf(sysheap_test_buffer_size); 112 116 113 117 if (udmabuf < 0 || sysheap_dmabuf < 0) 114 118 return -1; ··· 219 219 close(iter_fd); 220 220 } 221 221 222 + static void subtest_dmabuf_iter_check_lots_of_buffers(struct dmabuf_iter *skel) 223 + { 224 + int iter_fd; 225 + char buf[1024]; 226 + size_t total_bytes_read = 0; 227 + ssize_t bytes_read; 228 + 229 + iter_fd = bpf_iter_create(bpf_link__fd(skel->links.dmabuf_collector)); 230 + if (!ASSERT_OK_FD(iter_fd, "iter_create")) 231 + return; 232 + 233 + while ((bytes_read = read(iter_fd, buf, sizeof(buf))) > 0) 234 + total_bytes_read += bytes_read; 235 + 236 + ASSERT_GT(total_bytes_read, getpagesize(), "total_bytes_read"); 237 + 238 + close(iter_fd); 239 + } 240 + 241 + 222 242 static void subtest_dmabuf_iter_check_open_coded(struct dmabuf_iter *skel, int map_fd) 223 243 { 224 244 LIBBPF_OPTS(bpf_test_run_opts, topts); ··· 295 275 subtest_dmabuf_iter_check_no_infinite_reads(skel); 296 276 if (test__start_subtest("default_iter")) 297 277 subtest_dmabuf_iter_check_default_iter(skel); 278 + if (test__start_subtest("lots_of_buffers")) { 279 + size_t NUM_BUFS = 100; 280 + int buffers[NUM_BUFS]; 281 + int i; 282 + 283 + for (i = 0; i < NUM_BUFS; ++i) { 284 + buffers[i] = create_sys_heap_dmabuf(getpagesize()); 285 + if (!ASSERT_OK_FD(buffers[i], "dmabuf_fd")) 286 + goto cleanup_bufs; 287 + } 288 + 289 + subtest_dmabuf_iter_check_lots_of_buffers(skel); 290 + 291 + cleanup_bufs: 292 + for (--i; i >= 0; --i) 293 + close(buffers[i]); 294 + } 298 295 if (test__start_subtest("open_coded")) 299 296 subtest_dmabuf_iter_check_open_coded(skel, map_fd); 300 297
+23
tools/testing/selftests/bpf/progs/test_d_path.c
··· 17 17 18 18 int called_stat = 0; 19 19 int called_close = 0; 20 + int path_match_fallocate = 0; 20 21 21 22 SEC("fentry/security_inode_getattr") 22 23 int BPF_PROG(prog_stat, struct path *path, struct kstat *stat, ··· 60 59 61 60 rets_close[cnt] = ret; 62 61 cnt_close++; 62 + return 0; 63 + } 64 + 65 + SEC("fentry/vfs_fallocate") 66 + int BPF_PROG(prog_fallocate, struct file *file, int mode, loff_t offset, loff_t len) 67 + { 68 + pid_t pid = bpf_get_current_pid_tgid() >> 32; 69 + int ret = 0; 70 + char path_fallocate[MAX_PATH_LEN] = {}; 71 + 72 + if (pid != my_pid) 73 + return 0; 74 + 75 + ret = bpf_d_path(&file->f_path, 76 + path_fallocate, MAX_PATH_LEN); 77 + if (ret < 0) 78 + return 0; 79 + 80 + if (!path_fallocate[0]) 81 + return 0; 82 + 83 + path_match_fallocate = 1; 63 84 return 0; 64 85 } 65 86
+3 -5
tools/testing/selftests/iommu/iommufd.c
··· 755 755 struct iommu_test_hw_info info; 756 756 uint64_t trailing_bytes; 757 757 } buffer_larger; 758 - struct iommu_test_hw_info_buffer_smaller { 759 - __u32 flags; 760 - } buffer_smaller; 761 758 762 759 if (self->device_id) { 763 760 uint8_t max_pasid = 0; ··· 786 789 * the fields within the size range still gets updated. 787 790 */ 788 791 test_cmd_get_hw_info(self->device_id, 789 - IOMMU_HW_INFO_TYPE_DEFAULT, 790 - &buffer_smaller, sizeof(buffer_smaller)); 792 + IOMMU_HW_INFO_TYPE_DEFAULT, &buffer_exact, 793 + offsetofend(struct iommu_test_hw_info, 794 + flags)); 791 795 test_cmd_get_hw_info_pasid(self->device_id, &max_pasid); 792 796 ASSERT_EQ(0, max_pasid); 793 797 if (variant->pasid_capable) {
+1
tools/testing/selftests/kvm/rseq_test.c
··· 215 215 switch (opt) { 216 216 case 'u': 217 217 skip_sanity_check = true; 218 + break; 218 219 case 'l': 219 220 latency = atoi_paranoid(optarg); 220 221 break;
+15
tools/testing/selftests/kvm/x86/cpuid_test.c
··· 155 155 static void set_cpuid_after_run(struct kvm_vcpu *vcpu) 156 156 { 157 157 struct kvm_cpuid_entry2 *ent; 158 + struct kvm_sregs sregs; 158 159 int rc; 159 160 u32 eax, ebx, x; 160 161 161 162 /* Setting unmodified CPUID is allowed */ 163 + rc = __vcpu_set_cpuid(vcpu); 164 + TEST_ASSERT(!rc, "Setting unmodified CPUID after KVM_RUN failed: %d", rc); 165 + 166 + /* 167 + * Toggle CR4 bits that affect dynamic CPUID feature flags to verify 168 + * setting unmodified CPUID succeeds with runtime CPUID updates. 169 + */ 170 + vcpu_sregs_get(vcpu, &sregs); 171 + if (kvm_cpu_has(X86_FEATURE_XSAVE)) 172 + sregs.cr4 ^= X86_CR4_OSXSAVE; 173 + if (kvm_cpu_has(X86_FEATURE_PKU)) 174 + sregs.cr4 ^= X86_CR4_PKE; 175 + vcpu_sregs_set(vcpu, &sregs); 176 + 162 177 rc = __vcpu_set_cpuid(vcpu); 163 178 TEST_ASSERT(!rc, "Setting unmodified CPUID after KVM_RUN failed: %d", rc); 164 179
+2
tools/testing/selftests/lkdtm/tests.txt
··· 1 1 #PANIC 2 2 #PANIC_STOP_IRQOFF Crashes entire system 3 + #PANIC_IN_HARDIRQ Crashes entire system 3 4 BUG kernel BUG at 5 + #BUG_IN_HARDIRQ Crashes entire system 4 6 WARNING WARNING: 5 7 WARNING_MESSAGE message trigger 6 8 EXCEPTION
+6 -1
tools/testing/selftests/net/af_unix/Makefile
··· 1 - CFLAGS += $(KHDR_INCLUDES) -Wall -Wflex-array-member-not-at-end 1 + top_srcdir := ../../../../.. 2 + include $(top_srcdir)/scripts/Makefile.compiler 3 + 4 + cc-option = $(call __cc-option, $(CC),,$(1),$(2)) 5 + 6 + CFLAGS += $(KHDR_INCLUDES) -Wall $(call cc-option,-Wflex-array-member-not-at-end) 2 7 3 8 TEST_GEN_PROGS := \ 4 9 diag_uid \
+1
tools/testing/selftests/net/forwarding/config
··· 29 29 CONFIG_NET_CLS_BASIC=m 30 30 CONFIG_NET_CLS_FLOWER=m 31 31 CONFIG_NET_CLS_MATCHALL=m 32 + CONFIG_NET_CLS_U32=m 32 33 CONFIG_NET_EMATCH=y 33 34 CONFIG_NET_EMATCH_META=m 34 35 CONFIG_NETFILTER=y
+31 -45
tools/testing/selftests/net/forwarding/vxlan_bridge_1q_mc_ul.sh
··· 138 138 defer tc qdisc del dev "$dev" clsact 139 139 140 140 tc filter add dev "$dev" ingress proto ip pref 104 \ 141 - flower skip_hw ip_proto udp dst_port "$VXPORT" \ 142 - action pass 141 + u32 match ip protocol 0x11 0xff \ 142 + match u16 "$VXPORT" 0xffff at 0x16 \ 143 + match u16 0x0800 0xffff at 0x30 \ 144 + action pass 143 145 defer tc filter del dev "$dev" ingress proto ip pref 104 144 146 145 147 tc filter add dev "$dev" ingress proto ipv6 pref 106 \ 146 - flower skip_hw ip_proto udp dst_port "$VXPORT" \ 147 - action pass 148 + u32 match ip6 protocol 0x11 0xff \ 149 + match u16 "$VXPORT" 0xffff at 0x2a \ 150 + match u16 0x86dd 0xffff at 0x44 \ 151 + match u8 0x11 0xff at 0x4c \ 152 + action pass 148 153 defer tc filter del dev "$dev" ingress proto ipv6 pref 106 149 154 } 150 155 ··· 253 248 } 254 249 export -f vx_create 255 250 256 - vx_wait() 257 - { 258 - # Wait for all the ARP, IGMP etc. noise to settle down so that the 259 - # tunnel is clear for measurements. 260 - sleep 10 261 - } 262 - 263 251 vx10_create() 264 252 { 265 253 vx_create vx10 10 id 1000 "$@" ··· 264 266 vx_create vx20 20 id 2000 "$@" 265 267 } 266 268 export -f vx20_create 267 - 268 - vx10_create_wait() 269 - { 270 - vx10_create "$@" 271 - vx_wait 272 - } 273 - 274 - vx20_create_wait() 275 - { 276 - vx20_create "$@" 277 - vx_wait 278 - } 279 269 280 270 ns_init_common() 281 271 { ··· 540 554 # Install a misleading (S,G) rule to attempt to trick the system into 541 555 # pushing the packets elsewhere. 542 556 adf_install_broken_sg 543 - vx10_create_wait local 192.0.2.100 group "$GROUP4" dev "$swp2" 557 + vx10_create local 192.0.2.100 group "$GROUP4" dev "$swp2" 544 558 do_test 4 10 0 "IPv4 nomcroute" 545 559 } 546 560 ··· 548 562 { 549 563 # Like for IPv4, install a misleading (S,G). 550 564 adf_install_broken_sg 551 - vx20_create_wait local 2001:db8:4::1 group "$GROUP6" dev "$swp2" 565 + vx20_create local 2001:db8:4::1 group "$GROUP6" dev "$swp2" 552 566 do_test 6 10 0 "IPv6 nomcroute" 553 567 } 554 568 ··· 567 581 ipv4_mcroute() 568 582 { 569 583 adf_install_sg 570 - vx10_create_wait local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 584 + vx10_create local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 571 585 do_test 4 10 10 "IPv4 mcroute" 572 586 } 573 587 574 588 ipv6_mcroute() 575 589 { 576 590 adf_install_sg 577 - vx20_create_wait local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 591 + vx20_create local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 578 592 do_test 6 10 10 "IPv6 mcroute" 579 593 } 580 594 581 595 ipv4_mcroute_rx() 582 596 { 583 597 adf_install_sg 584 - vx10_create_wait local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 598 + vx10_create local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 585 599 ipv4_do_test_rx 0 "IPv4 mcroute ping" 586 600 } 587 601 588 602 ipv6_mcroute_rx() 589 603 { 590 604 adf_install_sg 591 - vx20_create_wait local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 605 + vx20_create local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 592 606 ipv6_do_test_rx 0 "IPv6 mcroute ping" 593 607 } 594 608 595 609 ipv4_mcroute_changelink() 596 610 { 597 611 adf_install_sg 598 - vx10_create_wait local 192.0.2.100 group "$GROUP4" dev "$IPMR" 612 + vx10_create local 192.0.2.100 group "$GROUP4" dev "$IPMR" 599 613 ip link set dev vx10 type vxlan mcroute 600 614 sleep 1 601 615 do_test 4 10 10 "IPv4 mcroute changelink" ··· 604 618 ipv6_mcroute_changelink() 605 619 { 606 620 adf_install_sg 607 - vx20_create_wait local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 621 + vx20_create local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 608 622 ip link set dev vx20 type vxlan mcroute 609 623 sleep 1 610 624 do_test 6 10 10 "IPv6 mcroute changelink" ··· 613 627 ipv4_mcroute_starg() 614 628 { 615 629 adf_install_starg 616 - vx10_create_wait local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 630 + vx10_create local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 617 631 do_test 4 10 10 "IPv4 mcroute (*,G)" 618 632 } 619 633 620 634 ipv6_mcroute_starg() 621 635 { 622 636 adf_install_starg 623 - vx20_create_wait local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 637 + vx20_create local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 624 638 do_test 6 10 10 "IPv6 mcroute (*,G)" 625 639 } 626 640 627 641 ipv4_mcroute_starg_rx() 628 642 { 629 643 adf_install_starg 630 - vx10_create_wait local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 644 + vx10_create local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 631 645 ipv4_do_test_rx 0 "IPv4 mcroute (*,G) ping" 632 646 } 633 647 634 648 ipv6_mcroute_starg_rx() 635 649 { 636 650 adf_install_starg 637 - vx20_create_wait local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 651 + vx20_create local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 638 652 ipv6_do_test_rx 0 "IPv6 mcroute (*,G) ping" 639 653 } 640 654 641 655 ipv4_mcroute_noroute() 642 656 { 643 - vx10_create_wait local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 657 + vx10_create local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 644 658 do_test 4 0 0 "IPv4 mcroute, no route" 645 659 } 646 660 647 661 ipv6_mcroute_noroute() 648 662 { 649 - vx20_create_wait local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 663 + vx20_create local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 650 664 do_test 6 0 0 "IPv6 mcroute, no route" 651 665 } 652 666 653 667 ipv4_mcroute_fdb() 654 668 { 655 669 adf_install_sg 656 - vx10_create_wait local 192.0.2.100 dev "$IPMR" mcroute 670 + vx10_create local 192.0.2.100 dev "$IPMR" mcroute 657 671 bridge fdb add dev vx10 \ 658 672 00:00:00:00:00:00 self static dst "$GROUP4" via "$IPMR" 659 673 do_test 4 10 10 "IPv4 mcroute FDB" ··· 662 676 ipv6_mcroute_fdb() 663 677 { 664 678 adf_install_sg 665 - vx20_create_wait local 2001:db8:4::1 dev "$IPMR" mcroute 679 + vx20_create local 2001:db8:4::1 dev "$IPMR" mcroute 666 680 bridge -6 fdb add dev vx20 \ 667 681 00:00:00:00:00:00 self static dst "$GROUP6" via "$IPMR" 668 682 do_test 6 10 10 "IPv6 mcroute FDB" ··· 672 686 ipv4_mcroute_fdb_oif0() 673 687 { 674 688 adf_install_sg 675 - vx10_create_wait local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 689 + vx10_create local 192.0.2.100 group "$GROUP4" dev "$IPMR" mcroute 676 690 bridge fdb del dev vx10 00:00:00:00:00:00 677 691 bridge fdb add dev vx10 00:00:00:00:00:00 self static dst "$GROUP4" 678 692 do_test 4 10 10 "IPv4 mcroute oif=0" ··· 689 703 defer ip -6 route del table local multicast "$GROUP6/128" dev "$IPMR" 690 704 691 705 adf_install_sg 692 - vx20_create_wait local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 706 + vx20_create local 2001:db8:4::1 group "$GROUP6" dev "$IPMR" mcroute 693 707 bridge -6 fdb del dev vx20 00:00:00:00:00:00 694 708 bridge -6 fdb add dev vx20 00:00:00:00:00:00 self static dst "$GROUP6" 695 709 do_test 6 10 10 "IPv6 mcroute oif=0" ··· 702 716 adf_install_sg_sep 703 717 704 718 adf_ip_addr_add lo 192.0.2.120/28 705 - vx10_create_wait local 192.0.2.120 group "$GROUP4" dev "$IPMR" mcroute 719 + vx10_create local 192.0.2.120 group "$GROUP4" dev "$IPMR" mcroute 706 720 bridge fdb del dev vx10 00:00:00:00:00:00 707 721 bridge fdb add dev vx10 00:00:00:00:00:00 self static dst "$GROUP4" 708 722 do_test 4 10 10 "IPv4 mcroute TX!=RX oif=0" ··· 713 727 adf_install_sg_sep_rx lo 714 728 715 729 adf_ip_addr_add lo 192.0.2.120/28 716 - vx10_create_wait local 192.0.2.120 group "$GROUP4" dev "$IPMR" mcroute 730 + vx10_create local 192.0.2.120 group "$GROUP4" dev "$IPMR" mcroute 717 731 bridge fdb del dev vx10 00:00:00:00:00:00 718 732 bridge fdb add dev vx10 00:00:00:00:00:00 self static dst "$GROUP4" 719 733 ipv4_do_test_rx 0 "IPv4 mcroute TX!=RX oif=0 ping" ··· 724 738 adf_install_sg_sep_rx lo 725 739 726 740 adf_ip_addr_add lo 192.0.2.120/28 727 - vx10_create_wait local 192.0.2.120 group "$GROUP4" dev "$IPMR" mcroute 741 + vx10_create local 192.0.2.120 group "$GROUP4" dev "$IPMR" mcroute 728 742 bridge fdb del dev vx10 00:00:00:00:00:00 729 743 bridge fdb add \ 730 744 dev vx10 00:00:00:00:00:00 self static dst "$GROUP4" via lo ··· 736 750 adf_install_sg_sep_rx "X$IPMR" 737 751 738 752 adf_ip_addr_add "X$IPMR" 2001:db8:5::1/64 739 - vx20_create_wait local 2001:db8:5::1 group "$GROUP6" dev "$IPMR" mcroute 753 + vx20_create local 2001:db8:5::1 group "$GROUP6" dev "$IPMR" mcroute 740 754 bridge -6 fdb del dev vx20 00:00:00:00:00:00 741 755 bridge -6 fdb add dev vx20 00:00:00:00:00:00 \ 742 756 self static dst "$GROUP6" via "X$IPMR"
+2 -1
tools/testing/selftests/net/lib.sh
··· 280 280 local selector=${1:-.packets}; shift 281 281 282 282 tc -j -s filter show dev $dev $dir pref $pref \ 283 - | jq ".[1].options.actions[].stats$selector" 283 + | jq ".[] | select(.options.actions) | 284 + .options.actions[].stats$selector" 284 285 } 285 286 286 287 tc_rule_handle_stats_get()
+4 -2
tools/testing/selftests/net/lib/ksft.h
··· 24 24 fd = STDOUT_FILENO; 25 25 } 26 26 27 - write(fd, msg, sizeof(msg)); 27 + if (write(fd, msg, sizeof(msg)) < 0) 28 + perror("write()"); 28 29 if (fd != STDOUT_FILENO) 29 30 close(fd); 30 31 } ··· 49 48 fd = STDIN_FILENO; 50 49 } 51 50 52 - read(fd, &byte, sizeof(byte)); 51 + if (read(fd, &byte, sizeof(byte)) < 0) 52 + perror("read()"); 53 53 if (fd != STDIN_FILENO) 54 54 close(fd); 55 55 }
+4
tools/testing/selftests/net/mptcp/pm_netlink.sh
··· 192 192 flush_endpoint 193 193 check "show_endpoints" "" "flush addrs" 194 194 195 + add_endpoint 10.0.1.1 flags unknown 196 + check "show_endpoints" "$(format_endpoints "1,10.0.1.1")" "ignore unknown flags" 197 + flush_endpoint 198 + 195 199 set_limits 9 1 2>/dev/null 196 200 check "get_limits" "${default_limits}" "rcv addrs above hard limit" 197 201
+11
tools/testing/selftests/net/mptcp/pm_nl_ctl.c
··· 24 24 #define IPPROTO_MPTCP 262 25 25 #endif 26 26 27 + #define MPTCP_PM_ADDR_FLAG_UNKNOWN _BITUL(7) 28 + 27 29 static void syntax(char *argv[]) 28 30 { 29 31 fprintf(stderr, "%s add|ann|rem|csf|dsf|get|set|del|flush|dump|events|listen|accept [<args>]\n", argv[0]); ··· 838 836 flags |= MPTCP_PM_ADDR_FLAG_BACKUP; 839 837 else if (!strcmp(tok, "fullmesh")) 840 838 flags |= MPTCP_PM_ADDR_FLAG_FULLMESH; 839 + else if (!strcmp(tok, "unknown")) 840 + flags |= MPTCP_PM_ADDR_FLAG_UNKNOWN; 841 841 else 842 842 error(1, errno, 843 843 "unknown flag %s", argv[arg]); ··· 1048 1044 if (flags & MPTCP_PM_ADDR_FLAG_IMPLICIT) { 1049 1045 printf("implicit"); 1050 1046 flags &= ~MPTCP_PM_ADDR_FLAG_IMPLICIT; 1047 + if (flags) 1048 + printf(","); 1049 + } 1050 + 1051 + if (flags & MPTCP_PM_ADDR_FLAG_UNKNOWN) { 1052 + printf("unknown"); 1053 + flags &= ~MPTCP_PM_ADDR_FLAG_UNKNOWN; 1051 1054 if (flags) 1052 1055 printf(","); 1053 1056 }
+4 -5
tools/testing/selftests/net/netfilter/conntrack_clash.sh
··· 116 116 # not a failure: clash resolution logic did not trigger. 117 117 # With right timing, xmit completed sequentially and 118 118 # no parallel insertion occurs. 119 - return $ksft_skip 119 + return $ksft_xfail 120 120 } 121 121 122 122 run_clash_test() ··· 133 133 if [ $rv -eq 0 ];then 134 134 echo "PASS: clash resolution test for $daddr:$dport on attempt $i" 135 135 return 0 136 - elif [ $rv -eq $ksft_skip ]; then 136 + elif [ $rv -eq $ksft_xfail ]; then 137 137 softerr=1 138 138 fi 139 139 done 140 140 141 - [ $softerr -eq 1 ] && echo "SKIP: clash resolution for $daddr:$dport did not trigger" 141 + [ $softerr -eq 1 ] && echo "XFAIL: clash resolution for $daddr:$dport did not trigger" 142 142 } 143 143 144 144 ip link add veth0 netns "$nsclient1" type veth peer name veth0 netns "$nsrouter" ··· 167 167 run_clash_test "$nsclient2" "$nsclient2" 127.0.0.1 9001 168 168 169 169 if [ $clash_resolution_active -eq 0 ];then 170 - [ "$ret" -eq 0 ] && ret=$ksft_skip 171 - echo "SKIP: Clash resolution did not trigger" 170 + [ "$ret" -eq 0 ] && ret=$ksft_xfail 172 171 fi 173 172 174 173 exit $ret
+9 -4
tools/testing/selftests/net/netfilter/conntrack_reverse_clash.c
··· 33 33 exit(111); 34 34 } 35 35 36 - static void die_port(uint16_t got, uint16_t want) 36 + static void die_port(const struct sockaddr_in *sin, uint16_t want) 37 37 { 38 - fprintf(stderr, "Port number changed, wanted %d got %d\n", want, ntohs(got)); 38 + uint16_t got = ntohs(sin->sin_port); 39 + char str[INET_ADDRSTRLEN]; 40 + 41 + inet_ntop(AF_INET, &sin->sin_addr, str, sizeof(str)); 42 + 43 + fprintf(stderr, "Port number changed, wanted %d got %d from %s\n", want, got, str); 39 44 exit(1); 40 45 } 41 46 ··· 105 100 die("child recvfrom"); 106 101 107 102 if (peer.sin_port != htons(PORT)) 108 - die_port(peer.sin_port, PORT); 103 + die_port(&peer, PORT); 109 104 } else { 110 105 if (sendto(s2, buf, LEN, 0, (struct sockaddr *)&sa1, sizeof(sa1)) != LEN) 111 106 continue; ··· 114 109 die("parent recvfrom"); 115 110 116 111 if (peer.sin_port != htons((PORT + 1))) 117 - die_port(peer.sin_port, PORT + 1); 112 + die_port(&peer, PORT + 1); 118 113 } 119 114 } 120 115
+2
tools/testing/selftests/net/netfilter/conntrack_reverse_clash.sh
··· 45 45 echo "PASS: No SNAT performed for null bindings" 46 46 else 47 47 echo "ERROR: SNAT performed without any matching snat rule" 48 + ip netns exec "$ns0" conntrack -L 49 + ip netns exec "$ns0" conntrack -S 48 50 exit 1 49 51 fi 50 52
+1 -1
tools/testing/selftests/net/netfilter/packetdrill/conntrack_syn_challenge_ack.pkt
··· 26 26 27 27 +0.01 > R 643160523:643160523(0) win 0 28 28 29 - +0.01 `conntrack -f $NFCT_IP_VERSION -L -p tcp --dport 8080 2>/dev/null | grep UNREPLIED | grep -q SYN_SENT` 29 + +0.1 `conntrack -f $NFCT_IP_VERSION -L -p tcp --dport 8080 2>/dev/null | grep UNREPLIED | grep -q SYN_SENT` 30 30 31 31 // Must go through. 32 32 +0.01 > S 0:0(0) win 65535 <mss 1460,sackOK,TS val 1 ecr 0,nop,wscale 8>
+2 -1
tools/testing/selftests/net/tfo.c
··· 81 81 if (getsockopt(connfd, SOL_SOCKET, SO_INCOMING_NAPI_ID, &opt, &len) < 0) 82 82 error(1, errno, "getsockopt(SO_INCOMING_NAPI_ID)"); 83 83 84 - read(connfd, buf, 64); 84 + if (read(connfd, buf, 64) < 0) 85 + perror("read()"); 85 86 fprintf(outfile, "%d\n", opt); 86 87 87 88 fclose(outfile);
+1 -1
tools/testing/selftests/net/tls.c
··· 2786 2786 TEST_F(tls_err, poll_partial_rec_async) 2787 2787 { 2788 2788 struct pollfd pfd = { }; 2789 + char token = '\0'; 2789 2790 ssize_t rec_len; 2790 2791 char rec[256]; 2791 2792 char buf[128]; 2792 - char token; 2793 2793 int p[2]; 2794 2794 int ret; 2795 2795
+1
tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
··· 1 1 bhrb_filter_map_test 2 2 bhrb_no_crash_wo_pmu_test 3 + check_extended_reg_test 3 4 intr_regs_no_crash_wo_pmu_test 4 5 mmcr0_cc56run_test 5 6 mmcr0_exceptionbits_test
+8
tools/testing/selftests/sched_ext/runner.c
··· 46 46 if (!quiet) 47 47 printf("DESCRIPTION: %s\n", test->description); 48 48 printf("OUTPUT:\n"); 49 + 50 + /* 51 + * The tests may fork with the preamble buffered 52 + * in the children's stdout. Flush before the test 53 + * to avoid printing the message multiple times. 54 + */ 55 + fflush(stdout); 56 + fflush(stderr); 49 57 } 50 58 51 59 static const char *status_to_result(enum scx_test_status status)
+46
tools/testing/selftests/tc-testing/tc-tests/actions/mirred.json
··· 1052 1052 "$TC qdisc del dev $DEV1 ingress_block 21 clsact", 1053 1053 "$TC actions flush action mirred" 1054 1054 ] 1055 + }, 1056 + { 1057 + "id": "7eba", 1058 + "name": "Redirect multiport: dummy egress -> dummy egress (Loop)", 1059 + "category": [ 1060 + "filter", 1061 + "mirred" 1062 + ], 1063 + "plugins": { 1064 + "requires": [ 1065 + "nsPlugin" 1066 + ] 1067 + }, 1068 + "setup": [ 1069 + "$IP link set dev $DUMMY up || true", 1070 + "$IP addr add 10.10.10.10/24 dev $DUMMY || true", 1071 + "$TC qdisc add dev $DUMMY handle 1: root drr", 1072 + "$TC filter add dev $DUMMY parent 1: protocol ip prio 10 matchall action mirred egress redirect dev $DUMMY index 1" 1073 + ], 1074 + "cmdUnderTest": "ping -c1 -W0.01 -I $DUMMY 10.10.10.1", 1075 + "expExitCode": "1", 1076 + "verifyCmd": "$TC -j -s actions get action mirred index 1", 1077 + "matchJSON": [ 1078 + { 1079 + "total acts": 0 1080 + }, 1081 + { 1082 + "actions": [ 1083 + { 1084 + "order": 1, 1085 + "kind": "mirred", 1086 + "mirred_action": "redirect", 1087 + "direction": "egress", 1088 + "index": 1, 1089 + "stats": { 1090 + "packets": 1, 1091 + "overlimits": 1 1092 + }, 1093 + "not_in_hw": true 1094 + } 1095 + ] 1096 + } 1097 + ], 1098 + "teardown": [ 1099 + "$TC qdisc del dev $DUMMY root" 1100 + ] 1055 1101 } 1056 1102 ]
+78
tools/testing/selftests/tc-testing/tc-tests/infra/qdiscs.json
··· 1033 1033 "teardown": [ 1034 1034 "$TC qdisc del dev $DUMMY handle 1: root" 1035 1035 ] 1036 + }, 1037 + { 1038 + "id": "6e4f", 1039 + "name": "Try to delete ets drr class' qdisc while still keeping it in the active list", 1040 + "category": [ 1041 + "qdisc", 1042 + "ets", 1043 + "tbf" 1044 + ], 1045 + "plugins": { 1046 + "requires": [ 1047 + "nsPlugin", 1048 + "scapyPlugin" 1049 + ] 1050 + }, 1051 + "setup": [ 1052 + "$IP link set dev $DUMMY up || true", 1053 + "$IP addr add 10.10.11.10/24 dev $DUMMY || true", 1054 + "$TC qdisc add dev $DUMMY root handle 1: ets bands 2 strict 1", 1055 + "$TC qdisc add dev $DUMMY parent 1:2 handle 20: tbf rate 8bit burst 100b latency 1s", 1056 + "$TC filter add dev $DUMMY parent 1: basic classid 1:2", 1057 + "ping -c2 -W0.01 -s 56 -I $DUMMY 10.10.11.11 || true", 1058 + "$TC qdisc change dev $DUMMY root handle 1: ets bands 2 strict 2", 1059 + "$TC qdisc change dev $DUMMY root handle 1: ets bands 1 strict 1" 1060 + ], 1061 + "cmdUnderTest": "ping -c1 -W0.01 -s 56 -I $DUMMY 10.10.11.11", 1062 + "expExitCode": "1", 1063 + "verifyCmd": "$TC -s -j qdisc ls dev $DUMMY root", 1064 + "matchJSON": [ 1065 + { 1066 + "kind": "ets", 1067 + "handle": "1:", 1068 + "bytes": 196, 1069 + "packets": 2 1070 + } 1071 + ], 1072 + "teardown": [ 1073 + "$TC qdisc del dev $DUMMY root handle 1:" 1074 + ] 1075 + }, 1076 + { 1077 + "id": "0b8f", 1078 + "name": "Try to add ets class to the active list twice", 1079 + "category": [ 1080 + "qdisc", 1081 + "ets", 1082 + "tbf" 1083 + ], 1084 + "plugins": { 1085 + "requires": [ 1086 + "nsPlugin", 1087 + "scapyPlugin" 1088 + ] 1089 + }, 1090 + "setup": [ 1091 + "$IP link set dev $DUMMY up || true", 1092 + "$IP addr add 10.10.11.10/24 dev $DUMMY || true", 1093 + "$TC qdisc add dev $DUMMY root handle 1: ets bands 2 strict 1", 1094 + "$TC qdisc add dev $DUMMY parent 1:2 handle 20: tbf rate 8bit burst 100b latency 1s", 1095 + "$TC filter add dev $DUMMY parent 1: basic classid 1:2", 1096 + "ping -c2 -W0.01 -s 56 -I $DUMMY 10.10.11.11 || true", 1097 + "$TC qdisc change dev $DUMMY root handle 1: ets bands 2 strict 2", 1098 + "$TC qdisc change dev $DUMMY root handle 1: ets bands 2 strict 1" 1099 + ], 1100 + "cmdUnderTest": "ping -c1 -W0.01 -s 56 -I $DUMMY 10.10.11.11", 1101 + "expExitCode": "1", 1102 + "verifyCmd": "$TC -s -j qdisc ls dev $DUMMY root", 1103 + "matchJSON": [ 1104 + { 1105 + "kind": "ets", 1106 + "handle": "1:", 1107 + "bytes": 98, 1108 + "packets": 1 1109 + } 1110 + ], 1111 + "teardown": [ 1112 + "$TC qdisc del dev $DUMMY root handle 1:" 1113 + ] 1036 1114 } 1037 1115 ]
+8
tools/testing/selftests/ublk/Makefile
··· 21 21 TEST_PROGS += test_generic_11.sh 22 22 TEST_PROGS += test_generic_12.sh 23 23 TEST_PROGS += test_generic_13.sh 24 + TEST_PROGS += test_generic_14.sh 24 25 25 26 TEST_PROGS += test_null_01.sh 26 27 TEST_PROGS += test_null_02.sh 28 + TEST_PROGS += test_null_03.sh 27 29 TEST_PROGS += test_loop_01.sh 28 30 TEST_PROGS += test_loop_02.sh 29 31 TEST_PROGS += test_loop_03.sh 30 32 TEST_PROGS += test_loop_04.sh 31 33 TEST_PROGS += test_loop_05.sh 34 + TEST_PROGS += test_loop_06.sh 35 + TEST_PROGS += test_loop_07.sh 32 36 TEST_PROGS += test_stripe_01.sh 33 37 TEST_PROGS += test_stripe_02.sh 34 38 TEST_PROGS += test_stripe_03.sh 35 39 TEST_PROGS += test_stripe_04.sh 40 + TEST_PROGS += test_stripe_05.sh 41 + TEST_PROGS += test_stripe_06.sh 36 42 37 43 TEST_PROGS += test_stress_01.sh 38 44 TEST_PROGS += test_stress_02.sh 39 45 TEST_PROGS += test_stress_03.sh 40 46 TEST_PROGS += test_stress_04.sh 41 47 TEST_PROGS += test_stress_05.sh 48 + TEST_PROGS += test_stress_06.sh 49 + TEST_PROGS += test_stress_07.sh 42 50 43 51 TEST_GEN_PROGS_EXTENDED = kublk 44 52
+4 -3
tools/testing/selftests/ublk/file_backed.c
··· 34 34 unsigned zc = ublk_queue_use_zc(q); 35 35 unsigned auto_zc = ublk_queue_use_auto_zc(q); 36 36 enum io_uring_op op = ublk_to_uring_op(iod, zc | auto_zc); 37 + struct ublk_io *io = ublk_get_io(q, tag); 37 38 struct io_uring_sqe *sqe[3]; 38 - void *addr = (zc | auto_zc) ? NULL : (void *)iod->addr; 39 + void *addr = io->buf_addr; 39 40 40 41 if (!zc || auto_zc) { 41 42 ublk_io_alloc_sqes(t, sqe, 1); ··· 57 56 58 57 ublk_io_alloc_sqes(t, sqe, 3); 59 58 60 - io_uring_prep_buf_register(sqe[0], q, tag, q->q_id, ublk_get_io(q, tag)->buf_index); 59 + io_uring_prep_buf_register(sqe[0], q, tag, q->q_id, io->buf_index); 61 60 sqe[0]->flags |= IOSQE_CQE_SKIP_SUCCESS | IOSQE_IO_HARDLINK; 62 61 sqe[0]->user_data = build_user_data(tag, 63 62 ublk_cmd_op_nr(sqe[0]->cmd_op), 0, q->q_id, 1); ··· 69 68 sqe[1]->flags |= IOSQE_FIXED_FILE | IOSQE_IO_HARDLINK; 70 69 sqe[1]->user_data = build_user_data(tag, ublk_op, 0, q->q_id, 1); 71 70 72 - io_uring_prep_buf_unregister(sqe[2], q, tag, q->q_id, ublk_get_io(q, tag)->buf_index); 71 + io_uring_prep_buf_unregister(sqe[2], q, tag, q->q_id, io->buf_index); 73 72 sqe[2]->user_data = build_user_data(tag, ublk_cmd_op_nr(sqe[2]->cmd_op), 0, q->q_id, 1); 74 73 75 74 return 2;
+58 -6
tools/testing/selftests/ublk/kublk.c
··· 596 596 sqe->addr = ublk_auto_buf_reg_to_sqe_addr(&buf); 597 597 } 598 598 599 + /* Copy in pieces to test the buffer offset logic */ 600 + #define UBLK_USER_COPY_LEN 2048 601 + 602 + static void ublk_user_copy(const struct ublk_io *io, __u8 match_ublk_op) 603 + { 604 + const struct ublk_queue *q = ublk_io_to_queue(io); 605 + const struct ublksrv_io_desc *iod = ublk_get_iod(q, io->tag); 606 + __u64 off = ublk_user_copy_offset(q->q_id, io->tag); 607 + __u8 ublk_op = ublksrv_get_op(iod); 608 + __u32 len = iod->nr_sectors << 9; 609 + void *addr = io->buf_addr; 610 + 611 + if (ublk_op != match_ublk_op) 612 + return; 613 + 614 + while (len) { 615 + __u32 copy_len = min(len, UBLK_USER_COPY_LEN); 616 + ssize_t copied; 617 + 618 + if (ublk_op == UBLK_IO_OP_WRITE) 619 + copied = pread(q->ublk_fd, addr, copy_len, off); 620 + else if (ublk_op == UBLK_IO_OP_READ) 621 + copied = pwrite(q->ublk_fd, addr, copy_len, off); 622 + else 623 + assert(0); 624 + assert(copied == (ssize_t)copy_len); 625 + addr += copy_len; 626 + off += copy_len; 627 + len -= copy_len; 628 + } 629 + } 630 + 599 631 int ublk_queue_io_cmd(struct ublk_thread *t, struct ublk_io *io) 600 632 { 601 633 struct ublk_queue *q = ublk_io_to_queue(io); ··· 650 618 651 619 if (io->flags & UBLKS_IO_NEED_GET_DATA) 652 620 cmd_op = UBLK_U_IO_NEED_GET_DATA; 653 - else if (io->flags & UBLKS_IO_NEED_COMMIT_RQ_COMP) 621 + else if (io->flags & UBLKS_IO_NEED_COMMIT_RQ_COMP) { 622 + if (ublk_queue_use_user_copy(q)) 623 + ublk_user_copy(io, UBLK_IO_OP_READ); 624 + 654 625 cmd_op = UBLK_U_IO_COMMIT_AND_FETCH_REQ; 655 - else if (io->flags & UBLKS_IO_NEED_FETCH_RQ) 626 + } else if (io->flags & UBLKS_IO_NEED_FETCH_RQ) 656 627 cmd_op = UBLK_U_IO_FETCH_REQ; 657 628 658 629 if (io_uring_sq_space_left(&t->ring) < 1) ··· 684 649 sqe[0]->rw_flags = 0; 685 650 cmd->tag = io->tag; 686 651 cmd->q_id = q->q_id; 687 - if (!ublk_queue_no_buf(q)) 652 + if (!ublk_queue_no_buf(q) && !ublk_queue_use_user_copy(q)) 688 653 cmd->addr = (__u64) (uintptr_t) io->buf_addr; 689 654 else 690 655 cmd->addr = 0; ··· 786 751 787 752 if (cqe->res == UBLK_IO_RES_OK) { 788 753 assert(tag < q->q_depth); 754 + 755 + if (ublk_queue_use_user_copy(q)) 756 + ublk_user_copy(io, UBLK_IO_OP_WRITE); 757 + 789 758 if (q->tgt_ops->queue_io) 790 759 q->tgt_ops->queue_io(t, q, tag); 791 760 } else if (cqe->res == UBLK_IO_RES_NEED_GET_DATA) { ··· 1546 1507 1547 1508 printf("%s %s -t [null|loop|stripe|fault_inject] [-q nr_queues] [-d depth] [-n dev_id]\n", 1548 1509 exe, recovery ? "recover" : "add"); 1549 - printf("\t[--foreground] [--quiet] [-z] [--auto_zc] [--auto_zc_fallback] [--debug_mask mask] [-r 0|1 ] [-g]\n"); 1510 + printf("\t[--foreground] [--quiet] [-z] [--auto_zc] [--auto_zc_fallback] [--debug_mask mask] [-r 0|1] [-g] [-u]\n"); 1550 1511 printf("\t[-e 0|1 ] [-i 0|1] [--no_ublk_fixed_fd]\n"); 1551 1512 printf("\t[--nthreads threads] [--per_io_tasks]\n"); 1552 1513 printf("\t[target options] [backfile1] [backfile2] ...\n"); ··· 1607 1568 { "get_data", 1, NULL, 'g'}, 1608 1569 { "auto_zc", 0, NULL, 0 }, 1609 1570 { "auto_zc_fallback", 0, NULL, 0 }, 1571 + { "user_copy", 0, NULL, 'u'}, 1610 1572 { "size", 1, NULL, 's'}, 1611 1573 { "nthreads", 1, NULL, 0 }, 1612 1574 { "per_io_tasks", 0, NULL, 0 }, ··· 1633 1593 1634 1594 opterr = 0; 1635 1595 optind = 2; 1636 - while ((opt = getopt_long(argc, argv, "t:n:d:q:r:e:i:s:gaz", 1596 + while ((opt = getopt_long(argc, argv, "t:n:d:q:r:e:i:s:gazu", 1637 1597 longopts, &option_idx)) != -1) { 1638 1598 switch (opt) { 1639 1599 case 'a': ··· 1653 1613 ctx.queue_depth = strtol(optarg, NULL, 10); 1654 1614 break; 1655 1615 case 'z': 1656 - ctx.flags |= UBLK_F_SUPPORT_ZERO_COPY | UBLK_F_USER_COPY; 1616 + ctx.flags |= UBLK_F_SUPPORT_ZERO_COPY; 1657 1617 break; 1658 1618 case 'r': 1659 1619 value = strtol(optarg, NULL, 10); ··· 1672 1632 break; 1673 1633 case 'g': 1674 1634 ctx.flags |= UBLK_F_NEED_GET_DATA; 1635 + break; 1636 + case 'u': 1637 + ctx.flags |= UBLK_F_USER_COPY; 1675 1638 break; 1676 1639 case 's': 1677 1640 ctx.size = strtoull(optarg, NULL, 10); ··· 1726 1683 ublk_err("%s: auto_zc_fallback is set but neither " 1727 1684 "F_AUTO_BUF_REG nor F_SUPPORT_ZERO_COPY is enabled\n", 1728 1685 __func__); 1686 + return -EINVAL; 1687 + } 1688 + 1689 + if (!!(ctx.flags & UBLK_F_NEED_GET_DATA) + 1690 + !!(ctx.flags & UBLK_F_USER_COPY) + 1691 + (ctx.flags & UBLK_F_SUPPORT_ZERO_COPY && !ctx.auto_zc_fallback) + 1692 + (ctx.flags & UBLK_F_AUTO_BUF_REG && !ctx.auto_zc_fallback) + 1693 + ctx.auto_zc_fallback > 1) { 1694 + fprintf(stderr, "too many data copy modes specified\n"); 1729 1695 return -EINVAL; 1730 1696 } 1731 1697
+17 -6
tools/testing/selftests/ublk/kublk.h
··· 208 208 return !!(iod->op_flags & UBLK_IO_F_NEED_REG_BUF); 209 209 } 210 210 211 + static inline __u64 ublk_user_copy_offset(unsigned q_id, unsigned tag) 212 + { 213 + return UBLKSRV_IO_BUF_OFFSET + 214 + ((__u64)q_id << UBLK_QID_OFF | (__u64)tag << UBLK_TAG_OFF); 215 + } 216 + 211 217 static inline int is_target_io(__u64 user_data) 212 218 { 213 219 return (user_data & (1ULL << 63)) != 0; ··· 396 390 return --io->tgt_ios == 0; 397 391 } 398 392 399 - static inline int ublk_queue_use_zc(const struct ublk_queue *q) 393 + static inline bool ublk_queue_use_zc(const struct ublk_queue *q) 400 394 { 401 - return q->flags & UBLK_F_SUPPORT_ZERO_COPY; 395 + return !!(q->flags & UBLK_F_SUPPORT_ZERO_COPY); 402 396 } 403 397 404 - static inline int ublk_queue_use_auto_zc(const struct ublk_queue *q) 398 + static inline bool ublk_queue_use_auto_zc(const struct ublk_queue *q) 405 399 { 406 - return q->flags & UBLK_F_AUTO_BUF_REG; 400 + return !!(q->flags & UBLK_F_AUTO_BUF_REG); 407 401 } 408 402 409 - static inline int ublk_queue_auto_zc_fallback(const struct ublk_queue *q) 403 + static inline bool ublk_queue_auto_zc_fallback(const struct ublk_queue *q) 410 404 { 411 - return q->flags & UBLKS_Q_AUTO_BUF_REG_FALLBACK; 405 + return !!(q->flags & UBLKS_Q_AUTO_BUF_REG_FALLBACK); 406 + } 407 + 408 + static inline bool ublk_queue_use_user_copy(const struct ublk_queue *q) 409 + { 410 + return !!(q->flags & UBLK_F_USER_COPY); 412 411 } 413 412 414 413 static inline int ublk_queue_no_buf(const struct ublk_queue *q)
+1 -1
tools/testing/selftests/ublk/stripe.c
··· 134 134 struct stripe_array *s = alloc_stripe_array(conf, iod); 135 135 struct ublk_io *io = ublk_get_io(q, tag); 136 136 int i, extra = zc ? 2 : 0; 137 - void *base = (zc | auto_zc) ? NULL : (void *)iod->addr; 137 + void *base = io->buf_addr; 138 138 139 139 io->private_data = s; 140 140 calculate_stripe_array(conf, iod, s, base);
+3 -2
tools/testing/selftests/ublk/test_common.sh
··· 333 333 334 334 run_io_and_recover() 335 335 { 336 - local action=$1 336 + local size=$1 337 + local action=$2 337 338 local state 338 339 local dev_id 339 340 340 - shift 1 341 + shift 2 341 342 dev_id=$(_add_ublk_dev "$@") 342 343 _check_add_dev "$TID" $? 343 344
+1 -1
tools/testing/selftests/ublk/test_generic_04.sh
··· 8 8 9 9 ublk_run_recover_test() 10 10 { 11 - run_io_and_recover "kill_daemon" "$@" 11 + run_io_and_recover 256M "kill_daemon" "$@" 12 12 ERR_CODE=$? 13 13 if [ ${ERR_CODE} -ne 0 ]; then 14 14 echo "$TID failure: $*"
+1 -1
tools/testing/selftests/ublk/test_generic_05.sh
··· 8 8 9 9 ublk_run_recover_test() 10 10 { 11 - run_io_and_recover "kill_daemon" "$@" 11 + run_io_and_recover 256M "kill_daemon" "$@" 12 12 ERR_CODE=$? 13 13 if [ ${ERR_CODE} -ne 0 ]; then 14 14 echo "$TID failure: $*"
+1 -1
tools/testing/selftests/ublk/test_generic_11.sh
··· 8 8 9 9 ublk_run_quiesce_recover() 10 10 { 11 - run_io_and_recover "quiesce_dev" "$@" 11 + run_io_and_recover 256M "quiesce_dev" "$@" 12 12 ERR_CODE=$? 13 13 if [ ${ERR_CODE} -ne 0 ]; then 14 14 echo "$TID failure: $*"
+40
tools/testing/selftests/ublk/test_generic_14.sh
··· 1 + #!/bin/bash 2 + # SPDX-License-Identifier: GPL-2.0 3 + 4 + . "$(cd "$(dirname "$0")" && pwd)"/test_common.sh 5 + 6 + TID="generic_14" 7 + ERR_CODE=0 8 + 9 + ublk_run_recover_test() 10 + { 11 + run_io_and_recover 256M "kill_daemon" "$@" 12 + ERR_CODE=$? 13 + if [ ${ERR_CODE} -ne 0 ]; then 14 + echo "$TID failure: $*" 15 + _show_result $TID $ERR_CODE 16 + fi 17 + } 18 + 19 + if ! _have_program fio; then 20 + exit "$UBLK_SKIP_CODE" 21 + fi 22 + 23 + _prep_test "recover" "basic recover function verification (user copy)" 24 + 25 + _create_backfile 0 256M 26 + _create_backfile 1 128M 27 + _create_backfile 2 128M 28 + 29 + ublk_run_recover_test -t null -q 2 -r 1 -u & 30 + ublk_run_recover_test -t loop -q 2 -r 1 -u "${UBLK_BACKFILES[0]}" & 31 + ublk_run_recover_test -t stripe -q 2 -r 1 -u "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 32 + wait 33 + 34 + ublk_run_recover_test -t null -q 2 -r 1 -u -i 1 & 35 + ublk_run_recover_test -t loop -q 2 -r 1 -u -i 1 "${UBLK_BACKFILES[0]}" & 36 + ublk_run_recover_test -t stripe -q 2 -r 1 -u -i 1 "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 37 + wait 38 + 39 + _cleanup_test "recover" 40 + _show_result $TID $ERR_CODE
+25
tools/testing/selftests/ublk/test_loop_06.sh
··· 1 + #!/bin/bash 2 + # SPDX-License-Identifier: GPL-2.0 3 + 4 + . "$(cd "$(dirname "$0")" && pwd)"/test_common.sh 5 + 6 + TID="loop_06" 7 + ERR_CODE=0 8 + 9 + if ! _have_program fio; then 10 + exit "$UBLK_SKIP_CODE" 11 + fi 12 + 13 + _prep_test "loop" "write and verify over user copy" 14 + 15 + _create_backfile 0 256M 16 + dev_id=$(_add_ublk_dev -t loop -u "${UBLK_BACKFILES[0]}") 17 + _check_add_dev $TID $? 18 + 19 + # run fio over the ublk disk 20 + _run_fio_verify_io --filename=/dev/ublkb"${dev_id}" --size=256M 21 + ERR_CODE=$? 22 + 23 + _cleanup_test "loop" 24 + 25 + _show_result $TID $ERR_CODE
+21
tools/testing/selftests/ublk/test_loop_07.sh
··· 1 + #!/bin/bash 2 + # SPDX-License-Identifier: GPL-2.0 3 + 4 + . "$(cd "$(dirname "$0")" && pwd)"/test_common.sh 5 + 6 + TID="loop_07" 7 + ERR_CODE=0 8 + 9 + _prep_test "loop" "mkfs & mount & umount with user copy" 10 + 11 + _create_backfile 0 256M 12 + 13 + dev_id=$(_add_ublk_dev -t loop -u "${UBLK_BACKFILES[0]}") 14 + _check_add_dev $TID $? 15 + 16 + _mkfs_mount_test /dev/ublkb"${dev_id}" 17 + ERR_CODE=$? 18 + 19 + _cleanup_test "loop" 20 + 21 + _show_result $TID $ERR_CODE
+24
tools/testing/selftests/ublk/test_null_03.sh
··· 1 + #!/bin/bash 2 + # SPDX-License-Identifier: GPL-2.0 3 + 4 + . "$(cd "$(dirname "$0")" && pwd)"/test_common.sh 5 + 6 + TID="null_03" 7 + ERR_CODE=0 8 + 9 + if ! _have_program fio; then 10 + exit "$UBLK_SKIP_CODE" 11 + fi 12 + 13 + _prep_test "null" "basic IO test with user copy" 14 + 15 + dev_id=$(_add_ublk_dev -t null -u) 16 + _check_add_dev $TID $? 17 + 18 + # run fio over the two disks 19 + fio --name=job1 --filename=/dev/ublkb"${dev_id}" --ioengine=libaio --rw=readwrite --iodepth=32 --size=256M > /dev/null 2>&1 20 + ERR_CODE=$? 21 + 22 + _cleanup_test "null" 23 + 24 + _show_result $TID $ERR_CODE
+7 -5
tools/testing/selftests/ublk/test_stress_04.sh
··· 31 31 ublk_io_and_kill_daemon 8G -t null -q 4 -z --no_ublk_fixed_fd & 32 32 ublk_io_and_kill_daemon 256M -t loop -q 4 -z --no_ublk_fixed_fd "${UBLK_BACKFILES[0]}" & 33 33 ublk_io_and_kill_daemon 256M -t stripe -q 4 -z "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 34 + wait 34 35 35 36 if _have_feature "AUTO_BUF_REG"; then 36 37 ublk_io_and_kill_daemon 8G -t null -q 4 --auto_zc & 37 38 ublk_io_and_kill_daemon 256M -t loop -q 4 --auto_zc "${UBLK_BACKFILES[0]}" & 38 39 ublk_io_and_kill_daemon 256M -t stripe -q 4 --auto_zc --no_ublk_fixed_fd "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 39 40 ublk_io_and_kill_daemon 8G -t null -q 4 -z --auto_zc --auto_zc_fallback & 41 + wait 40 42 fi 41 43 42 44 if _have_feature "PER_IO_DAEMON"; then 43 - ublk_io_and_kill_daemon 8G -t null -q 4 --nthreads 8 --per_io_tasks & 44 - ublk_io_and_kill_daemon 256M -t loop -q 4 --nthreads 8 --per_io_tasks "${UBLK_BACKFILES[0]}" & 45 - ublk_io_and_kill_daemon 256M -t stripe -q 4 --nthreads 8 --per_io_tasks "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 46 - ublk_io_and_kill_daemon 8G -t null -q 4 --nthreads 8 --per_io_tasks & 45 + ublk_io_and_kill_daemon 8G -t null -q 4 --auto_zc --nthreads 8 --per_io_tasks & 46 + ublk_io_and_kill_daemon 256M -t loop -q 4 --auto_zc --nthreads 8 --per_io_tasks "${UBLK_BACKFILES[0]}" & 47 + ublk_io_and_kill_daemon 256M -t stripe -q 4 --auto_zc --nthreads 8 --per_io_tasks "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 48 + ublk_io_and_kill_daemon 8G -t null -q 4 -z --auto_zc --auto_zc_fallback --nthreads 8 --per_io_tasks & 49 + wait 47 50 fi 48 - wait 49 51 50 52 _cleanup_test "stress" 51 53 _show_result $TID $ERR_CODE
+5 -5
tools/testing/selftests/ublk/test_stress_05.sh
··· 58 58 59 59 if _have_feature "ZERO_COPY"; then 60 60 for reissue in $(seq 0 1); do 61 - ublk_io_and_remove 8G -t null -q 4 -g -z -r 1 -i "$reissue" & 62 - ublk_io_and_remove 256M -t loop -q 4 -g -z -r 1 -i "$reissue" "${UBLK_BACKFILES[1]}" & 61 + ublk_io_and_remove 8G -t null -q 4 -z -r 1 -i "$reissue" & 62 + ublk_io_and_remove 256M -t loop -q 4 -z -r 1 -i "$reissue" "${UBLK_BACKFILES[1]}" & 63 63 wait 64 64 done 65 65 fi 66 66 67 67 if _have_feature "AUTO_BUF_REG"; then 68 68 for reissue in $(seq 0 1); do 69 - ublk_io_and_remove 8G -t null -q 4 -g --auto_zc -r 1 -i "$reissue" & 70 - ublk_io_and_remove 256M -t loop -q 4 -g --auto_zc -r 1 -i "$reissue" "${UBLK_BACKFILES[1]}" & 71 - ublk_io_and_remove 8G -t null -q 4 -g -z --auto_zc --auto_zc_fallback -r 1 -i "$reissue" & 69 + ublk_io_and_remove 8G -t null -q 4 --auto_zc -r 1 -i "$reissue" & 70 + ublk_io_and_remove 256M -t loop -q 4 --auto_zc -r 1 -i "$reissue" "${UBLK_BACKFILES[1]}" & 71 + ublk_io_and_remove 8G -t null -q 4 -z --auto_zc --auto_zc_fallback -r 1 -i "$reissue" & 72 72 wait 73 73 done 74 74 fi
+39
tools/testing/selftests/ublk/test_stress_06.sh
··· 1 + #!/bin/bash 2 + # SPDX-License-Identifier: GPL-2.0 3 + 4 + . "$(cd "$(dirname "$0")" && pwd)"/test_common.sh 5 + TID="stress_06" 6 + ERR_CODE=0 7 + 8 + ublk_io_and_remove() 9 + { 10 + run_io_and_remove "$@" 11 + ERR_CODE=$? 12 + if [ ${ERR_CODE} -ne 0 ]; then 13 + echo "$TID failure: $*" 14 + _show_result $TID $ERR_CODE 15 + fi 16 + } 17 + 18 + if ! _have_program fio; then 19 + exit "$UBLK_SKIP_CODE" 20 + fi 21 + 22 + _prep_test "stress" "run IO and remove device (user copy)" 23 + 24 + _create_backfile 0 256M 25 + _create_backfile 1 128M 26 + _create_backfile 2 128M 27 + 28 + ublk_io_and_remove 8G -t null -q 4 -u & 29 + ublk_io_and_remove 256M -t loop -q 4 -u "${UBLK_BACKFILES[0]}" & 30 + ublk_io_and_remove 256M -t stripe -q 4 -u "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 31 + wait 32 + 33 + ublk_io_and_remove 8G -t null -q 4 -u --nthreads 8 --per_io_tasks & 34 + ublk_io_and_remove 256M -t loop -q 4 -u --nthreads 8 --per_io_tasks "${UBLK_BACKFILES[0]}" & 35 + ublk_io_and_remove 256M -t stripe -q 4 -u --nthreads 8 --per_io_tasks "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 36 + wait 37 + 38 + _cleanup_test "stress" 39 + _show_result $TID $ERR_CODE
+39
tools/testing/selftests/ublk/test_stress_07.sh
··· 1 + #!/bin/bash 2 + # SPDX-License-Identifier: GPL-2.0 3 + 4 + . "$(cd "$(dirname "$0")" && pwd)"/test_common.sh 5 + TID="stress_07" 6 + ERR_CODE=0 7 + 8 + ublk_io_and_kill_daemon() 9 + { 10 + run_io_and_kill_daemon "$@" 11 + ERR_CODE=$? 12 + if [ ${ERR_CODE} -ne 0 ]; then 13 + echo "$TID failure: $*" 14 + _show_result $TID $ERR_CODE 15 + fi 16 + } 17 + 18 + if ! _have_program fio; then 19 + exit "$UBLK_SKIP_CODE" 20 + fi 21 + 22 + _prep_test "stress" "run IO and kill ublk server (user copy)" 23 + 24 + _create_backfile 0 256M 25 + _create_backfile 1 128M 26 + _create_backfile 2 128M 27 + 28 + ublk_io_and_kill_daemon 8G -t null -q 4 -u --no_ublk_fixed_fd & 29 + ublk_io_and_kill_daemon 256M -t loop -q 4 -u --no_ublk_fixed_fd "${UBLK_BACKFILES[0]}" & 30 + ublk_io_and_kill_daemon 256M -t stripe -q 4 -u "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 31 + wait 32 + 33 + ublk_io_and_kill_daemon 8G -t null -q 4 -u --nthreads 8 --per_io_tasks & 34 + ublk_io_and_kill_daemon 256M -t loop -q 4 -u --nthreads 8 --per_io_tasks "${UBLK_BACKFILES[0]}" & 35 + ublk_io_and_kill_daemon 256M -t stripe -q 4 -u --nthreads 8 --per_io_tasks "${UBLK_BACKFILES[1]}" "${UBLK_BACKFILES[2]}" & 36 + wait 37 + 38 + _cleanup_test "stress" 39 + _show_result $TID $ERR_CODE
+26
tools/testing/selftests/ublk/test_stripe_05.sh
··· 1 + #!/bin/bash 2 + # SPDX-License-Identifier: GPL-2.0 3 + 4 + . "$(cd "$(dirname "$0")" && pwd)"/test_common.sh 5 + 6 + TID="stripe_05" 7 + ERR_CODE=0 8 + 9 + if ! _have_program fio; then 10 + exit "$UBLK_SKIP_CODE" 11 + fi 12 + 13 + _prep_test "stripe" "write and verify test on user copy" 14 + 15 + _create_backfile 0 256M 16 + _create_backfile 1 256M 17 + 18 + dev_id=$(_add_ublk_dev -t stripe -q 2 -u "${UBLK_BACKFILES[0]}" "${UBLK_BACKFILES[1]}") 19 + _check_add_dev $TID $? 20 + 21 + # run fio over the ublk disk 22 + _run_fio_verify_io --filename=/dev/ublkb"${dev_id}" --size=512M 23 + ERR_CODE=$? 24 + 25 + _cleanup_test "stripe" 26 + _show_result $TID $ERR_CODE
+21
tools/testing/selftests/ublk/test_stripe_06.sh
··· 1 + #!/bin/bash 2 + # SPDX-License-Identifier: GPL-2.0 3 + 4 + . "$(cd "$(dirname "$0")" && pwd)"/test_common.sh 5 + 6 + TID="stripe_06" 7 + ERR_CODE=0 8 + 9 + _prep_test "stripe" "mkfs & mount & umount on user copy" 10 + 11 + _create_backfile 0 256M 12 + _create_backfile 1 256M 13 + 14 + dev_id=$(_add_ublk_dev -t stripe -u -q 2 "${UBLK_BACKFILES[0]}" "${UBLK_BACKFILES[1]}") 15 + _check_add_dev $TID $? 16 + 17 + _mkfs_mount_test /dev/ublkb"${dev_id}" 18 + ERR_CODE=$? 19 + 20 + _cleanup_test "stripe" 21 + _show_result $TID $ERR_CODE
+1 -2
tools/testing/selftests/ublk/trace/seq_io.bt
··· 4 4 $3: strlen($2) 5 5 */ 6 6 BEGIN { 7 - @last_rw[$1, str($2)] = 0; 7 + @last_rw[$1, str($2)] = (uint64)0; 8 8 } 9 9 tracepoint:block:block_rq_complete 10 10 { ··· 17 17 } 18 18 @last_rw[$dev, str($2)] = (args.sector + args.nr_sector); 19 19 } 20 - @ios = count(); 21 20 } 22 21 23 22 END {
+5 -3
tools/virtio/Makefile
··· 20 20 CFLAGS += -pthread 21 21 LDFLAGS += -pthread 22 22 vpath %.c ../../drivers/virtio ../../drivers/vhost 23 + BUILD=KCFLAGS="-I "`pwd`/../../drivers/vhost ${MAKE} -C `pwd`/../.. V=${V} 23 24 mod: 24 - ${MAKE} -C `pwd`/../.. M=`pwd`/vhost_test V=${V} 25 + ${BUILD} M=`pwd`/vhost_test 25 26 26 27 #oot: build vhost as an out of tree module for a distro kernel 27 28 #no effort is taken to make it actually build or work, but tends to mostly work ··· 38 37 CONFIG_VHOST_NET=n \ 39 38 CONFIG_VHOST_SCSI=n \ 40 39 CONFIG_VHOST_VSOCK=n \ 41 - CONFIG_VHOST_RING=n 42 - OOT_BUILD=KCFLAGS="-I "${OOT_VHOST} ${MAKE} -C ${OOT_KSRC} V=${V} 40 + CONFIG_VHOST_RING=n \ 41 + CONFIG_VHOST_VDPA=n 42 + OOT_BUILD=KCFLAGS="-include "`pwd`"/oot-stubs.h -I "${OOT_VHOST} ${MAKE} -C ${OOT_KSRC} V=${V} 43 43 oot-build: 44 44 echo "UNSUPPORTED! Don't use the resulting modules in production!" 45 45 ${OOT_BUILD} M=`pwd`/vhost_test
+6
tools/virtio/linux/compiler.h
··· 2 2 #ifndef LINUX_COMPILER_H 3 3 #define LINUX_COMPILER_H 4 4 5 + /* Avoid redefinition warnings */ 6 + #undef __user 5 7 #include "../../../include/linux/compiler_types.h" 8 + #undef __user 9 + #define __user 6 10 7 11 #define WRITE_ONCE(var, val) \ 8 12 (*((volatile typeof(val) *)(&(var))) = (val)) ··· 38 34 auto __v = (expr); \ 39 35 __v; \ 40 36 }) 37 + 38 + #define __must_check 41 39 42 40 #endif
+4
tools/virtio/linux/cpumask.h
··· 4 4 5 5 #include <linux/kernel.h> 6 6 7 + struct cpumask { 8 + unsigned long bits[1]; 9 + }; 10 + 7 11 #endif /* _LINUX_CPUMASK_H */
+8
tools/virtio/linux/device.h
··· 1 1 #ifndef LINUX_DEVICE_H 2 + 3 + struct device { 4 + void *parent; 5 + }; 6 + 7 + struct device_driver { 8 + const char *name; 9 + }; 2 10 #endif
+4
tools/virtio/linux/dma-mapping.h
··· 22 22 #define dma_free_coherent(d, s, p, h) kfree(p) 23 23 24 24 #define dma_map_page(d, p, o, s, dir) (page_to_phys(p) + (o)) 25 + #define dma_map_page_attrs(d, p, o, s, dir, a) (page_to_phys(p) + (o)) 25 26 26 27 #define dma_map_single(d, p, s, dir) (virt_to_phys(p)) 27 28 #define dma_map_single_attrs(d, p, s, dir, a) (virt_to_phys(p)) ··· 30 29 31 30 #define dma_unmap_single(d, a, s, r) do { (void)(d); (void)(a); (void)(s); (void)(r); } while (0) 32 31 #define dma_unmap_page(d, a, s, r) do { (void)(d); (void)(a); (void)(s); (void)(r); } while (0) 32 + #define dma_unmap_page_attrs(d, a, s, r, t) do { \ 33 + (void)(d); (void)(a); (void)(s); (void)(r); (void)(t); \ 34 + } while (0) 33 35 34 36 #define sg_dma_address(sg) (0) 35 37 #define sg_dma_len(sg) (0)
+16
tools/virtio/linux/kernel.h
··· 14 14 #include <linux/log2.h> 15 15 #include <linux/types.h> 16 16 #include <linux/overflow.h> 17 + #include <linux/limits.h> 17 18 #include <linux/list.h> 18 19 #include <linux/printk.h> 19 20 #include <linux/bug.h> ··· 135 134 #define dev_err(dev, format, ...) fprintf (stderr, format, ## __VA_ARGS__) 136 135 #define dev_warn(dev, format, ...) fprintf (stderr, format, ## __VA_ARGS__) 137 136 #define dev_warn_once(dev, format, ...) fprintf (stderr, format, ## __VA_ARGS__) 137 + 138 + #define dev_WARN_ONCE(dev, condition, format...) \ 139 + WARN_ONCE(condition, format) 140 + 141 + static inline bool is_vmalloc_addr(const void *x) 142 + { 143 + return false; 144 + } 145 + 146 + #define might_sleep() do { } while (0) 147 + 148 + static inline void synchronize_rcu(void) 149 + { 150 + assert(0); 151 + } 138 152 139 153 #define min(x, y) ({ \ 140 154 typeof(x) _min1 = (x); \
+2
tools/virtio/linux/module.h
··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 #include <linux/export.h> 3 3 4 + struct module; 5 + 4 6 #define MODULE_LICENSE(__MODULE_LICENSE_value) \ 5 7 static __attribute__((unused)) const char *__MODULE_LICENSE_name = \ 6 8 __MODULE_LICENSE_value
+21
tools/virtio/linux/ucopysize.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + #ifndef __LINUX_UCOPYSIZE_H__ 3 + #define __LINUX_UCOPYSIZE_H__ 4 + 5 + #include <linux/bug.h> 6 + 7 + static inline void check_object_size(const void *ptr, unsigned long n, 8 + bool to_user) 9 + { } 10 + 11 + static inline void copy_overflow(int size, unsigned long count) 12 + { 13 + } 14 + 15 + static __always_inline __must_check bool 16 + check_copy_size(const void *addr, size_t bytes, bool is_source) 17 + { 18 + return true; 19 + } 20 + 21 + #endif /* __LINUX_UCOPYSIZE_H__ */
+1 -72
tools/virtio/linux/virtio.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef LINUX_VIRTIO_H 3 - #define LINUX_VIRTIO_H 4 - #include <linux/scatterlist.h> 5 - #include <linux/kernel.h> 6 - #include <linux/spinlock.h> 7 - 8 - struct device { 9 - void *parent; 10 - }; 11 - 12 - struct virtio_device { 13 - struct device dev; 14 - u64 features; 15 - struct list_head vqs; 16 - spinlock_t vqs_list_lock; 17 - const struct virtio_config_ops *config; 18 - }; 19 - 20 - struct virtqueue { 21 - struct list_head list; 22 - void (*callback)(struct virtqueue *vq); 23 - const char *name; 24 - struct virtio_device *vdev; 25 - unsigned int index; 26 - unsigned int num_free; 27 - unsigned int num_max; 28 - void *priv; 29 - bool reset; 30 - }; 31 - 32 - /* Interfaces exported by virtio_ring. */ 33 - int virtqueue_add_sgs(struct virtqueue *vq, 34 - struct scatterlist *sgs[], 35 - unsigned int out_sgs, 36 - unsigned int in_sgs, 37 - void *data, 38 - gfp_t gfp); 39 - 40 - int virtqueue_add_outbuf(struct virtqueue *vq, 41 - struct scatterlist sg[], unsigned int num, 42 - void *data, 43 - gfp_t gfp); 44 - 45 - int virtqueue_add_inbuf(struct virtqueue *vq, 46 - struct scatterlist sg[], unsigned int num, 47 - void *data, 48 - gfp_t gfp); 49 - 50 - bool virtqueue_kick(struct virtqueue *vq); 51 - 52 - void *virtqueue_get_buf(struct virtqueue *vq, unsigned int *len); 53 - 54 - void virtqueue_disable_cb(struct virtqueue *vq); 55 - 56 - bool virtqueue_enable_cb(struct virtqueue *vq); 57 - bool virtqueue_enable_cb_delayed(struct virtqueue *vq); 58 - 59 - void *virtqueue_detach_unused_buf(struct virtqueue *vq); 60 - struct virtqueue *vring_new_virtqueue(unsigned int index, 61 - unsigned int num, 62 - unsigned int vring_align, 63 - struct virtio_device *vdev, 64 - bool weak_barriers, 65 - bool ctx, 66 - void *pages, 67 - bool (*notify)(struct virtqueue *vq), 68 - void (*callback)(struct virtqueue *vq), 69 - const char *name); 70 - void vring_del_virtqueue(struct virtqueue *vq); 71 - 72 - #endif 1 + #include <../../include/linux/virtio.h>
+1 -101
tools/virtio/linux/virtio_config.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef LINUX_VIRTIO_CONFIG_H 3 - #define LINUX_VIRTIO_CONFIG_H 4 - #include <linux/virtio_byteorder.h> 5 - #include <linux/virtio.h> 6 - #include <uapi/linux/virtio_config.h> 7 - 8 - struct virtio_config_ops { 9 - int (*disable_vq_and_reset)(struct virtqueue *vq); 10 - int (*enable_vq_after_reset)(struct virtqueue *vq); 11 - }; 12 - 13 - /* 14 - * __virtio_test_bit - helper to test feature bits. For use by transports. 15 - * Devices should normally use virtio_has_feature, 16 - * which includes more checks. 17 - * @vdev: the device 18 - * @fbit: the feature bit 19 - */ 20 - static inline bool __virtio_test_bit(const struct virtio_device *vdev, 21 - unsigned int fbit) 22 - { 23 - return vdev->features & (1ULL << fbit); 24 - } 25 - 26 - /** 27 - * __virtio_set_bit - helper to set feature bits. For use by transports. 28 - * @vdev: the device 29 - * @fbit: the feature bit 30 - */ 31 - static inline void __virtio_set_bit(struct virtio_device *vdev, 32 - unsigned int fbit) 33 - { 34 - vdev->features |= (1ULL << fbit); 35 - } 36 - 37 - /** 38 - * __virtio_clear_bit - helper to clear feature bits. For use by transports. 39 - * @vdev: the device 40 - * @fbit: the feature bit 41 - */ 42 - static inline void __virtio_clear_bit(struct virtio_device *vdev, 43 - unsigned int fbit) 44 - { 45 - vdev->features &= ~(1ULL << fbit); 46 - } 47 - 48 - #define virtio_has_feature(dev, feature) \ 49 - (__virtio_test_bit((dev), feature)) 50 - 51 - /** 52 - * virtio_has_dma_quirk - determine whether this device has the DMA quirk 53 - * @vdev: the device 54 - */ 55 - static inline bool virtio_has_dma_quirk(const struct virtio_device *vdev) 56 - { 57 - /* 58 - * Note the reverse polarity of the quirk feature (compared to most 59 - * other features), this is for compatibility with legacy systems. 60 - */ 61 - return !virtio_has_feature(vdev, VIRTIO_F_ACCESS_PLATFORM); 62 - } 63 - 64 - static inline bool virtio_is_little_endian(struct virtio_device *vdev) 65 - { 66 - return virtio_has_feature(vdev, VIRTIO_F_VERSION_1) || 67 - virtio_legacy_is_little_endian(); 68 - } 69 - 70 - /* Memory accessors */ 71 - static inline u16 virtio16_to_cpu(struct virtio_device *vdev, __virtio16 val) 72 - { 73 - return __virtio16_to_cpu(virtio_is_little_endian(vdev), val); 74 - } 75 - 76 - static inline __virtio16 cpu_to_virtio16(struct virtio_device *vdev, u16 val) 77 - { 78 - return __cpu_to_virtio16(virtio_is_little_endian(vdev), val); 79 - } 80 - 81 - static inline u32 virtio32_to_cpu(struct virtio_device *vdev, __virtio32 val) 82 - { 83 - return __virtio32_to_cpu(virtio_is_little_endian(vdev), val); 84 - } 85 - 86 - static inline __virtio32 cpu_to_virtio32(struct virtio_device *vdev, u32 val) 87 - { 88 - return __cpu_to_virtio32(virtio_is_little_endian(vdev), val); 89 - } 90 - 91 - static inline u64 virtio64_to_cpu(struct virtio_device *vdev, __virtio64 val) 92 - { 93 - return __virtio64_to_cpu(virtio_is_little_endian(vdev), val); 94 - } 95 - 96 - static inline __virtio64 cpu_to_virtio64(struct virtio_device *vdev, u64 val) 97 - { 98 - return __cpu_to_virtio64(virtio_is_little_endian(vdev), val); 99 - } 100 - 101 - #endif 1 + #include "../../include/linux/virtio_config.h"
+10
tools/virtio/oot-stubs.h
··· 1 + #include <linux/bug.h> 2 + #include <linux/string.h> 3 + #include <linux/virtio_features.h> 4 + 5 + #ifndef VIRTIO_FEATURES_BITS 6 + #define VIRTIO_FEATURES_BITS 128 7 + #endif 8 + #ifndef VIRTIO_U64 9 + #define VIRTIO_U64(b) ((b) >> 6) 10 + #endif
+16 -1
virt/kvm/kvm_main.c
··· 1749 1749 kvm_free_memslot(kvm, old); 1750 1750 break; 1751 1751 case KVM_MR_MOVE: 1752 + /* 1753 + * Moving a guest_memfd memslot isn't supported, and will never 1754 + * be supported. 1755 + */ 1756 + WARN_ON_ONCE(old->flags & KVM_MEM_GUEST_MEMFD); 1757 + fallthrough; 1752 1758 case KVM_MR_FLAGS_ONLY: 1753 1759 /* 1754 1760 * Free the dirty bitmap as needed; the below check encompasses ··· 1762 1756 */ 1763 1757 if (old->dirty_bitmap && !new->dirty_bitmap) 1764 1758 kvm_destroy_dirty_bitmap(old); 1759 + 1760 + /* 1761 + * Unbind the guest_memfd instance as needed; the @new slot has 1762 + * already created its own binding. TODO: Drop the WARN when 1763 + * dirty logging guest_memfd memslots is supported. Until then, 1764 + * flags-only changes on guest_memfd slots should be impossible. 1765 + */ 1766 + if (WARN_ON_ONCE(old->flags & KVM_MEM_GUEST_MEMFD)) 1767 + kvm_gmem_unbind(old); 1765 1768 1766 1769 /* 1767 1770 * The final quirk. Free the detached, old slot, but only its ··· 2101 2086 return -EINVAL; 2102 2087 if ((mem->userspace_addr != old->userspace_addr) || 2103 2088 (npages != old->npages) || 2104 - ((mem->flags ^ old->flags) & KVM_MEM_READONLY)) 2089 + ((mem->flags ^ old->flags) & (KVM_MEM_READONLY | KVM_MEM_GUEST_MEMFD))) 2105 2090 return -EINVAL; 2106 2091 2107 2092 if (base_gfn != old->base_gfn)