Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'net-stmmac-lpc18xx-and-sti-convert-to-set_phy_intf_sel'
Russell King says:
====================
net: stmmac: lpc18xx and sti: convert to set_phy_intf_sel()
This series converts lpc18xx and sti to use the new .set_phy_intf_sel()
method.
====================
Link: https://patch.msgid.link/aQyEs4DAZRWpAz32@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+42
-50
+23
-19
drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c
+23
-19
drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c
···
21
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22
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/* Register defines for CREG syscon */
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#define LPC18XX_CREG_CREG6 0x12c
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-
# define LPC18XX_CREG_CREG6_ETHMODE_MASK 0x7
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-
# define LPC18XX_CREG_CREG6_ETHMODE_MII 0x0
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-
# define LPC18XX_CREG_CREG6_ETHMODE_RMII 0x4
24
+
# define LPC18XX_CREG_CREG6_ETHMODE_MASK GENMASK(2, 0)
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+
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+
static int lpc18xx_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)
27
+
{
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+
struct regmap *reg = bsp_priv;
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+
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+
if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &&
31
+
phy_intf_sel != PHY_INTF_SEL_RMII)
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+
return -EINVAL;
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+
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+
regmap_update_bits(reg, LPC18XX_CREG_CREG6,
35
+
LPC18XX_CREG_CREG6_ETHMODE_MASK,
36
+
FIELD_PREP(LPC18XX_CREG_CREG6_ETHMODE_MASK,
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+
phy_intf_sel));
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+
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return 0;
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+
}
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static int lpc18xx_dwmac_probe(struct platform_device *pdev)
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{
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struct plat_stmmacenet_data *plat_dat;
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struct stmmac_resources stmmac_res;
32
-
struct regmap *reg;
33
-
u8 ethmode;
46
+
struct regmap *regmap;
34
47
int ret;
35
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36
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ret = stmmac_get_platform_resources(pdev, &stmmac_res);
···
56
43
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plat_dat->core_type = DWMAC_CORE_GMAC;
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-
reg = syscon_regmap_lookup_by_compatible("nxp,lpc1850-creg");
60
-
if (IS_ERR(reg)) {
46
+
regmap = syscon_regmap_lookup_by_compatible("nxp,lpc1850-creg");
47
+
if (IS_ERR(regmap)) {
61
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dev_err(&pdev->dev, "syscon lookup failed\n");
62
-
return PTR_ERR(reg);
49
+
return PTR_ERR(regmap);
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50
}
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65
-
if (plat_dat->phy_interface == PHY_INTERFACE_MODE_MII) {
66
-
ethmode = LPC18XX_CREG_CREG6_ETHMODE_MII;
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-
} else if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII) {
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-
ethmode = LPC18XX_CREG_CREG6_ETHMODE_RMII;
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-
} else {
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dev_err(&pdev->dev, "Only MII and RMII mode supported\n");
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-
return -EINVAL;
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}
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-
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regmap_update_bits(reg, LPC18XX_CREG_CREG6,
75
-
LPC18XX_CREG_CREG6_ETHMODE_MASK, ethmode);
52
+
plat_dat->bsp_priv = regmap;
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+
plat_dat->set_phy_intf_sel = lpc18xx_set_phy_intf_sel;
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return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
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}
+19
-31
drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c
+19
-31
drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c
···
77
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* 001-RGMII
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* 010-SGMII
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* 100-RMII
80
+
* These are the DW MAC phy_intf_sel values.
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*/
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#define MII_PHY_SEL_MASK GENMASK(4, 2)
82
-
#define ETH_PHY_SEL_RMII BIT(4)
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#define ETH_PHY_SEL_SGMII BIT(3)
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#define ETH_PHY_SEL_RGMII BIT(2)
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#define ETH_PHY_SEL_GMII 0x0
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-
#define ETH_PHY_SEL_MII 0x0
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struct sti_dwmac {
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phy_interface_t interface; /* MII interface */
···
96
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struct sti_dwmac_of_data {
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void (*fix_retime_src)(void *priv, int speed, unsigned int mode);
99
-
};
100
-
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-
static u32 phy_intf_sels[] = {
102
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[PHY_INTERFACE_MODE_MII] = ETH_PHY_SEL_MII,
103
-
[PHY_INTERFACE_MODE_GMII] = ETH_PHY_SEL_GMII,
104
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[PHY_INTERFACE_MODE_RGMII] = ETH_PHY_SEL_RGMII,
105
-
[PHY_INTERFACE_MODE_RGMII_ID] = ETH_PHY_SEL_RGMII,
106
-
[PHY_INTERFACE_MODE_SGMII] = ETH_PHY_SEL_SGMII,
107
-
[PHY_INTERFACE_MODE_RMII] = ETH_PHY_SEL_RMII,
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};
109
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enum {
···
146
159
stih4xx_tx_retime_val[src]);
147
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}
148
161
149
-
static int sti_dwmac_set_mode(struct sti_dwmac *dwmac)
162
+
static int sti_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)
150
163
{
151
-
struct regmap *regmap = dwmac->regmap;
152
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int iface = dwmac->interface;
153
-
u32 reg = dwmac->ctrl_reg;
154
-
u32 val;
164
+
struct sti_dwmac *dwmac = bsp_priv;
165
+
struct regmap *regmap;
166
+
u32 reg, val;
167
+
168
+
regmap = dwmac->regmap;
169
+
reg = dwmac->ctrl_reg;
155
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if (dwmac->gmac_en)
157
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regmap_update_bits(regmap, reg, EN_MASK, EN);
158
173
159
-
regmap_update_bits(regmap, reg, MII_PHY_SEL_MASK, phy_intf_sels[iface]);
174
+
if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &&
175
+
phy_intf_sel != PHY_INTF_SEL_RGMII &&
176
+
phy_intf_sel != PHY_INTF_SEL_SGMII &&
177
+
phy_intf_sel != PHY_INTF_SEL_RMII)
178
+
phy_intf_sel = PHY_INTF_SEL_GMII_MII;
160
179
161
-
val = (iface == PHY_INTERFACE_MODE_REVMII) ? 0 : ENMII;
180
+
regmap_update_bits(regmap, reg, MII_PHY_SEL_MASK,
181
+
FIELD_PREP(MII_PHY_SEL_MASK, phy_intf_sel));
182
+
183
+
val = (dwmac->interface == PHY_INTERFACE_MODE_REVMII) ? 0 : ENMII;
162
184
regmap_update_bits(regmap, reg, ENMII_MASK, val);
163
185
164
186
dwmac->fix_retime_src(dwmac, dwmac->speed, 0);
···
232
236
static int sti_dwmac_init(struct platform_device *pdev, void *bsp_priv)
233
237
{
234
238
struct sti_dwmac *dwmac = bsp_priv;
235
-
int ret;
236
239
237
-
ret = clk_prepare_enable(dwmac->clk);
238
-
if (ret)
239
-
return ret;
240
-
241
-
ret = sti_dwmac_set_mode(dwmac);
242
-
if (ret)
243
-
clk_disable_unprepare(dwmac->clk);
244
-
245
-
return ret;
240
+
return clk_prepare_enable(dwmac->clk);
246
241
}
247
242
248
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static void sti_dwmac_exit(struct platform_device *pdev, void *bsp_priv)
···
278
291
dwmac->fix_retime_src = data->fix_retime_src;
279
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plat_dat->bsp_priv = dwmac;
294
+
plat_dat->set_phy_intf_sel = sti_set_phy_intf_sel;
281
295
plat_dat->fix_mac_speed = data->fix_retime_src;
282
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plat_dat->init = sti_dwmac_init;
283
297
plat_dat->exit = sti_dwmac_exit;