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ASoC: codecs: fix ES8326 performance and pop noise

Merge series from Zhu Ning <zhuning0077@gmail.com>:

We get some issues regarding crosstalk, THD+N performance and pop
noise from customer's project.

Mark Brown 7c834a72 c481016b

+141 -48
+139 -47
sound/soc/codecs/es8326.c
··· 45 45 int jack_remove_retry; 46 46 }; 47 47 48 + static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol, 49 + struct snd_ctl_elem_value *ucontrol) 50 + { 51 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 52 + struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 53 + unsigned int crosstalk_h, crosstalk_l; 54 + unsigned int crosstalk; 55 + 56 + regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h); 57 + regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 58 + crosstalk_h &= 0x20; 59 + crosstalk_l &= 0xf0; 60 + crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4; 61 + ucontrol->value.integer.value[0] = crosstalk; 62 + 63 + return 0; 64 + } 65 + 66 + static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol, 67 + struct snd_ctl_elem_value *ucontrol) 68 + { 69 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 70 + struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 71 + unsigned int crosstalk_h, crosstalk_l; 72 + unsigned int crosstalk; 73 + 74 + crosstalk = ucontrol->value.integer.value[0]; 75 + regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 76 + crosstalk_h = (crosstalk & 0x10) << 1; 77 + crosstalk_l &= 0x0f; 78 + crosstalk_l |= (crosstalk & 0x0f) << 4; 79 + regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE, 80 + 0x20, crosstalk_h); 81 + regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); 82 + 83 + return 0; 84 + } 85 + 86 + static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol, 87 + struct snd_ctl_elem_value *ucontrol) 88 + { 89 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 90 + struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 91 + unsigned int crosstalk_h, crosstalk_l; 92 + unsigned int crosstalk; 93 + 94 + regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h); 95 + regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 96 + crosstalk_h &= 0x10; 97 + crosstalk_l &= 0x0f; 98 + crosstalk = crosstalk_h | crosstalk_l; 99 + ucontrol->value.integer.value[0] = crosstalk; 100 + 101 + return 0; 102 + } 103 + 104 + static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol, 105 + struct snd_ctl_elem_value *ucontrol) 106 + { 107 + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 108 + struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 109 + unsigned int crosstalk_h, crosstalk_l; 110 + unsigned int crosstalk; 111 + 112 + crosstalk = ucontrol->value.integer.value[0]; 113 + regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); 114 + crosstalk_h = crosstalk & 0x10; 115 + crosstalk_l &= 0xf0; 116 + crosstalk_l |= crosstalk & 0x0f; 117 + regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE, 118 + 0x10, crosstalk_h); 119 + regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); 120 + 121 + return 0; 122 + } 123 + 48 124 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 49 125 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 50 126 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0); ··· 178 102 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL, 179 103 0, 0x0f, 0, drc_target_tlv), 180 104 105 + SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0, 106 + es8326_crosstalk1_get, es8326_crosstalk1_set), 107 + SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0, 108 + es8326_crosstalk2_get, es8326_crosstalk2_set), 181 109 }; 182 110 183 111 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { ··· 196 116 /* Digital Interface */ 197 117 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0), 198 118 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0), 199 - 200 - /* ADC Digital Mute */ 201 - SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0), 202 - SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0), 203 - SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0), 204 - SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0), 205 119 206 120 /* Analog Power Supply*/ 207 121 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1), ··· 216 142 }; 217 143 218 144 static const struct snd_soc_dapm_route es8326_dapm_routes[] = { 219 - {"ADC L1", NULL, "MIC1"}, 220 - {"ADC R1", NULL, "MIC2"}, 221 - {"ADC L2", NULL, "MIC3"}, 222 - {"ADC R2", NULL, "MIC4"}, 223 - 224 - {"ADC L", NULL, "ADC L1"}, 225 - {"ADC R", NULL, "ADC R1"}, 226 - {"ADC L", NULL, "ADC L2"}, 227 - {"ADC R", NULL, "ADC R2"}, 145 + {"ADC L", NULL, "MIC1"}, 146 + {"ADC R", NULL, "MIC2"}, 147 + {"ADC L", NULL, "MIC3"}, 148 + {"ADC R", NULL, "MIC4"}, 228 149 229 150 {"I2S OUT", NULL, "ADC L"}, 230 151 {"I2S OUT", NULL, "ADC R"}, ··· 509 440 unsigned int offset_l, offset_r; 510 441 511 442 if (mute) { 512 - regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 513 - regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 514 - ES8326_MUTE_MASK, ES8326_MUTE); 515 - regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0); 443 + if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 444 + regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 445 + regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 446 + ES8326_MUTE_MASK, ES8326_MUTE); 447 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 448 + 0x30, 0x00); 449 + } else { 450 + regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE, 451 + 0x0F, 0x0F); 452 + } 516 453 } else { 517 454 if (!es8326->calibrated) { 518 455 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL); ··· 531 456 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r); 532 457 es8326->calibrated = true; 533 458 } 534 - regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 535 - regmap_write(es8326->regmap, ES8326_HP_VOL, 0x91); 536 - regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON); 537 - regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 538 - ES8326_MUTE_MASK, ~(ES8326_MUTE)); 459 + if (direction == SNDRV_PCM_STREAM_PLAYBACK) { 460 + regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01); 461 + usleep_range(1000, 5000); 462 + regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00); 463 + usleep_range(1000, 5000); 464 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20); 465 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30); 466 + regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 467 + regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON); 468 + regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 469 + ES8326_MUTE_MASK, ~(ES8326_MUTE)); 470 + } else { 471 + msleep(300); 472 + regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE, 473 + 0x0F, 0x00); 474 + } 539 475 } 540 476 return 0; 541 477 } ··· 563 477 if (ret) 564 478 return ret; 565 479 566 - regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00); 480 + regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02); 481 + usleep_range(5000, 10000); 567 482 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk); 568 483 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 569 484 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 570 - regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E); 571 485 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40); 572 486 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00); 573 487 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20); 574 - 575 - regmap_update_bits(es8326->regmap, ES8326_RESET, 576 - ES8326_CSM_ON, ES8326_CSM_ON); 488 + regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00); 577 489 break; 578 490 case SND_SOC_BIAS_PREPARE: 579 491 break; 580 492 case SND_SOC_BIAS_STANDBY: 581 493 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b); 582 - regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00); 583 494 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00); 584 495 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT); 585 496 break; ··· 596 513 .set_fmt = es8326_set_dai_fmt, 597 514 .set_sysclk = es8326_set_dai_sysclk, 598 515 .mute_stream = es8326_mute, 599 - .no_capture_mute = 1, 516 + .no_capture_mute = 0, 600 517 }; 601 518 602 519 static struct snd_soc_dai_driver es8326_dai = { ··· 755 672 es8326->hp = 0; 756 673 } 757 674 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 675 + regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a); 676 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03); 758 677 /* 759 678 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event 760 679 */ ··· 780 695 * Don't report jack status. 781 696 */ 782 697 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 698 + es8326_enable_micbias(es8326->component); 783 699 usleep_range(50000, 70000); 784 700 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00); 701 + regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f); 702 + regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08); 785 703 queue_delayed_work(system_wq, &es8326->jack_detect_work, 786 704 msecs_to_jiffies(400)); 787 705 es8326->hp = 1; ··· 824 736 static irqreturn_t es8326_irq(int irq, void *dev_id) 825 737 { 826 738 struct es8326_priv *es8326 = dev_id; 827 - struct snd_soc_component *comp = es8326->component; 828 739 829 740 if (!es8326->jack) 830 741 goto out; 831 - 832 - es8326_enable_micbias(comp); 833 742 834 743 if (es8326->jack->status & SND_JACK_HEADSET) 835 744 queue_delayed_work(system_wq, &es8326->jack_detect_work, ··· 851 766 if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) { 852 767 dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n"); 853 768 regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0); 854 - regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x01); 769 + regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03); 855 770 regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30); 856 771 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed); 857 772 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08); 858 773 regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1); 859 774 regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03); 860 775 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f); 861 - regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03); 776 + regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23); 862 777 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88); 863 778 usleep_range(15000, 20000); 864 779 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c); ··· 899 814 /* reset internal clock state */ 900 815 regmap_write(es8326->regmap, ES8326_RESET, 0x1f); 901 816 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E); 817 + regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0); 902 818 usleep_range(10000, 15000); 903 819 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xe9); 904 - regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0x4b); 820 + regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xcb); 905 821 /* set headphone default type and detect pin */ 906 822 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83); 907 823 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05); 908 - regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30); 909 824 910 825 /* set internal oscillator as clock source of headpone cp */ 911 826 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89); ··· 913 828 /* clock manager reset release */ 914 829 regmap_write(es8326->regmap, ES8326_RESET, 0x17); 915 830 /* set headphone detection as half scan mode */ 916 - regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30); 831 + regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d); 917 832 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00); 918 833 919 834 /* enable headphone driver */ 835 + regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4); 920 836 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7); 921 837 usleep_range(2000, 5000); 922 - regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xa3); 923 - regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xb3); 838 + regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23); 839 + regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33); 924 840 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1); 925 841 926 842 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); ··· 930 844 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00); 931 845 /* calibrate for B version */ 932 846 es8326_calibrate(component); 847 + regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa); 848 + regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00); 933 849 /* turn off headphone out */ 934 850 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00); 935 851 /* set ADC and DAC in low power mode */ ··· 944 856 regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08); 945 857 regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15); 946 858 859 + regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 | 860 + ((es8326->version == ES8326_VERSION_B) ? 861 + (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) : 862 + (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04))); 863 + usleep_range(5000, 10000); 864 + es8326_enable_micbias(es8326->component); 865 + usleep_range(50000, 70000); 866 + regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00); 947 867 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 948 868 (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON)); 949 869 regmap_write(es8326->regmap, ES8326_INTOUT_IO, ··· 960 864 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 961 865 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 962 866 963 - regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b); 867 + regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00); 964 868 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 965 869 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK, 966 870 ES8326_MIC1_SEL); ··· 968 872 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK, 969 873 ES8326_MUTE); 970 874 971 - regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 | 972 - ((es8326->version == ES8326_VERSION_B) ? 973 - (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) : 974 - (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04))); 975 - regmap_write(es8326->regmap, ES8326_HP_VOL, 0x11); 875 + regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f); 976 876 977 877 es8326->jack_remove_retry = 0; 978 878 es8326->hp = 0;
+2 -1
sound/soc/codecs/es8326.h
··· 72 72 #define ES8326_DAC_VOL 0x50 73 73 #define ES8326_DRC_RECOVERY 0x53 74 74 #define ES8326_DRC_WINSIZE 0x54 75 + #define ES8326_DAC_CROSSTALK 0x55 75 76 #define ES8326_HPJACK_TIMER 0x56 76 77 #define ES8326_HPDET_TYPE 0x57 77 78 #define ES8326_INT_SOURCE 0x58 ··· 101 100 #define ES8326_MUTE (3 << 0) 102 101 103 102 /* ES8326_CLK_CTL */ 104 - #define ES8326_CLK_ON (0x7f << 0) 103 + #define ES8326_CLK_ON (0x7e << 0) 105 104 #define ES8326_CLK_OFF (0 << 0) 106 105 107 106 /* ES8326_CLK_INV */