Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: 6164/1: Add kto and kfrom to input operands list.
ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6
ARM: 6165/1: trap overflows on highmem pages from kmap_atomic when debugging
ARM: 6152/1: ux500 make it possible to disable localtimers
[ARM] pxa/spitz: Correctly register WM8750
[ARM] pxa/palmtc: storage class should be before const qualifier
ARM: 6146/1: sa1111: Prevent deadlock in resume path
ARM: 6145/1: ux500 MTU clockrate correction
ARM: 6144/1: TCM memory bug freeing bug
ARM: VFP: Fix vfp_put_double() for d16-d31
+206
-66
+7
-2
arch/arm/common/sa1111.c
+7
-2
arch/arm/common/sa1111.c
···
951
951
if (!save)
952
952
return 0;
953
953
954
-
spin_lock_irqsave(&sachip->lock, flags);
955
-
956
954
/*
957
955
* Ensure that the SA1111 is still here.
958
956
* FIXME: shouldn't do this here.
···
967
969
* First of all, wake up the chip.
968
970
*/
969
971
sa1111_wake(sachip);
972
+
973
+
/*
974
+
* Only lock for write ops. Also, sa1111_wake must be called with
975
+
* released spinlock!
976
+
*/
977
+
spin_lock_irqsave(&sachip->lock, flags);
978
+
970
979
sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
971
980
sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
972
981
+7
-4
arch/arm/mach-nomadik/clock.c
+7
-4
arch/arm/mach-nomadik/clock.c
···
32
32
}
33
33
EXPORT_SYMBOL(clk_disable);
34
34
35
-
/* We have a fixed clock alone, for now */
35
+
static struct clk clk_24 = {
36
+
.rate = 2400000,
37
+
};
38
+
36
39
static struct clk clk_48 = {
37
40
.rate = 48 * 1000 * 1000,
38
41
};
···
53
50
}
54
51
55
52
static struct clk_lookup lookups[] = {
53
+
CLK(&clk_24, "mtu0"),
54
+
CLK(&clk_24, "mtu1"),
56
55
CLK(&clk_48, "uart0"),
57
56
CLK(&clk_48, "uart1"),
58
57
CLK(&clk_default, "gpio.0"),
···
64
59
CLK(&clk_default, "rng"),
65
60
};
66
61
67
-
static int __init clk_init(void)
62
+
int __init clk_init(void)
68
63
{
69
64
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
70
65
return 0;
71
66
}
72
-
73
-
arch_initcall(clk_init);
+2
arch/arm/mach-nomadik/clock.h
+2
arch/arm/mach-nomadik/clock.h
+8
arch/arm/mach-nomadik/cpu-8815.c
+8
arch/arm/mach-nomadik/cpu-8815.c
···
31
31
#include <asm/cacheflush.h>
32
32
#include <asm/hardware/cache-l2x0.h>
33
33
34
+
#include "clock.h"
35
+
34
36
#define __MEM_4K_RESOURCE(x) \
35
37
.res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
36
38
···
145
143
/* This modified VIC cell has two register blocks, at 0 and 0x20 */
146
144
vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0);
147
145
vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0);
146
+
147
+
/*
148
+
* Init clocks here so that they are available for system timer
149
+
* initialization.
150
+
*/
151
+
clk_init();
148
152
}
149
153
150
154
/*
+2
-2
arch/arm/mach-pxa/palmtc.c
+2
-2
arch/arm/mach-pxa/palmtc.c
···
263
263
.keymap_size = ARRAY_SIZE(palmtc_matrix_keys),
264
264
};
265
265
266
-
const static unsigned int palmtc_keypad_row_gpios[] = {
266
+
static const unsigned int palmtc_keypad_row_gpios[] = {
267
267
0, 9, 10, 11
268
268
};
269
269
270
-
const static unsigned int palmtc_keypad_col_gpios[] = {
270
+
static const unsigned int palmtc_keypad_col_gpios[] = {
271
271
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80
272
272
};
273
273
+3
arch/arm/mach-pxa/spitz.c
+3
arch/arm/mach-pxa/spitz.c
+2
-1
arch/arm/mach-ux500/Makefile
+2
-1
arch/arm/mach-ux500/Makefile
···
7
7
obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
8
8
obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o
9
9
obj-$(CONFIG_MACH_U5500) += board-u5500.o
10
-
obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
10
+
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
11
+
obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
+98
-6
arch/arm/mach-ux500/clock.c
+98
-6
arch/arm/mach-ux500/clock.c
···
16
16
17
17
#include <asm/clkdev.h>
18
18
19
+
#include <plat/mtu.h>
19
20
#include <mach/hardware.h>
20
21
#include "clock.h"
21
22
···
60
59
#define PRCM_DMACLK_MGT 0x074
61
60
#define PRCM_B2R2CLK_MGT 0x078
62
61
#define PRCM_TVCLK_MGT 0x07C
62
+
#define PRCM_TCR 0x1C8
63
+
#define PRCM_TCR_STOPPED (1 << 16)
64
+
#define PRCM_TCR_DOZE_MODE (1 << 17)
63
65
#define PRCM_UNIPROCLK_MGT 0x278
64
66
#define PRCM_SSPCLK_MGT 0x280
65
67
#define PRCM_RNGCLK_MGT 0x284
···
124
120
}
125
121
EXPORT_SYMBOL(clk_disable);
126
122
123
+
/*
124
+
* The MTU has a separate, rather complex muxing setup
125
+
* with alternative parents (peripheral cluster or
126
+
* ULP or fixed 32768 Hz) depending on settings
127
+
*/
128
+
static unsigned long clk_mtu_get_rate(struct clk *clk)
129
+
{
130
+
void __iomem *addr = __io_address(U8500_PRCMU_BASE)
131
+
+ PRCM_TCR;
132
+
u32 tcr = readl(addr);
133
+
int mtu = (int) clk->data;
134
+
/*
135
+
* One of these is selected eventually
136
+
* TODO: Replace the constant with a reference
137
+
* to the ULP source once this is modeled.
138
+
*/
139
+
unsigned long clk32k = 32768;
140
+
unsigned long mturate;
141
+
unsigned long retclk;
142
+
143
+
/* Get the rate from the parent as a default */
144
+
if (clk->parent_periph)
145
+
mturate = clk_get_rate(clk->parent_periph);
146
+
else if (clk->parent_cluster)
147
+
mturate = clk_get_rate(clk->parent_cluster);
148
+
else
149
+
/* We need to be connected SOMEWHERE */
150
+
BUG();
151
+
152
+
/*
153
+
* Are we in doze mode?
154
+
* In this mode the parent peripheral or the fixed 32768 Hz
155
+
* clock is fed into the block.
156
+
*/
157
+
if (!(tcr & PRCM_TCR_DOZE_MODE)) {
158
+
/*
159
+
* Here we're using the clock input from the APE ULP
160
+
* clock domain. But first: are the timers stopped?
161
+
*/
162
+
if (tcr & PRCM_TCR_STOPPED) {
163
+
clk32k = 0;
164
+
mturate = 0;
165
+
} else {
166
+
/* Else default mode: 0 and 2.4 MHz */
167
+
clk32k = 0;
168
+
if (cpu_is_u5500())
169
+
/* DB5500 divides by 8 */
170
+
mturate /= 8;
171
+
else if (cpu_is_u8500ed()) {
172
+
/*
173
+
* This clocking setting must not be used
174
+
* in the ED chip, it is simply not
175
+
* connected anywhere!
176
+
*/
177
+
mturate = 0;
178
+
BUG();
179
+
} else
180
+
/*
181
+
* In this mode the ulp38m4 clock is divided
182
+
* by a factor 16, on the DB8500 typically
183
+
* 38400000 / 16 ~ 2.4 MHz.
184
+
* TODO: Replace the constant with a reference
185
+
* to the ULP source once this is modeled.
186
+
*/
187
+
mturate = 38400000 / 16;
188
+
}
189
+
}
190
+
191
+
/* Return the clock selected for this MTU */
192
+
if (tcr & (1 << mtu))
193
+
retclk = clk32k;
194
+
else
195
+
retclk = mturate;
196
+
197
+
pr_info("MTU%d clock rate: %lu Hz\n", mtu, retclk);
198
+
return retclk;
199
+
}
200
+
127
201
unsigned long clk_get_rate(struct clk *clk)
128
202
{
129
203
unsigned long rate;
204
+
205
+
/*
206
+
* If there is a custom getrate callback for this clock,
207
+
* it will take precedence.
208
+
*/
209
+
if (clk->get_rate)
210
+
return clk->get_rate(clk);
130
211
131
212
if (clk->ops && clk->ops->get_rate)
132
213
return clk->ops->get_rate(clk);
···
430
341
431
342
/* Peripheral Cluster #6 */
432
343
433
-
static DEFINE_PRCC_CLK(6, mtu1_v1, 8, -1, NULL);
434
-
static DEFINE_PRCC_CLK(6, mtu0_v1, 7, -1, NULL);
344
+
/* MTU ID in data */
345
+
static DEFINE_PRCC_CLK_CUSTOM(6, mtu1_v1, 8, -1, NULL, clk_mtu_get_rate, 1);
346
+
static DEFINE_PRCC_CLK_CUSTOM(6, mtu0_v1, 7, -1, NULL, clk_mtu_get_rate, 0);
435
347
static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL);
436
348
static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL);
437
349
static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL);
···
447
357
/* Peripheral Cluster #7 */
448
358
449
359
static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL);
450
-
static DEFINE_PRCC_CLK(7, mtu1_ed, 3, -1, NULL);
451
-
static DEFINE_PRCC_CLK(7, mtu0_ed, 2, -1, NULL);
360
+
/* MTU ID in data */
361
+
static DEFINE_PRCC_CLK_CUSTOM(7, mtu1_ed, 3, -1, NULL, clk_mtu_get_rate, 1);
362
+
static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0);
452
363
static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL);
453
364
static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL);
454
365
···
594
503
CLK(uiccclk, "uicc", NULL),
595
504
};
596
505
597
-
static int __init clk_init(void)
506
+
int __init clk_init(void)
598
507
{
599
508
if (cpu_is_u8500ed()) {
600
509
clk_prcmu_ops.enable = clk_prcmu_ed_enable;
601
510
clk_prcmu_ops.disable = clk_prcmu_ed_disable;
511
+
clk_per6clk.rate = 100000000;
602
512
} else if (cpu_is_u5500()) {
603
513
/* Clock tree for U5500 not implemented yet */
604
514
clk_prcc_ops.enable = clk_prcc_ops.disable = NULL;
605
515
clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL;
516
+
clk_per6clk.rate = 26000000;
606
517
}
607
518
608
519
clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks));
···
615
522
616
523
return 0;
617
524
}
618
-
arch_initcall(clk_init);
+22
arch/arm/mach-ux500/clock.h
+22
arch/arm/mach-ux500/clock.h
···
28
28
* @ops: pointer to clkops struct used to control this clock
29
29
* @name: name, for debugging
30
30
* @enabled: refcount. positive if enabled, zero if disabled
31
+
* @get_rate: custom callback for getting the clock rate
32
+
* @data: custom per-clock data for example for the get_rate
33
+
* callback
31
34
* @rate: fixed rate for clocks which don't implement
32
35
* ops->getrate
33
36
* @prcmu_cg_off: address offset of the combined enable/disable register
···
70
67
const struct clkops *ops;
71
68
const char *name;
72
69
unsigned int enabled;
70
+
unsigned long (*get_rate)(struct clk *);
71
+
void *data;
73
72
74
73
unsigned long rate;
75
74
struct list_head list;
···
122
117
.parent_periph = _kernclk \
123
118
}
124
119
120
+
#define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \
121
+
struct clk clk_##_name = { \
122
+
.name = #_name, \
123
+
.ops = &clk_prcc_ops, \
124
+
.cluster = _pclust, \
125
+
.prcc_bus = _bus_en, \
126
+
.prcc_kernel = _kernel_en, \
127
+
.parent_cluster = &clk_per##_pclust##clk, \
128
+
.parent_periph = _kernclk, \
129
+
.get_rate = _callback, \
130
+
.data = (void *) _data \
131
+
}
132
+
133
+
125
134
#define CLK(_clk, _devname, _conname) \
126
135
{ \
127
136
.clk = &clk_##_clk, \
128
137
.dev_id = _devname, \
129
138
.con_id = _conname, \
130
139
}
140
+
141
+
int __init clk_db8500_ed_fixup(void);
142
+
int __init clk_init(void);
+6
arch/arm/mach-ux500/cpu.c
+6
arch/arm/mach-ux500/cpu.c
···
62
62
{
63
63
gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29);
64
64
gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
65
+
66
+
/*
67
+
* Init clocks here so that they are available for system timer
68
+
* initialization.
69
+
*/
70
+
clk_init();
65
71
}
66
72
67
73
#ifdef CONFIG_CACHE_L2X0
+2
-2
arch/arm/mm/copypage-feroceon.c
+2
-2
arch/arm/mm/copypage-feroceon.c
···
18
18
{
19
19
asm("\
20
20
stmfd sp!, {r4-r9, lr} \n\
21
-
mov ip, %0 \n\
21
+
mov ip, %2 \n\
22
22
1: mov lr, r1 \n\
23
23
ldmia r1!, {r2 - r9} \n\
24
24
pld [lr, #32] \n\
···
64
64
mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\
65
65
ldmfd sp!, {r4-r9, pc}"
66
66
:
67
-
: "I" (PAGE_SIZE));
67
+
: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE));
68
68
}
69
69
70
70
void feroceon_copy_user_highpage(struct page *to, struct page *from,
+2
-2
arch/arm/mm/copypage-v4wb.c
+2
-2
arch/arm/mm/copypage-v4wb.c
···
27
27
{
28
28
asm("\
29
29
stmfd sp!, {r4, lr} @ 2\n\
30
-
mov r2, %0 @ 1\n\
30
+
mov r2, %2 @ 1\n\
31
31
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
32
32
1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
33
33
stmia r0!, {r3, r4, ip, lr} @ 4\n\
···
44
44
mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
45
45
ldmfd sp!, {r4, pc} @ 3"
46
46
:
47
-
: "I" (PAGE_SIZE / 64));
47
+
: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64));
48
48
}
49
49
50
50
void v4wb_copy_user_highpage(struct page *to, struct page *from,
+2
-2
arch/arm/mm/copypage-v4wt.c
+2
-2
arch/arm/mm/copypage-v4wt.c
···
25
25
{
26
26
asm("\
27
27
stmfd sp!, {r4, lr} @ 2\n\
28
-
mov r2, %0 @ 1\n\
28
+
mov r2, %2 @ 1\n\
29
29
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
30
30
1: stmia r0!, {r3, r4, ip, lr} @ 4\n\
31
31
ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
···
40
40
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
41
41
ldmfd sp!, {r4, pc} @ 3"
42
42
:
43
-
: "I" (PAGE_SIZE / 64));
43
+
: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64));
44
44
}
45
45
46
46
void v4wt_copy_user_highpage(struct page *to, struct page *from,
+2
-2
arch/arm/mm/copypage-xsc3.c
+2
-2
arch/arm/mm/copypage-xsc3.c
···
34
34
{
35
35
asm("\
36
36
stmfd sp!, {r4, r5, lr} \n\
37
-
mov lr, %0 \n\
37
+
mov lr, %2 \n\
38
38
\n\
39
39
pld [r1, #0] \n\
40
40
pld [r1, #32] \n\
···
67
67
\n\
68
68
ldmfd sp!, {r4, r5, pc}"
69
69
:
70
-
: "I" (PAGE_SIZE / 64 - 1));
70
+
: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64 - 1));
71
71
}
72
72
73
73
void xsc3_mc_copy_user_highpage(struct page *to, struct page *from,
+3
arch/arm/mm/fault.c
+3
arch/arm/mm/fault.c
+10
-1
arch/arm/mm/highmem.c
+10
-1
arch/arm/mm/highmem.c
···
48
48
49
49
debug_kmap_atomic(type);
50
50
51
-
kmap = kmap_high_get(page);
51
+
#ifdef CONFIG_DEBUG_HIGHMEM
52
+
/*
53
+
* There is no cache coherency issue when non VIVT, so force the
54
+
* dedicated kmap usage for better debugging purposes in that case.
55
+
*/
56
+
if (!cache_is_vivt())
57
+
kmap = NULL;
58
+
else
59
+
#endif
60
+
kmap = kmap_high_get(page);
52
61
if (kmap)
53
62
return kmap;
54
63
+3
-3
arch/arm/mm/init.c
+3
-3
arch/arm/mm/init.c
···
678
678
void free_initmem(void)
679
679
{
680
680
#ifdef CONFIG_HAVE_TCM
681
-
extern char *__tcm_start, *__tcm_end;
681
+
extern char __tcm_start, __tcm_end;
682
682
683
-
totalram_pages += free_area(__phys_to_pfn(__pa(__tcm_start)),
684
-
__phys_to_pfn(__pa(__tcm_end)),
683
+
totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)),
684
+
__phys_to_pfn(__pa(&__tcm_end)),
685
685
"TCM link");
686
686
#endif
687
687
+24
-2
arch/arm/plat-nomadik/timer.c
+24
-2
arch/arm/plat-nomadik/timer.c
···
13
13
#include <linux/irq.h>
14
14
#include <linux/io.h>
15
15
#include <linux/clockchips.h>
16
+
#include <linux/clk.h>
16
17
#include <linux/jiffies.h>
18
+
#include <linux/err.h>
17
19
#include <asm/mach/time.h>
18
20
19
21
#include <plat/mtu.h>
···
126
124
void __init nmdk_timer_init(void)
127
125
{
128
126
unsigned long rate;
129
-
u32 cr = MTU_CRn_32BITS;;
127
+
struct clk *clk0;
128
+
struct clk *clk1;
129
+
u32 cr;
130
+
131
+
clk0 = clk_get_sys("mtu0", NULL);
132
+
BUG_ON(IS_ERR(clk0));
133
+
134
+
clk1 = clk_get_sys("mtu1", NULL);
135
+
BUG_ON(IS_ERR(clk1));
136
+
137
+
clk_enable(clk0);
138
+
clk_enable(clk1);
130
139
131
140
/*
132
141
* Tick rate is 2.4MHz for Nomadik and 110MHz for ux500:
133
142
* use a divide-by-16 counter if it's more than 16MHz
134
143
*/
135
-
rate = CLOCK_TICK_RATE;
144
+
cr = MTU_CRn_32BITS;;
145
+
rate = clk_get_rate(clk0);
136
146
if (rate > 16 << 20) {
137
147
rate /= 16;
138
148
cr |= MTU_CRn_PRESCALE_16;
···
167
153
nmdk_clksrc.name);
168
154
169
155
/* Timer 1 is used for events, fix according to rate */
156
+
cr = MTU_CRn_32BITS;
157
+
rate = clk_get_rate(clk1);
158
+
if (rate > 16 << 20) {
159
+
rate /= 16;
160
+
cr |= MTU_CRn_PRESCALE_16;
161
+
} else {
162
+
cr |= MTU_CRn_PRESCALE_1;
163
+
}
170
164
writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
171
165
nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift);
172
166
nmdk_clkevt.max_delta_ns =
+1
-1
arch/arm/vfp/vfphw.S
+1
-1
arch/arm/vfp/vfphw.S
-36
sound/soc/pxa/spitz.c
-36
sound/soc/pxa/spitz.c
···
328
328
.codec_dev = &soc_codec_dev_wm8750,
329
329
};
330
330
331
-
/*
332
-
* FIXME: This is a temporary bodge to avoid cross-tree merge issues.
333
-
* New drivers should register the wm8750 I2C device in the machine
334
-
* setup code (under arch/arm for ARM systems).
335
-
*/
336
-
static int wm8750_i2c_register(void)
337
-
{
338
-
struct i2c_board_info info;
339
-
struct i2c_adapter *adapter;
340
-
struct i2c_client *client;
341
-
342
-
memset(&info, 0, sizeof(struct i2c_board_info));
343
-
info.addr = 0x1b;
344
-
strlcpy(info.type, "wm8750", I2C_NAME_SIZE);
345
-
346
-
adapter = i2c_get_adapter(0);
347
-
if (!adapter) {
348
-
printk(KERN_ERR "can't get i2c adapter 0\n");
349
-
return -ENODEV;
350
-
}
351
-
352
-
client = i2c_new_device(adapter, &info);
353
-
i2c_put_adapter(adapter);
354
-
if (!client) {
355
-
printk(KERN_ERR "can't add i2c device at 0x%x\n",
356
-
(unsigned int)info.addr);
357
-
return -ENODEV;
358
-
}
359
-
360
-
return 0;
361
-
}
362
-
363
331
static struct platform_device *spitz_snd_device;
364
332
365
333
static int __init spitz_init(void)
···
336
368
337
369
if (!(machine_is_spitz() || machine_is_borzoi() || machine_is_akita()))
338
370
return -ENODEV;
339
-
340
-
ret = wm8750_i2c_setup();
341
-
if (ret != 0)
342
-
return ret;
343
371
344
372
spitz_snd_device = platform_device_alloc("soc-audio", -1);
345
373
if (!spitz_snd_device)