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media: staging: media: imx6-mipi-csi2: replace spaces with tabs for alignment

Replace spaces with tabs to align register value definitions, making it
easier to add new entries and maintain consistent formatting.

Also use a space between the type and field in struct csi2_dev.

No functional change.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patch.msgid.link/20260116-stage-csi2-cleanup-v2-1-a56e9cb25196@nxp.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

authored by

Frank Li and committed by
Hans Verkuil
7ce92f35 e001b3b1

+42 -42
+42 -42
drivers/staging/media/imx/imx6-mipi-csi2.c
··· 23 23 * there must be 5 pads: 1 input pad from sensor, and 24 24 * the 4 virtual channel output pads 25 25 */ 26 - #define CSI2_SINK_PAD 0 27 - #define CSI2_NUM_SINK_PADS 1 28 - #define CSI2_NUM_SRC_PADS 4 29 - #define CSI2_NUM_PADS 5 26 + #define CSI2_SINK_PAD 0 27 + #define CSI2_NUM_SINK_PADS 1 28 + #define CSI2_NUM_SRC_PADS 4 29 + #define CSI2_NUM_PADS 5 30 30 31 31 /* 32 32 * The default maximum bit-rate per lane in Mbps, if the 33 33 * source subdev does not provide V4L2_CID_LINK_FREQ. 34 34 */ 35 - #define CSI2_DEFAULT_MAX_MBPS 849 35 + #define CSI2_DEFAULT_MAX_MBPS 849 36 36 37 37 struct csi2_dev { 38 - struct device *dev; 39 - struct v4l2_subdev sd; 38 + struct device *dev; 39 + struct v4l2_subdev sd; 40 40 struct v4l2_async_notifier notifier; 41 - struct media_pad pad[CSI2_NUM_PADS]; 42 - struct clk *dphy_clk; 43 - struct clk *pllref_clk; 44 - struct clk *pix_clk; /* what is this? */ 45 - void __iomem *base; 41 + struct media_pad pad[CSI2_NUM_PADS]; 42 + struct clk *dphy_clk; 43 + struct clk *pllref_clk; 44 + struct clk *pix_clk; /* what is this? */ 45 + void __iomem *base; 46 46 47 - struct v4l2_subdev *remote; 48 - unsigned int remote_pad; 49 - unsigned short data_lanes; 47 + struct v4l2_subdev *remote; 48 + unsigned int remote_pad; 49 + unsigned short data_lanes; 50 50 51 51 /* lock to protect all members below */ 52 52 struct mutex lock; 53 53 54 54 struct v4l2_mbus_framefmt format_mbus; 55 55 56 - int stream_count; 57 - struct v4l2_subdev *src_sd; 58 - bool sink_linked[CSI2_NUM_SRC_PADS]; 56 + int stream_count; 57 + struct v4l2_subdev *src_sd; 58 + bool sink_linked[CSI2_NUM_SRC_PADS]; 59 59 }; 60 60 61 61 #define DEVICE_NAME "imx6-mipi-csi2" 62 62 63 63 /* Register offsets */ 64 - #define CSI2_VERSION 0x000 65 - #define CSI2_N_LANES 0x004 66 - #define CSI2_PHY_SHUTDOWNZ 0x008 67 - #define CSI2_DPHY_RSTZ 0x00c 68 - #define CSI2_RESETN 0x010 69 - #define CSI2_PHY_STATE 0x014 70 - #define PHY_STOPSTATEDATA_BIT 4 71 - #define PHY_STOPSTATEDATA(n) BIT(PHY_STOPSTATEDATA_BIT + (n)) 72 - #define PHY_RXCLKACTIVEHS BIT(8) 73 - #define PHY_RXULPSCLKNOT BIT(9) 74 - #define PHY_STOPSTATECLK BIT(10) 75 - #define CSI2_DATA_IDS_1 0x018 76 - #define CSI2_DATA_IDS_2 0x01c 77 - #define CSI2_ERR1 0x020 78 - #define CSI2_ERR2 0x024 79 - #define CSI2_MSK1 0x028 80 - #define CSI2_MSK2 0x02c 81 - #define CSI2_PHY_TST_CTRL0 0x030 64 + #define CSI2_VERSION 0x000 65 + #define CSI2_N_LANES 0x004 66 + #define CSI2_PHY_SHUTDOWNZ 0x008 67 + #define CSI2_DPHY_RSTZ 0x00c 68 + #define CSI2_RESETN 0x010 69 + #define CSI2_PHY_STATE 0x014 70 + #define PHY_STOPSTATEDATA_BIT 4 71 + #define PHY_STOPSTATEDATA(n) BIT(PHY_STOPSTATEDATA_BIT + (n)) 72 + #define PHY_RXCLKACTIVEHS BIT(8) 73 + #define PHY_RXULPSCLKNOT BIT(9) 74 + #define PHY_STOPSTATECLK BIT(10) 75 + #define CSI2_DATA_IDS_1 0x018 76 + #define CSI2_DATA_IDS_2 0x01c 77 + #define CSI2_ERR1 0x020 78 + #define CSI2_ERR2 0x024 79 + #define CSI2_MSK1 0x028 80 + #define CSI2_MSK2 0x02c 81 + #define CSI2_PHY_TST_CTRL0 0x030 82 82 #define PHY_TESTCLR BIT(0) 83 83 #define PHY_TESTCLK BIT(1) 84 - #define CSI2_PHY_TST_CTRL1 0x034 84 + #define CSI2_PHY_TST_CTRL1 0x034 85 85 #define PHY_TESTEN BIT(16) 86 86 /* 87 87 * i.MX CSI2IPU Gasket registers follow. The CSI2IPU gasket is ··· 106 106 * reference manual is as follows: 107 107 * 108 108 * 1. Deassert presetn signal (global reset). 109 - * It's not clear what this "global reset" signal is (maybe APB 110 - * global reset), but in any case this step would be probably 111 - * be carried out during driver load in csi2_probe(). 109 + * It's not clear what this "global reset" signal is (maybe APB 110 + * global reset), but in any case this step would be probably 111 + * be carried out during driver load in csi2_probe(). 112 112 * 113 113 * 2. Configure MIPI Camera Sensor to put all Tx lanes in LP-11 state. 114 - * This must be carried out by the MIPI sensor's s_power(ON) subdev 115 - * op. 114 + * This must be carried out by the MIPI sensor's s_power(ON) subdev 115 + * op. 116 116 * 117 117 * 3. D-PHY initialization. 118 118 * 4. CSI2 Controller programming (Set N_LANES, deassert PHY_SHUTDOWNZ,