-2

Documentation/gpu/zynqmp.rst

reviewed

··· 144 144 145 145 .. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_dp.c 146 146 147 147 - .. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_dpsub.c 148 148 - 149 147 .. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_kms.c

+3

drivers/gpu/drm/Kconfig

reviewed

··· 294 294 tristate 295 295 depends on DRM 296 296 select DRM_TTM 297 297 + select DRM_KMS_HELPER if DRM_FBDEV_EMULATION 297 298 select FB_CORE if DRM_FBDEV_EMULATION 298 299 select FB_SYSMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION 299 300 help ··· 303 302 config DRM_GEM_DMA_HELPER 304 303 tristate 305 304 depends on DRM 305 305 + select DRM_KMS_HELPER if DRM_FBDEV_EMULATION 306 306 select FB_CORE if DRM_FBDEV_EMULATION 307 307 select FB_DMAMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION 308 308 help ··· 312 310 config DRM_GEM_SHMEM_HELPER 313 311 tristate 314 312 depends on DRM && MMU 313 313 + select DRM_KMS_HELPER if DRM_FBDEV_EMULATION 315 314 select FB_CORE if DRM_FBDEV_EMULATION 316 315 select FB_SYSMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION 317 316 help

+122 -34

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

reviewed

··· 2365 2365 break; 2366 2366 } 2367 2367 2368 2368 - DRM_INFO("add ip block number %d <%s>\n", adev->num_ip_blocks, 2369 2369 - ip_block_version->funcs->name); 2368 2368 + dev_info(adev->dev, "detected ip block number %d <%s>\n", 2369 2369 + adev->num_ip_blocks, ip_block_version->funcs->name); 2370 2370 2371 2371 adev->ip_blocks[adev->num_ip_blocks].adev = adev; 2372 2372 ··· 6158 6158 } 6159 6159 6160 6160 /** 6161 6161 + * amdgpu_device_gpu_bandwidth - find the bandwidth of the GPU 6162 6162 + * 6163 6163 + * @adev: amdgpu_device pointer 6164 6164 + * @speed: pointer to the speed of the link 6165 6165 + * @width: pointer to the width of the link 6166 6166 + * 6167 6167 + * Evaluate the hierarchy to find the speed and bandwidth capabilities of the 6168 6168 + * AMD dGPU which may be a virtual upstream bridge. 6169 6169 + */ 6170 6170 + static void amdgpu_device_gpu_bandwidth(struct amdgpu_device *adev, 6171 6171 + enum pci_bus_speed *speed, 6172 6172 + enum pcie_link_width *width) 6173 6173 + { 6174 6174 + struct pci_dev *parent = adev->pdev; 6175 6175 + 6176 6176 + if (!speed || !width) 6177 6177 + return; 6178 6178 + 6179 6179 + parent = pci_upstream_bridge(parent); 6180 6180 + if (parent && parent->vendor == PCI_VENDOR_ID_ATI) { 6181 6181 + /* use the upstream/downstream switches internal to dGPU */ 6182 6182 + *speed = pcie_get_speed_cap(parent); 6183 6183 + *width = pcie_get_width_cap(parent); 6184 6184 + while ((parent = pci_upstream_bridge(parent))) { 6185 6185 + if (parent->vendor == PCI_VENDOR_ID_ATI) { 6186 6186 + /* use the upstream/downstream switches internal to dGPU */ 6187 6187 + *speed = pcie_get_speed_cap(parent); 6188 6188 + *width = pcie_get_width_cap(parent); 6189 6189 + } 6190 6190 + } 6191 6191 + } else { 6192 6192 + /* use the device itself */ 6193 6193 + *speed = pcie_get_speed_cap(adev->pdev); 6194 6194 + *width = pcie_get_width_cap(adev->pdev); 6195 6195 + } 6196 6196 + } 6197 6197 + 6198 6198 + /** 6161 6199 * amdgpu_device_get_pcie_info - fence pcie info about the PCIE slot 6162 6200 * 6163 6201 * @adev: amdgpu_device pointer ··· 6206 6168 */ 6207 6169 static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev) 6208 6170 { 6209 6209 - struct pci_dev *pdev; 6210 6171 enum pci_bus_speed speed_cap, platform_speed_cap; 6211 6211 - enum pcie_link_width platform_link_width; 6172 6172 + enum pcie_link_width platform_link_width, link_width; 6212 6173 6213 6174 if (amdgpu_pcie_gen_cap) 6214 6175 adev->pm.pcie_gen_mask = amdgpu_pcie_gen_cap; ··· 6229 6192 6230 6193 amdgpu_device_partner_bandwidth(adev, &platform_speed_cap, 6231 6194 &platform_link_width); 6195 6195 + amdgpu_device_gpu_bandwidth(adev, &speed_cap, &link_width); 6232 6196 6233 6197 if (adev->pm.pcie_gen_mask == 0) { 6234 6198 /* asic caps */ 6235 6235 - pdev = adev->pdev; 6236 6236 - speed_cap = pcie_get_speed_cap(pdev); 6237 6199 if (speed_cap == PCI_SPEED_UNKNOWN) { 6238 6200 adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 | 6239 6201 CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2 | ··· 6288 6252 } 6289 6253 } 6290 6254 if (adev->pm.pcie_mlw_mask == 0) { 6255 6255 + /* asic caps */ 6256 6256 + if (link_width == PCIE_LNK_WIDTH_UNKNOWN) { 6257 6257 + adev->pm.pcie_mlw_mask |= AMDGPU_DEFAULT_ASIC_PCIE_MLW_MASK; 6258 6258 + } else { 6259 6259 + switch (link_width) { 6260 6260 + case PCIE_LNK_X32: 6261 6261 + adev->pm.pcie_mlw_mask |= (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X32 | 6262 6262 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X16 | 6263 6263 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 | 6264 6264 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X8 | 6265 6265 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X4 | 6266 6266 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 | 6267 6267 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1); 6268 6268 + break; 6269 6269 + case PCIE_LNK_X16: 6270 6270 + adev->pm.pcie_mlw_mask |= (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X16 | 6271 6271 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 | 6272 6272 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X8 | 6273 6273 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X4 | 6274 6274 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 | 6275 6275 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1); 6276 6276 + break; 6277 6277 + case PCIE_LNK_X12: 6278 6278 + adev->pm.pcie_mlw_mask |= (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 | 6279 6279 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X8 | 6280 6280 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X4 | 6281 6281 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 | 6282 6282 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1); 6283 6283 + break; 6284 6284 + case PCIE_LNK_X8: 6285 6285 + adev->pm.pcie_mlw_mask |= (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X8 | 6286 6286 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X4 | 6287 6287 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 | 6288 6288 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1); 6289 6289 + break; 6290 6290 + case PCIE_LNK_X4: 6291 6291 + adev->pm.pcie_mlw_mask |= (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X4 | 6292 6292 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 | 6293 6293 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1); 6294 6294 + break; 6295 6295 + case PCIE_LNK_X2: 6296 6296 + adev->pm.pcie_mlw_mask |= (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 | 6297 6297 + CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1); 6298 6298 + break; 6299 6299 + case PCIE_LNK_X1: 6300 6300 + adev->pm.pcie_mlw_mask |= CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1; 6301 6301 + break; 6302 6302 + default: 6303 6303 + break; 6304 6304 + } 6305 6305 + } 6306 6306 + /* platform caps */ 6291 6307 if (platform_link_width == PCIE_LNK_WIDTH_UNKNOWN) { 6292 6308 adev->pm.pcie_mlw_mask |= AMDGPU_DEFAULT_PCIE_MLW_MASK; 6293 6309 } else { 6294 6310 switch (platform_link_width) { 6295 6311 case PCIE_LNK_X32: 6296 6296 - adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 | 6297 6297 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 | 6298 6298 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 | 6299 6299 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | 6300 6300 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6301 6301 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6302 6302 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6312 6312 + adev->pm.pcie_mlw_mask |= (CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 | 6313 6313 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 | 6314 6314 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 | 6315 6315 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | 6316 6316 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6317 6317 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6318 6318 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6303 6319 break; 6304 6320 case PCIE_LNK_X16: 6305 6305 - adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 | 6306 6306 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 | 6307 6307 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | 6308 6308 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6309 6309 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6310 6310 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6321 6321 + adev->pm.pcie_mlw_mask |= (CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 | 6322 6322 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 | 6323 6323 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | 6324 6324 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6325 6325 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6326 6326 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6311 6327 break; 6312 6328 case PCIE_LNK_X12: 6313 6313 - adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 | 6314 6314 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | 6315 6315 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6316 6316 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6317 6317 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6329 6329 + adev->pm.pcie_mlw_mask |= (CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 | 6330 6330 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | 6331 6331 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6332 6332 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6333 6333 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6318 6334 break; 6319 6335 case PCIE_LNK_X8: 6320 6320 - adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | 6321 6321 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6322 6322 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6323 6323 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6336 6336 + adev->pm.pcie_mlw_mask |= (CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | 6337 6337 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6338 6338 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6339 6339 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6324 6340 break; 6325 6341 case PCIE_LNK_X4: 6326 6326 - adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6327 6327 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6328 6328 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6342 6342 + adev->pm.pcie_mlw_mask |= (CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 | 6343 6343 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6344 6344 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6329 6345 break; 6330 6346 case PCIE_LNK_X2: 6331 6331 - adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6332 6332 - CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6347 6347 + adev->pm.pcie_mlw_mask |= (CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 | 6348 6348 + CAIL_PCIE_LINK_WIDTH_SUPPORT_X1); 6333 6349 break; 6334 6350 case PCIE_LNK_X1: 6335 6335 - adev->pm.pcie_mlw_mask = CAIL_PCIE_LINK_WIDTH_SUPPORT_X1; 6351 6351 + adev->pm.pcie_mlw_mask |= CAIL_PCIE_LINK_WIDTH_SUPPORT_X1; 6336 6352 break; 6337 6353 default: 6338 6354 break;

+13 -13

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

reviewed

··· 280 280 /** 281 281 * DOC: gttsize (int) 282 282 * Restrict the size of GTT domain (for userspace use) in MiB for testing. 283 283 - * The default is -1 (Use 1/2 RAM, minimum value is 3GB). 283 283 + * The default is -1 (Use value specified by TTM). 284 284 */ 285 285 MODULE_PARM_DESC(gttsize, "Size of the GTT userspace domain in megabytes (-1 = auto)"); 286 286 module_param_named(gttsize, amdgpu_gtt_size, int, 0600); ··· 399 399 * the kernel log for the list of IPs on the asic. The default is 0xffffffff (enable all blocks on a device). 400 400 */ 401 401 MODULE_PARM_DESC(ip_block_mask, "IP Block Mask (all blocks enabled (default))"); 402 402 - module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444); 402 402 + module_param_named_unsafe(ip_block_mask, amdgpu_ip_block_mask, uint, 0444); 403 403 404 404 /** 405 405 * DOC: bapm (int) ··· 457 457 * Enable experimental hw support (1 = enable). The default is 0 (disabled). 458 458 */ 459 459 MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))"); 460 460 - module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444); 460 460 + module_param_named_unsafe(exp_hw_support, amdgpu_exp_hw_support, int, 0444); 461 461 462 462 /** 463 463 * DOC: dc (int) ··· 568 568 * Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The default is -1 (auto, disabled except SRIOV). 569 569 */ 570 570 MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)"); 571 571 - module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444); 571 571 + module_param_named_unsafe(gpu_recovery, amdgpu_gpu_recovery, int, 0444); 572 572 573 573 /** 574 574 * DOC: emu_mode (int) 575 575 * Set value 1 to enable emulation mode. This is only needed when running on an emulator. The default is 0 (disabled). 576 576 */ 577 577 MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)"); 578 578 - module_param_named(emu_mode, amdgpu_emu_mode, int, 0444); 578 578 + module_param_named_unsafe(emu_mode, amdgpu_emu_mode, int, 0444); 579 579 580 580 /** 581 581 * DOC: ras_enable (int) ··· 730 730 */ 731 731 MODULE_PARM_DESC(force_asic_type, 732 732 "A non negative value used to specify the asic type for all supported GPUs"); 733 733 - module_param_named(force_asic_type, amdgpu_force_asic_type, int, 0444); 733 733 + module_param_named_unsafe(force_asic_type, amdgpu_force_asic_type, int, 0444); 734 734 735 735 /** 736 736 * DOC: use_xgmi_p2p (int) ··· 749 749 * assigns queues to HQDs. 750 750 */ 751 751 int sched_policy = KFD_SCHED_POLICY_HWS; 752 752 - module_param(sched_policy, int, 0444); 752 752 + module_param_unsafe(sched_policy, int, 0444); 753 753 MODULE_PARM_DESC(sched_policy, 754 754 "Scheduling policy (0 = HWS (Default), 1 = HWS without over-subscription, 2 = Non-HWS (Used for debugging only)"); 755 755 ··· 799 799 * Setting 1 enables halt on hang. 800 800 */ 801 801 int halt_if_hws_hang; 802 802 - module_param(halt_if_hws_hang, int, 0644); 802 802 + module_param_unsafe(halt_if_hws_hang, int, 0644); 803 803 MODULE_PARM_DESC(halt_if_hws_hang, "Halt if HWS hang is detected (0 = off (default), 1 = on)"); 804 804 805 805 /** ··· 808 808 * check says. Default value: false (rely on MEC2 firmware version check). 809 809 */ 810 810 bool hws_gws_support; 811 811 - module_param(hws_gws_support, bool, 0444); 811 811 + module_param_unsafe(hws_gws_support, bool, 0444); 812 812 MODULE_PARM_DESC(hws_gws_support, "Assume MEC2 FW supports GWS barriers (false = rely on FW version check (Default), true = force supported)"); 813 813 814 814 /** ··· 841 841 */ 842 842 int amdgpu_no_queue_eviction_on_vm_fault; 843 843 MODULE_PARM_DESC(no_queue_eviction_on_vm_fault, "No queue eviction on VM fault (0 = queue eviction, 1 = no queue eviction)"); 844 844 - module_param_named(no_queue_eviction_on_vm_fault, amdgpu_no_queue_eviction_on_vm_fault, int, 0444); 844 844 + module_param_named_unsafe(no_queue_eviction_on_vm_fault, amdgpu_no_queue_eviction_on_vm_fault, int, 0444); 845 845 #endif 846 846 847 847 /** ··· 849 849 */ 850 850 int amdgpu_mtype_local; 851 851 MODULE_PARM_DESC(mtype_local, "MTYPE for local memory (0 = MTYPE_RW (default), 1 = MTYPE_NC, 2 = MTYPE_CC)"); 852 852 - module_param_named(mtype_local, amdgpu_mtype_local, int, 0444); 852 852 + module_param_named_unsafe(mtype_local, amdgpu_mtype_local, int, 0444); 853 853 854 854 /** 855 855 * DOC: pcie_p2p (bool) ··· 953 953 * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco) 954 954 */ 955 955 MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco)"); 956 956 - module_param_named(reset_method, amdgpu_reset_method, int, 0644); 956 956 + module_param_named_unsafe(reset_method, amdgpu_reset_method, int, 0644); 957 957 958 958 /** 959 959 * DOC: bad_page_threshold (int) Bad page threshold is specifies the ··· 1049 1049 * - 0x4: Disable GPU soft recovery, always do a full reset 1050 1050 */ 1051 1051 MODULE_PARM_DESC(debug_mask, "debug options for amdgpu, disabled by default"); 1052 1052 - module_param_named(debug_mask, amdgpu_debug_mask, uint, 0444); 1052 1052 + module_param_named_unsafe(debug_mask, amdgpu_debug_mask, uint, 0444); 1053 1053 1054 1054 /** 1055 1055 * DOC: agp (int)

+1 -1

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

reviewed

··· 297 297 amdgpu_ring_patch_cond_exec(ring, cond_exec); 298 298 299 299 ring->current_ctx = fence_ctx; 300 300 - if (vm && ring->funcs->emit_switch_buffer) 300 300 + if (job && ring->funcs->emit_switch_buffer) 301 301 amdgpu_ring_emit_switch_buffer(ring); 302 302 303 303 if (ring->funcs->emit_wave_limit &&

+11 -8

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

reviewed

··· 846 846 case AMDGPU_INFO_DEV_INFO: { 847 847 struct drm_amdgpu_info_device *dev_info; 848 848 uint64_t vm_size; 849 849 - uint32_t pcie_gen_mask; 849 849 + uint32_t pcie_gen_mask, pcie_width_mask; 850 850 851 851 dev_info = kzalloc(sizeof(*dev_info), GFP_KERNEL); 852 852 if (!dev_info) ··· 934 934 dev_info->tcc_disabled_mask = adev->gfx.config.tcc_disabled_mask; 935 935 936 936 /* Combine the chip gen mask with the platform (CPU/mobo) mask. */ 937 937 - pcie_gen_mask = adev->pm.pcie_gen_mask & (adev->pm.pcie_gen_mask >> 16); 937 937 + pcie_gen_mask = adev->pm.pcie_gen_mask & 938 938 + (adev->pm.pcie_gen_mask >> CAIL_PCIE_LINK_SPEED_SUPPORT_SHIFT); 939 939 + pcie_width_mask = adev->pm.pcie_mlw_mask & 940 940 + (adev->pm.pcie_mlw_mask >> CAIL_PCIE_LINK_WIDTH_SUPPORT_SHIFT); 938 941 dev_info->pcie_gen = fls(pcie_gen_mask); 939 942 dev_info->pcie_num_lanes = 940 940 - adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 ? 32 : 941 941 - adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 ? 16 : 942 942 - adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 ? 12 : 943 943 - adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 ? 8 : 944 944 - adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 ? 4 : 945 945 - adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 ? 2 : 1; 943 943 + pcie_width_mask & CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X32 ? 32 : 944 944 + pcie_width_mask & CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X16 ? 16 : 945 945 + pcie_width_mask & CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 ? 12 : 946 946 + pcie_width_mask & CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X8 ? 8 : 947 947 + pcie_width_mask & CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X4 ? 4 : 948 948 + pcie_width_mask & CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 ? 2 : 1; 946 949 947 950 dev_info->tcp_cache_size = adev->gfx.config.gc_tcp_l1_size; 948 951 dev_info->num_sqc_per_wgp = adev->gfx.config.gc_num_sqc_per_wgp;

+1 -1

drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h

reviewed

··· 40 40 #define AMDGPU_MES_VERSION_MASK 0x00000fff 41 41 #define AMDGPU_MES_API_VERSION_MASK 0x00fff000 42 42 #define AMDGPU_MES_FEAT_VERSION_MASK 0xff000000 43 43 - #define AMDGPU_MES_MSCRATCH_SIZE 0x8000 43 43 + #define AMDGPU_MES_MSCRATCH_SIZE 0x40000 44 44 45 45 enum amdgpu_mes_priority_level { 46 46 AMDGPU_MES_PRIORITY_LEVEL_LOW = 0,

+1

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h

reviewed

··· 107 107 struct amdgpu_irq_src doorbell_invalid_irq; 108 108 struct amdgpu_irq_src pool_timeout_irq; 109 109 struct amdgpu_irq_src srbm_write_irq; 110 110 + struct amdgpu_irq_src ctxt_empty_irq; 110 111 111 112 int num_instances; 112 113 uint32_t sdma_mask;

+1 -1

drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

reviewed

··· 427 427 return; 428 428 429 429 sched = entity->entity.rq->sched; 430 430 - if (sched->ready) { 430 430 + if (drm_sched_wqueue_ready(sched)) { 431 431 ring = to_amdgpu_ring(entity->entity.rq->sched); 432 432 atomic_dec(&adev->xcp_mgr->xcp[ring->xcp_id].ref_cnt); 433 433 }

+8

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

reviewed

··· 1352 1352 } 1353 1353 1354 1354 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { 1355 1355 + case IP_VERSION(12, 0, 0): 1356 1356 + case IP_VERSION(12, 0, 1): 1357 1357 + if (adev->gfx.me_fw_version >= 2480 && 1358 1358 + adev->gfx.pfp_fw_version >= 2530 && 1359 1359 + adev->gfx.mec_fw_version >= 2680 && 1360 1360 + adev->mes.fw_version[0] >= 100) 1361 1361 + adev->gfx.enable_cleaner_shader = true; 1362 1362 + break; 1355 1363 default: 1356 1364 adev->gfx.enable_cleaner_shader = false; 1357 1365 break;

+36 -13

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

reviewed

··· 756 756 757 757 if (amdgpu_mes_log_enable) { 758 758 mes_set_hw_res_pkt.enable_mes_event_int_logging = 1; 759 759 - mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr = mes->event_log_gpu_addr + pipe * AMDGPU_MES_LOG_BUFFER_SIZE; 759 759 + mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr = mes->event_log_gpu_addr + 760 760 + pipe * (AMDGPU_MES_LOG_BUFFER_SIZE + AMDGPU_MES_MSCRATCH_SIZE); 760 761 } 761 762 762 763 if (enforce_isolation) ··· 984 983 uint32_t pipe, data = 0; 985 984 986 985 if (enable) { 987 987 - data = RREG32_SOC15(GC, 0, regCP_MES_CNTL); 988 988 - data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE0_RESET, 1); 989 989 - data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_RESET, 1); 990 990 - WREG32_SOC15(GC, 0, regCP_MES_CNTL, data); 991 991 - 992 986 mutex_lock(&adev->srbm_mutex); 993 987 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) { 994 988 soc21_grbm_select(adev, 3, pipe, 0, 0); 989 989 + if (amdgpu_mes_log_enable) { 990 990 + u32 log_size = AMDGPU_MES_LOG_BUFFER_SIZE + AMDGPU_MES_MSCRATCH_SIZE; 991 991 + /* In case uni mes is not enabled, only program for pipe 0 */ 992 992 + if (adev->mes.event_log_size >= (pipe + 1) * log_size) { 993 993 + WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_LO, 994 994 + lower_32_bits(adev->mes.event_log_gpu_addr + 995 995 + pipe * log_size + AMDGPU_MES_LOG_BUFFER_SIZE)); 996 996 + WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_HI, 997 997 + upper_32_bits(adev->mes.event_log_gpu_addr + 998 998 + pipe * log_size + AMDGPU_MES_LOG_BUFFER_SIZE)); 999 999 + dev_info(adev->dev, "Setup CP MES MSCRATCH address : 0x%x. 0x%x\n", 1000 1000 + RREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_HI), 1001 1001 + RREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_LO)); 1002 1002 + } 1003 1003 + } 1004 1004 + 1005 1005 + data = RREG32_SOC15(GC, 0, regCP_MES_CNTL); 1006 1006 + if (pipe == 0) 1007 1007 + data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE0_RESET, 1); 1008 1008 + else 1009 1009 + data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_RESET, 1); 1010 1010 + WREG32_SOC15(GC, 0, regCP_MES_CNTL, data); 995 1011 996 1012 ucode_addr = adev->mes.uc_start_addr[pipe] >> 2; 997 1013 WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START, 998 1014 lower_32_bits(ucode_addr)); 999 1015 WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI, 1000 1016 upper_32_bits(ucode_addr)); 1017 1017 + 1018 1018 + /* unhalt MES and activate one pipe each loop */ 1019 1019 + data = REG_SET_FIELD(0, CP_MES_CNTL, MES_PIPE0_ACTIVE, 1); 1020 1020 + if (pipe) 1021 1021 + data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_ACTIVE, 1); 1022 1022 + dev_info(adev->dev, "program CP_MES_CNTL : 0x%x\n", data); 1023 1023 + 1024 1024 + WREG32_SOC15(GC, 0, regCP_MES_CNTL, data); 1025 1025 + 1001 1026 } 1002 1027 soc21_grbm_select(adev, 0, 0, 0, 0); 1003 1028 mutex_unlock(&adev->srbm_mutex); 1004 1004 - 1005 1005 - /* unhalt MES and activate pipe0 */ 1006 1006 - data = REG_SET_FIELD(0, CP_MES_CNTL, MES_PIPE0_ACTIVE, 1); 1007 1007 - data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_ACTIVE, 1); 1008 1008 - WREG32_SOC15(GC, 0, regCP_MES_CNTL, data); 1009 1029 1010 1030 if (amdgpu_emu_mode) 1011 1031 msleep(100); ··· 1501 1479 adev->mes.kiq_hw_fini = &mes_v12_0_kiq_hw_fini; 1502 1480 adev->mes.enable_legacy_queue_map = true; 1503 1481 1504 1504 - adev->mes.event_log_size = adev->enable_uni_mes ? (AMDGPU_MAX_MES_PIPES * AMDGPU_MES_LOG_BUFFER_SIZE) : AMDGPU_MES_LOG_BUFFER_SIZE; 1505 1505 - 1482 1482 + adev->mes.event_log_size = adev->enable_uni_mes ? 1483 1483 + (AMDGPU_MAX_MES_PIPES * (AMDGPU_MES_LOG_BUFFER_SIZE + AMDGPU_MES_MSCRATCH_SIZE)) : 1484 1484 + (AMDGPU_MES_LOG_BUFFER_SIZE + AMDGPU_MES_MSCRATCH_SIZE); 1506 1485 r = amdgpu_mes_init(adev); 1507 1486 if (r) 1508 1487 return r;

+22

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

reviewed

··· 1406 1406 &adev->sdma.srbm_write_irq); 1407 1407 if (r) 1408 1408 return r; 1409 1409 + 1410 1410 + r = amdgpu_irq_add_id(adev, sdma_v4_4_2_seq_to_irq_id(i), 1411 1411 + SDMA0_4_0__SRCID__SDMA_CTXEMPTY, 1412 1412 + &adev->sdma.ctxt_empty_irq); 1413 1413 + if (r) 1414 1414 + return r; 1409 1415 } 1410 1416 1411 1417 for (i = 0; i < adev->sdma.num_instances; i++) { ··· 1820 1814 return 0; 1821 1815 } 1822 1816 1817 1817 + static int sdma_v4_4_2_process_ctxt_empty_irq(struct amdgpu_device *adev, 1818 1818 + struct amdgpu_irq_src *source, 1819 1819 + struct amdgpu_iv_entry *entry) 1820 1820 + { 1821 1821 + /* There is nothing useful to be done here, only kept for debug */ 1822 1822 + dev_dbg_ratelimited(adev->dev, "SDMA context empty interrupt"); 1823 1823 + sdma_v4_4_2_print_iv_entry(adev, entry); 1824 1824 + return 0; 1825 1825 + } 1826 1826 + 1823 1827 static void sdma_v4_4_2_inst_update_medium_grain_light_sleep( 1824 1828 struct amdgpu_device *adev, bool enable, uint32_t inst_mask) 1825 1829 { ··· 2112 2096 .process = sdma_v4_4_2_process_srbm_write_irq, 2113 2097 }; 2114 2098 2099 2099 + static const struct amdgpu_irq_src_funcs sdma_v4_4_2_ctxt_empty_irq_funcs = { 2100 2100 + .process = sdma_v4_4_2_process_ctxt_empty_irq, 2101 2101 + }; 2102 2102 + 2115 2103 static void sdma_v4_4_2_set_irq_funcs(struct amdgpu_device *adev) 2116 2104 { 2117 2105 adev->sdma.trap_irq.num_types = adev->sdma.num_instances; ··· 2124 2104 adev->sdma.doorbell_invalid_irq.num_types = adev->sdma.num_instances; 2125 2105 adev->sdma.pool_timeout_irq.num_types = adev->sdma.num_instances; 2126 2106 adev->sdma.srbm_write_irq.num_types = adev->sdma.num_instances; 2107 2107 + adev->sdma.ctxt_empty_irq.num_types = adev->sdma.num_instances; 2127 2108 2128 2109 adev->sdma.trap_irq.funcs = &sdma_v4_4_2_trap_irq_funcs; 2129 2110 adev->sdma.illegal_inst_irq.funcs = &sdma_v4_4_2_illegal_inst_irq_funcs; ··· 2133 2112 adev->sdma.doorbell_invalid_irq.funcs = &sdma_v4_4_2_doorbell_invalid_irq_funcs; 2134 2113 adev->sdma.pool_timeout_irq.funcs = &sdma_v4_4_2_pool_timeout_irq_funcs; 2135 2114 adev->sdma.srbm_write_irq.funcs = &sdma_v4_4_2_srbm_write_irq_funcs; 2115 2115 + adev->sdma.ctxt_empty_irq.funcs = &sdma_v4_4_2_ctxt_empty_irq_funcs; 2136 2116 } 2137 2117 2138 2118 /**

+1168 -1171

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h

reviewed

··· 274 274 275 275 276 276 static const uint32_t cwsr_trap_gfx9_hex[] = { 277 277 - 0xbf820001, 0xbf820258, 277 277 + 0xbf820001, 0xbf820259, 278 278 0xb8f8f802, 0x8978ff78, 279 279 0x00020006, 0xb8fbf803, 280 280 0x866eff78, 0x00002000, ··· 390 390 0xbefe007c, 0xbefc0070, 391 391 0xc0611c7a, 0x0000007c, 392 392 0xbf8cc07f, 0x80708470, 393 393 - 0xbefc007e, 0x867aff7f, 394 394 - 0x04000000, 0xbeef0080, 395 395 - 0x876f6f7a, 0xb8f02a05, 396 396 - 0x80708170, 0x8e708a70, 397 397 - 0xb8fb1605, 0x807b817b, 398 398 - 0x8e7b847b, 0x8e76827b, 399 399 - 0xbef600ff, 0x01000000, 400 400 - 0xbef20174, 0x80747074, 401 401 - 0x82758075, 0xbefc0080, 402 402 - 0xbf800000, 0xbe802b00, 403 403 - 0xbe822b02, 0xbe842b04, 404 404 - 0xbe862b06, 0xbe882b08, 405 405 - 0xbe8a2b0a, 0xbe8c2b0c, 406 406 - 0xbe8e2b0e, 0xc06b003a, 407 407 - 0x00000000, 0xbf8cc07f, 408 408 - 0xc06b013a, 0x00000010, 409 409 - 0xbf8cc07f, 0xc06b023a, 410 410 - 0x00000020, 0xbf8cc07f, 411 411 - 0xc06b033a, 0x00000030, 412 412 - 0xbf8cc07f, 0x8074c074, 413 413 - 0x82758075, 0x807c907c, 414 414 - 0xbf0a7b7c, 0xbf85ffe7, 415 415 - 0xbef40172, 0xbef00080, 416 416 - 0xbefe00c1, 0xbeff00c1, 417 417 - 0xbee80080, 0xbee90080, 418 418 - 0xbef600ff, 0x01000000, 419 419 - 0x867aff78, 0x00400000, 420 420 - 0xbf850003, 0xb8faf803, 421 421 - 0x897a7aff, 0x10000000, 422 422 - 0xbf85004d, 0xbe840080, 423 423 - 0xd2890000, 0x00000900, 424 424 - 0x80048104, 0xd2890001, 425 425 - 0x00000900, 0x80048104, 426 426 - 0xd2890002, 0x00000900, 427 427 - 0x80048104, 0xd2890003, 428 428 - 0x00000900, 0x80048104, 429 429 - 0xc069003a, 0x00000070, 430 430 - 0xbf8cc07f, 0x80709070, 431 431 - 0xbf06c004, 0xbf84ffee, 432 432 - 0xbe840080, 0xd2890000, 433 433 - 0x00000901, 0x80048104, 434 434 - 0xd2890001, 0x00000901, 435 435 - 0x80048104, 0xd2890002, 436 436 - 0x00000901, 0x80048104, 437 437 - 0xd2890003, 0x00000901, 438 438 - 0x80048104, 0xc069003a, 439 439 - 0x00000070, 0xbf8cc07f, 440 440 - 0x80709070, 0xbf06c004, 441 441 - 0xbf84ffee, 0xbe840080, 442 442 - 0xd2890000, 0x00000902, 443 443 - 0x80048104, 0xd2890001, 444 444 - 0x00000902, 0x80048104, 445 445 - 0xd2890002, 0x00000902, 446 446 - 0x80048104, 0xd2890003, 447 447 - 0x00000902, 0x80048104, 448 448 - 0xc069003a, 0x00000070, 449 449 - 0xbf8cc07f, 0x80709070, 450 450 - 0xbf06c004, 0xbf84ffee, 451 451 - 0xbe840080, 0xd2890000, 452 452 - 0x00000903, 0x80048104, 453 453 - 0xd2890001, 0x00000903, 454 454 - 0x80048104, 0xd2890002, 455 455 - 0x00000903, 0x80048104, 456 456 - 0xd2890003, 0x00000903, 457 457 - 0x80048104, 0xc069003a, 458 458 - 0x00000070, 0xbf8cc07f, 459 459 - 0x80709070, 0xbf06c004, 460 460 - 0xbf84ffee, 0xbf820008, 461 461 - 0xe0724000, 0x701d0000, 462 462 - 0xe0724100, 0x701d0100, 463 463 - 0xe0724200, 0x701d0200, 464 464 - 0xe0724300, 0x701d0300, 465 465 - 0xbefe00c1, 0xbeff00c1, 466 466 - 0xb8fb4306, 0x867bc17b, 467 467 - 0xbf840063, 0xbf8a0000, 468 468 - 0x867aff6f, 0x04000000, 469 469 - 0xbf84005f, 0x8e7b867b, 470 470 - 0x8e7b827b, 0xbef6007b, 393 393 + 0xbefc007e, 0xbf108080, 394 394 + 0x867aff7f, 0x04000000, 395 395 + 0xbeef0080, 0x876f6f7a, 471 396 0xb8f02a05, 0x80708170, 472 472 - 0x8e708a70, 0xb8fa1605, 473 473 - 0x807a817a, 0x8e7a867a, 474 474 - 0x80707a70, 0x8070ff70, 475 475 - 0x00000080, 0xbef600ff, 476 476 - 0x01000000, 0xbefc0080, 477 477 - 0xd28c0002, 0x000100c1, 478 478 - 0xd28d0003, 0x000204c1, 479 479 - 0x867aff78, 0x00400000, 480 480 - 0xbf850003, 0xb8faf803, 481 481 - 0x897a7aff, 0x10000000, 482 482 - 0xbf850030, 0x24040682, 483 483 - 0xd86e4000, 0x00000002, 484 484 - 0xbf8cc07f, 0xbe840080, 485 485 - 0xd2890000, 0x00000900, 486 486 - 0x80048104, 0xd2890001, 487 487 - 0x00000900, 0x80048104, 488 488 - 0xd2890002, 0x00000900, 489 489 - 0x80048104, 0xd2890003, 490 490 - 0x00000900, 0x80048104, 491 491 - 0xc069003a, 0x00000070, 492 492 - 0xbf8cc07f, 0x80709070, 493 493 - 0xbf06c004, 0xbf84ffee, 494 494 - 0xbe840080, 0xd2890000, 495 495 - 0x00000901, 0x80048104, 496 496 - 0xd2890001, 0x00000901, 497 497 - 0x80048104, 0xd2890002, 498 498 - 0x00000901, 0x80048104, 499 499 - 0xd2890003, 0x00000901, 500 500 - 0x80048104, 0xc069003a, 501 501 - 0x00000070, 0xbf8cc07f, 502 502 - 0x80709070, 0xbf06c004, 503 503 - 0xbf84ffee, 0x680404ff, 504 504 - 0x00000200, 0xd0c9006a, 505 505 - 0x0000f702, 0xbf87ffd2, 506 506 - 0xbf820015, 0xd1060002, 507 507 - 0x00011103, 0x7e0602ff, 508 508 - 0x00000200, 0xbefc00ff, 509 509 - 0x00010000, 0xbe800077, 510 510 - 0x8677ff77, 0xff7fffff, 511 511 - 0x8777ff77, 0x00058000, 512 512 - 0xd8ec0000, 0x00000002, 513 513 - 0xbf8cc07f, 0xe0765000, 514 514 - 0x701d0002, 0x68040702, 515 515 - 0xd0c9006a, 0x0000f702, 516 516 - 0xbf87fff7, 0xbef70000, 517 517 - 0xbef000ff, 0x00000400, 518 518 - 0xbefe00c1, 0xbeff00c1, 519 519 - 0xb8fb2a05, 0x807b817b, 520 520 - 0x8e7b827b, 0xbef600ff, 521 521 - 0x01000000, 0xbefc0084, 522 522 - 0xbf0a7b7c, 0xbf84006d, 523 523 - 0xbf11017c, 0x807bff7b, 524 524 - 0x00001000, 0x867aff78, 397 397 + 0x8e708a70, 0xb8fb1605, 398 398 + 0x807b817b, 0x8e7b847b, 399 399 + 0x8e76827b, 0xbef600ff, 400 400 + 0x01000000, 0xbef20174, 401 401 + 0x80747074, 0x82758075, 402 402 + 0xbefc0080, 0xbf800000, 403 403 + 0xbe802b00, 0xbe822b02, 404 404 + 0xbe842b04, 0xbe862b06, 405 405 + 0xbe882b08, 0xbe8a2b0a, 406 406 + 0xbe8c2b0c, 0xbe8e2b0e, 407 407 + 0xc06b003a, 0x00000000, 408 408 + 0xbf8cc07f, 0xc06b013a, 409 409 + 0x00000010, 0xbf8cc07f, 410 410 + 0xc06b023a, 0x00000020, 411 411 + 0xbf8cc07f, 0xc06b033a, 412 412 + 0x00000030, 0xbf8cc07f, 413 413 + 0x8074c074, 0x82758075, 414 414 + 0x807c907c, 0xbf0a7b7c, 415 415 + 0xbf85ffe7, 0xbef40172, 416 416 + 0xbef00080, 0xbefe00c1, 417 417 + 0xbeff00c1, 0xbee80080, 418 418 + 0xbee90080, 0xbef600ff, 419 419 + 0x01000000, 0x867aff78, 525 420 0x00400000, 0xbf850003, 526 421 0xb8faf803, 0x897a7aff, 527 527 - 0x10000000, 0xbf850051, 422 422 + 0x10000000, 0xbf85004d, 528 423 0xbe840080, 0xd2890000, 529 424 0x00000900, 0x80048104, 530 425 0xd2890001, 0x00000900, ··· 458 563 0xc069003a, 0x00000070, 459 564 0xbf8cc07f, 0x80709070, 460 565 0xbf06c004, 0xbf84ffee, 461 461 - 0x807c847c, 0xbf0a7b7c, 462 462 - 0xbf85ffb1, 0xbf9c0000, 463 463 - 0xbf820012, 0x7e000300, 464 464 - 0x7e020301, 0x7e040302, 465 465 - 0x7e060303, 0xe0724000, 566 566 + 0xbf820008, 0xe0724000, 466 567 0x701d0000, 0xe0724100, 467 568 0x701d0100, 0xe0724200, 468 569 0x701d0200, 0xe0724300, 469 469 - 0x701d0300, 0x807c847c, 470 470 - 0x8070ff70, 0x00000400, 471 471 - 0xbf0a7b7c, 0xbf85ffef, 472 472 - 0xbf9c0000, 0xbf8200c7, 473 473 - 0xbef4007e, 0x8675ff7f, 474 474 - 0x0000ffff, 0x8775ff75, 475 475 - 0x00040000, 0xbef60080, 476 476 - 0xbef700ff, 0x00807fac, 477 477 - 0x866eff7f, 0x04000000, 478 478 - 0xbf84001e, 0xbefe00c1, 479 479 - 0xbeff00c1, 0xb8ef4306, 480 480 - 0x866fc16f, 0xbf840019, 481 481 - 0x8e6f866f, 0x8e6f826f, 482 482 - 0xbef6006f, 0xb8f82a05, 483 483 - 0x80788178, 0x8e788a78, 484 484 - 0xb8ee1605, 0x806e816e, 485 485 - 0x8e6e866e, 0x80786e78, 486 486 - 0x8078ff78, 0x00000080, 570 570 + 0x701d0300, 0xbefe00c1, 571 571 + 0xbeff00c1, 0xb8fb4306, 572 572 + 0x867bc17b, 0xbf840063, 573 573 + 0xbf8a0000, 0x867aff6f, 574 574 + 0x04000000, 0xbf84005f, 575 575 + 0x8e7b867b, 0x8e7b827b, 576 576 + 0xbef6007b, 0xb8f02a05, 577 577 + 0x80708170, 0x8e708a70, 578 578 + 0xb8fa1605, 0x807a817a, 579 579 + 0x8e7a867a, 0x80707a70, 580 580 + 0x8070ff70, 0x00000080, 487 581 0xbef600ff, 0x01000000, 488 488 - 0xbefc0080, 0xe0510000, 489 489 - 0x781d0000, 0xe0510100, 490 490 - 0x781d0000, 0x807cff7c, 491 491 - 0x00000200, 0x8078ff78, 492 492 - 0x00000200, 0xbf0a6f7c, 493 493 - 0xbf85fff6, 0xbefe00c1, 494 494 - 0xbeff00c1, 0xbef600ff, 495 495 - 0x01000000, 0xb8ef2a05, 496 496 - 0x806f816f, 0x8e6f826f, 497 497 - 0x806fff6f, 0x00008000, 498 498 - 0xbef80080, 0xbeee0078, 499 499 - 0x8078ff78, 0x00000400, 500 500 - 0xbefc0084, 0xbf11087c, 501 501 - 0xe0524000, 0x781d0000, 502 502 - 0xe0524100, 0x781d0100, 503 503 - 0xe0524200, 0x781d0200, 504 504 - 0xe0524300, 0x781d0300, 505 505 - 0xbf8c0f70, 0x7e000300, 506 506 - 0x7e020301, 0x7e040302, 507 507 - 0x7e060303, 0x807c847c, 508 508 - 0x8078ff78, 0x00000400, 509 509 - 0xbf0a6f7c, 0xbf85ffee, 510 510 - 0xbf9c0000, 0xe0524000, 511 511 - 0x6e1d0000, 0xe0524100, 512 512 - 0x6e1d0100, 0xe0524200, 513 513 - 0x6e1d0200, 0xe0524300, 514 514 - 0x6e1d0300, 0xbf8c0f70, 582 582 + 0xbefc0080, 0xd28c0002, 583 583 + 0x000100c1, 0xd28d0003, 584 584 + 0x000204c1, 0x867aff78, 585 585 + 0x00400000, 0xbf850003, 586 586 + 0xb8faf803, 0x897a7aff, 587 587 + 0x10000000, 0xbf850030, 588 588 + 0x24040682, 0xd86e4000, 589 589 + 0x00000002, 0xbf8cc07f, 590 590 + 0xbe840080, 0xd2890000, 591 591 + 0x00000900, 0x80048104, 592 592 + 0xd2890001, 0x00000900, 593 593 + 0x80048104, 0xd2890002, 594 594 + 0x00000900, 0x80048104, 595 595 + 0xd2890003, 0x00000900, 596 596 + 0x80048104, 0xc069003a, 597 597 + 0x00000070, 0xbf8cc07f, 598 598 + 0x80709070, 0xbf06c004, 599 599 + 0xbf84ffee, 0xbe840080, 600 600 + 0xd2890000, 0x00000901, 601 601 + 0x80048104, 0xd2890001, 602 602 + 0x00000901, 0x80048104, 603 603 + 0xd2890002, 0x00000901, 604 604 + 0x80048104, 0xd2890003, 605 605 + 0x00000901, 0x80048104, 606 606 + 0xc069003a, 0x00000070, 607 607 + 0xbf8cc07f, 0x80709070, 608 608 + 0xbf06c004, 0xbf84ffee, 609 609 + 0x680404ff, 0x00000200, 610 610 + 0xd0c9006a, 0x0000f702, 611 611 + 0xbf87ffd2, 0xbf820015, 612 612 + 0xd1060002, 0x00011103, 613 613 + 0x7e0602ff, 0x00000200, 614 614 + 0xbefc00ff, 0x00010000, 615 615 + 0xbe800077, 0x8677ff77, 616 616 + 0xff7fffff, 0x8777ff77, 617 617 + 0x00058000, 0xd8ec0000, 618 618 + 0x00000002, 0xbf8cc07f, 619 619 + 0xe0765000, 0x701d0002, 620 620 + 0x68040702, 0xd0c9006a, 621 621 + 0x0000f702, 0xbf87fff7, 622 622 + 0xbef70000, 0xbef000ff, 623 623 + 0x00000400, 0xbefe00c1, 624 624 + 0xbeff00c1, 0xb8fb2a05, 625 625 + 0x807b817b, 0x8e7b827b, 626 626 + 0xbef600ff, 0x01000000, 627 627 + 0xbefc0084, 0xbf0a7b7c, 628 628 + 0xbf84006d, 0xbf11017c, 629 629 + 0x807bff7b, 0x00001000, 630 630 + 0x867aff78, 0x00400000, 631 631 + 0xbf850003, 0xb8faf803, 632 632 + 0x897a7aff, 0x10000000, 633 633 + 0xbf850051, 0xbe840080, 634 634 + 0xd2890000, 0x00000900, 635 635 + 0x80048104, 0xd2890001, 636 636 + 0x00000900, 0x80048104, 637 637 + 0xd2890002, 0x00000900, 638 638 + 0x80048104, 0xd2890003, 639 639 + 0x00000900, 0x80048104, 640 640 + 0xc069003a, 0x00000070, 641 641 + 0xbf8cc07f, 0x80709070, 642 642 + 0xbf06c004, 0xbf84ffee, 643 643 + 0xbe840080, 0xd2890000, 644 644 + 0x00000901, 0x80048104, 645 645 + 0xd2890001, 0x00000901, 646 646 + 0x80048104, 0xd2890002, 647 647 + 0x00000901, 0x80048104, 648 648 + 0xd2890003, 0x00000901, 649 649 + 0x80048104, 0xc069003a, 650 650 + 0x00000070, 0xbf8cc07f, 651 651 + 0x80709070, 0xbf06c004, 652 652 + 0xbf84ffee, 0xbe840080, 653 653 + 0xd2890000, 0x00000902, 654 654 + 0x80048104, 0xd2890001, 655 655 + 0x00000902, 0x80048104, 656 656 + 0xd2890002, 0x00000902, 657 657 + 0x80048104, 0xd2890003, 658 658 + 0x00000902, 0x80048104, 659 659 + 0xc069003a, 0x00000070, 660 660 + 0xbf8cc07f, 0x80709070, 661 661 + 0xbf06c004, 0xbf84ffee, 662 662 + 0xbe840080, 0xd2890000, 663 663 + 0x00000903, 0x80048104, 664 664 + 0xd2890001, 0x00000903, 665 665 + 0x80048104, 0xd2890002, 666 666 + 0x00000903, 0x80048104, 667 667 + 0xd2890003, 0x00000903, 668 668 + 0x80048104, 0xc069003a, 669 669 + 0x00000070, 0xbf8cc07f, 670 670 + 0x80709070, 0xbf06c004, 671 671 + 0xbf84ffee, 0x807c847c, 672 672 + 0xbf0a7b7c, 0xbf85ffb1, 673 673 + 0xbf9c0000, 0xbf820012, 674 674 + 0x7e000300, 0x7e020301, 675 675 + 0x7e040302, 0x7e060303, 676 676 + 0xe0724000, 0x701d0000, 677 677 + 0xe0724100, 0x701d0100, 678 678 + 0xe0724200, 0x701d0200, 679 679 + 0xe0724300, 0x701d0300, 680 680 + 0x807c847c, 0x8070ff70, 681 681 + 0x00000400, 0xbf0a7b7c, 682 682 + 0xbf85ffef, 0xbf9c0000, 683 683 + 0xbf8200c7, 0xbef4007e, 684 684 + 0x8675ff7f, 0x0000ffff, 685 685 + 0x8775ff75, 0x00040000, 686 686 + 0xbef60080, 0xbef700ff, 687 687 + 0x00807fac, 0x866eff7f, 688 688 + 0x04000000, 0xbf84001e, 689 689 + 0xbefe00c1, 0xbeff00c1, 690 690 + 0xb8ef4306, 0x866fc16f, 691 691 + 0xbf840019, 0x8e6f866f, 692 692 + 0x8e6f826f, 0xbef6006f, 515 693 0xb8f82a05, 0x80788178, 516 694 0x8e788a78, 0xb8ee1605, 517 695 0x806e816e, 0x8e6e866e, 518 518 - 0x80786e78, 0x80f8c078, 519 519 - 0xb8ef1605, 0x806f816f, 520 520 - 0x8e6f846f, 0x8e76826f, 696 696 + 0x80786e78, 0x8078ff78, 697 697 + 0x00000080, 0xbef600ff, 698 698 + 0x01000000, 0xbefc0080, 699 699 + 0xe0510000, 0x781d0000, 700 700 + 0xe0510100, 0x781d0000, 701 701 + 0x807cff7c, 0x00000200, 702 702 + 0x8078ff78, 0x00000200, 703 703 + 0xbf0a6f7c, 0xbf85fff6, 704 704 + 0xbefe00c1, 0xbeff00c1, 521 705 0xbef600ff, 0x01000000, 522 522 - 0xbefc006f, 0xc031003a, 523 523 - 0x00000078, 0x80f8c078, 524 524 - 0xbf8cc07f, 0x80fc907c, 525 525 - 0xbf800000, 0xbe802d00, 526 526 - 0xbe822d02, 0xbe842d04, 527 527 - 0xbe862d06, 0xbe882d08, 528 528 - 0xbe8a2d0a, 0xbe8c2d0c, 529 529 - 0xbe8e2d0e, 0xbf06807c, 530 530 - 0xbf84fff0, 0xb8f82a05, 706 706 + 0xb8ef2a05, 0x806f816f, 707 707 + 0x8e6f826f, 0x806fff6f, 708 708 + 0x00008000, 0xbef80080, 709 709 + 0xbeee0078, 0x8078ff78, 710 710 + 0x00000400, 0xbefc0084, 711 711 + 0xbf11087c, 0xe0524000, 712 712 + 0x781d0000, 0xe0524100, 713 713 + 0x781d0100, 0xe0524200, 714 714 + 0x781d0200, 0xe0524300, 715 715 + 0x781d0300, 0xbf8c0f70, 716 716 + 0x7e000300, 0x7e020301, 717 717 + 0x7e040302, 0x7e060303, 718 718 + 0x807c847c, 0x8078ff78, 719 719 + 0x00000400, 0xbf0a6f7c, 720 720 + 0xbf85ffee, 0xbf9c0000, 721 721 + 0xe0524000, 0x6e1d0000, 722 722 + 0xe0524100, 0x6e1d0100, 723 723 + 0xe0524200, 0x6e1d0200, 724 724 + 0xe0524300, 0x6e1d0300, 725 725 + 0xbf8c0f70, 0xb8f82a05, 531 726 0x80788178, 0x8e788a78, 532 727 0xb8ee1605, 0x806e816e, 533 728 0x8e6e866e, 0x80786e78, 534 534 - 0xbef60084, 0xbef600ff, 535 535 - 0x01000000, 0xc0211bfa, 729 729 + 0x80f8c078, 0xb8ef1605, 730 730 + 0x806f816f, 0x8e6f846f, 731 731 + 0x8e76826f, 0xbef600ff, 732 732 + 0x01000000, 0xbefc006f, 733 733 + 0xc031003a, 0x00000078, 734 734 + 0x80f8c078, 0xbf8cc07f, 735 735 + 0x80fc907c, 0xbf800000, 736 736 + 0xbe802d00, 0xbe822d02, 737 737 + 0xbe842d04, 0xbe862d06, 738 738 + 0xbe882d08, 0xbe8a2d0a, 739 739 + 0xbe8c2d0c, 0xbe8e2d0e, 740 740 + 0xbf06807c, 0xbf84fff0, 741 741 + 0xb8f82a05, 0x80788178, 742 742 + 0x8e788a78, 0xb8ee1605, 743 743 + 0x806e816e, 0x8e6e866e, 744 744 + 0x80786e78, 0xbef60084, 745 745 + 0xbef600ff, 0x01000000, 746 746 + 0xc0211bfa, 0x00000078, 747 747 + 0x80788478, 0xc0211b3a, 536 748 0x00000078, 0x80788478, 537 537 - 0xc0211b3a, 0x00000078, 538 538 - 0x80788478, 0xc0211b7a, 749 749 + 0xc0211b7a, 0x00000078, 750 750 + 0x80788478, 0xc0211c3a, 539 751 0x00000078, 0x80788478, 540 540 - 0xc0211c3a, 0x00000078, 541 541 - 0x80788478, 0xc0211c7a, 752 752 + 0xc0211c7a, 0x00000078, 753 753 + 0x80788478, 0xc0211eba, 542 754 0x00000078, 0x80788478, 543 543 - 0xc0211eba, 0x00000078, 544 544 - 0x80788478, 0xc0211efa, 755 755 + 0xc0211efa, 0x00000078, 756 756 + 0x80788478, 0xc0211a3a, 545 757 0x00000078, 0x80788478, 546 546 - 0xc0211a3a, 0x00000078, 547 547 - 0x80788478, 0xc0211a7a, 758 758 + 0xc0211a7a, 0x00000078, 759 759 + 0x80788478, 0xc0211cfa, 548 760 0x00000078, 0x80788478, 549 549 - 0xc0211cfa, 0x00000078, 550 550 - 0x80788478, 0xbf8cc07f, 551 551 - 0xbefc006f, 0xbefe0070, 552 552 - 0xbeff0071, 0x866f7bff, 553 553 - 0x000003ff, 0xb96f4803, 554 554 - 0x866f7bff, 0xfffff800, 555 555 - 0x8f6f8b6f, 0xb96fa2c3, 556 556 - 0xb973f801, 0xb8ee2a05, 557 557 - 0x806e816e, 0x8e6e8a6e, 558 558 - 0xb8ef1605, 0x806f816f, 559 559 - 0x8e6f866f, 0x806e6f6e, 560 560 - 0x806e746e, 0x826f8075, 561 561 - 0x866fff6f, 0x0000ffff, 562 562 - 0xc00b1c37, 0x00000050, 563 563 - 0xc00b1d37, 0x00000060, 564 564 - 0xc0031e77, 0x00000074, 565 565 - 0xbf8cc07f, 0x8f6e8b77, 566 566 - 0x866eff6e, 0x001f8000, 567 567 - 0xb96ef807, 0x866dff6d, 568 568 - 0x0000ffff, 0x86fe7e7e, 569 569 - 0x86ea6a6a, 0x8f6e837a, 570 570 - 0xb96ee0c2, 0xbf800002, 571 571 - 0xb97a0002, 0xbf8a0000, 572 572 - 0xbe801f6c, 0xbf9b0000, 761 761 + 0xbf8cc07f, 0xbefc006f, 762 762 + 0xbefe0070, 0xbeff0071, 763 763 + 0x866f7bff, 0x000003ff, 764 764 + 0xb96f4803, 0x866f7bff, 765 765 + 0xfffff800, 0x8f6f8b6f, 766 766 + 0xb96fa2c3, 0xb973f801, 767 767 + 0xb8ee2a05, 0x806e816e, 768 768 + 0x8e6e8a6e, 0xb8ef1605, 769 769 + 0x806f816f, 0x8e6f866f, 770 770 + 0x806e6f6e, 0x806e746e, 771 771 + 0x826f8075, 0x866fff6f, 772 772 + 0x0000ffff, 0xc00b1c37, 773 773 + 0x00000050, 0xc00b1d37, 774 774 + 0x00000060, 0xc0031e77, 775 775 + 0x00000074, 0xbf8cc07f, 776 776 + 0x8f6e8b77, 0x866eff6e, 777 777 + 0x001f8000, 0xb96ef807, 778 778 + 0x866dff6d, 0x0000ffff, 779 779 + 0x86fe7e7e, 0x86ea6a6a, 780 780 + 0x8f6e837a, 0xb96ee0c2, 781 781 + 0xbf800002, 0xb97a0002, 782 782 + 0xbf8a0000, 0xbe801f6c, 783 783 + 0xbf9b0000, 0x00000000, 573 784 }; 574 785 575 786 static const uint32_t cwsr_trap_nv1x_hex[] = { ··· 1303 1302 }; 1304 1303 1305 1304 static const uint32_t cwsr_trap_arcturus_hex[] = { 1306 1306 - 0xbf820001, 0xbf8202d4, 1305 1305 + 0xbf820001, 0xbf8202d5, 1307 1306 0xb8f8f802, 0x8978ff78, 1308 1307 0x00020006, 0xb8fbf803, 1309 1308 0x866eff78, 0x00002000, ··· 1420 1419 0xbefe007c, 0xbefc0070, 1421 1420 0xc0611c7a, 0x0000007c, 1422 1421 0xbf8cc07f, 0x80708470, 1423 1423 - 0xbefc007e, 0x867aff7f, 1424 1424 - 0x04000000, 0xbeef0080, 1425 1425 - 0x876f6f7a, 0xb8f02a05, 1426 1426 - 0x80708170, 0x8e708a70, 1427 1427 - 0x8e708170, 0xb8fb1605, 1428 1428 - 0x807b817b, 0x8e7b847b, 1429 1429 - 0x8e76827b, 0xbef600ff, 1430 1430 - 0x01000000, 0xbef20174, 1431 1431 - 0x80747074, 0x82758075, 1432 1432 - 0xbefc0080, 0xbf800000, 1433 1433 - 0xbe802b00, 0xbe822b02, 1434 1434 - 0xbe842b04, 0xbe862b06, 1435 1435 - 0xbe882b08, 0xbe8a2b0a, 1436 1436 - 0xbe8c2b0c, 0xbe8e2b0e, 1437 1437 - 0xc06b003a, 0x00000000, 1438 1438 - 0xbf8cc07f, 0xc06b013a, 1439 1439 - 0x00000010, 0xbf8cc07f, 1440 1440 - 0xc06b023a, 0x00000020, 1441 1441 - 0xbf8cc07f, 0xc06b033a, 1442 1442 - 0x00000030, 0xbf8cc07f, 1443 1443 - 0x8074c074, 0x82758075, 1444 1444 - 0x807c907c, 0xbf0a7b7c, 1445 1445 - 0xbf85ffe7, 0xbef40172, 1446 1446 - 0xbef00080, 0xbefe00c1, 1447 1447 - 0xbeff00c1, 0xbee80080, 1448 1448 - 0xbee90080, 0xbef600ff, 1449 1449 - 0x01000000, 0x867aff78, 1450 1450 - 0x00400000, 0xbf850003, 1451 1451 - 0xb8faf803, 0x897a7aff, 1452 1452 - 0x10000000, 0xbf85004d, 1453 1453 - 0xbe840080, 0xd2890000, 1454 1454 - 0x00000900, 0x80048104, 1455 1455 - 0xd2890001, 0x00000900, 1456 1456 - 0x80048104, 0xd2890002, 1457 1457 - 0x00000900, 0x80048104, 1458 1458 - 0xd2890003, 0x00000900, 1459 1459 - 0x80048104, 0xc069003a, 1460 1460 - 0x00000070, 0xbf8cc07f, 1461 1461 - 0x80709070, 0xbf06c004, 1462 1462 - 0xbf84ffee, 0xbe840080, 1463 1463 - 0xd2890000, 0x00000901, 1464 1464 - 0x80048104, 0xd2890001, 1465 1465 - 0x00000901, 0x80048104, 1466 1466 - 0xd2890002, 0x00000901, 1467 1467 - 0x80048104, 0xd2890003, 1468 1468 - 0x00000901, 0x80048104, 1469 1469 - 0xc069003a, 0x00000070, 1470 1470 - 0xbf8cc07f, 0x80709070, 1471 1471 - 0xbf06c004, 0xbf84ffee, 1472 1472 - 0xbe840080, 0xd2890000, 1473 1473 - 0x00000902, 0x80048104, 1474 1474 - 0xd2890001, 0x00000902, 1475 1475 - 0x80048104, 0xd2890002, 1476 1476 - 0x00000902, 0x80048104, 1477 1477 - 0xd2890003, 0x00000902, 1478 1478 - 0x80048104, 0xc069003a, 1479 1479 - 0x00000070, 0xbf8cc07f, 1480 1480 - 0x80709070, 0xbf06c004, 1481 1481 - 0xbf84ffee, 0xbe840080, 1482 1482 - 0xd2890000, 0x00000903, 1483 1483 - 0x80048104, 0xd2890001, 1484 1484 - 0x00000903, 0x80048104, 1485 1485 - 0xd2890002, 0x00000903, 1486 1486 - 0x80048104, 0xd2890003, 1487 1487 - 0x00000903, 0x80048104, 1488 1488 - 0xc069003a, 0x00000070, 1489 1489 - 0xbf8cc07f, 0x80709070, 1490 1490 - 0xbf06c004, 0xbf84ffee, 1491 1491 - 0xbf820008, 0xe0724000, 1492 1492 - 0x701d0000, 0xe0724100, 1493 1493 - 0x701d0100, 0xe0724200, 1494 1494 - 0x701d0200, 0xe0724300, 1495 1495 - 0x701d0300, 0xbefe00c1, 1496 1496 - 0xbeff00c1, 0xb8fb4306, 1497 1497 - 0x867bc17b, 0xbf840064, 1498 1498 - 0xbf8a0000, 0x867aff6f, 1499 1499 - 0x04000000, 0xbf840060, 1500 1500 - 0x8e7b867b, 0x8e7b827b, 1501 1501 - 0xbef6007b, 0xb8f02a05, 1502 1502 - 0x80708170, 0x8e708a70, 1503 1503 - 0x8e708170, 0xb8fa1605, 1504 1504 - 0x807a817a, 0x8e7a867a, 1505 1505 - 0x80707a70, 0x8070ff70, 1506 1506 - 0x00000080, 0xbef600ff, 1507 1507 - 0x01000000, 0xbefc0080, 1508 1508 - 0xd28c0002, 0x000100c1, 1509 1509 - 0xd28d0003, 0x000204c1, 1422 1422 + 0xbefc007e, 0xbf108080, 1423 1423 + 0x867aff7f, 0x04000000, 1424 1424 + 0xbeef0080, 0x876f6f7a, 1425 1425 + 0xb8f02a05, 0x80708170, 1426 1426 + 0x8e708a70, 0x8e708170, 1427 1427 + 0xb8fb1605, 0x807b817b, 1428 1428 + 0x8e7b847b, 0x8e76827b, 1429 1429 + 0xbef600ff, 0x01000000, 1430 1430 + 0xbef20174, 0x80747074, 1431 1431 + 0x82758075, 0xbefc0080, 1432 1432 + 0xbf800000, 0xbe802b00, 1433 1433 + 0xbe822b02, 0xbe842b04, 1434 1434 + 0xbe862b06, 0xbe882b08, 1435 1435 + 0xbe8a2b0a, 0xbe8c2b0c, 1436 1436 + 0xbe8e2b0e, 0xc06b003a, 1437 1437 + 0x00000000, 0xbf8cc07f, 1438 1438 + 0xc06b013a, 0x00000010, 1439 1439 + 0xbf8cc07f, 0xc06b023a, 1440 1440 + 0x00000020, 0xbf8cc07f, 1441 1441 + 0xc06b033a, 0x00000030, 1442 1442 + 0xbf8cc07f, 0x8074c074, 1443 1443 + 0x82758075, 0x807c907c, 1444 1444 + 0xbf0a7b7c, 0xbf85ffe7, 1445 1445 + 0xbef40172, 0xbef00080, 1446 1446 + 0xbefe00c1, 0xbeff00c1, 1447 1447 + 0xbee80080, 0xbee90080, 1448 1448 + 0xbef600ff, 0x01000000, 1510 1449 0x867aff78, 0x00400000, 1511 1450 0xbf850003, 0xb8faf803, 1512 1451 0x897a7aff, 0x10000000, 1513 1513 - 0xbf850030, 0x24040682, 1514 1514 - 0xd86e4000, 0x00000002, 1515 1515 - 0xbf8cc07f, 0xbe840080, 1452 1452 + 0xbf85004d, 0xbe840080, 1516 1453 0xd2890000, 0x00000900, 1517 1454 0x80048104, 0xd2890001, 1518 1455 0x00000900, 0x80048104, ··· 1469 1530 0x80048104, 0xc069003a, 1470 1531 0x00000070, 0xbf8cc07f, 1471 1532 0x80709070, 0xbf06c004, 1472 1472 - 0xbf84ffee, 0x680404ff, 1473 1473 - 0x00000200, 0xd0c9006a, 1474 1474 - 0x0000f702, 0xbf87ffd2, 1475 1475 - 0xbf820015, 0xd1060002, 1476 1476 - 0x00011103, 0x7e0602ff, 1477 1477 - 0x00000200, 0xbefc00ff, 1478 1478 - 0x00010000, 0xbe800077, 1479 1479 - 0x8677ff77, 0xff7fffff, 1480 1480 - 0x8777ff77, 0x00058000, 1481 1481 - 0xd8ec0000, 0x00000002, 1482 1482 - 0xbf8cc07f, 0xe0765000, 1483 1483 - 0x701d0002, 0x68040702, 1484 1484 - 0xd0c9006a, 0x0000f702, 1485 1485 - 0xbf87fff7, 0xbef70000, 1486 1486 - 0xbef000ff, 0x00000400, 1533 1533 + 0xbf84ffee, 0xbe840080, 1534 1534 + 0xd2890000, 0x00000902, 1535 1535 + 0x80048104, 0xd2890001, 1536 1536 + 0x00000902, 0x80048104, 1537 1537 + 0xd2890002, 0x00000902, 1538 1538 + 0x80048104, 0xd2890003, 1539 1539 + 0x00000902, 0x80048104, 1540 1540 + 0xc069003a, 0x00000070, 1541 1541 + 0xbf8cc07f, 0x80709070, 1542 1542 + 0xbf06c004, 0xbf84ffee, 1543 1543 + 0xbe840080, 0xd2890000, 1544 1544 + 0x00000903, 0x80048104, 1545 1545 + 0xd2890001, 0x00000903, 1546 1546 + 0x80048104, 0xd2890002, 1547 1547 + 0x00000903, 0x80048104, 1548 1548 + 0xd2890003, 0x00000903, 1549 1549 + 0x80048104, 0xc069003a, 1550 1550 + 0x00000070, 0xbf8cc07f, 1551 1551 + 0x80709070, 0xbf06c004, 1552 1552 + 0xbf84ffee, 0xbf820008, 1553 1553 + 0xe0724000, 0x701d0000, 1554 1554 + 0xe0724100, 0x701d0100, 1555 1555 + 0xe0724200, 0x701d0200, 1556 1556 + 0xe0724300, 0x701d0300, 1487 1557 0xbefe00c1, 0xbeff00c1, 1488 1488 - 0xb8fb2a05, 0x807b817b, 1489 1489 - 0x8e7b827b, 0xbef600ff, 1490 1490 - 0x01000000, 0xbefc0084, 1491 1491 - 0xbf0a7b7c, 0xbf84006d, 1492 1492 - 0xbf11017c, 0x807bff7b, 1493 1493 - 0x00001000, 0x867aff78, 1558 1558 + 0xb8fb4306, 0x867bc17b, 1559 1559 + 0xbf840064, 0xbf8a0000, 1560 1560 + 0x867aff6f, 0x04000000, 1561 1561 + 0xbf840060, 0x8e7b867b, 1562 1562 + 0x8e7b827b, 0xbef6007b, 1563 1563 + 0xb8f02a05, 0x80708170, 1564 1564 + 0x8e708a70, 0x8e708170, 1565 1565 + 0xb8fa1605, 0x807a817a, 1566 1566 + 0x8e7a867a, 0x80707a70, 1567 1567 + 0x8070ff70, 0x00000080, 1568 1568 + 0xbef600ff, 0x01000000, 1569 1569 + 0xbefc0080, 0xd28c0002, 1570 1570 + 0x000100c1, 0xd28d0003, 1571 1571 + 0x000204c1, 0x867aff78, 1494 1572 0x00400000, 0xbf850003, 1495 1573 0xb8faf803, 0x897a7aff, 1496 1496 - 0x10000000, 0xbf850051, 1574 1574 + 0x10000000, 0xbf850030, 1575 1575 + 0x24040682, 0xd86e4000, 1576 1576 + 0x00000002, 0xbf8cc07f, 1497 1577 0xbe840080, 0xd2890000, 1498 1578 0x00000900, 0x80048104, 1499 1579 0xd2890001, 0x00000900, ··· 1532 1574 0xc069003a, 0x00000070, 1533 1575 0xbf8cc07f, 0x80709070, 1534 1576 0xbf06c004, 0xbf84ffee, 1577 1577 + 0x680404ff, 0x00000200, 1578 1578 + 0xd0c9006a, 0x0000f702, 1579 1579 + 0xbf87ffd2, 0xbf820015, 1580 1580 + 0xd1060002, 0x00011103, 1581 1581 + 0x7e0602ff, 0x00000200, 1582 1582 + 0xbefc00ff, 0x00010000, 1583 1583 + 0xbe800077, 0x8677ff77, 1584 1584 + 0xff7fffff, 0x8777ff77, 1585 1585 + 0x00058000, 0xd8ec0000, 1586 1586 + 0x00000002, 0xbf8cc07f, 1587 1587 + 0xe0765000, 0x701d0002, 1588 1588 + 0x68040702, 0xd0c9006a, 1589 1589 + 0x0000f702, 0xbf87fff7, 1590 1590 + 0xbef70000, 0xbef000ff, 1591 1591 + 0x00000400, 0xbefe00c1, 1592 1592 + 0xbeff00c1, 0xb8fb2a05, 1593 1593 + 0x807b817b, 0x8e7b827b, 1594 1594 + 0xbef600ff, 0x01000000, 1595 1595 + 0xbefc0084, 0xbf0a7b7c, 1596 1596 + 0xbf84006d, 0xbf11017c, 1597 1597 + 0x807bff7b, 0x00001000, 1598 1598 + 0x867aff78, 0x00400000, 1599 1599 + 0xbf850003, 0xb8faf803, 1600 1600 + 0x897a7aff, 0x10000000, 1601 1601 + 0xbf850051, 0xbe840080, 1602 1602 + 0xd2890000, 0x00000900, 1603 1603 + 0x80048104, 0xd2890001, 1604 1604 + 0x00000900, 0x80048104, 1605 1605 + 0xd2890002, 0x00000900, 1606 1606 + 0x80048104, 0xd2890003, 1607 1607 + 0x00000900, 0x80048104, 1608 1608 + 0xc069003a, 0x00000070, 1609 1609 + 0xbf8cc07f, 0x80709070, 1610 1610 + 0xbf06c004, 0xbf84ffee, 1535 1611 0xbe840080, 0xd2890000, 1536 1536 - 0x00000902, 0x80048104, 1537 1537 - 0xd2890001, 0x00000902, 1612 1612 + 0x00000901, 0x80048104, 1613 1613 + 0xd2890001, 0x00000901, 1538 1614 0x80048104, 0xd2890002, 1539 1539 - 0x00000902, 0x80048104, 1540 1540 - 0xd2890003, 0x00000902, 1615 1615 + 0x00000901, 0x80048104, 1616 1616 + 0xd2890003, 0x00000901, 1541 1617 0x80048104, 0xc069003a, 1542 1618 0x00000070, 0xbf8cc07f, 1543 1619 0x80709070, 0xbf06c004, 1544 1620 0xbf84ffee, 0xbe840080, 1545 1545 - 0xd2890000, 0x00000903, 1621 1621 + 0xd2890000, 0x00000902, 1546 1622 0x80048104, 0xd2890001, 1547 1547 - 0x00000903, 0x80048104, 1548 1548 - 0xd2890002, 0x00000903, 1623 1623 + 0x00000902, 0x80048104, 1624 1624 + 0xd2890002, 0x00000902, 1549 1625 0x80048104, 0xd2890003, 1550 1550 - 0x00000903, 0x80048104, 1626 1626 + 0x00000902, 0x80048104, 1551 1627 0xc069003a, 0x00000070, 1552 1628 0xbf8cc07f, 0x80709070, 1553 1629 0xbf06c004, 0xbf84ffee, 1554 1554 - 0x807c847c, 0xbf0a7b7c, 1555 1555 - 0xbf85ffb1, 0xbf9c0000, 1556 1556 - 0xbf820012, 0x7e000300, 1557 1557 - 0x7e020301, 0x7e040302, 1558 1558 - 0x7e060303, 0xe0724000, 1559 1559 - 0x701d0000, 0xe0724100, 1560 1560 - 0x701d0100, 0xe0724200, 1561 1561 - 0x701d0200, 0xe0724300, 1562 1562 - 0x701d0300, 0x807c847c, 1563 1563 - 0x8070ff70, 0x00000400, 1564 1564 - 0xbf0a7b7c, 0xbf85ffef, 1565 1565 - 0xbf9c0000, 0xbefc0080, 1566 1566 - 0xbf11017c, 0x867aff78, 1567 1567 - 0x00400000, 0xbf850003, 1568 1568 - 0xb8faf803, 0x897a7aff, 1569 1569 - 0x10000000, 0xbf850059, 1630 1630 + 0xbe840080, 0xd2890000, 1631 1631 + 0x00000903, 0x80048104, 1632 1632 + 0xd2890001, 0x00000903, 1633 1633 + 0x80048104, 0xd2890002, 1634 1634 + 0x00000903, 0x80048104, 1635 1635 + 0xd2890003, 0x00000903, 1636 1636 + 0x80048104, 0xc069003a, 1637 1637 + 0x00000070, 0xbf8cc07f, 1638 1638 + 0x80709070, 0xbf06c004, 1639 1639 + 0xbf84ffee, 0x807c847c, 1640 1640 + 0xbf0a7b7c, 0xbf85ffb1, 1641 1641 + 0xbf9c0000, 0xbf820012, 1642 1642 + 0x7e000300, 0x7e020301, 1643 1643 + 0x7e040302, 0x7e060303, 1644 1644 + 0xe0724000, 0x701d0000, 1645 1645 + 0xe0724100, 0x701d0100, 1646 1646 + 0xe0724200, 0x701d0200, 1647 1647 + 0xe0724300, 0x701d0300, 1648 1648 + 0x807c847c, 0x8070ff70, 1649 1649 + 0x00000400, 0xbf0a7b7c, 1650 1650 + 0xbf85ffef, 0xbf9c0000, 1651 1651 + 0xbefc0080, 0xbf11017c, 1652 1652 + 0x867aff78, 0x00400000, 1653 1653 + 0xbf850003, 0xb8faf803, 1654 1654 + 0x897a7aff, 0x10000000, 1655 1655 + 0xbf850059, 0xd3d84000, 1656 1656 + 0x18000100, 0xd3d84001, 1657 1657 + 0x18000101, 0xd3d84002, 1658 1658 + 0x18000102, 0xd3d84003, 1659 1659 + 0x18000103, 0xbe840080, 1660 1660 + 0xd2890000, 0x00000900, 1661 1661 + 0x80048104, 0xd2890001, 1662 1662 + 0x00000900, 0x80048104, 1663 1663 + 0xd2890002, 0x00000900, 1664 1664 + 0x80048104, 0xd2890003, 1665 1665 + 0x00000900, 0x80048104, 1666 1666 + 0xc069003a, 0x00000070, 1667 1667 + 0xbf8cc07f, 0x80709070, 1668 1668 + 0xbf06c004, 0xbf84ffee, 1669 1669 + 0xbe840080, 0xd2890000, 1670 1670 + 0x00000901, 0x80048104, 1671 1671 + 0xd2890001, 0x00000901, 1672 1672 + 0x80048104, 0xd2890002, 1673 1673 + 0x00000901, 0x80048104, 1674 1674 + 0xd2890003, 0x00000901, 1675 1675 + 0x80048104, 0xc069003a, 1676 1676 + 0x00000070, 0xbf8cc07f, 1677 1677 + 0x80709070, 0xbf06c004, 1678 1678 + 0xbf84ffee, 0xbe840080, 1679 1679 + 0xd2890000, 0x00000902, 1680 1680 + 0x80048104, 0xd2890001, 1681 1681 + 0x00000902, 0x80048104, 1682 1682 + 0xd2890002, 0x00000902, 1683 1683 + 0x80048104, 0xd2890003, 1684 1684 + 0x00000902, 0x80048104, 1685 1685 + 0xc069003a, 0x00000070, 1686 1686 + 0xbf8cc07f, 0x80709070, 1687 1687 + 0xbf06c004, 0xbf84ffee, 1688 1688 + 0xbe840080, 0xd2890000, 1689 1689 + 0x00000903, 0x80048104, 1690 1690 + 0xd2890001, 0x00000903, 1691 1691 + 0x80048104, 0xd2890002, 1692 1692 + 0x00000903, 0x80048104, 1693 1693 + 0xd2890003, 0x00000903, 1694 1694 + 0x80048104, 0xc069003a, 1695 1695 + 0x00000070, 0xbf8cc07f, 1696 1696 + 0x80709070, 0xbf06c004, 1697 1697 + 0xbf84ffee, 0x807c847c, 1698 1698 + 0xbf0a7b7c, 0xbf85ffa9, 1699 1699 + 0xbf9c0000, 0xbf820016, 1570 1700 0xd3d84000, 0x18000100, 1571 1701 0xd3d84001, 0x18000101, 1572 1702 0xd3d84002, 0x18000102, 1573 1703 0xd3d84003, 0x18000103, 1574 1574 - 0xbe840080, 0xd2890000, 1575 1575 - 0x00000900, 0x80048104, 1576 1576 - 0xd2890001, 0x00000900, 1577 1577 - 0x80048104, 0xd2890002, 1578 1578 - 0x00000900, 0x80048104, 1579 1579 - 0xd2890003, 0x00000900, 1580 1580 - 0x80048104, 0xc069003a, 1581 1581 - 0x00000070, 0xbf8cc07f, 1582 1582 - 0x80709070, 0xbf06c004, 1583 1583 - 0xbf84ffee, 0xbe840080, 1584 1584 - 0xd2890000, 0x00000901, 1585 1585 - 0x80048104, 0xd2890001, 1586 1586 - 0x00000901, 0x80048104, 1587 1587 - 0xd2890002, 0x00000901, 1588 1588 - 0x80048104, 0xd2890003, 1589 1589 - 0x00000901, 0x80048104, 1590 1590 - 0xc069003a, 0x00000070, 1591 1591 - 0xbf8cc07f, 0x80709070, 1592 1592 - 0xbf06c004, 0xbf84ffee, 1593 1593 - 0xbe840080, 0xd2890000, 1594 1594 - 0x00000902, 0x80048104, 1595 1595 - 0xd2890001, 0x00000902, 1596 1596 - 0x80048104, 0xd2890002, 1597 1597 - 0x00000902, 0x80048104, 1598 1598 - 0xd2890003, 0x00000902, 1599 1599 - 0x80048104, 0xc069003a, 1600 1600 - 0x00000070, 0xbf8cc07f, 1601 1601 - 0x80709070, 0xbf06c004, 1602 1602 - 0xbf84ffee, 0xbe840080, 1603 1603 - 0xd2890000, 0x00000903, 1604 1604 - 0x80048104, 0xd2890001, 1605 1605 - 0x00000903, 0x80048104, 1606 1606 - 0xd2890002, 0x00000903, 1607 1607 - 0x80048104, 0xd2890003, 1608 1608 - 0x00000903, 0x80048104, 1609 1609 - 0xc069003a, 0x00000070, 1610 1610 - 0xbf8cc07f, 0x80709070, 1611 1611 - 0xbf06c004, 0xbf84ffee, 1612 1612 - 0x807c847c, 0xbf0a7b7c, 1613 1613 - 0xbf85ffa9, 0xbf9c0000, 1614 1614 - 0xbf820016, 0xd3d84000, 1615 1615 - 0x18000100, 0xd3d84001, 1616 1616 - 0x18000101, 0xd3d84002, 1617 1617 - 0x18000102, 0xd3d84003, 1618 1618 - 0x18000103, 0xe0724000, 1619 1619 - 0x701d0000, 0xe0724100, 1620 1620 - 0x701d0100, 0xe0724200, 1621 1621 - 0x701d0200, 0xe0724300, 1622 1622 - 0x701d0300, 0x807c847c, 1623 1623 - 0x8070ff70, 0x00000400, 1624 1624 - 0xbf0a7b7c, 0xbf85ffeb, 1625 1625 - 0xbf9c0000, 0xbf8200e3, 1626 1626 - 0xbef4007e, 0x8675ff7f, 1627 1627 - 0x0000ffff, 0x8775ff75, 1628 1628 - 0x00040000, 0xbef60080, 1629 1629 - 0xbef700ff, 0x00807fac, 1630 1630 - 0x866eff7f, 0x04000000, 1631 1631 - 0xbf84001f, 0xbefe00c1, 1632 1632 - 0xbeff00c1, 0xb8ef4306, 1633 1633 - 0x866fc16f, 0xbf84001a, 1634 1634 - 0x8e6f866f, 0x8e6f826f, 1635 1635 - 0xbef6006f, 0xb8f82a05, 1636 1636 - 0x80788178, 0x8e788a78, 1637 1637 - 0x8e788178, 0xb8ee1605, 1638 1638 - 0x806e816e, 0x8e6e866e, 1639 1639 - 0x80786e78, 0x8078ff78, 1640 1640 - 0x00000080, 0xbef600ff, 1641 1641 - 0x01000000, 0xbefc0080, 1642 1642 - 0xe0510000, 0x781d0000, 1643 1643 - 0xe0510100, 0x781d0000, 1644 1644 - 0x807cff7c, 0x00000200, 1645 1645 - 0x8078ff78, 0x00000200, 1646 1646 - 0xbf0a6f7c, 0xbf85fff6, 1704 1704 + 0xe0724000, 0x701d0000, 1705 1705 + 0xe0724100, 0x701d0100, 1706 1706 + 0xe0724200, 0x701d0200, 1707 1707 + 0xe0724300, 0x701d0300, 1708 1708 + 0x807c847c, 0x8070ff70, 1709 1709 + 0x00000400, 0xbf0a7b7c, 1710 1710 + 0xbf85ffeb, 0xbf9c0000, 1711 1711 + 0xbf8200e3, 0xbef4007e, 1712 1712 + 0x8675ff7f, 0x0000ffff, 1713 1713 + 0x8775ff75, 0x00040000, 1714 1714 + 0xbef60080, 0xbef700ff, 1715 1715 + 0x00807fac, 0x866eff7f, 1716 1716 + 0x04000000, 0xbf84001f, 1647 1717 0xbefe00c1, 0xbeff00c1, 1718 1718 + 0xb8ef4306, 0x866fc16f, 1719 1719 + 0xbf84001a, 0x8e6f866f, 1720 1720 + 0x8e6f826f, 0xbef6006f, 1721 1721 + 0xb8f82a05, 0x80788178, 1722 1722 + 0x8e788a78, 0x8e788178, 1723 1723 + 0xb8ee1605, 0x806e816e, 1724 1724 + 0x8e6e866e, 0x80786e78, 1725 1725 + 0x8078ff78, 0x00000080, 1648 1726 0xbef600ff, 0x01000000, 1649 1649 - 0xb8ef2a05, 0x806f816f, 1650 1650 - 0x8e6f826f, 0x806fff6f, 1651 1651 - 0x00008000, 0xbef80080, 1652 1652 - 0xbeee0078, 0x8078ff78, 1653 1653 - 0x00000400, 0xbefc0084, 1654 1654 - 0xbf11087c, 0xe0524000, 1655 1655 - 0x781d0000, 0xe0524100, 1656 1656 - 0x781d0100, 0xe0524200, 1657 1657 - 0x781d0200, 0xe0524300, 1658 1658 - 0x781d0300, 0xbf8c0f70, 1659 1659 - 0x7e000300, 0x7e020301, 1660 1660 - 0x7e040302, 0x7e060303, 1661 1661 - 0x807c847c, 0x8078ff78, 1662 1662 - 0x00000400, 0xbf0a6f7c, 1663 1663 - 0xbf85ffee, 0xbefc0080, 1664 1664 - 0xbf11087c, 0xe0524000, 1665 1665 - 0x781d0000, 0xe0524100, 1666 1666 - 0x781d0100, 0xe0524200, 1667 1667 - 0x781d0200, 0xe0524300, 1668 1668 - 0x781d0300, 0xbf8c0f70, 1669 1669 - 0xd3d94000, 0x18000100, 1670 1670 - 0xd3d94001, 0x18000101, 1671 1671 - 0xd3d94002, 0x18000102, 1672 1672 - 0xd3d94003, 0x18000103, 1673 1673 - 0x807c847c, 0x8078ff78, 1674 1674 - 0x00000400, 0xbf0a6f7c, 1675 1675 - 0xbf85ffea, 0xbf9c0000, 1676 1676 - 0xe0524000, 0x6e1d0000, 1677 1677 - 0xe0524100, 0x6e1d0100, 1678 1678 - 0xe0524200, 0x6e1d0200, 1679 1679 - 0xe0524300, 0x6e1d0300, 1680 1680 - 0xbf8c0f70, 0xb8f82a05, 1681 1681 - 0x80788178, 0x8e788a78, 1682 1682 - 0x8e788178, 0xb8ee1605, 1683 1683 - 0x806e816e, 0x8e6e866e, 1684 1684 - 0x80786e78, 0x80f8c078, 1685 1685 - 0xb8ef1605, 0x806f816f, 1686 1686 - 0x8e6f846f, 0x8e76826f, 1687 1687 - 0xbef600ff, 0x01000000, 1688 1688 - 0xbefc006f, 0xc031003a, 1689 1689 - 0x00000078, 0x80f8c078, 1690 1690 - 0xbf8cc07f, 0x80fc907c, 1691 1691 - 0xbf800000, 0xbe802d00, 1692 1692 - 0xbe822d02, 0xbe842d04, 1693 1693 - 0xbe862d06, 0xbe882d08, 1694 1694 - 0xbe8a2d0a, 0xbe8c2d0c, 1695 1695 - 0xbe8e2d0e, 0xbf06807c, 1696 1696 - 0xbf84fff0, 0xb8f82a05, 1697 1697 - 0x80788178, 0x8e788a78, 1698 1698 - 0x8e788178, 0xb8ee1605, 1699 1699 - 0x806e816e, 0x8e6e866e, 1700 1700 - 0x80786e78, 0xbef60084, 1701 1701 - 0xbef600ff, 0x01000000, 1702 1702 - 0xc0211bfa, 0x00000078, 1703 1703 - 0x80788478, 0xc0211b3a, 1727 1727 + 0xbefc0080, 0xe0510000, 1728 1728 + 0x781d0000, 0xe0510100, 1729 1729 + 0x781d0000, 0x807cff7c, 1730 1730 + 0x00000200, 0x8078ff78, 1731 1731 + 0x00000200, 0xbf0a6f7c, 1732 1732 + 0xbf85fff6, 0xbefe00c1, 1733 1733 + 0xbeff00c1, 0xbef600ff, 1734 1734 + 0x01000000, 0xb8ef2a05, 1735 1735 + 0x806f816f, 0x8e6f826f, 1736 1736 + 0x806fff6f, 0x00008000, 1737 1737 + 0xbef80080, 0xbeee0078, 1738 1738 + 0x8078ff78, 0x00000400, 1739 1739 + 0xbefc0084, 0xbf11087c, 1740 1740 + 0xe0524000, 0x781d0000, 1741 1741 + 0xe0524100, 0x781d0100, 1742 1742 + 0xe0524200, 0x781d0200, 1743 1743 + 0xe0524300, 0x781d0300, 1744 1744 + 0xbf8c0f70, 0x7e000300, 1745 1745 + 0x7e020301, 0x7e040302, 1746 1746 + 0x7e060303, 0x807c847c, 1747 1747 + 0x8078ff78, 0x00000400, 1748 1748 + 0xbf0a6f7c, 0xbf85ffee, 1749 1749 + 0xbefc0080, 0xbf11087c, 1750 1750 + 0xe0524000, 0x781d0000, 1751 1751 + 0xe0524100, 0x781d0100, 1752 1752 + 0xe0524200, 0x781d0200, 1753 1753 + 0xe0524300, 0x781d0300, 1754 1754 + 0xbf8c0f70, 0xd3d94000, 1755 1755 + 0x18000100, 0xd3d94001, 1756 1756 + 0x18000101, 0xd3d94002, 1757 1757 + 0x18000102, 0xd3d94003, 1758 1758 + 0x18000103, 0x807c847c, 1759 1759 + 0x8078ff78, 0x00000400, 1760 1760 + 0xbf0a6f7c, 0xbf85ffea, 1761 1761 + 0xbf9c0000, 0xe0524000, 1762 1762 + 0x6e1d0000, 0xe0524100, 1763 1763 + 0x6e1d0100, 0xe0524200, 1764 1764 + 0x6e1d0200, 0xe0524300, 1765 1765 + 0x6e1d0300, 0xbf8c0f70, 1766 1766 + 0xb8f82a05, 0x80788178, 1767 1767 + 0x8e788a78, 0x8e788178, 1768 1768 + 0xb8ee1605, 0x806e816e, 1769 1769 + 0x8e6e866e, 0x80786e78, 1770 1770 + 0x80f8c078, 0xb8ef1605, 1771 1771 + 0x806f816f, 0x8e6f846f, 1772 1772 + 0x8e76826f, 0xbef600ff, 1773 1773 + 0x01000000, 0xbefc006f, 1774 1774 + 0xc031003a, 0x00000078, 1775 1775 + 0x80f8c078, 0xbf8cc07f, 1776 1776 + 0x80fc907c, 0xbf800000, 1777 1777 + 0xbe802d00, 0xbe822d02, 1778 1778 + 0xbe842d04, 0xbe862d06, 1779 1779 + 0xbe882d08, 0xbe8a2d0a, 1780 1780 + 0xbe8c2d0c, 0xbe8e2d0e, 1781 1781 + 0xbf06807c, 0xbf84fff0, 1782 1782 + 0xb8f82a05, 0x80788178, 1783 1783 + 0x8e788a78, 0x8e788178, 1784 1784 + 0xb8ee1605, 0x806e816e, 1785 1785 + 0x8e6e866e, 0x80786e78, 1786 1786 + 0xbef60084, 0xbef600ff, 1787 1787 + 0x01000000, 0xc0211bfa, 1704 1788 0x00000078, 0x80788478, 1705 1705 - 0xc0211b7a, 0x00000078, 1706 1706 - 0x80788478, 0xc0211c3a, 1789 1789 + 0xc0211b3a, 0x00000078, 1790 1790 + 0x80788478, 0xc0211b7a, 1707 1791 0x00000078, 0x80788478, 1708 1708 - 0xc0211c7a, 0x00000078, 1709 1709 - 0x80788478, 0xc0211eba, 1792 1792 + 0xc0211c3a, 0x00000078, 1793 1793 + 0x80788478, 0xc0211c7a, 1710 1794 0x00000078, 0x80788478, 1711 1711 - 0xc0211efa, 0x00000078, 1712 1712 - 0x80788478, 0xc0211a3a, 1795 1795 + 0xc0211eba, 0x00000078, 1796 1796 + 0x80788478, 0xc0211efa, 1713 1797 0x00000078, 0x80788478, 1714 1714 - 0xc0211a7a, 0x00000078, 1715 1715 - 0x80788478, 0xc0211cfa, 1798 1798 + 0xc0211a3a, 0x00000078, 1799 1799 + 0x80788478, 0xc0211a7a, 1716 1800 0x00000078, 0x80788478, 1717 1717 - 0xbf8cc07f, 0xbefc006f, 1718 1718 - 0xbefe0070, 0xbeff0071, 1719 1719 - 0x866f7bff, 0x000003ff, 1720 1720 - 0xb96f4803, 0x866f7bff, 1721 1721 - 0xfffff800, 0x8f6f8b6f, 1722 1722 - 0xb96fa2c3, 0xb973f801, 1723 1723 - 0xb8ee2a05, 0x806e816e, 1724 1724 - 0x8e6e8a6e, 0x8e6e816e, 1725 1725 - 0xb8ef1605, 0x806f816f, 1726 1726 - 0x8e6f866f, 0x806e6f6e, 1727 1727 - 0x806e746e, 0x826f8075, 1728 1728 - 0x866fff6f, 0x0000ffff, 1729 1729 - 0xc00b1c37, 0x00000050, 1730 1730 - 0xc00b1d37, 0x00000060, 1731 1731 - 0xc0031e77, 0x00000074, 1732 1732 - 0xbf8cc07f, 0x8f6e8b77, 1733 1733 - 0x866eff6e, 0x001f8000, 1734 1734 - 0xb96ef807, 0x866dff6d, 1735 1735 - 0x0000ffff, 0x86fe7e7e, 1736 1736 - 0x86ea6a6a, 0x8f6e837a, 1737 1737 - 0xb96ee0c2, 0xbf800002, 1738 1738 - 0xb97a0002, 0xbf8a0000, 1739 1739 - 0xbe801f6c, 0xbf9b0000, 1801 1801 + 0xc0211cfa, 0x00000078, 1802 1802 + 0x80788478, 0xbf8cc07f, 1803 1803 + 0xbefc006f, 0xbefe0070, 1804 1804 + 0xbeff0071, 0x866f7bff, 1805 1805 + 0x000003ff, 0xb96f4803, 1806 1806 + 0x866f7bff, 0xfffff800, 1807 1807 + 0x8f6f8b6f, 0xb96fa2c3, 1808 1808 + 0xb973f801, 0xb8ee2a05, 1809 1809 + 0x806e816e, 0x8e6e8a6e, 1810 1810 + 0x8e6e816e, 0xb8ef1605, 1811 1811 + 0x806f816f, 0x8e6f866f, 1812 1812 + 0x806e6f6e, 0x806e746e, 1813 1813 + 0x826f8075, 0x866fff6f, 1814 1814 + 0x0000ffff, 0xc00b1c37, 1815 1815 + 0x00000050, 0xc00b1d37, 1816 1816 + 0x00000060, 0xc0031e77, 1817 1817 + 0x00000074, 0xbf8cc07f, 1818 1818 + 0x8f6e8b77, 0x866eff6e, 1819 1819 + 0x001f8000, 0xb96ef807, 1820 1820 + 0x866dff6d, 0x0000ffff, 1821 1821 + 0x86fe7e7e, 0x86ea6a6a, 1822 1822 + 0x8f6e837a, 0xb96ee0c2, 1823 1823 + 0xbf800002, 0xb97a0002, 1824 1824 + 0xbf8a0000, 0xbe801f6c, 1825 1825 + 0xbf9b0000, 0x00000000, 1740 1826 }; 1741 1827 1742 1828 static const uint32_t cwsr_trap_aldebaran_hex[] = { 1743 1743 - 0xbf820001, 0xbf8202df, 1829 1829 + 0xbf820001, 0xbf8202e0, 1744 1830 0xb8f8f802, 0x8978ff78, 1745 1831 0x00020006, 0xb8fbf803, 1746 1832 0x866eff78, 0x00002000, ··· 1901 1899 0xbefe007c, 0xbefc0070, 1902 1900 0xc0611c7a, 0x0000007c, 1903 1901 0xbf8cc07f, 0x80708470, 1904 1904 - 0xbefc007e, 0x867aff7f, 1905 1905 - 0x04000000, 0xbeef0080, 1906 1906 - 0x876f6f7a, 0xb8f02985, 1907 1907 - 0x80708170, 0x8e708a70, 1908 1908 - 0x8e708170, 0xb8fb1605, 1909 1909 - 0x807b817b, 0x8e7b847b, 1910 1910 - 0x8e76827b, 0xbef600ff, 1911 1911 - 0x01000000, 0xbef20174, 1912 1912 - 0x80747074, 0x82758075, 1913 1913 - 0xbefc0080, 0xbf800000, 1914 1914 - 0xbe802b00, 0xbe822b02, 1915 1915 - 0xbe842b04, 0xbe862b06, 1916 1916 - 0xbe882b08, 0xbe8a2b0a, 1917 1917 - 0xbe8c2b0c, 0xbe8e2b0e, 1918 1918 - 0xc06b003a, 0x00000000, 1919 1919 - 0xbf8cc07f, 0xc06b013a, 1920 1920 - 0x00000010, 0xbf8cc07f, 1921 1921 - 0xc06b023a, 0x00000020, 1922 1922 - 0xbf8cc07f, 0xc06b033a, 1923 1923 - 0x00000030, 0xbf8cc07f, 1924 1924 - 0x8074c074, 0x82758075, 1925 1925 - 0x807c907c, 0xbf0a7b7c, 1926 1926 - 0xbf85ffe7, 0xbef40172, 1927 1927 - 0xbef00080, 0xbefe00c1, 1928 1928 - 0xbeff00c1, 0xbee80080, 1929 1929 - 0xbee90080, 0xbef600ff, 1930 1930 - 0x01000000, 0x867aff78, 1902 1902 + 0xbefc007e, 0xbf108080, 1903 1903 + 0x867aff7f, 0x04000000, 1904 1904 + 0xbeef0080, 0x876f6f7a, 1905 1905 + 0xb8f02985, 0x80708170, 1906 1906 + 0x8e708a70, 0x8e708170, 1907 1907 + 0xb8fb1605, 0x807b817b, 1908 1908 + 0x8e7b847b, 0x8e76827b, 1909 1909 + 0xbef600ff, 0x01000000, 1910 1910 + 0xbef20174, 0x80747074, 1911 1911 + 0x82758075, 0xbefc0080, 1912 1912 + 0xbf800000, 0xbe802b00, 1913 1913 + 0xbe822b02, 0xbe842b04, 1914 1914 + 0xbe862b06, 0xbe882b08, 1915 1915 + 0xbe8a2b0a, 0xbe8c2b0c, 1916 1916 + 0xbe8e2b0e, 0xc06b003a, 1917 1917 + 0x00000000, 0xbf8cc07f, 1918 1918 + 0xc06b013a, 0x00000010, 1919 1919 + 0xbf8cc07f, 0xc06b023a, 1920 1920 + 0x00000020, 0xbf8cc07f, 1921 1921 + 0xc06b033a, 0x00000030, 1922 1922 + 0xbf8cc07f, 0x8074c074, 1923 1923 + 0x82758075, 0x807c907c, 1924 1924 + 0xbf0a7b7c, 0xbf85ffe7, 1925 1925 + 0xbef40172, 0xbef00080, 1926 1926 + 0xbefe00c1, 0xbeff00c1, 1927 1927 + 0xbee80080, 0xbee90080, 1928 1928 + 0xbef600ff, 0x01000000, 1929 1929 + 0x867aff78, 0x00400000, 1930 1930 + 0xbf850003, 0xb8faf803, 1931 1931 + 0x897a7aff, 0x10000000, 1932 1932 + 0xbf85004d, 0xbe840080, 1933 1933 + 0xd2890000, 0x00000900, 1934 1934 + 0x80048104, 0xd2890001, 1935 1935 + 0x00000900, 0x80048104, 1936 1936 + 0xd2890002, 0x00000900, 1937 1937 + 0x80048104, 0xd2890003, 1938 1938 + 0x00000900, 0x80048104, 1939 1939 + 0xc069003a, 0x00000070, 1940 1940 + 0xbf8cc07f, 0x80709070, 1941 1941 + 0xbf06c004, 0xbf84ffee, 1942 1942 + 0xbe840080, 0xd2890000, 1943 1943 + 0x00000901, 0x80048104, 1944 1944 + 0xd2890001, 0x00000901, 1945 1945 + 0x80048104, 0xd2890002, 1946 1946 + 0x00000901, 0x80048104, 1947 1947 + 0xd2890003, 0x00000901, 1948 1948 + 0x80048104, 0xc069003a, 1949 1949 + 0x00000070, 0xbf8cc07f, 1950 1950 + 0x80709070, 0xbf06c004, 1951 1951 + 0xbf84ffee, 0xbe840080, 1952 1952 + 0xd2890000, 0x00000902, 1953 1953 + 0x80048104, 0xd2890001, 1954 1954 + 0x00000902, 0x80048104, 1955 1955 + 0xd2890002, 0x00000902, 1956 1956 + 0x80048104, 0xd2890003, 1957 1957 + 0x00000902, 0x80048104, 1958 1958 + 0xc069003a, 0x00000070, 1959 1959 + 0xbf8cc07f, 0x80709070, 1960 1960 + 0xbf06c004, 0xbf84ffee, 1961 1961 + 0xbe840080, 0xd2890000, 1962 1962 + 0x00000903, 0x80048104, 1963 1963 + 0xd2890001, 0x00000903, 1964 1964 + 0x80048104, 0xd2890002, 1965 1965 + 0x00000903, 0x80048104, 1966 1966 + 0xd2890003, 0x00000903, 1967 1967 + 0x80048104, 0xc069003a, 1968 1968 + 0x00000070, 0xbf8cc07f, 1969 1969 + 0x80709070, 0xbf06c004, 1970 1970 + 0xbf84ffee, 0xbf820008, 1971 1971 + 0xe0724000, 0x701d0000, 1972 1972 + 0xe0724100, 0x701d0100, 1973 1973 + 0xe0724200, 0x701d0200, 1974 1974 + 0xe0724300, 0x701d0300, 1975 1975 + 0xbefe00c1, 0xbeff00c1, 1976 1976 + 0xb8fb4306, 0x867bc17b, 1977 1977 + 0xbf840064, 0xbf8a0000, 1978 1978 + 0x867aff6f, 0x04000000, 1979 1979 + 0xbf840060, 0x8e7b867b, 1980 1980 + 0x8e7b827b, 0xbef6007b, 1981 1981 + 0xb8f02985, 0x80708170, 1982 1982 + 0x8e708a70, 0x8e708170, 1983 1983 + 0xb8fa1605, 0x807a817a, 1984 1984 + 0x8e7a867a, 0x80707a70, 1985 1985 + 0x8070ff70, 0x00000080, 1986 1986 + 0xbef600ff, 0x01000000, 1987 1987 + 0xbefc0080, 0xd28c0002, 1988 1988 + 0x000100c1, 0xd28d0003, 1989 1989 + 0x000204c1, 0x867aff78, 1931 1990 0x00400000, 0xbf850003, 1932 1991 0xb8faf803, 0x897a7aff, 1933 1933 - 0x10000000, 0xbf85004d, 1992 1992 + 0x10000000, 0xbf850030, 1993 1993 + 0x24040682, 0xd86e4000, 1994 1994 + 0x00000002, 0xbf8cc07f, 1934 1995 0xbe840080, 0xd2890000, 1935 1996 0x00000900, 0x80048104, 1936 1997 0xd2890001, 0x00000900, ··· 2013 1948 0xc069003a, 0x00000070, 2014 1949 0xbf8cc07f, 0x80709070, 2015 1950 0xbf06c004, 0xbf84ffee, 2016 2016 - 0xbe840080, 0xd2890000, 2017 2017 - 0x00000902, 0x80048104, 2018 2018 - 0xd2890001, 0x00000902, 2019 2019 - 0x80048104, 0xd2890002, 2020 2020 - 0x00000902, 0x80048104, 2021 2021 - 0xd2890003, 0x00000902, 2022 2022 - 0x80048104, 0xc069003a, 2023 2023 - 0x00000070, 0xbf8cc07f, 2024 2024 - 0x80709070, 0xbf06c004, 2025 2025 - 0xbf84ffee, 0xbe840080, 2026 2026 - 0xd2890000, 0x00000903, 2027 2027 - 0x80048104, 0xd2890001, 2028 2028 - 0x00000903, 0x80048104, 2029 2029 - 0xd2890002, 0x00000903, 2030 2030 - 0x80048104, 0xd2890003, 2031 2031 - 0x00000903, 0x80048104, 2032 2032 - 0xc069003a, 0x00000070, 2033 2033 - 0xbf8cc07f, 0x80709070, 2034 2034 - 0xbf06c004, 0xbf84ffee, 2035 2035 - 0xbf820008, 0xe0724000, 2036 2036 - 0x701d0000, 0xe0724100, 2037 2037 - 0x701d0100, 0xe0724200, 2038 2038 - 0x701d0200, 0xe0724300, 2039 2039 - 0x701d0300, 0xbefe00c1, 2040 2040 - 0xbeff00c1, 0xb8fb4306, 2041 2041 - 0x867bc17b, 0xbf840064, 2042 2042 - 0xbf8a0000, 0x867aff6f, 2043 2043 - 0x04000000, 0xbf840060, 2044 2044 - 0x8e7b867b, 0x8e7b827b, 2045 2045 - 0xbef6007b, 0xb8f02985, 2046 2046 - 0x80708170, 0x8e708a70, 2047 2047 - 0x8e708170, 0xb8fa1605, 2048 2048 - 0x807a817a, 0x8e7a867a, 2049 2049 - 0x80707a70, 0x8070ff70, 2050 2050 - 0x00000080, 0xbef600ff, 2051 2051 - 0x01000000, 0xbefc0080, 2052 2052 - 0xd28c0002, 0x000100c1, 2053 2053 - 0xd28d0003, 0x000204c1, 1951 1951 + 0x680404ff, 0x00000200, 1952 1952 + 0xd0c9006a, 0x0000f702, 1953 1953 + 0xbf87ffd2, 0xbf820015, 1954 1954 + 0xd1060002, 0x00011103, 1955 1955 + 0x7e0602ff, 0x00000200, 1956 1956 + 0xbefc00ff, 0x00010000, 1957 1957 + 0xbe800077, 0x8677ff77, 1958 1958 + 0xff7fffff, 0x8777ff77, 1959 1959 + 0x00058000, 0xd8ec0000, 1960 1960 + 0x00000002, 0xbf8cc07f, 1961 1961 + 0xe0765000, 0x701d0002, 1962 1962 + 0x68040702, 0xd0c9006a, 1963 1963 + 0x0000f702, 0xbf87fff7, 1964 1964 + 0xbef70000, 0xbef000ff, 1965 1965 + 0x00000400, 0xbefe00c1, 1966 1966 + 0xbeff00c1, 0xb8fb2b05, 1967 1967 + 0x807b817b, 0x8e7b827b, 1968 1968 + 0xbef600ff, 0x01000000, 1969 1969 + 0xbefc0084, 0xbf0a7b7c, 1970 1970 + 0xbf84006d, 0xbf11017c, 1971 1971 + 0x807bff7b, 0x00001000, 2054 1972 0x867aff78, 0x00400000, 2055 1973 0xbf850003, 0xb8faf803, 2056 1974 0x897a7aff, 0x10000000, 2057 2057 - 0xbf850030, 0x24040682, 2058 2058 - 0xd86e4000, 0x00000002, 2059 2059 - 0xbf8cc07f, 0xbe840080, 1975 1975 + 0xbf850051, 0xbe840080, 2060 1976 0xd2890000, 0x00000900, 2061 1977 0x80048104, 0xd2890001, 2062 1978 0x00000900, 0x80048104, ··· 2056 2010 0x80048104, 0xc069003a, 2057 2011 0x00000070, 0xbf8cc07f, 2058 2012 0x80709070, 0xbf06c004, 2059 2059 - 0xbf84ffee, 0x680404ff, 2060 2060 - 0x00000200, 0xd0c9006a, 2061 2061 - 0x0000f702, 0xbf87ffd2, 2062 2062 - 0xbf820015, 0xd1060002, 2063 2063 - 0x00011103, 0x7e0602ff, 2064 2064 - 0x00000200, 0xbefc00ff, 2065 2065 - 0x00010000, 0xbe800077, 2066 2066 - 0x8677ff77, 0xff7fffff, 2067 2067 - 0x8777ff77, 0x00058000, 2068 2068 - 0xd8ec0000, 0x00000002, 2069 2069 - 0xbf8cc07f, 0xe0765000, 2070 2070 - 0x701d0002, 0x68040702, 2071 2071 - 0xd0c9006a, 0x0000f702, 2072 2072 - 0xbf87fff7, 0xbef70000, 2073 2073 - 0xbef000ff, 0x00000400, 2074 2074 - 0xbefe00c1, 0xbeff00c1, 2075 2075 - 0xb8fb2b05, 0x807b817b, 2076 2076 - 0x8e7b827b, 0xbef600ff, 2077 2077 - 0x01000000, 0xbefc0084, 2078 2078 - 0xbf0a7b7c, 0xbf84006d, 2079 2079 - 0xbf11017c, 0x807bff7b, 2080 2080 - 0x00001000, 0x867aff78, 2013 2013 + 0xbf84ffee, 0xbe840080, 2014 2014 + 0xd2890000, 0x00000902, 2015 2015 + 0x80048104, 0xd2890001, 2016 2016 + 0x00000902, 0x80048104, 2017 2017 + 0xd2890002, 0x00000902, 2018 2018 + 0x80048104, 0xd2890003, 2019 2019 + 0x00000902, 0x80048104, 2020 2020 + 0xc069003a, 0x00000070, 2021 2021 + 0xbf8cc07f, 0x80709070, 2022 2022 + 0xbf06c004, 0xbf84ffee, 2023 2023 + 0xbe840080, 0xd2890000, 2024 2024 + 0x00000903, 0x80048104, 2025 2025 + 0xd2890001, 0x00000903, 2026 2026 + 0x80048104, 0xd2890002, 2027 2027 + 0x00000903, 0x80048104, 2028 2028 + 0xd2890003, 0x00000903, 2029 2029 + 0x80048104, 0xc069003a, 2030 2030 + 0x00000070, 0xbf8cc07f, 2031 2031 + 0x80709070, 0xbf06c004, 2032 2032 + 0xbf84ffee, 0x807c847c, 2033 2033 + 0xbf0a7b7c, 0xbf85ffb1, 2034 2034 + 0xbf9c0000, 0xbf820012, 2035 2035 + 0x7e000300, 0x7e020301, 2036 2036 + 0x7e040302, 0x7e060303, 2037 2037 + 0xe0724000, 0x701d0000, 2038 2038 + 0xe0724100, 0x701d0100, 2039 2039 + 0xe0724200, 0x701d0200, 2040 2040 + 0xe0724300, 0x701d0300, 2041 2041 + 0x807c847c, 0x8070ff70, 2042 2042 + 0x00000400, 0xbf0a7b7c, 2043 2043 + 0xbf85ffef, 0xbf9c0000, 2044 2044 + 0xb8fb2985, 0x807b817b, 2045 2045 + 0x8e7b837b, 0xb8fa2b05, 2046 2046 + 0x807a817a, 0x8e7a827a, 2047 2047 + 0x80fb7a7b, 0x867b7b7b, 2048 2048 + 0xbf84007a, 0x807bff7b, 2049 2049 + 0x00001000, 0xbefc0080, 2050 2050 + 0xbf11017c, 0x867aff78, 2081 2051 0x00400000, 0xbf850003, 2082 2052 0xb8faf803, 0x897a7aff, 2083 2083 - 0x10000000, 0xbf850051, 2053 2053 + 0x10000000, 0xbf850059, 2054 2054 + 0xd3d84000, 0x18000100, 2055 2055 + 0xd3d84001, 0x18000101, 2056 2056 + 0xd3d84002, 0x18000102, 2057 2057 + 0xd3d84003, 0x18000103, 2084 2058 0xbe840080, 0xd2890000, 2085 2059 0x00000900, 0x80048104, 2086 2060 0xd2890001, 0x00000900, ··· 2140 2074 0xbf8cc07f, 0x80709070, 2141 2075 0xbf06c004, 0xbf84ffee, 2142 2076 0x807c847c, 0xbf0a7b7c, 2143 2143 - 0xbf85ffb1, 0xbf9c0000, 2144 2144 - 0xbf820012, 0x7e000300, 2145 2145 - 0x7e020301, 0x7e040302, 2146 2146 - 0x7e060303, 0xe0724000, 2077 2077 + 0xbf85ffa9, 0xbf9c0000, 2078 2078 + 0xbf820016, 0xd3d84000, 2079 2079 + 0x18000100, 0xd3d84001, 2080 2080 + 0x18000101, 0xd3d84002, 2081 2081 + 0x18000102, 0xd3d84003, 2082 2082 + 0x18000103, 0xe0724000, 2147 2083 0x701d0000, 0xe0724100, 2148 2084 0x701d0100, 0xe0724200, 2149 2085 0x701d0200, 0xe0724300, 2150 2086 0x701d0300, 0x807c847c, 2151 2087 0x8070ff70, 0x00000400, 2152 2152 - 0xbf0a7b7c, 0xbf85ffef, 2153 2153 - 0xbf9c0000, 0xb8fb2985, 2154 2154 - 0x807b817b, 0x8e7b837b, 2155 2155 - 0xb8fa2b05, 0x807a817a, 2156 2156 - 0x8e7a827a, 0x80fb7a7b, 2157 2157 - 0x867b7b7b, 0xbf84007a, 2158 2158 - 0x807bff7b, 0x00001000, 2159 2159 - 0xbefc0080, 0xbf11017c, 2160 2160 - 0x867aff78, 0x00400000, 2161 2161 - 0xbf850003, 0xb8faf803, 2162 2162 - 0x897a7aff, 0x10000000, 2163 2163 - 0xbf850059, 0xd3d84000, 2164 2164 - 0x18000100, 0xd3d84001, 2165 2165 - 0x18000101, 0xd3d84002, 2166 2166 - 0x18000102, 0xd3d84003, 2167 2167 - 0x18000103, 0xbe840080, 2168 2168 - 0xd2890000, 0x00000900, 2169 2169 - 0x80048104, 0xd2890001, 2170 2170 - 0x00000900, 0x80048104, 2171 2171 - 0xd2890002, 0x00000900, 2172 2172 - 0x80048104, 0xd2890003, 2173 2173 - 0x00000900, 0x80048104, 2174 2174 - 0xc069003a, 0x00000070, 2175 2175 - 0xbf8cc07f, 0x80709070, 2176 2176 - 0xbf06c004, 0xbf84ffee, 2177 2177 - 0xbe840080, 0xd2890000, 2178 2178 - 0x00000901, 0x80048104, 2179 2179 - 0xd2890001, 0x00000901, 2180 2180 - 0x80048104, 0xd2890002, 2181 2181 - 0x00000901, 0x80048104, 2182 2182 - 0xd2890003, 0x00000901, 2183 2183 - 0x80048104, 0xc069003a, 2184 2184 - 0x00000070, 0xbf8cc07f, 2185 2185 - 0x80709070, 0xbf06c004, 2186 2186 - 0xbf84ffee, 0xbe840080, 2187 2187 - 0xd2890000, 0x00000902, 2188 2188 - 0x80048104, 0xd2890001, 2189 2189 - 0x00000902, 0x80048104, 2190 2190 - 0xd2890002, 0x00000902, 2191 2191 - 0x80048104, 0xd2890003, 2192 2192 - 0x00000902, 0x80048104, 2193 2193 - 0xc069003a, 0x00000070, 2194 2194 - 0xbf8cc07f, 0x80709070, 2195 2195 - 0xbf06c004, 0xbf84ffee, 2196 2196 - 0xbe840080, 0xd2890000, 2197 2197 - 0x00000903, 0x80048104, 2198 2198 - 0xd2890001, 0x00000903, 2199 2199 - 0x80048104, 0xd2890002, 2200 2200 - 0x00000903, 0x80048104, 2201 2201 - 0xd2890003, 0x00000903, 2202 2202 - 0x80048104, 0xc069003a, 2203 2203 - 0x00000070, 0xbf8cc07f, 2204 2204 - 0x80709070, 0xbf06c004, 2205 2205 - 0xbf84ffee, 0x807c847c, 2206 2206 - 0xbf0a7b7c, 0xbf85ffa9, 2207 2207 - 0xbf9c0000, 0xbf820016, 2208 2208 - 0xd3d84000, 0x18000100, 2209 2209 - 0xd3d84001, 0x18000101, 2210 2210 - 0xd3d84002, 0x18000102, 2211 2211 - 0xd3d84003, 0x18000103, 2212 2212 - 0xe0724000, 0x701d0000, 2213 2213 - 0xe0724100, 0x701d0100, 2214 2214 - 0xe0724200, 0x701d0200, 2215 2215 - 0xe0724300, 0x701d0300, 2216 2216 - 0x807c847c, 0x8070ff70, 2217 2217 - 0x00000400, 0xbf0a7b7c, 2218 2218 - 0xbf85ffeb, 0xbf9c0000, 2219 2219 - 0xbf8200ee, 0xbef4007e, 2220 2220 - 0x8675ff7f, 0x0000ffff, 2221 2221 - 0x8775ff75, 0x00040000, 2222 2222 - 0xbef60080, 0xbef700ff, 2223 2223 - 0x00807fac, 0x866eff7f, 2224 2224 - 0x04000000, 0xbf84001f, 2088 2088 + 0xbf0a7b7c, 0xbf85ffeb, 2089 2089 + 0xbf9c0000, 0xbf8200ee, 2090 2090 + 0xbef4007e, 0x8675ff7f, 2091 2091 + 0x0000ffff, 0x8775ff75, 2092 2092 + 0x00040000, 0xbef60080, 2093 2093 + 0xbef700ff, 0x00807fac, 2094 2094 + 0x866eff7f, 0x04000000, 2095 2095 + 0xbf84001f, 0xbefe00c1, 2096 2096 + 0xbeff00c1, 0xb8ef4306, 2097 2097 + 0x866fc16f, 0xbf84001a, 2098 2098 + 0x8e6f866f, 0x8e6f826f, 2099 2099 + 0xbef6006f, 0xb8f82985, 2100 2100 + 0x80788178, 0x8e788a78, 2101 2101 + 0x8e788178, 0xb8ee1605, 2102 2102 + 0x806e816e, 0x8e6e866e, 2103 2103 + 0x80786e78, 0x8078ff78, 2104 2104 + 0x00000080, 0xbef600ff, 2105 2105 + 0x01000000, 0xbefc0080, 2106 2106 + 0xe0510000, 0x781d0000, 2107 2107 + 0xe0510100, 0x781d0000, 2108 2108 + 0x807cff7c, 0x00000200, 2109 2109 + 0x8078ff78, 0x00000200, 2110 2110 + 0xbf0a6f7c, 0xbf85fff6, 2225 2111 0xbefe00c1, 0xbeff00c1, 2226 2226 - 0xb8ef4306, 0x866fc16f, 2227 2227 - 0xbf84001a, 0x8e6f866f, 2228 2228 - 0x8e6f826f, 0xbef6006f, 2229 2229 - 0xb8f82985, 0x80788178, 2230 2230 - 0x8e788a78, 0x8e788178, 2231 2231 - 0xb8ee1605, 0x806e816e, 2232 2232 - 0x8e6e866e, 0x80786e78, 2233 2233 - 0x8078ff78, 0x00000080, 2234 2112 0xbef600ff, 0x01000000, 2235 2235 - 0xbefc0080, 0xe0510000, 2236 2236 - 0x781d0000, 0xe0510100, 2237 2237 - 0x781d0000, 0x807cff7c, 2238 2238 - 0x00000200, 0x8078ff78, 2239 2239 - 0x00000200, 0xbf0a6f7c, 2240 2240 - 0xbf85fff6, 0xbefe00c1, 2241 2241 - 0xbeff00c1, 0xbef600ff, 2242 2242 - 0x01000000, 0xb8ef2b05, 2243 2243 - 0x806f816f, 0x8e6f826f, 2244 2244 - 0x806fff6f, 0x00008000, 2245 2245 - 0xbef80080, 0xbeee0078, 2246 2246 - 0x8078ff78, 0x00000400, 2247 2247 - 0xbefc0084, 0xbf11087c, 2248 2248 - 0xe0524000, 0x781d0000, 2249 2249 - 0xe0524100, 0x781d0100, 2250 2250 - 0xe0524200, 0x781d0200, 2251 2251 - 0xe0524300, 0x781d0300, 2252 2252 - 0xbf8c0f70, 0x7e000300, 2253 2253 - 0x7e020301, 0x7e040302, 2254 2254 - 0x7e060303, 0x807c847c, 2255 2255 - 0x8078ff78, 0x00000400, 2256 2256 - 0xbf0a6f7c, 0xbf85ffee, 2257 2257 - 0xb8ef2985, 0x806f816f, 2258 2258 - 0x8e6f836f, 0xb8f92b05, 2259 2259 - 0x80798179, 0x8e798279, 2260 2260 - 0x80ef796f, 0x866f6f6f, 2261 2261 - 0xbf84001a, 0x806fff6f, 2262 2262 - 0x00008000, 0xbefc0080, 2113 2113 + 0xb8ef2b05, 0x806f816f, 2114 2114 + 0x8e6f826f, 0x806fff6f, 2115 2115 + 0x00008000, 0xbef80080, 2116 2116 + 0xbeee0078, 0x8078ff78, 2117 2117 + 0x00000400, 0xbefc0084, 2263 2118 0xbf11087c, 0xe0524000, 2264 2119 0x781d0000, 0xe0524100, 2265 2120 0x781d0100, 0xe0524200, 2266 2121 0x781d0200, 0xe0524300, 2267 2122 0x781d0300, 0xbf8c0f70, 2268 2268 - 0xd3d94000, 0x18000100, 2269 2269 - 0xd3d94001, 0x18000101, 2270 2270 - 0xd3d94002, 0x18000102, 2271 2271 - 0xd3d94003, 0x18000103, 2123 2123 + 0x7e000300, 0x7e020301, 2124 2124 + 0x7e040302, 0x7e060303, 2272 2125 0x807c847c, 0x8078ff78, 2273 2126 0x00000400, 0xbf0a6f7c, 2274 2274 - 0xbf85ffea, 0xbf9c0000, 2275 2275 - 0xe0524000, 0x6e1d0000, 2276 2276 - 0xe0524100, 0x6e1d0100, 2277 2277 - 0xe0524200, 0x6e1d0200, 2278 2278 - 0xe0524300, 0x6e1d0300, 2279 2279 - 0xbf8c0f70, 0xb8f82985, 2280 2280 - 0x80788178, 0x8e788a78, 2281 2281 - 0x8e788178, 0xb8ee1605, 2282 2282 - 0x806e816e, 0x8e6e866e, 2283 2283 - 0x80786e78, 0x80f8c078, 2284 2284 - 0xb8ef1605, 0x806f816f, 2285 2285 - 0x8e6f846f, 0x8e76826f, 2286 2286 - 0xbef600ff, 0x01000000, 2287 2287 - 0xbefc006f, 0xc031003a, 2288 2288 - 0x00000078, 0x80f8c078, 2289 2289 - 0xbf8cc07f, 0x80fc907c, 2290 2290 - 0xbf800000, 0xbe802d00, 2291 2291 - 0xbe822d02, 0xbe842d04, 2292 2292 - 0xbe862d06, 0xbe882d08, 2293 2293 - 0xbe8a2d0a, 0xbe8c2d0c, 2294 2294 - 0xbe8e2d0e, 0xbf06807c, 2295 2295 - 0xbf84fff0, 0xb8f82985, 2296 2296 - 0x80788178, 0x8e788a78, 2297 2297 - 0x8e788178, 0xb8ee1605, 2298 2298 - 0x806e816e, 0x8e6e866e, 2299 2299 - 0x80786e78, 0xbef60084, 2300 2300 - 0xbef600ff, 0x01000000, 2301 2301 - 0xc0211bfa, 0x00000078, 2302 2302 - 0x80788478, 0xc0211b3a, 2127 2127 + 0xbf85ffee, 0xb8ef2985, 2128 2128 + 0x806f816f, 0x8e6f836f, 2129 2129 + 0xb8f92b05, 0x80798179, 2130 2130 + 0x8e798279, 0x80ef796f, 2131 2131 + 0x866f6f6f, 0xbf84001a, 2132 2132 + 0x806fff6f, 0x00008000, 2133 2133 + 0xbefc0080, 0xbf11087c, 2134 2134 + 0xe0524000, 0x781d0000, 2135 2135 + 0xe0524100, 0x781d0100, 2136 2136 + 0xe0524200, 0x781d0200, 2137 2137 + 0xe0524300, 0x781d0300, 2138 2138 + 0xbf8c0f70, 0xd3d94000, 2139 2139 + 0x18000100, 0xd3d94001, 2140 2140 + 0x18000101, 0xd3d94002, 2141 2141 + 0x18000102, 0xd3d94003, 2142 2142 + 0x18000103, 0x807c847c, 2143 2143 + 0x8078ff78, 0x00000400, 2144 2144 + 0xbf0a6f7c, 0xbf85ffea, 2145 2145 + 0xbf9c0000, 0xe0524000, 2146 2146 + 0x6e1d0000, 0xe0524100, 2147 2147 + 0x6e1d0100, 0xe0524200, 2148 2148 + 0x6e1d0200, 0xe0524300, 2149 2149 + 0x6e1d0300, 0xbf8c0f70, 2150 2150 + 0xb8f82985, 0x80788178, 2151 2151 + 0x8e788a78, 0x8e788178, 2152 2152 + 0xb8ee1605, 0x806e816e, 2153 2153 + 0x8e6e866e, 0x80786e78, 2154 2154 + 0x80f8c078, 0xb8ef1605, 2155 2155 + 0x806f816f, 0x8e6f846f, 2156 2156 + 0x8e76826f, 0xbef600ff, 2157 2157 + 0x01000000, 0xbefc006f, 2158 2158 + 0xc031003a, 0x00000078, 2159 2159 + 0x80f8c078, 0xbf8cc07f, 2160 2160 + 0x80fc907c, 0xbf800000, 2161 2161 + 0xbe802d00, 0xbe822d02, 2162 2162 + 0xbe842d04, 0xbe862d06, 2163 2163 + 0xbe882d08, 0xbe8a2d0a, 2164 2164 + 0xbe8c2d0c, 0xbe8e2d0e, 2165 2165 + 0xbf06807c, 0xbf84fff0, 2166 2166 + 0xb8f82985, 0x80788178, 2167 2167 + 0x8e788a78, 0x8e788178, 2168 2168 + 0xb8ee1605, 0x806e816e, 2169 2169 + 0x8e6e866e, 0x80786e78, 2170 2170 + 0xbef60084, 0xbef600ff, 2171 2171 + 0x01000000, 0xc0211bfa, 2303 2172 0x00000078, 0x80788478, 2304 2304 - 0xc0211b7a, 0x00000078, 2305 2305 - 0x80788478, 0xc0211c3a, 2173 2173 + 0xc0211b3a, 0x00000078, 2174 2174 + 0x80788478, 0xc0211b7a, 2306 2175 0x00000078, 0x80788478, 2307 2307 - 0xc0211c7a, 0x00000078, 2308 2308 - 0x80788478, 0xc0211eba, 2176 2176 + 0xc0211c3a, 0x00000078, 2177 2177 + 0x80788478, 0xc0211c7a, 2309 2178 0x00000078, 0x80788478, 2310 2310 - 0xc0211efa, 0x00000078, 2311 2311 - 0x80788478, 0xc0211a3a, 2179 2179 + 0xc0211eba, 0x00000078, 2180 2180 + 0x80788478, 0xc0211efa, 2312 2181 0x00000078, 0x80788478, 2313 2313 - 0xc0211a7a, 0x00000078, 2314 2314 - 0x80788478, 0xc0211cfa, 2182 2182 + 0xc0211a3a, 0x00000078, 2183 2183 + 0x80788478, 0xc0211a7a, 2315 2184 0x00000078, 0x80788478, 2316 2316 - 0xbf8cc07f, 0xbefc006f, 2317 2317 - 0xbefe0070, 0xbeff0071, 2318 2318 - 0x866f7bff, 0x000003ff, 2319 2319 - 0xb96f4803, 0x866f7bff, 2320 2320 - 0xfffff800, 0x8f6f8b6f, 2321 2321 - 0xb96fa2c3, 0xb973f801, 2322 2322 - 0xb8ee2985, 0x806e816e, 2323 2323 - 0x8e6e8a6e, 0x8e6e816e, 2324 2324 - 0xb8ef1605, 0x806f816f, 2325 2325 - 0x8e6f866f, 0x806e6f6e, 2326 2326 - 0x806e746e, 0x826f8075, 2327 2327 - 0x866fff6f, 0x0000ffff, 2328 2328 - 0xc00b1c37, 0x00000050, 2329 2329 - 0xc00b1d37, 0x00000060, 2330 2330 - 0xc0031e77, 0x00000074, 2331 2331 - 0xbf8cc07f, 0x8f6e8b77, 2332 2332 - 0x866eff6e, 0x001f8000, 2333 2333 - 0xb96ef807, 0x866dff6d, 2334 2334 - 0x0000ffff, 0x86fe7e7e, 2335 2335 - 0x86ea6a6a, 0x8f6e837a, 2336 2336 - 0xb96ee0c2, 0xbf800002, 2337 2337 - 0xb97a0002, 0xbf8a0000, 2338 2338 - 0xbe801f6c, 0xbf9b0000, 2185 2185 + 0xc0211cfa, 0x00000078, 2186 2186 + 0x80788478, 0xbf8cc07f, 2187 2187 + 0xbefc006f, 0xbefe0070, 2188 2188 + 0xbeff0071, 0x866f7bff, 2189 2189 + 0x000003ff, 0xb96f4803, 2190 2190 + 0x866f7bff, 0xfffff800, 2191 2191 + 0x8f6f8b6f, 0xb96fa2c3, 2192 2192 + 0xb973f801, 0xb8ee2985, 2193 2193 + 0x806e816e, 0x8e6e8a6e, 2194 2194 + 0x8e6e816e, 0xb8ef1605, 2195 2195 + 0x806f816f, 0x8e6f866f, 2196 2196 + 0x806e6f6e, 0x806e746e, 2197 2197 + 0x826f8075, 0x866fff6f, 2198 2198 + 0x0000ffff, 0xc00b1c37, 2199 2199 + 0x00000050, 0xc00b1d37, 2200 2200 + 0x00000060, 0xc0031e77, 2201 2201 + 0x00000074, 0xbf8cc07f, 2202 2202 + 0x8f6e8b77, 0x866eff6e, 2203 2203 + 0x001f8000, 0xb96ef807, 2204 2204 + 0x866dff6d, 0x0000ffff, 2205 2205 + 0x86fe7e7e, 0x86ea6a6a, 2206 2206 + 0x8f6e837a, 0xb96ee0c2, 2207 2207 + 0xbf800002, 0xb97a0002, 2208 2208 + 0xbf8a0000, 0xbe801f6c, 2209 2209 + 0xbf9b0000, 0x00000000, 2339 2210 }; 2340 2211 2341 2212 static const uint32_t cwsr_trap_gfx10_hex[] = { ··· 3154 3151 }; 3155 3152 3156 3153 static const uint32_t cwsr_trap_gfx9_4_3_hex[] = { 3157 3157 - 0xbf820001, 0xbf8202db, 3154 3154 + 0xbf820001, 0xbf8202dc, 3158 3155 0xb8f8f802, 0x8978ff78, 3159 3156 0x00020006, 0xb8fbf803, 3160 3157 0x866eff78, 0x00002000, ··· 3269 3266 0xbefe007c, 0xbefc0070, 3270 3267 0xc0611c7a, 0x0000007c, 3271 3268 0xbf8cc07f, 0x80708470, 3272 3272 - 0xbefc007e, 0x867aff7f, 3273 3273 - 0x04000000, 0xbeef0080, 3274 3274 - 0x876f6f7a, 0xb8f02985, 3275 3275 - 0x80708170, 0x8e708a70, 3276 3276 - 0x8e708170, 0xb8fb1605, 3277 3277 - 0x807b817b, 0x8e7b847b, 3278 3278 - 0x8e76827b, 0xbef600ff, 3279 3279 - 0x01000000, 0xbef20174, 3280 3280 - 0x80747074, 0x82758075, 3281 3281 - 0xbefc0080, 0xbf800000, 3282 3282 - 0xbe802b00, 0xbe822b02, 3283 3283 - 0xbe842b04, 0xbe862b06, 3284 3284 - 0xbe882b08, 0xbe8a2b0a, 3285 3285 - 0xbe8c2b0c, 0xbe8e2b0e, 3286 3286 - 0xc06b003a, 0x00000000, 3287 3287 - 0xbf8cc07f, 0xc06b013a, 3288 3288 - 0x00000010, 0xbf8cc07f, 3289 3289 - 0xc06b023a, 0x00000020, 3290 3290 - 0xbf8cc07f, 0xc06b033a, 3291 3291 - 0x00000030, 0xbf8cc07f, 3292 3292 - 0x8074c074, 0x82758075, 3293 3293 - 0x807c907c, 0xbf0a7b7c, 3294 3294 - 0xbf85ffe7, 0xbef40172, 3295 3295 - 0xbef00080, 0xbefe00c1, 3296 3296 - 0xbeff00c1, 0xbee80080, 3297 3297 - 0xbee90080, 0xbef600ff, 3298 3298 - 0x01000000, 0x867aff78, 3269 3269 + 0xbefc007e, 0xbf108080, 3270 3270 + 0x867aff7f, 0x04000000, 3271 3271 + 0xbeef0080, 0x876f6f7a, 3272 3272 + 0xb8f02985, 0x80708170, 3273 3273 + 0x8e708a70, 0x8e708170, 3274 3274 + 0xb8fb1605, 0x807b817b, 3275 3275 + 0x8e7b847b, 0x8e76827b, 3276 3276 + 0xbef600ff, 0x01000000, 3277 3277 + 0xbef20174, 0x80747074, 3278 3278 + 0x82758075, 0xbefc0080, 3279 3279 + 0xbf800000, 0xbe802b00, 3280 3280 + 0xbe822b02, 0xbe842b04, 3281 3281 + 0xbe862b06, 0xbe882b08, 3282 3282 + 0xbe8a2b0a, 0xbe8c2b0c, 3283 3283 + 0xbe8e2b0e, 0xc06b003a, 3284 3284 + 0x00000000, 0xbf8cc07f, 3285 3285 + 0xc06b013a, 0x00000010, 3286 3286 + 0xbf8cc07f, 0xc06b023a, 3287 3287 + 0x00000020, 0xbf8cc07f, 3288 3288 + 0xc06b033a, 0x00000030, 3289 3289 + 0xbf8cc07f, 0x8074c074, 3290 3290 + 0x82758075, 0x807c907c, 3291 3291 + 0xbf0a7b7c, 0xbf85ffe7, 3292 3292 + 0xbef40172, 0xbef00080, 3293 3293 + 0xbefe00c1, 0xbeff00c1, 3294 3294 + 0xbee80080, 0xbee90080, 3295 3295 + 0xbef600ff, 0x01000000, 3296 3296 + 0x867aff78, 0x00400000, 3297 3297 + 0xbf850003, 0xb8faf803, 3298 3298 + 0x897a7aff, 0x10000000, 3299 3299 + 0xbf85004d, 0xbe840080, 3300 3300 + 0xd2890000, 0x00000900, 3301 3301 + 0x80048104, 0xd2890001, 3302 3302 + 0x00000900, 0x80048104, 3303 3303 + 0xd2890002, 0x00000900, 3304 3304 + 0x80048104, 0xd2890003, 3305 3305 + 0x00000900, 0x80048104, 3306 3306 + 0xc069003a, 0x00000070, 3307 3307 + 0xbf8cc07f, 0x80709070, 3308 3308 + 0xbf06c004, 0xbf84ffee, 3309 3309 + 0xbe840080, 0xd2890000, 3310 3310 + 0x00000901, 0x80048104, 3311 3311 + 0xd2890001, 0x00000901, 3312 3312 + 0x80048104, 0xd2890002, 3313 3313 + 0x00000901, 0x80048104, 3314 3314 + 0xd2890003, 0x00000901, 3315 3315 + 0x80048104, 0xc069003a, 3316 3316 + 0x00000070, 0xbf8cc07f, 3317 3317 + 0x80709070, 0xbf06c004, 3318 3318 + 0xbf84ffee, 0xbe840080, 3319 3319 + 0xd2890000, 0x00000902, 3320 3320 + 0x80048104, 0xd2890001, 3321 3321 + 0x00000902, 0x80048104, 3322 3322 + 0xd2890002, 0x00000902, 3323 3323 + 0x80048104, 0xd2890003, 3324 3324 + 0x00000902, 0x80048104, 3325 3325 + 0xc069003a, 0x00000070, 3326 3326 + 0xbf8cc07f, 0x80709070, 3327 3327 + 0xbf06c004, 0xbf84ffee, 3328 3328 + 0xbe840080, 0xd2890000, 3329 3329 + 0x00000903, 0x80048104, 3330 3330 + 0xd2890001, 0x00000903, 3331 3331 + 0x80048104, 0xd2890002, 3332 3332 + 0x00000903, 0x80048104, 3333 3333 + 0xd2890003, 0x00000903, 3334 3334 + 0x80048104, 0xc069003a, 3335 3335 + 0x00000070, 0xbf8cc07f, 3336 3336 + 0x80709070, 0xbf06c004, 3337 3337 + 0xbf84ffee, 0xbf820008, 3338 3338 + 0xe0724000, 0x701d0000, 3339 3339 + 0xe0724100, 0x701d0100, 3340 3340 + 0xe0724200, 0x701d0200, 3341 3341 + 0xe0724300, 0x701d0300, 3342 3342 + 0xbefe00c1, 0xbeff00c1, 3343 3343 + 0xb8fb4306, 0x867bc17b, 3344 3344 + 0xbf840064, 0xbf8a0000, 3345 3345 + 0x867aff6f, 0x04000000, 3346 3346 + 0xbf840060, 0x8e7b867b, 3347 3347 + 0x8e7b827b, 0xbef6007b, 3348 3348 + 0xb8f02985, 0x80708170, 3349 3349 + 0x8e708a70, 0x8e708170, 3350 3350 + 0xb8fa1605, 0x807a817a, 3351 3351 + 0x8e7a867a, 0x80707a70, 3352 3352 + 0x8070ff70, 0x00000080, 3353 3353 + 0xbef600ff, 0x01000000, 3354 3354 + 0xbefc0080, 0xd28c0002, 3355 3355 + 0x000100c1, 0xd28d0003, 3356 3356 + 0x000204c1, 0x867aff78, 3299 3357 0x00400000, 0xbf850003, 3300 3358 0xb8faf803, 0x897a7aff, 3301 3301 - 0x10000000, 0xbf85004d, 3359 3359 + 0x10000000, 0xbf850030, 3360 3360 + 0x24040682, 0xd86e4000, 3361 3361 + 0x00000002, 0xbf8cc07f, 3302 3362 0xbe840080, 0xd2890000, 3303 3363 0x00000900, 0x80048104, 3304 3364 0xd2890001, 0x00000900, ··· 3381 3315 0xc069003a, 0x00000070, 3382 3316 0xbf8cc07f, 0x80709070, 3383 3317 0xbf06c004, 0xbf84ffee, 3384 3384 - 0xbe840080, 0xd2890000, 3385 3385 - 0x00000902, 0x80048104, 3386 3386 - 0xd2890001, 0x00000902, 3387 3387 - 0x80048104, 0xd2890002, 3388 3388 - 0x00000902, 0x80048104, 3389 3389 - 0xd2890003, 0x00000902, 3390 3390 - 0x80048104, 0xc069003a, 3391 3391 - 0x00000070, 0xbf8cc07f, 3392 3392 - 0x80709070, 0xbf06c004, 3393 3393 - 0xbf84ffee, 0xbe840080, 3394 3394 - 0xd2890000, 0x00000903, 3395 3395 - 0x80048104, 0xd2890001, 3396 3396 - 0x00000903, 0x80048104, 3397 3397 - 0xd2890002, 0x00000903, 3398 3398 - 0x80048104, 0xd2890003, 3399 3399 - 0x00000903, 0x80048104, 3400 3400 - 0xc069003a, 0x00000070, 3401 3401 - 0xbf8cc07f, 0x80709070, 3402 3402 - 0xbf06c004, 0xbf84ffee, 3403 3403 - 0xbf820008, 0xe0724000, 3404 3404 - 0x701d0000, 0xe0724100, 3405 3405 - 0x701d0100, 0xe0724200, 3406 3406 - 0x701d0200, 0xe0724300, 3407 3407 - 0x701d0300, 0xbefe00c1, 3408 3408 - 0xbeff00c1, 0xb8fb4306, 3409 3409 - 0x867bc17b, 0xbf840064, 3410 3410 - 0xbf8a0000, 0x867aff6f, 3411 3411 - 0x04000000, 0xbf840060, 3412 3412 - 0x8e7b867b, 0x8e7b827b, 3413 3413 - 0xbef6007b, 0xb8f02985, 3414 3414 - 0x80708170, 0x8e708a70, 3415 3415 - 0x8e708170, 0xb8fa1605, 3416 3416 - 0x807a817a, 0x8e7a867a, 3417 3417 - 0x80707a70, 0x8070ff70, 3418 3418 - 0x00000080, 0xbef600ff, 3419 3419 - 0x01000000, 0xbefc0080, 3420 3420 - 0xd28c0002, 0x000100c1, 3421 3421 - 0xd28d0003, 0x000204c1, 3318 3318 + 0x680404ff, 0x00000200, 3319 3319 + 0xd0c9006a, 0x0000f702, 3320 3320 + 0xbf87ffd2, 0xbf820015, 3321 3321 + 0xd1060002, 0x00011103, 3322 3322 + 0x7e0602ff, 0x00000200, 3323 3323 + 0xbefc00ff, 0x00010000, 3324 3324 + 0xbe800077, 0x8677ff77, 3325 3325 + 0xff7fffff, 0x8777ff77, 3326 3326 + 0x00058000, 0xd8ec0000, 3327 3327 + 0x00000002, 0xbf8cc07f, 3328 3328 + 0xe0765000, 0x701d0002, 3329 3329 + 0x68040702, 0xd0c9006a, 3330 3330 + 0x0000f702, 0xbf87fff7, 3331 3331 + 0xbef70000, 0xbef000ff, 3332 3332 + 0x00000400, 0xbefe00c1, 3333 3333 + 0xbeff00c1, 0xb8fb2b05, 3334 3334 + 0x807b817b, 0x8e7b827b, 3335 3335 + 0xbef600ff, 0x01000000, 3336 3336 + 0xbefc0084, 0xbf0a7b7c, 3337 3337 + 0xbf84006d, 0xbf11017c, 3338 3338 + 0x807bff7b, 0x00001000, 3422 3339 0x867aff78, 0x00400000, 3423 3340 0xbf850003, 0xb8faf803, 3424 3341 0x897a7aff, 0x10000000, 3425 3425 - 0xbf850030, 0x24040682, 3426 3426 - 0xd86e4000, 0x00000002, 3427 3427 - 0xbf8cc07f, 0xbe840080, 3342 3342 + 0xbf850051, 0xbe840080, 3428 3343 0xd2890000, 0x00000900, 3429 3344 0x80048104, 0xd2890001, 3430 3345 0x00000900, 0x80048104, ··· 3424 3377 0x80048104, 0xc069003a, 3425 3378 0x00000070, 0xbf8cc07f, 3426 3379 0x80709070, 0xbf06c004, 3427 3427 - 0xbf84ffee, 0x680404ff, 3428 3428 - 0x00000200, 0xd0c9006a, 3429 3429 - 0x0000f702, 0xbf87ffd2, 3430 3430 - 0xbf820015, 0xd1060002, 3431 3431 - 0x00011103, 0x7e0602ff, 3432 3432 - 0x00000200, 0xbefc00ff, 3433 3433 - 0x00010000, 0xbe800077, 3434 3434 - 0x8677ff77, 0xff7fffff, 3435 3435 - 0x8777ff77, 0x00058000, 3436 3436 - 0xd8ec0000, 0x00000002, 3437 3437 - 0xbf8cc07f, 0xe0765000, 3438 3438 - 0x701d0002, 0x68040702, 3439 3439 - 0xd0c9006a, 0x0000f702, 3440 3440 - 0xbf87fff7, 0xbef70000, 3441 3441 - 0xbef000ff, 0x00000400, 3442 3442 - 0xbefe00c1, 0xbeff00c1, 3443 3443 - 0xb8fb2b05, 0x807b817b, 3444 3444 - 0x8e7b827b, 0xbef600ff, 3445 3445 - 0x01000000, 0xbefc0084, 3446 3446 - 0xbf0a7b7c, 0xbf84006d, 3447 3447 - 0xbf11017c, 0x807bff7b, 3448 3448 - 0x00001000, 0x867aff78, 3380 3380 + 0xbf84ffee, 0xbe840080, 3381 3381 + 0xd2890000, 0x00000902, 3382 3382 + 0x80048104, 0xd2890001, 3383 3383 + 0x00000902, 0x80048104, 3384 3384 + 0xd2890002, 0x00000902, 3385 3385 + 0x80048104, 0xd2890003, 3386 3386 + 0x00000902, 0x80048104, 3387 3387 + 0xc069003a, 0x00000070, 3388 3388 + 0xbf8cc07f, 0x80709070, 3389 3389 + 0xbf06c004, 0xbf84ffee, 3390 3390 + 0xbe840080, 0xd2890000, 3391 3391 + 0x00000903, 0x80048104, 3392 3392 + 0xd2890001, 0x00000903, 3393 3393 + 0x80048104, 0xd2890002, 3394 3394 + 0x00000903, 0x80048104, 3395 3395 + 0xd2890003, 0x00000903, 3396 3396 + 0x80048104, 0xc069003a, 3397 3397 + 0x00000070, 0xbf8cc07f, 3398 3398 + 0x80709070, 0xbf06c004, 3399 3399 + 0xbf84ffee, 0x807c847c, 3400 3400 + 0xbf0a7b7c, 0xbf85ffb1, 3401 3401 + 0xbf9c0000, 0xbf820012, 3402 3402 + 0x7e000300, 0x7e020301, 3403 3403 + 0x7e040302, 0x7e060303, 3404 3404 + 0xe0724000, 0x701d0000, 3405 3405 + 0xe0724100, 0x701d0100, 3406 3406 + 0xe0724200, 0x701d0200, 3407 3407 + 0xe0724300, 0x701d0300, 3408 3408 + 0x807c847c, 0x8070ff70, 3409 3409 + 0x00000400, 0xbf0a7b7c, 3410 3410 + 0xbf85ffef, 0xbf9c0000, 3411 3411 + 0xb8fb2985, 0x807b817b, 3412 3412 + 0x8e7b837b, 0xb8fa2b05, 3413 3413 + 0x807a817a, 0x8e7a827a, 3414 3414 + 0x80fb7a7b, 0x867b7b7b, 3415 3415 + 0xbf84007a, 0x807bff7b, 3416 3416 + 0x00001000, 0xbefc0080, 3417 3417 + 0xbf11017c, 0x867aff78, 3449 3418 0x00400000, 0xbf850003, 3450 3419 0xb8faf803, 0x897a7aff, 3451 3451 - 0x10000000, 0xbf850051, 3420 3420 + 0x10000000, 0xbf850059, 3421 3421 + 0xd3d84000, 0x18000100, 3422 3422 + 0xd3d84001, 0x18000101, 3423 3423 + 0xd3d84002, 0x18000102, 3424 3424 + 0xd3d84003, 0x18000103, 3452 3425 0xbe840080, 0xd2890000, 3453 3426 0x00000900, 0x80048104, 3454 3427 0xd2890001, 0x00000900, ··· 3508 3441 0xbf8cc07f, 0x80709070, 3509 3442 0xbf06c004, 0xbf84ffee, 3510 3443 0x807c847c, 0xbf0a7b7c, 3511 3511 - 0xbf85ffb1, 0xbf9c0000, 3512 3512 - 0xbf820012, 0x7e000300, 3513 3513 - 0x7e020301, 0x7e040302, 3514 3514 - 0x7e060303, 0xe0724000, 3444 3444 + 0xbf85ffa9, 0xbf9c0000, 3445 3445 + 0xbf820016, 0xd3d84000, 3446 3446 + 0x18000100, 0xd3d84001, 3447 3447 + 0x18000101, 0xd3d84002, 3448 3448 + 0x18000102, 0xd3d84003, 3449 3449 + 0x18000103, 0xe0724000, 3515 3450 0x701d0000, 0xe0724100, 3516 3451 0x701d0100, 0xe0724200, 3517 3452 0x701d0200, 0xe0724300, 3518 3453 0x701d0300, 0x807c847c, 3519 3454 0x8070ff70, 0x00000400, 3520 3520 - 0xbf0a7b7c, 0xbf85ffef, 3521 3521 - 0xbf9c0000, 0xb8fb2985, 3522 3522 - 0x807b817b, 0x8e7b837b, 3523 3523 - 0xb8fa2b05, 0x807a817a, 3524 3524 - 0x8e7a827a, 0x80fb7a7b, 3525 3525 - 0x867b7b7b, 0xbf84007a, 3526 3526 - 0x807bff7b, 0x00001000, 3527 3527 - 0xbefc0080, 0xbf11017c, 3528 3528 - 0x867aff78, 0x00400000, 3529 3529 - 0xbf850003, 0xb8faf803, 3530 3530 - 0x897a7aff, 0x10000000, 3531 3531 - 0xbf850059, 0xd3d84000, 3532 3532 - 0x18000100, 0xd3d84001, 3533 3533 - 0x18000101, 0xd3d84002, 3534 3534 - 0x18000102, 0xd3d84003, 3535 3535 - 0x18000103, 0xbe840080, 3536 3536 - 0xd2890000, 0x00000900, 3537 3537 - 0x80048104, 0xd2890001, 3538 3538 - 0x00000900, 0x80048104, 3539 3539 - 0xd2890002, 0x00000900, 3540 3540 - 0x80048104, 0xd2890003, 3541 3541 - 0x00000900, 0x80048104, 3542 3542 - 0xc069003a, 0x00000070, 3543 3543 - 0xbf8cc07f, 0x80709070, 3544 3544 - 0xbf06c004, 0xbf84ffee, 3545 3545 - 0xbe840080, 0xd2890000, 3546 3546 - 0x00000901, 0x80048104, 3547 3547 - 0xd2890001, 0x00000901, 3548 3548 - 0x80048104, 0xd2890002, 3549 3549 - 0x00000901, 0x80048104, 3550 3550 - 0xd2890003, 0x00000901, 3551 3551 - 0x80048104, 0xc069003a, 3552 3552 - 0x00000070, 0xbf8cc07f, 3553 3553 - 0x80709070, 0xbf06c004, 3554 3554 - 0xbf84ffee, 0xbe840080, 3555 3555 - 0xd2890000, 0x00000902, 3556 3556 - 0x80048104, 0xd2890001, 3557 3557 - 0x00000902, 0x80048104, 3558 3558 - 0xd2890002, 0x00000902, 3559 3559 - 0x80048104, 0xd2890003, 3560 3560 - 0x00000902, 0x80048104, 3561 3561 - 0xc069003a, 0x00000070, 3562 3562 - 0xbf8cc07f, 0x80709070, 3563 3563 - 0xbf06c004, 0xbf84ffee, 3564 3564 - 0xbe840080, 0xd2890000, 3565 3565 - 0x00000903, 0x80048104, 3566 3566 - 0xd2890001, 0x00000903, 3567 3567 - 0x80048104, 0xd2890002, 3568 3568 - 0x00000903, 0x80048104, 3569 3569 - 0xd2890003, 0x00000903, 3570 3570 - 0x80048104, 0xc069003a, 3571 3571 - 0x00000070, 0xbf8cc07f, 3572 3572 - 0x80709070, 0xbf06c004, 3573 3573 - 0xbf84ffee, 0x807c847c, 3574 3574 - 0xbf0a7b7c, 0xbf85ffa9, 3575 3575 - 0xbf9c0000, 0xbf820016, 3576 3576 - 0xd3d84000, 0x18000100, 3577 3577 - 0xd3d84001, 0x18000101, 3578 3578 - 0xd3d84002, 0x18000102, 3579 3579 - 0xd3d84003, 0x18000103, 3580 3580 - 0xe0724000, 0x701d0000, 3581 3581 - 0xe0724100, 0x701d0100, 3582 3582 - 0xe0724200, 0x701d0200, 3583 3583 - 0xe0724300, 0x701d0300, 3584 3584 - 0x807c847c, 0x8070ff70, 3585 3585 - 0x00000400, 0xbf0a7b7c, 3586 3586 - 0xbf85ffeb, 0xbf9c0000, 3587 3587 - 0xbf8200ee, 0xbef4007e, 3588 3588 - 0x8675ff7f, 0x0000ffff, 3589 3589 - 0x8775ff75, 0x00040000, 3590 3590 - 0xbef60080, 0xbef700ff, 3591 3591 - 0x00807fac, 0x866eff7f, 3592 3592 - 0x04000000, 0xbf84001f, 3455 3455 + 0xbf0a7b7c, 0xbf85ffeb, 3456 3456 + 0xbf9c0000, 0xbf8200ee, 3457 3457 + 0xbef4007e, 0x8675ff7f, 3458 3458 + 0x0000ffff, 0x8775ff75, 3459 3459 + 0x00040000, 0xbef60080, 3460 3460 + 0xbef700ff, 0x00807fac, 3461 3461 + 0x866eff7f, 0x04000000, 3462 3462 + 0xbf84001f, 0xbefe00c1, 3463 3463 + 0xbeff00c1, 0xb8ef4306, 3464 3464 + 0x866fc16f, 0xbf84001a, 3465 3465 + 0x8e6f866f, 0x8e6f826f, 3466 3466 + 0xbef6006f, 0xb8f82985, 3467 3467 + 0x80788178, 0x8e788a78, 3468 3468 + 0x8e788178, 0xb8ee1605, 3469 3469 + 0x806e816e, 0x8e6e866e, 3470 3470 + 0x80786e78, 0x8078ff78, 3471 3471 + 0x00000080, 0xbef600ff, 3472 3472 + 0x01000000, 0xbefc0080, 3473 3473 + 0xe0510000, 0x781d0000, 3474 3474 + 0xe0510100, 0x781d0000, 3475 3475 + 0x807cff7c, 0x00000200, 3476 3476 + 0x8078ff78, 0x00000200, 3477 3477 + 0xbf0a6f7c, 0xbf85fff6, 3593 3478 0xbefe00c1, 0xbeff00c1, 3594 3594 - 0xb8ef4306, 0x866fc16f, 3595 3595 - 0xbf84001a, 0x8e6f866f, 3596 3596 - 0x8e6f826f, 0xbef6006f, 3597 3597 - 0xb8f82985, 0x80788178, 3598 3598 - 0x8e788a78, 0x8e788178, 3599 3599 - 0xb8ee1605, 0x806e816e, 3600 3600 - 0x8e6e866e, 0x80786e78, 3601 3601 - 0x8078ff78, 0x00000080, 3602 3479 0xbef600ff, 0x01000000, 3603 3603 - 0xbefc0080, 0xe0510000, 3604 3604 - 0x781d0000, 0xe0510100, 3605 3605 - 0x781d0000, 0x807cff7c, 3606 3606 - 0x00000200, 0x8078ff78, 3607 3607 - 0x00000200, 0xbf0a6f7c, 3608 3608 - 0xbf85fff6, 0xbefe00c1, 3609 3609 - 0xbeff00c1, 0xbef600ff, 3610 3610 - 0x01000000, 0xb8ef2b05, 3611 3611 - 0x806f816f, 0x8e6f826f, 3612 3612 - 0x806fff6f, 0x00008000, 3613 3613 - 0xbef80080, 0xbeee0078, 3614 3614 - 0x8078ff78, 0x00000400, 3615 3615 - 0xbefc0084, 0xbf11087c, 3616 3616 - 0xe0524000, 0x781d0000, 3617 3617 - 0xe0524100, 0x781d0100, 3618 3618 - 0xe0524200, 0x781d0200, 3619 3619 - 0xe0524300, 0x781d0300, 3620 3620 - 0xbf8c0f70, 0x7e000300, 3621 3621 - 0x7e020301, 0x7e040302, 3622 3622 - 0x7e060303, 0x807c847c, 3623 3623 - 0x8078ff78, 0x00000400, 3624 3624 - 0xbf0a6f7c, 0xbf85ffee, 3625 3625 - 0xb8ef2985, 0x806f816f, 3626 3626 - 0x8e6f836f, 0xb8f92b05, 3627 3627 - 0x80798179, 0x8e798279, 3628 3628 - 0x80ef796f, 0x866f6f6f, 3629 3629 - 0xbf84001a, 0x806fff6f, 3630 3630 - 0x00008000, 0xbefc0080, 3480 3480 + 0xb8ef2b05, 0x806f816f, 3481 3481 + 0x8e6f826f, 0x806fff6f, 3482 3482 + 0x00008000, 0xbef80080, 3483 3483 + 0xbeee0078, 0x8078ff78, 3484 3484 + 0x00000400, 0xbefc0084, 3631 3485 0xbf11087c, 0xe0524000, 3632 3486 0x781d0000, 0xe0524100, 3633 3487 0x781d0100, 0xe0524200, 3634 3488 0x781d0200, 0xe0524300, 3635 3489 0x781d0300, 0xbf8c0f70, 3636 3636 - 0xd3d94000, 0x18000100, 3637 3637 - 0xd3d94001, 0x18000101, 3638 3638 - 0xd3d94002, 0x18000102, 3639 3639 - 0xd3d94003, 0x18000103, 3490 3490 + 0x7e000300, 0x7e020301, 3491 3491 + 0x7e040302, 0x7e060303, 3640 3492 0x807c847c, 0x8078ff78, 3641 3493 0x00000400, 0xbf0a6f7c, 3642 3642 - 0xbf85ffea, 0xbf9c0000, 3643 3643 - 0xe0524000, 0x6e1d0000, 3644 3644 - 0xe0524100, 0x6e1d0100, 3645 3645 - 0xe0524200, 0x6e1d0200, 3646 3646 - 0xe0524300, 0x6e1d0300, 3647 3647 - 0xbf8c0f70, 0xb8f82985, 3648 3648 - 0x80788178, 0x8e788a78, 3649 3649 - 0x8e788178, 0xb8ee1605, 3650 3650 - 0x806e816e, 0x8e6e866e, 3651 3651 - 0x80786e78, 0x80f8c078, 3652 3652 - 0xb8ef1605, 0x806f816f, 3653 3653 - 0x8e6f846f, 0x8e76826f, 3654 3654 - 0xbef600ff, 0x01000000, 3655 3655 - 0xbefc006f, 0xc031003a, 3656 3656 - 0x00000078, 0x80f8c078, 3657 3657 - 0xbf8cc07f, 0x80fc907c, 3658 3658 - 0xbf800000, 0xbe802d00, 3659 3659 - 0xbe822d02, 0xbe842d04, 3660 3660 - 0xbe862d06, 0xbe882d08, 3661 3661 - 0xbe8a2d0a, 0xbe8c2d0c, 3662 3662 - 0xbe8e2d0e, 0xbf06807c, 3663 3663 - 0xbf84fff0, 0xb8f82985, 3664 3664 - 0x80788178, 0x8e788a78, 3665 3665 - 0x8e788178, 0xb8ee1605, 3666 3666 - 0x806e816e, 0x8e6e866e, 3667 3667 - 0x80786e78, 0xbef60084, 3668 3668 - 0xbef600ff, 0x01000000, 3669 3669 - 0xc0211bfa, 0x00000078, 3670 3670 - 0x80788478, 0xc0211b3a, 3494 3494 + 0xbf85ffee, 0xb8ef2985, 3495 3495 + 0x806f816f, 0x8e6f836f, 3496 3496 + 0xb8f92b05, 0x80798179, 3497 3497 + 0x8e798279, 0x80ef796f, 3498 3498 + 0x866f6f6f, 0xbf84001a, 3499 3499 + 0x806fff6f, 0x00008000, 3500 3500 + 0xbefc0080, 0xbf11087c, 3501 3501 + 0xe0524000, 0x781d0000, 3502 3502 + 0xe0524100, 0x781d0100, 3503 3503 + 0xe0524200, 0x781d0200, 3504 3504 + 0xe0524300, 0x781d0300, 3505 3505 + 0xbf8c0f70, 0xd3d94000, 3506 3506 + 0x18000100, 0xd3d94001, 3507 3507 + 0x18000101, 0xd3d94002, 3508 3508 + 0x18000102, 0xd3d94003, 3509 3509 + 0x18000103, 0x807c847c, 3510 3510 + 0x8078ff78, 0x00000400, 3511 3511 + 0xbf0a6f7c, 0xbf85ffea, 3512 3512 + 0xbf9c0000, 0xe0524000, 3513 3513 + 0x6e1d0000, 0xe0524100, 3514 3514 + 0x6e1d0100, 0xe0524200, 3515 3515 + 0x6e1d0200, 0xe0524300, 3516 3516 + 0x6e1d0300, 0xbf8c0f70, 3517 3517 + 0xb8f82985, 0x80788178, 3518 3518 + 0x8e788a78, 0x8e788178, 3519 3519 + 0xb8ee1605, 0x806e816e, 3520 3520 + 0x8e6e866e, 0x80786e78, 3521 3521 + 0x80f8c078, 0xb8ef1605, 3522 3522 + 0x806f816f, 0x8e6f846f, 3523 3523 + 0x8e76826f, 0xbef600ff, 3524 3524 + 0x01000000, 0xbefc006f, 3525 3525 + 0xc031003a, 0x00000078, 3526 3526 + 0x80f8c078, 0xbf8cc07f, 3527 3527 + 0x80fc907c, 0xbf800000, 3528 3528 + 0xbe802d00, 0xbe822d02, 3529 3529 + 0xbe842d04, 0xbe862d06, 3530 3530 + 0xbe882d08, 0xbe8a2d0a, 3531 3531 + 0xbe8c2d0c, 0xbe8e2d0e, 3532 3532 + 0xbf06807c, 0xbf84fff0, 3533 3533 + 0xb8f82985, 0x80788178, 3534 3534 + 0x8e788a78, 0x8e788178, 3535 3535 + 0xb8ee1605, 0x806e816e, 3536 3536 + 0x8e6e866e, 0x80786e78, 3537 3537 + 0xbef60084, 0xbef600ff, 3538 3538 + 0x01000000, 0xc0211bfa, 3671 3539 0x00000078, 0x80788478, 3672 3672 - 0xc0211b7a, 0x00000078, 3673 3673 - 0x80788478, 0xc0211c3a, 3540 3540 + 0xc0211b3a, 0x00000078, 3541 3541 + 0x80788478, 0xc0211b7a, 3674 3542 0x00000078, 0x80788478, 3675 3675 - 0xc0211c7a, 0x00000078, 3676 3676 - 0x80788478, 0xc0211eba, 3543 3543 + 0xc0211c3a, 0x00000078, 3544 3544 + 0x80788478, 0xc0211c7a, 3677 3545 0x00000078, 0x80788478, 3678 3678 - 0xc0211efa, 0x00000078, 3679 3679 - 0x80788478, 0xc0211a3a, 3546 3546 + 0xc0211eba, 0x00000078, 3547 3547 + 0x80788478, 0xc0211efa, 3680 3548 0x00000078, 0x80788478, 3681 3681 - 0xc0211a7a, 0x00000078, 3682 3682 - 0x80788478, 0xc0211cfa, 3549 3549 + 0xc0211a3a, 0x00000078, 3550 3550 + 0x80788478, 0xc0211a7a, 3683 3551 0x00000078, 0x80788478, 3684 3684 - 0xbf8cc07f, 0xbefc006f, 3685 3685 - 0xbefe0070, 0xbeff0071, 3686 3686 - 0x866f7bff, 0x000003ff, 3687 3687 - 0xb96f4803, 0x866f7bff, 3688 3688 - 0xfffff800, 0x8f6f8b6f, 3689 3689 - 0xb96fa2c3, 0xb973f801, 3690 3690 - 0xb8ee2985, 0x806e816e, 3691 3691 - 0x8e6e8a6e, 0x8e6e816e, 3692 3692 - 0xb8ef1605, 0x806f816f, 3693 3693 - 0x8e6f866f, 0x806e6f6e, 3694 3694 - 0x806e746e, 0x826f8075, 3695 3695 - 0x866fff6f, 0x0000ffff, 3696 3696 - 0xc00b1c37, 0x00000050, 3697 3697 - 0xc00b1d37, 0x00000060, 3698 3698 - 0xc0031e77, 0x00000074, 3699 3699 - 0xbf8cc07f, 0x8f6e8b79, 3700 3700 - 0x866eff6e, 0x001f8000, 3701 3701 - 0xb96ef807, 0x866dff6d, 3702 3702 - 0x0000ffff, 0x86fe7e7e, 3703 3703 - 0x86ea6a6a, 0x8f6e837a, 3704 3704 - 0xb96ee0c2, 0xbf800002, 3705 3705 - 0xb97a0002, 0xbf8a0000, 3706 3706 - 0xbe801f6c, 0xbf9b0000, 3552 3552 + 0xc0211cfa, 0x00000078, 3553 3553 + 0x80788478, 0xbf8cc07f, 3554 3554 + 0xbefc006f, 0xbefe0070, 3555 3555 + 0xbeff0071, 0x866f7bff, 3556 3556 + 0x000003ff, 0xb96f4803, 3557 3557 + 0x866f7bff, 0xfffff800, 3558 3558 + 0x8f6f8b6f, 0xb96fa2c3, 3559 3559 + 0xb973f801, 0xb8ee2985, 3560 3560 + 0x806e816e, 0x8e6e8a6e, 3561 3561 + 0x8e6e816e, 0xb8ef1605, 3562 3562 + 0x806f816f, 0x8e6f866f, 3563 3563 + 0x806e6f6e, 0x806e746e, 3564 3564 + 0x826f8075, 0x866fff6f, 3565 3565 + 0x0000ffff, 0xc00b1c37, 3566 3566 + 0x00000050, 0xc00b1d37, 3567 3567 + 0x00000060, 0xc0031e77, 3568 3568 + 0x00000074, 0xbf8cc07f, 3569 3569 + 0x8f6e8b79, 0x866eff6e, 3570 3570 + 0x001f8000, 0xb96ef807, 3571 3571 + 0x866dff6d, 0x0000ffff, 3572 3572 + 0x86fe7e7e, 0x86ea6a6a, 3573 3573 + 0x8f6e837a, 0xb96ee0c2, 3574 3574 + 0xbf800002, 0xb97a0002, 3575 3575 + 0xbf8a0000, 0xbe801f6c, 3576 3576 + 0xbf9b0000, 0x00000000, 3707 3577 }; 3708 3578 3709 3579 static const uint32_t cwsr_trap_gfx12_hex[] = { ··· 4128 4124 }; 4129 4125 4130 4126 static const uint32_t cwsr_trap_gfx9_5_0_hex[] = { 4131 4131 - 0xbf820001, 0xbf8202d8, 4127 4127 + 0xbf820001, 0xbf8202ca, 4132 4128 0xb8f8f802, 0x8978ff78, 4133 4129 0x00020006, 0xb8fbf803, 4134 4130 0x866eff78, 0x00002000, 4135 4135 - 0xbf840008, 0xbf0d986d, 4136 4136 - 0xbf85001f, 0x866eff7b, 4137 4137 - 0x00000400, 0xbf850061, 4138 4138 - 0xbf8e0010, 0xb8fbf803, 4139 4139 - 0xbf82fffa, 0x866eff7b, 4140 4140 - 0x03800900, 0xbf850015, 4141 4141 - 0x866eff7b, 0x000071ff, 4142 4142 - 0xbf840008, 0x866fff7b, 4143 4143 - 0x00007080, 0xbf840001, 4144 4144 - 0xbeee1a87, 0xb8eff801, 4145 4145 - 0x8e6e8c6e, 0x866e6f6e, 4146 4146 - 0xbf85000a, 0xbf0d986d, 4147 4147 - 0xbf850003, 0x866eff6d, 4148 4148 - 0x00ff0000, 0xbf850005, 4149 4149 - 0xbf0d986d, 0xbf850004, 4131 4131 + 0xbf840009, 0x866eff6d, 4132 4132 + 0x00ff0000, 0xbf85001a, 4150 4133 0x866eff7b, 0x00000400, 4151 4151 - 0xbf850046, 0xbeed1a9d, 4134 4134 + 0xbf850051, 0xbf8e0010, 4135 4135 + 0xb8fbf803, 0xbf82fffa, 4136 4136 + 0x866eff7b, 0x03c00900, 4137 4137 + 0xbf850011, 0x866eff7b, 4138 4138 + 0x000071ff, 0xbf840008, 4139 4139 + 0x866fff7b, 0x00007080, 4140 4140 + 0xbf840001, 0xbeee1a87, 4141 4141 + 0xb8eff801, 0x8e6e8c6e, 4142 4142 + 0x866e6f6e, 0xbf850006, 4143 4143 + 0x866eff6d, 0x00ff0000, 4144 4144 + 0xbf850003, 0x866eff7b, 4145 4145 + 0x00000400, 0xbf85003a, 4152 4146 0xb8faf807, 0x867aff7a, 4153 4147 0x001f8000, 0x8e7a8b7a, 4154 4148 0x8979ff79, 0xfc000000, ··· 4155 4153 0xb8fbf813, 0x8efa887a, 4156 4154 0xbf0d8f7b, 0xbf840002, 4157 4155 0x877bff7b, 0xffff0000, 4158 4158 - 0xc0031cfd, 0x00000010, 4159 4159 - 0xc0071bbd, 0x00000000, 4156 4156 + 0xc0031bbd, 0x00000010, 4157 4157 + 0xbf8cc07f, 0x8e6e976e, 4158 4158 + 0x8979ff79, 0x00800000, 4159 4159 + 0x87796e79, 0xc0071bbd, 4160 4160 + 0x00000000, 0xbf8cc07f, 4160 4161 0xc0071ebd, 0x00000008, 4161 4161 - 0xbf8cc07f, 0x8e739773, 4162 4162 - 0x8979ff79, 0x01800000, 4163 4163 - 0x87797379, 0xbf0d986d, 4164 4164 - 0xbf840009, 0xbf0d9879, 4165 4165 - 0xbf850007, 0x896dff6d, 4166 4166 - 0x01ff0000, 0xba7f0583, 4167 4167 - 0x00000000, 0xbf0d9d6d, 4168 4168 - 0xbeed189d, 0xbf840012, 4169 4169 - 0xbef91898, 0xbeed189d, 4170 4170 - 0x86ee6e6e, 0xbf840001, 4171 4171 - 0xbe801d6e, 0x866eff6d, 4172 4172 - 0x01ff0000, 0xbf850005, 4173 4173 - 0x8778ff78, 0x00002000, 4174 4174 - 0x80ec886c, 0x82ed806d, 4175 4175 - 0xbf820005, 0x866eff6d, 4176 4176 - 0x01000000, 0xbf850002, 4177 4177 - 0x806c846c, 0x826d806d, 4178 4178 - 0x866dff6d, 0x0000ffff, 4179 4179 - 0x8f7a8b79, 0x867aff7a, 4180 4180 - 0x001f8000, 0xb97af807, 4181 4181 - 0x86fe7e7e, 0x86ea6a6a, 4182 4182 - 0x8f6e8378, 0xb96ee0c2, 4183 4183 - 0xbf800002, 0xb9780002, 4184 4184 - 0xbe801f6c, 0x866dff6d, 4185 4185 - 0x0000ffff, 0xbefa0080, 4186 4186 - 0xb97a0283, 0xb8faf807, 4162 4162 + 0xbf8cc07f, 0x86ee6e6e, 4163 4163 + 0xbf840001, 0xbe801d6e, 4164 4164 + 0x866eff6d, 0x01ff0000, 4165 4165 + 0xbf850005, 0x8778ff78, 4166 4166 + 0x00002000, 0x80ec886c, 4167 4167 + 0x82ed806d, 0xbf820005, 4168 4168 + 0x866eff6d, 0x01000000, 4169 4169 + 0xbf850002, 0x806c846c, 4170 4170 + 0x826d806d, 0x866dff6d, 4171 4171 + 0x0000ffff, 0x8f7a8b79, 4187 4172 0x867aff7a, 0x001f8000, 4188 4188 - 0x8e7a8b7a, 0x8979ff79, 4189 4189 - 0xfc000000, 0x87797a79, 4190 4190 - 0xba7ff807, 0x00000000, 4191 4191 - 0xbeee007e, 0xbeef007f, 4192 4192 - 0xbefe0180, 0xbf900004, 4193 4193 - 0x877a8478, 0xb97af802, 4194 4194 - 0xbf8e0002, 0xbf88fffe, 4195 4195 - 0xb8fa2985, 0x807a817a, 4196 4196 - 0x8e7a8a7a, 0x8e7a817a, 4197 4197 - 0xb8fb1605, 0x807b817b, 4198 4198 - 0x8e7b867b, 0x807a7b7a, 4199 4199 - 0x807a7e7a, 0x827b807f, 4200 4200 - 0x867bff7b, 0x0000ffff, 4201 4201 - 0xc04b1c3d, 0x00000050, 4202 4202 - 0xbf8cc07f, 0xc04b1d3d, 4203 4203 - 0x00000060, 0xbf8cc07f, 4204 4204 - 0xc0431e7d, 0x00000074, 4205 4205 - 0xbf8cc07f, 0xbef4007e, 4206 4206 - 0x8675ff7f, 0x0000ffff, 4207 4207 - 0x8775ff75, 0x00040000, 4208 4208 - 0xbef60080, 0xbef700ff, 4209 4209 - 0x00807fac, 0xbef1007c, 4210 4210 - 0xbef00080, 0xb8f02985, 4211 4211 - 0x80708170, 0x8e708a70, 4212 4212 - 0x8e708170, 0xb8fa1605, 4213 4213 - 0x807a817a, 0x8e7a867a, 4214 4214 - 0x80707a70, 0xbef60084, 4215 4215 - 0xbef600ff, 0x01000000, 4216 4216 - 0xbefe007c, 0xbefc0070, 4217 4217 - 0xc0611c7a, 0x0000007c, 4218 4218 - 0xbf8cc07f, 0x80708470, 4219 4219 - 0xbefc007e, 0xbefe007c, 4220 4220 - 0xbefc0070, 0xc0611b3a, 4221 4221 - 0x0000007c, 0xbf8cc07f, 4222 4222 - 0x80708470, 0xbefc007e, 4223 4223 - 0xbefe007c, 0xbefc0070, 4224 4224 - 0xc0611b7a, 0x0000007c, 4225 4225 - 0xbf8cc07f, 0x80708470, 4226 4226 - 0xbefc007e, 0xbefe007c, 4227 4227 - 0xbefc0070, 0xc0611bba, 4228 4228 - 0x0000007c, 0xbf8cc07f, 4229 4229 - 0x80708470, 0xbefc007e, 4230 4230 - 0xbefe007c, 0xbefc0070, 4231 4231 - 0xc0611bfa, 0x0000007c, 4232 4232 - 0xbf8cc07f, 0x80708470, 4233 4233 - 0xbefc007e, 0xbefe007c, 4234 4234 - 0xbefc0070, 0xc0611e3a, 4235 4235 - 0x0000007c, 0xbf8cc07f, 4236 4236 - 0x80708470, 0xbefc007e, 4237 4237 - 0xb8fbf803, 0xbefe007c, 4238 4238 - 0xbefc0070, 0xc0611efa, 4239 4239 - 0x0000007c, 0xbf8cc07f, 4240 4240 - 0x80708470, 0xbefc007e, 4241 4241 - 0xbefe007c, 0xbefc0070, 4242 4242 - 0xc0611a3a, 0x0000007c, 4243 4243 - 0xbf8cc07f, 0x80708470, 4244 4244 - 0xbefc007e, 0xbefe007c, 4245 4245 - 0xbefc0070, 0xc0611a7a, 4246 4246 - 0x0000007c, 0xbf8cc07f, 4247 4247 - 0x80708470, 0xbefc007e, 4248 4248 - 0xb8f1f801, 0xbefe007c, 4173 4173 + 0xb97af807, 0x86fe7e7e, 4174 4174 + 0x86ea6a6a, 0x8f6e8378, 4175 4175 + 0xb96ee0c2, 0xbf800002, 4176 4176 + 0xb9780002, 0xbe801f6c, 4177 4177 + 0x866dff6d, 0x0000ffff, 4178 4178 + 0xbefa0080, 0xb97a0283, 4179 4179 + 0xb8faf807, 0x867aff7a, 4180 4180 + 0x001f8000, 0x8e7a8b7a, 4181 4181 + 0x8979ff79, 0xfc000000, 4182 4182 + 0x87797a79, 0xba7ff807, 4183 4183 + 0x00000000, 0xbeee007e, 4184 4184 + 0xbeef007f, 0xbefe0180, 4185 4185 + 0xbf900004, 0x877a8478, 4186 4186 + 0xb97af802, 0xbf8e0002, 4187 4187 + 0xbf88fffe, 0xb8fa2985, 4188 4188 + 0x807a817a, 0x8e7a8a7a, 4189 4189 + 0x8e7a817a, 0xb8fb1605, 4190 4190 + 0x807b817b, 0x8e7b867b, 4191 4191 + 0x807a7b7a, 0x807a7e7a, 4192 4192 + 0x827b807f, 0x867bff7b, 4193 4193 + 0x0000ffff, 0xc04b1c3d, 4194 4194 + 0x00000050, 0xbf8cc07f, 4195 4195 + 0xc04b1d3d, 0x00000060, 4196 4196 + 0xbf8cc07f, 0xc0431e7d, 4197 4197 + 0x00000074, 0xbf8cc07f, 4198 4198 + 0xbef4007e, 0x8675ff7f, 4199 4199 + 0x0000ffff, 0x8775ff75, 4200 4200 + 0x00040000, 0xbef60080, 4201 4201 + 0xbef700ff, 0x00807fac, 4202 4202 + 0xbef1007c, 0xbef00080, 4203 4203 + 0xb8f02985, 0x80708170, 4204 4204 + 0x8e708a70, 0x8e708170, 4205 4205 + 0xb8fa1605, 0x807a817a, 4206 4206 + 0x8e7a867a, 0x80707a70, 4207 4207 + 0xbef60084, 0xbef600ff, 4208 4208 + 0x01000000, 0xbefe007c, 4249 4209 0xbefc0070, 0xc0611c7a, 4250 4210 0x0000007c, 0xbf8cc07f, 4251 4211 0x80708470, 0xbefc007e, 4212 4212 + 0xbefe007c, 0xbefc0070, 4213 4213 + 0xc0611b3a, 0x0000007c, 4214 4214 + 0xbf8cc07f, 0x80708470, 4215 4215 + 0xbefc007e, 0xbefe007c, 4216 4216 + 0xbefc0070, 0xc0611b7a, 4217 4217 + 0x0000007c, 0xbf8cc07f, 4218 4218 + 0x80708470, 0xbefc007e, 4219 4219 + 0xbefe007c, 0xbefc0070, 4220 4220 + 0xc0611bba, 0x0000007c, 4221 4221 + 0xbf8cc07f, 0x80708470, 4222 4222 + 0xbefc007e, 0xbefe007c, 4223 4223 + 0xbefc0070, 0xc0611bfa, 4224 4224 + 0x0000007c, 0xbf8cc07f, 4225 4225 + 0x80708470, 0xbefc007e, 4226 4226 + 0xbefe007c, 0xbefc0070, 4227 4227 + 0xc0611e3a, 0x0000007c, 4228 4228 + 0xbf8cc07f, 0x80708470, 4229 4229 + 0xbefc007e, 0xb8fbf803, 4230 4230 + 0xbefe007c, 0xbefc0070, 4231 4231 + 0xc0611efa, 0x0000007c, 4232 4232 + 0xbf8cc07f, 0x80708470, 4233 4233 + 0xbefc007e, 0xbefe007c, 4234 4234 + 0xbefc0070, 0xc0611a3a, 4235 4235 + 0x0000007c, 0xbf8cc07f, 4236 4236 + 0x80708470, 0xbefc007e, 4237 4237 + 0xbefe007c, 0xbefc0070, 4238 4238 + 0xc0611a7a, 0x0000007c, 4239 4239 + 0xbf8cc07f, 0x80708470, 4240 4240 + 0xbefc007e, 0xb8f1f801, 4241 4241 + 0xbefe007c, 0xbefc0070, 4242 4242 + 0xc0611c7a, 0x0000007c, 4243 4243 + 0xbf8cc07f, 0x80708470, 4244 4244 + 0xbefc007e, 0xbf108080, 4252 4245 0x867aff7f, 0x04000000, 4253 4246 0xbeef0080, 0x876f6f7a, 4254 4247 0xb8f02985, 0x80708170,

+3 -1

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm

reviewed

··· 447 447 s_getreg_b32 s_save_m0, hwreg(HW_REG_MODE) //MODE 448 448 write_hwreg_to_mem(s_save_m0, s_save_buf_rsrc0, s_save_mem_offset) 449 449 450 450 - 450 450 + // Clear VSKIP state now that MODE.VSKIP has been saved. 451 451 + // If user shader set it then vector instructions would be skipped. 452 452 + s_setvskip 0,0 451 453 452 454 /* the first wave in the threadgroup */ 453 455 s_and_b32 s_save_tmp, s_save_spi_init_hi, S_SAVE_SPI_INIT_FIRST_WAVE_MASK // extract fisrt wave bit

+14 -8

drivers/gpu/drm/amd/amdkfd/kfd_migrate.c

reviewed

··· 278 278 struct migrate_vma *migrate, struct dma_fence **mfence, 279 279 dma_addr_t *scratch, uint64_t ttm_res_offset) 280 280 { 281 281 - uint64_t npages = migrate->cpages; 281 281 + uint64_t npages = migrate->npages; 282 282 struct amdgpu_device *adev = node->adev; 283 283 struct device *dev = adev->dev; 284 284 struct amdgpu_res_cursor cursor; 285 285 + uint64_t mpages = 0; 285 286 dma_addr_t *src; 286 287 uint64_t *dst; 287 288 uint64_t i, j; ··· 296 295 297 296 amdgpu_res_first(prange->ttm_res, ttm_res_offset, 298 297 npages << PAGE_SHIFT, &cursor); 299 299 - for (i = j = 0; i < npages; i++) { 298 298 + for (i = j = 0; (i < npages) && (mpages < migrate->cpages); i++) { 300 299 struct page *spage; 301 300 302 302 - dst[i] = cursor.start + (j << PAGE_SHIFT); 303 303 - migrate->dst[i] = svm_migrate_addr_to_pfn(adev, dst[i]); 304 304 - svm_migrate_get_vram_page(prange, migrate->dst[i]); 305 305 - migrate->dst[i] = migrate_pfn(migrate->dst[i]); 306 306 - 301 301 + if (migrate->src[i] & MIGRATE_PFN_MIGRATE) { 302 302 + dst[i] = cursor.start + (j << PAGE_SHIFT); 303 303 + migrate->dst[i] = svm_migrate_addr_to_pfn(adev, dst[i]); 304 304 + svm_migrate_get_vram_page(prange, migrate->dst[i]); 305 305 + migrate->dst[i] = migrate_pfn(migrate->dst[i]); 306 306 + mpages++; 307 307 + } 307 308 spage = migrate_pfn_to_page(migrate->src[i]); 308 309 if (spage && !is_zone_device_page(spage)) { 309 310 src[i] = dma_map_page(dev, spage, 0, PAGE_SIZE, ··· 356 353 out_free_vram_pages: 357 354 if (r) { 358 355 pr_debug("failed %d to copy memory to vram\n", r); 359 359 - while (i--) { 356 356 + for (i = 0; i < npages && mpages; i++) { 357 357 + if (!dst[i]) 358 358 + continue; 360 359 svm_migrate_put_vram_page(adev, dst[i]); 361 360 migrate->dst[i] = 0; 361 361 + mpages--; 362 362 } 363 363 } 364 364

+8

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

reviewed

··· 2034 2034 if (amdgpu_dc_debug_mask & DC_FORCE_SUBVP_MCLK_SWITCH) 2035 2035 adev->dm.dc->debug.force_subvp_mclk_switch = true; 2036 2036 2037 2037 + if (amdgpu_dc_debug_mask & DC_DISABLE_SUBVP) 2038 2038 + adev->dm.dc->debug.force_disable_subvp = true; 2039 2039 + 2037 2040 if (amdgpu_dc_debug_mask & DC_ENABLE_DML2) { 2038 2041 adev->dm.dc->debug.using_dml2 = true; 2039 2042 adev->dm.dc->debug.using_dml21 = true; ··· 11485 11482 drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) { 11486 11483 new_plane_state = drm_atomic_get_plane_state(state, plane); 11487 11484 old_plane_state = drm_atomic_get_plane_state(state, plane); 11485 11485 + 11486 11486 + if (IS_ERR(new_plane_state) || IS_ERR(old_plane_state)) { 11487 11487 + DRM_ERROR("Failed to get plane state for plane %s\n", plane->name); 11488 11488 + return false; 11489 11489 + } 11488 11490 11489 11491 if (old_plane_state->fb && new_plane_state->fb && 11490 11492 get_mem_type(old_plane_state->fb) != get_mem_type(new_plane_state->fb))

+6 -6

drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c

reviewed

··· 1736 1736 #endif 1737 1737 } // CalculateBytePerPixelAndBlockSizes 1738 1738 1739 1739 - static dml_float_t CalculateTWait( 1739 1739 + static noinline_for_stack dml_float_t CalculateTWait( 1740 1740 dml_uint_t PrefetchMode, 1741 1741 enum dml_use_mall_for_pstate_change_mode UseMALLForPStateChange, 1742 1742 dml_bool_t SynchronizeDRRDisplaysForUCLKPStateChangeFinal, ··· 4458 4458 } 4459 4459 } // CalculateSwathWidth 4460 4460 4461 4461 - static dml_float_t CalculateExtraLatency( 4461 4461 + static noinline_for_stack dml_float_t CalculateExtraLatency( 4462 4462 dml_uint_t RoundTripPingLatencyCycles, 4463 4463 dml_uint_t ReorderingBytes, 4464 4464 dml_float_t DCFCLK, ··· 5915 5915 return DSCDelayRequirement_val; 5916 5916 } 5917 5917 5918 5918 - static dml_bool_t CalculateVActiveBandwithSupport(dml_uint_t NumberOfActiveSurfaces, 5918 5918 + static noinline_for_stack dml_bool_t CalculateVActiveBandwithSupport(dml_uint_t NumberOfActiveSurfaces, 5919 5919 dml_float_t ReturnBW, 5920 5920 dml_bool_t NotUrgentLatencyHiding[], 5921 5921 dml_float_t ReadBandwidthLuma[], ··· 6019 6019 #endif 6020 6020 } 6021 6021 6022 6022 - static dml_float_t CalculateBandwidthAvailableForImmediateFlip( 6022 6022 + static noinline_for_stack dml_float_t CalculateBandwidthAvailableForImmediateFlip( 6023 6023 dml_uint_t NumberOfActiveSurfaces, 6024 6024 dml_float_t ReturnBW, 6025 6025 dml_float_t ReadBandwidthLuma[], ··· 6213 6213 return max_vstartup_lines; 6214 6214 } 6215 6215 6216 6216 - static void set_calculate_prefetch_schedule_params(struct display_mode_lib_st *mode_lib, 6216 6216 + static noinline_for_stack void set_calculate_prefetch_schedule_params(struct display_mode_lib_st *mode_lib, 6217 6217 struct CalculatePrefetchSchedule_params_st *CalculatePrefetchSchedule_params, 6218 6218 dml_uint_t j, 6219 6219 dml_uint_t k) ··· 6265 6265 CalculatePrefetchSchedule_params->Tno_bw = &mode_lib->ms.Tno_bw[k]; 6266 6266 } 6267 6267 6268 6268 - static void dml_prefetch_check(struct display_mode_lib_st *mode_lib) 6268 6268 + static noinline_for_stack void dml_prefetch_check(struct display_mode_lib_st *mode_lib) 6269 6269 { 6270 6270 struct dml_core_mode_support_locals_st *s = &mode_lib->scratch.dml_core_mode_support_locals; 6271 6271 struct CalculatePrefetchSchedule_params_st *CalculatePrefetchSchedule_params = &mode_lib->scratch.CalculatePrefetchSchedule_params;

+6 -6

drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

reviewed

··· 2778 2778 return return_bw_mbps; 2779 2779 } 2780 2780 2781 2781 - static void calculate_bandwidth_available( 2781 2781 + static noinline_for_stack void calculate_bandwidth_available( 2782 2782 double avg_bandwidth_available_min[dml2_core_internal_soc_state_max], 2783 2783 double avg_bandwidth_available[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], 2784 2784 double urg_bandwidth_available_min[dml2_core_internal_soc_state_max], // min between SDP and DRAM ··· 3625 3625 dml2_printf("DML::%s: DCFClkDeepSleep = %f (final)\n", __func__, *DCFClkDeepSleep); 3626 3626 } 3627 3627 3628 3628 - static void CalculateDCFCLKDeepSleep( 3628 3628 + static noinline_for_stack void CalculateDCFCLKDeepSleep( 3629 3629 const struct dml2_display_cfg *display_cfg, 3630 3630 unsigned int NumberOfActiveSurfaces, 3631 3631 unsigned int BytePerPixelY[], ··· 4142 4142 return true; 4143 4143 } 4144 4144 4145 4145 - static void CalculateODMMode( 4145 4145 + static noinline_for_stack void CalculateODMMode( 4146 4146 unsigned int MaximumPixelsPerLinePerDSCUnit, 4147 4147 unsigned int HActive, 4148 4148 enum dml2_output_format_class OutFormat, ··· 4239 4239 #endif 4240 4240 } 4241 4241 4242 4242 - static void CalculateOutputLink( 4242 4242 + static noinline_for_stack void CalculateOutputLink( 4243 4243 struct dml2_core_internal_scratch *s, 4244 4244 double PHYCLK, 4245 4245 double PHYCLKD18, ··· 5999 5999 } 6000 6000 6001 6001 // a global check against the aggregate effect of the per plane prefetch schedule 6002 6002 - static bool CheckGlobalPrefetchAdmissibility(struct dml2_core_internal_scratch *scratch, 6002 6002 + static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core_internal_scratch *scratch, 6003 6003 struct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_params *p) 6004 6004 { 6005 6005 struct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_locals *s = &scratch->CheckGlobalPrefetchAdmissibility_locals; ··· 7012 7012 } 7013 7013 } 7014 7014 7015 7015 - static void calculate_vactive_det_fill_latency( 7015 7015 + static noinline_for_stack void calculate_vactive_det_fill_latency( 7016 7016 const struct dml2_display_cfg *display_cfg, 7017 7017 unsigned int num_active_planes, 7018 7018 unsigned int bytes_required_l[],

+7 -3

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

reviewed

··· 194 194 dpp->filter_h = NULL; 195 195 dpp->filter_v = NULL; 196 196 197 197 + memset(&dpp_base->pos, 0, sizeof(dpp_base->pos)); 198 198 + memset(&dpp_base->att, 0, sizeof(dpp_base->att)); 199 199 + 197 200 memset(&dpp->scl_data, 0, sizeof(dpp->scl_data)); 198 201 memset(&dpp->pwl_data, 0, sizeof(dpp->pwl_data)); 199 202 } ··· 483 480 if (src_y_offset + cursor_height <= 0) 484 481 cur_en = 0; /* not visible beyond top edge*/ 485 482 486 486 - REG_UPDATE(CURSOR0_CONTROL, 487 487 - CUR0_ENABLE, cur_en); 483 483 + if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) { 484 484 + REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en); 488 485 489 489 - dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en; 486 486 + dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en; 487 487 + } 490 488 } 491 489 492 490 void dpp1_cnv_set_optional_cursor_attributes(

+4 -2

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c

reviewed

··· 154 154 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); 155 155 uint32_t cur_en = pos->enable ? 1 : 0; 156 156 157 157 - REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en); 157 157 + if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) { 158 158 + REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en); 158 159 159 159 - dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en; 160 160 + dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en; 161 161 + } 160 162 } 161 163 162 164 void dpp401_set_optional_cursor_attributes(

+9 -1

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

reviewed

··· 546 546 SECONDARY_SURFACE_DCC_IND_64B_BLK, dcc_ind_64b_blk); 547 547 } 548 548 549 549 + void hubp_reset(struct hubp *hubp) 550 550 + { 551 551 + memset(&hubp->pos, 0, sizeof(hubp->pos)); 552 552 + memset(&hubp->att, 0, sizeof(hubp->att)); 553 553 + } 554 554 + 549 555 void hubp1_program_surface_config( 550 556 struct hubp *hubp, 551 557 enum surface_pixel_format format, ··· 1357 1351 1358 1352 void hubp1_init(struct hubp *hubp) 1359 1353 { 1360 1360 - //do nothing 1354 1354 + hubp_reset(hubp); 1361 1355 } 1356 1356 + 1362 1357 static const struct hubp_funcs dcn10_hubp_funcs = { 1363 1358 .hubp_program_surface_flip_and_addr = 1364 1359 hubp1_program_surface_flip_and_addr, ··· 1372 1365 .hubp_set_vm_context0_settings = hubp1_set_vm_context0_settings, 1373 1366 .set_blank = hubp1_set_blank, 1374 1367 .dcc_control = hubp1_dcc_control, 1368 1368 + .hubp_reset = hubp_reset, 1375 1369 .mem_program_viewport = min_set_viewport, 1376 1370 .set_hubp_blank_en = hubp1_set_hubp_blank_en, 1377 1371 .set_cursor_attributes = hubp1_cursor_set_attributes,

+2

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

reviewed

··· 746 746 bool enable, 747 747 enum hubp_ind_block_size independent_64b_blks); 748 748 749 749 + void hubp_reset(struct hubp *hubp); 750 750 + 749 751 bool hubp1_program_surface_flip_and_addr( 750 752 struct hubp *hubp, 751 753 const struct dc_plane_address *address,

+6 -3

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

reviewed

··· 1058 1058 if (src_y_offset + cursor_height <= 0) 1059 1059 cur_en = 0; /* not visible beyond top edge*/ 1060 1060 1061 1061 - if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) 1062 1062 - hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr); 1061 1061 + if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) { 1062 1062 + if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) 1063 1063 + hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr); 1063 1064 1064 1064 - REG_UPDATE(CURSOR_CONTROL, 1065 1065 + REG_UPDATE(CURSOR_CONTROL, 1065 1066 CURSOR_ENABLE, cur_en); 1067 1067 + } 1066 1068 1067 1069 REG_SET_2(CURSOR_POSITION, 0, 1068 1070 CURSOR_X_POSITION, pos->x, ··· 1676 1674 .set_blank = hubp2_set_blank, 1677 1675 .set_blank_regs = hubp2_set_blank_regs, 1678 1676 .dcc_control = hubp2_dcc_control, 1677 1677 + .hubp_reset = hubp_reset, 1679 1678 .mem_program_viewport = min_set_viewport, 1680 1679 .set_cursor_attributes = hubp2_cursor_set_attributes, 1681 1680 .set_cursor_position = hubp2_cursor_set_position,

+1

drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c

reviewed

··· 121 121 .set_cursor_position = hubp1_cursor_set_position, 122 122 .set_blank = hubp1_set_blank, 123 123 .dcc_control = hubp1_dcc_control, 124 124 + .hubp_reset = hubp_reset, 124 125 .mem_program_viewport = min_set_viewport, 125 126 .hubp_clk_cntl = hubp1_clk_cntl, 126 127 .hubp_vtg_sel = hubp1_vtg_sel,

+3

drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c

reviewed

··· 811 811 struct dcn21_hubp *hubp21 = TO_DCN21_HUBP(hubp); 812 812 //hubp[i].HUBPREQ_DEBUG.HUBPREQ_DEBUG[26] = 1; 813 813 REG_WRITE(HUBPREQ_DEBUG, 1 << 26); 814 814 + 815 815 + hubp_reset(hubp); 814 816 } 815 817 static struct hubp_funcs dcn21_hubp_funcs = { 816 818 .hubp_enable_tripleBuffer = hubp2_enable_triplebuffer, ··· 825 823 .hubp_set_vm_system_aperture_settings = hubp21_set_vm_system_aperture_settings, 826 824 .set_blank = hubp1_set_blank, 827 825 .dcc_control = hubp1_dcc_control, 826 826 + .hubp_reset = hubp_reset, 828 827 .mem_program_viewport = hubp21_set_viewport, 829 828 .set_cursor_attributes = hubp2_cursor_set_attributes, 830 829 .set_cursor_position = hubp1_cursor_set_position,

+3

drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

reviewed

··· 499 499 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); 500 500 //hubp[i].HUBPREQ_DEBUG.HUBPREQ_DEBUG[26] = 1; 501 501 REG_WRITE(HUBPREQ_DEBUG, 1 << 26); 502 502 + 503 503 + hubp_reset(hubp); 502 504 } 503 505 504 506 static struct hubp_funcs dcn30_hubp_funcs = { ··· 515 513 .set_blank = hubp2_set_blank, 516 514 .set_blank_regs = hubp2_set_blank_regs, 517 515 .dcc_control = hubp3_dcc_control, 516 516 + .hubp_reset = hubp_reset, 518 517 .mem_program_viewport = min_set_viewport, 519 518 .set_cursor_attributes = hubp2_cursor_set_attributes, 520 519 .set_cursor_position = hubp2_cursor_set_position,

+1

drivers/gpu/drm/amd/display/dc/hubp/dcn31/dcn31_hubp.c

reviewed

··· 79 79 .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings, 80 80 .set_blank = hubp2_set_blank, 81 81 .dcc_control = hubp3_dcc_control, 82 82 + .hubp_reset = hubp_reset, 82 83 .mem_program_viewport = min_set_viewport, 83 84 .set_cursor_attributes = hubp2_cursor_set_attributes, 84 85 .set_cursor_position = hubp2_cursor_set_position,

+1

drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c

reviewed

··· 181 181 .set_blank = hubp2_set_blank, 182 182 .set_blank_regs = hubp2_set_blank_regs, 183 183 .dcc_control = hubp3_dcc_control, 184 184 + .hubp_reset = hubp_reset, 184 185 .mem_program_viewport = min_set_viewport, 185 186 .set_cursor_attributes = hubp32_cursor_set_attributes, 186 187 .set_cursor_position = hubp2_cursor_set_position,

+1

drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c

reviewed

··· 199 199 .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings, 200 200 .set_blank = hubp2_set_blank, 201 201 .dcc_control = hubp3_dcc_control, 202 202 + .hubp_reset = hubp_reset, 202 203 .mem_program_viewport = min_set_viewport, 203 204 .set_cursor_attributes = hubp2_cursor_set_attributes, 204 205 .set_cursor_position = hubp2_cursor_set_position,

+8 -5

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

reviewed

··· 141 141 142 142 void hubp401_init(struct hubp *hubp) 143 143 { 144 144 - //For now nothing to do, HUBPREQ_DEBUG_DB register is removed on DCN4x. 144 144 + hubp_reset(hubp); 145 145 } 146 146 147 147 void hubp401_vready_at_or_After_vsync(struct hubp *hubp, ··· 742 742 dc_fixpt_from_int(dst_x_offset), 743 743 param->h_scale_ratio)); 744 744 745 745 - if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) 746 746 - hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr); 745 745 + if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) { 746 746 + if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) 747 747 + hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr); 747 748 748 748 - REG_UPDATE(CURSOR_CONTROL, 749 749 - CURSOR_ENABLE, cur_en); 749 749 + REG_UPDATE(CURSOR_CONTROL, 750 750 + CURSOR_ENABLE, cur_en); 751 751 + } 750 752 751 753 REG_SET_2(CURSOR_POSITION, 0, 752 754 CURSOR_X_POSITION, x_pos, ··· 1000 998 .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings, 1001 999 .set_blank = hubp2_set_blank, 1002 1000 .set_blank_regs = hubp2_set_blank_regs, 1001 1001 + .hubp_reset = hubp_reset, 1003 1002 .mem_program_viewport = hubp401_set_viewport, 1004 1003 .set_cursor_attributes = hubp32_cursor_set_attributes, 1005 1004 .set_cursor_position = hubp401_cursor_set_position,

+2

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

reviewed

··· 1286 1286 if (hws->funcs.hubp_pg_control) 1287 1287 hws->funcs.hubp_pg_control(hws, hubp->inst, false); 1288 1288 1289 1289 + hubp->funcs->hubp_reset(hubp); 1289 1290 dpp->funcs->dpp_reset(dpp); 1290 1291 1291 1292 REG_SET(DC_IP_REQUEST_CNTL, 0, ··· 1448 1447 /* Disable on the current state so the new one isn't cleared. */ 1449 1448 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; 1450 1449 1450 1450 + hubp->funcs->hubp_reset(hubp); 1451 1451 dpp->funcs->dpp_reset(dpp); 1452 1452 1453 1453 pipe_ctx->stream_res.tg = tg;

+2

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

reviewed

··· 800 800 /* Disable on the current state so the new one isn't cleared. */ 801 801 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; 802 802 803 803 + hubp->funcs->hubp_reset(hubp); 803 804 dpp->funcs->dpp_reset(dpp); 804 805 805 806 pipe_ctx->stream_res.tg = tg; ··· 957 956 /*to do, need to support both case*/ 958 957 hubp->power_gated = true; 959 958 959 959 + hubp->funcs->hubp_reset(hubp); 960 960 dpp->funcs->dpp_reset(dpp); 961 961 962 962 pipe_ctx->stream = NULL;

+2

drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h

reviewed

··· 163 163 void (*dcc_control)(struct hubp *hubp, bool enable, 164 164 enum hubp_ind_block_size blk_size); 165 165 166 166 + void (*hubp_reset)(struct hubp *hubp); 167 167 + 166 168 void (*mem_program_viewport)( 167 169 struct hubp *hubp, 168 170 const struct rect *viewport,

+18

drivers/gpu/drm/amd/include/amd_pcie.h

reviewed

··· 49 49 | CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3) 50 50 51 51 /* Following flags shows PCIe lane width switch supported in driver which are decided by chipset and ASIC */ 52 52 + 53 53 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1 0x00000001 54 54 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 0x00000002 55 55 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X4 0x00000004 56 56 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X8 0x00000008 57 57 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 0x00000010 58 58 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X16 0x00000020 59 59 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X32 0x00000040 60 60 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_MASK 0x0000FFFF 61 61 + #define CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_SHIFT 0 62 62 + 52 63 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X1 0x00010000 53 64 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 0x00020000 54 65 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 0x00040000 ··· 67 56 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 0x00100000 68 57 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 0x00200000 69 58 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 0x00400000 59 59 + #define CAIL_PCIE_LINK_WIDTH_SUPPORT_MASK 0xFFFF0000 70 60 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_SHIFT 16 71 61 72 62 /* 1/2/4/8/16 lanes */ ··· 76 64 | CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 \ 77 65 | CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 \ 78 66 | CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) 67 67 + 68 68 + #define AMDGPU_DEFAULT_ASIC_PCIE_MLW_MASK (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X1 \ 69 69 + | CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 \ 70 70 + | CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X4 \ 71 71 + | CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X8 \ 72 72 + | CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X16) 79 73 80 74 #endif

+6 -1

drivers/gpu/drm/amd/include/amd_shared.h

reviewed

··· 345 345 */ 346 346 DC_DISABLE_ACPI_EDID = 0x8000, 347 347 348 348 - /* 348 348 + /** 349 349 * @DC_DISABLE_HDMI_CEC: If set, disable HDMI-CEC feature in amdgpu driver. 350 350 */ 351 351 DC_DISABLE_HDMI_CEC = 0x10000, 352 352 + 353 353 + /** 354 354 + * @DC_DISABLE_SUBVP: If set, disable DCN Sub-Viewport feature in amdgpu driver. 355 355 + */ 356 356 + DC_DISABLE_SUBVP = 0x20000, 352 357 }; 353 358 354 359 enum amd_dpm_forced_level;

-1

drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h

reviewed

··· 93 93 #define PPSMC_MSG_SelectPLPDMode 0x40 94 94 #define PPSMC_MSG_RmaDueToBadPageThreshold 0x43 95 95 #define PPSMC_MSG_SelectPstatePolicy 0x44 96 96 - #define PPSMC_MSG_ResetSDMA2 0x45 97 96 #define PPSMC_MSG_ResetSDMA 0x4D 98 97 #define PPSMC_Message_Count 0x4E 99 98

+1 -2

drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h

reviewed

··· 276 276 __SMU_DUMMY_MAP(SelectPstatePolicy), \ 277 277 __SMU_DUMMY_MAP(MALLPowerController), \ 278 278 __SMU_DUMMY_MAP(MALLPowerState), \ 279 279 - __SMU_DUMMY_MAP(ResetSDMA), \ 280 280 - __SMU_DUMMY_MAP(ResetSDMA2), 279 279 + __SMU_DUMMY_MAP(ResetSDMA), 281 280 282 281 #undef __SMU_DUMMY_MAP 283 282 #define __SMU_DUMMY_MAP(type) SMU_MSG_##type

+1

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h

reviewed

··· 107 107 struct smu_13_0_dpm_tables dpm_tables; 108 108 uint32_t workload_policy_mask; 109 109 uint32_t dcef_min_ds_clk; 110 110 + uint64_t caps; 110 111 }; 111 112 112 113 enum smu_13_0_power_state {

+198 -86

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

reviewed

··· 101 101 #define MCA_BANK_IPID(_ip, _hwid, _type) \ 102 102 [AMDGPU_MCA_IP_##_ip] = { .hwid = _hwid, .mcatype = _type, } 103 103 104 104 - static inline bool smu_v13_0_6_is_unified_metrics(struct smu_context *smu) 105 105 - { 106 106 - return (smu->adev->flags & AMD_IS_APU) && 107 107 - smu->smc_fw_version <= 0x4556900; 108 108 - } 104 104 + #define SMU_CAP(x) SMU_13_0_6_CAPS_##x 109 105 110 110 - static inline bool smu_v13_0_6_is_other_end_count_available(struct smu_context *smu) 111 111 - { 112 112 - switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) { 113 113 - case IP_VERSION(13, 0, 6): 114 114 - return smu->smc_fw_version >= 0x557600; 115 115 - case IP_VERSION(13, 0, 14): 116 116 - return smu->smc_fw_version >= 0x05550E00; 117 117 - default: 118 118 - return false; 119 119 - } 120 120 - } 121 121 - 122 122 - static inline bool smu_v13_0_6_is_blw_host_limit_available(struct smu_context *smu) 123 123 - { 124 124 - if (smu->adev->flags & AMD_IS_APU) 125 125 - return smu->smc_fw_version >= 0x04556F00; 126 126 - 127 127 - switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) { 128 128 - case IP_VERSION(13, 0, 6): 129 129 - return smu->smc_fw_version >= 0x557900; 130 130 - case IP_VERSION(13, 0, 14): 131 131 - return smu->smc_fw_version >= 0x05551000; 132 132 - default: 133 133 - return false; 134 134 - } 135 135 - } 106 106 + enum smu_v13_0_6_caps { 107 107 + SMU_CAP(DPM), 108 108 + SMU_CAP(UNI_METRICS), 109 109 + SMU_CAP(DPM_POLICY), 110 110 + SMU_CAP(OTHER_END_METRICS), 111 111 + SMU_CAP(SET_UCLK_MAX), 112 112 + SMU_CAP(PCIE_METRICS), 113 113 + SMU_CAP(HST_LIMIT_METRICS), 114 114 + SMU_CAP(MCA_DEBUG_MODE), 115 115 + SMU_CAP(PER_INST_METRICS), 116 116 + SMU_CAP(CTF_LIMIT), 117 117 + SMU_CAP(RMA_MSG), 118 118 + SMU_CAP(ACA_SYND), 119 119 + SMU_CAP(SDMA_RESET), 120 120 + SMU_CAP(ALL), 121 121 + }; 136 122 137 123 struct mca_bank_ipid { 138 124 enum amdgpu_mca_ip ip; ··· 195 209 MSG_MAP(RmaDueToBadPageThreshold, PPSMC_MSG_RmaDueToBadPageThreshold, 0), 196 210 MSG_MAP(SelectPstatePolicy, PPSMC_MSG_SelectPstatePolicy, 0), 197 211 MSG_MAP(ResetSDMA, PPSMC_MSG_ResetSDMA, 0), 198 198 - MSG_MAP(ResetSDMA2, PPSMC_MSG_ResetSDMA2, 0), 199 212 }; 200 213 201 214 // clang-format on ··· 281 296 struct smu_13_0_dpm_table *dpm_table; 282 297 uint32_t *freq_table; 283 298 }; 299 299 + 300 300 + static inline void smu_v13_0_6_cap_set(struct smu_context *smu, 301 301 + enum smu_v13_0_6_caps cap) 302 302 + { 303 303 + struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context; 304 304 + 305 305 + dpm_context->caps |= BIT_ULL(cap); 306 306 + } 307 307 + 308 308 + static inline void smu_v13_0_6_cap_clear(struct smu_context *smu, 309 309 + enum smu_v13_0_6_caps cap) 310 310 + { 311 311 + struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context; 312 312 + 313 313 + dpm_context->caps &= ~BIT_ULL(cap); 314 314 + } 315 315 + 316 316 + static inline bool smu_v13_0_6_cap_supported(struct smu_context *smu, 317 317 + enum smu_v13_0_6_caps cap) 318 318 + { 319 319 + struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context; 320 320 + 321 321 + return !!(dpm_context->caps & BIT_ULL(cap)); 322 322 + } 323 323 + 324 324 + static void smu_v13_0_14_init_caps(struct smu_context *smu) 325 325 + { 326 326 + enum smu_v13_0_6_caps default_cap_list[] = { SMU_CAP(DPM), 327 327 + SMU_CAP(UNI_METRICS), 328 328 + SMU_CAP(SET_UCLK_MAX), 329 329 + SMU_CAP(DPM_POLICY), 330 330 + SMU_CAP(PCIE_METRICS), 331 331 + SMU_CAP(CTF_LIMIT), 332 332 + SMU_CAP(MCA_DEBUG_MODE), 333 333 + SMU_CAP(RMA_MSG), 334 334 + SMU_CAP(ACA_SYND) }; 335 335 + uint32_t fw_ver = smu->smc_fw_version; 336 336 + 337 337 + for (int i = 0; i < ARRAY_SIZE(default_cap_list); i++) 338 338 + smu_v13_0_6_cap_set(smu, default_cap_list[i]); 339 339 + 340 340 + if (fw_ver >= 0x05550E00) 341 341 + smu_v13_0_6_cap_set(smu, SMU_CAP(OTHER_END_METRICS)); 342 342 + if (fw_ver >= 0x05551000) 343 343 + smu_v13_0_6_cap_set(smu, SMU_CAP(HST_LIMIT_METRICS)); 344 344 + if (fw_ver >= 0x05550B00) 345 345 + smu_v13_0_6_cap_set(smu, SMU_CAP(PER_INST_METRICS)); 346 346 + if (fw_ver >= 0x5551200) 347 347 + smu_v13_0_6_cap_set(smu, SMU_CAP(SDMA_RESET)); 348 348 + } 349 349 + 350 350 + static void smu_v13_0_12_init_caps(struct smu_context *smu) 351 351 + { 352 352 + enum smu_v13_0_6_caps default_cap_list[] = { SMU_CAP(DPM), 353 353 + SMU_CAP(UNI_METRICS), 354 354 + SMU_CAP(PCIE_METRICS), 355 355 + SMU_CAP(CTF_LIMIT), 356 356 + SMU_CAP(MCA_DEBUG_MODE), 357 357 + SMU_CAP(RMA_MSG), 358 358 + SMU_CAP(ACA_SYND) }; 359 359 + uint32_t fw_ver = smu->smc_fw_version; 360 360 + 361 361 + for (int i = 0; i < ARRAY_SIZE(default_cap_list); i++) 362 362 + smu_v13_0_6_cap_set(smu, default_cap_list[i]); 363 363 + 364 364 + if (fw_ver < 0x00561900) 365 365 + smu_v13_0_6_cap_clear(smu, SMU_CAP(DPM)); 366 366 + 367 367 + if (fw_ver >= 0x00561700) 368 368 + smu_v13_0_6_cap_set(smu, SMU_CAP(SDMA_RESET)); 369 369 + } 370 370 + 371 371 + static void smu_v13_0_6_init_caps(struct smu_context *smu) 372 372 + { 373 373 + enum smu_v13_0_6_caps default_cap_list[] = { SMU_CAP(DPM), 374 374 + SMU_CAP(UNI_METRICS), 375 375 + SMU_CAP(SET_UCLK_MAX), 376 376 + SMU_CAP(DPM_POLICY), 377 377 + SMU_CAP(PCIE_METRICS), 378 378 + SMU_CAP(CTF_LIMIT), 379 379 + SMU_CAP(MCA_DEBUG_MODE), 380 380 + SMU_CAP(RMA_MSG), 381 381 + SMU_CAP(ACA_SYND) }; 382 382 + struct amdgpu_device *adev = smu->adev; 383 383 + uint32_t fw_ver = smu->smc_fw_version; 384 384 + uint32_t pgm = (fw_ver >> 24) & 0xFF; 385 385 + 386 386 + for (int i = 0; i < ARRAY_SIZE(default_cap_list); i++) 387 387 + smu_v13_0_6_cap_set(smu, default_cap_list[i]); 388 388 + 389 389 + if (fw_ver < 0x552F00) 390 390 + smu_v13_0_6_cap_clear(smu, SMU_CAP(DPM)); 391 391 + if (fw_ver < 0x554500) 392 392 + smu_v13_0_6_cap_clear(smu, SMU_CAP(CTF_LIMIT)); 393 393 + 394 394 + if (adev->flags & AMD_IS_APU) { 395 395 + smu_v13_0_6_cap_clear(smu, SMU_CAP(PCIE_METRICS)); 396 396 + smu_v13_0_6_cap_clear(smu, SMU_CAP(DPM_POLICY)); 397 397 + smu_v13_0_6_cap_clear(smu, SMU_CAP(RMA_MSG)); 398 398 + smu_v13_0_6_cap_clear(smu, SMU_CAP(ACA_SYND)); 399 399 + 400 400 + if (fw_ver <= 0x4556900) 401 401 + smu_v13_0_6_cap_clear(smu, SMU_CAP(UNI_METRICS)); 402 402 + if (fw_ver >= 0x04556F00) 403 403 + smu_v13_0_6_cap_set(smu, SMU_CAP(HST_LIMIT_METRICS)); 404 404 + if (fw_ver >= 0x04556A00) 405 405 + smu_v13_0_6_cap_set(smu, SMU_CAP(PER_INST_METRICS)); 406 406 + } else { 407 407 + if (fw_ver >= 0x557600) 408 408 + smu_v13_0_6_cap_set(smu, SMU_CAP(OTHER_END_METRICS)); 409 409 + if (fw_ver < 0x00556000) 410 410 + smu_v13_0_6_cap_clear(smu, SMU_CAP(DPM_POLICY)); 411 411 + if (amdgpu_sriov_vf(adev) && (fw_ver < 0x556600)) 412 412 + smu_v13_0_6_cap_clear(smu, SMU_CAP(SET_UCLK_MAX)); 413 413 + if (fw_ver < 0x556300) 414 414 + smu_v13_0_6_cap_clear(smu, SMU_CAP(PCIE_METRICS)); 415 415 + if (fw_ver < 0x554800) 416 416 + smu_v13_0_6_cap_clear(smu, SMU_CAP(MCA_DEBUG_MODE)); 417 417 + if (fw_ver >= 0x556F00) 418 418 + smu_v13_0_6_cap_set(smu, SMU_CAP(PER_INST_METRICS)); 419 419 + if (fw_ver < 0x00555a00) 420 420 + smu_v13_0_6_cap_clear(smu, SMU_CAP(RMA_MSG)); 421 421 + if (fw_ver < 0x00555600) 422 422 + smu_v13_0_6_cap_clear(smu, SMU_CAP(ACA_SYND)); 423 423 + if (pgm == 0 && fw_ver >= 0x557900) 424 424 + smu_v13_0_6_cap_set(smu, SMU_CAP(HST_LIMIT_METRICS)); 425 425 + } 426 426 + if (((pgm == 7) && (fw_ver >= 0x7550700)) || 427 427 + ((pgm == 0) && (fw_ver >= 0x00557900)) || 428 428 + ((pgm == 4) && (fw_ver >= 0x4557000))) 429 429 + smu_v13_0_6_cap_set(smu, SMU_CAP(SDMA_RESET)); 430 430 + } 431 431 + 432 432 + static void smu_v13_0_x_init_caps(struct smu_context *smu) 433 433 + { 434 434 + switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) { 435 435 + case IP_VERSION(13, 0, 12): 436 436 + return smu_v13_0_12_init_caps(smu); 437 437 + case IP_VERSION(13, 0, 14): 438 438 + return smu_v13_0_14_init_caps(smu); 439 439 + default: 440 440 + return smu_v13_0_6_init_caps(smu); 441 441 + } 442 442 + } 443 443 + 444 444 + static int smu_v13_0_6_check_fw_version(struct smu_context *smu) 445 445 + { 446 446 + int r; 447 447 + 448 448 + r = smu_v13_0_check_fw_version(smu); 449 449 + /* Initialize caps flags once fw version is fetched */ 450 450 + if (!r) 451 451 + smu_v13_0_x_init_caps(smu); 452 452 + 453 453 + return r; 454 454 + } 284 455 285 456 static int smu_v13_0_6_init_microcode(struct smu_context *smu) 286 457 { ··· 759 618 MetricsTableA_t *metrics_a = (MetricsTableA_t *)smu_table->metrics_table; 760 619 struct PPTable_t *pptable = 761 620 (struct PPTable_t *)smu_table->driver_pptable; 762 762 - bool flag = smu_v13_0_6_is_unified_metrics(smu); 621 621 + bool flag = !smu_v13_0_6_cap_supported(smu, SMU_CAP(UNI_METRICS)); 763 622 int ret, i, retry = 100; 764 623 uint32_t table_version; 765 624 ··· 955 814 smu_v13_0_6_setup_driver_pptable(smu); 956 815 957 816 /* DPM policy not supported in older firmwares */ 958 958 - if (!(smu->adev->flags & AMD_IS_APU) && 959 959 - (smu->smc_fw_version < 0x00556000)) { 817 817 + if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(DPM_POLICY))) { 960 818 struct smu_dpm_context *smu_dpm = &smu->smu_dpm; 961 819 962 820 smu_dpm->dpm_policies->policy_mask &= ··· 1132 992 struct smu_table_context *smu_table = &smu->smu_table; 1133 993 MetricsTableX_t *metrics_x = (MetricsTableX_t *)smu_table->metrics_table; 1134 994 MetricsTableA_t *metrics_a = (MetricsTableA_t *)smu_table->metrics_table; 1135 1135 - bool flag = smu_v13_0_6_is_unified_metrics(smu); 995 995 + bool flag = !smu_v13_0_6_cap_supported(smu, SMU_CAP(UNI_METRICS)); 1136 996 struct amdgpu_device *adev = smu->adev; 1137 997 int ret = 0; 1138 998 int xcc_id; ··· 1145 1005 switch (member) { 1146 1006 case METRICS_CURR_GFXCLK: 1147 1007 case METRICS_AVERAGE_GFXCLK: 1148 1148 - if (smu->smc_fw_version >= 0x552F00) { 1008 1008 + if (smu_v13_0_6_cap_supported(smu, SMU_CAP(DPM))) { 1149 1009 xcc_id = GET_INST(GC, 0); 1150 1010 *value = SMUQ10_ROUND(GET_METRIC_FIELD(GfxclkFrequency, flag)[xcc_id]); 1151 1011 } else { ··· 1832 1692 static int smu_v13_0_6_mca_set_debug_mode(struct smu_context *smu, bool enable) 1833 1693 { 1834 1694 /* NOTE: this ClearMcaOnRead message is only supported for smu version 85.72.0 or higher */ 1835 1835 - if (smu->smc_fw_version < 0x554800) 1695 1695 + if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(MCA_DEBUG_MODE))) 1836 1696 return 0; 1837 1697 1838 1698 return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ClearMcaOnRead, ··· 1977 1837 if (max == pstate_table->uclk_pstate.curr.max) 1978 1838 return 0; 1979 1839 /* For VF, only allowed in FW versions 85.102 or greater */ 1980 1980 - if (amdgpu_sriov_vf(adev) && 1981 1981 - ((smu->smc_fw_version < 0x556600) || 1982 1982 - (adev->flags & AMD_IS_APU))) 1840 1840 + if (!smu_v13_0_6_cap_supported(smu, 1841 1841 + SMU_CAP(SET_UCLK_MAX))) 1983 1842 return -EOPNOTSUPP; 1984 1843 /* Only max clock limiting is allowed for UCLK */ 1985 1844 ret = smu_v13_0_set_soft_freq_limited_range( ··· 2182 2043 2183 2044 ret = smu_cmn_get_enabled_mask(smu, feature_mask); 2184 2045 2185 2185 - if (ret == -EIO && smu->smc_fw_version < 0x552F00) { 2046 2046 + if (ret == -EIO && !smu_v13_0_6_cap_supported(smu, SMU_CAP(DPM))) { 2186 2047 *feature_mask = 0; 2187 2048 ret = 0; 2188 2049 } ··· 2475 2336 2476 2337 static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table) 2477 2338 { 2478 2478 - bool per_inst, smu_13_0_6_per_inst, smu_13_0_14_per_inst, apu_per_inst; 2479 2339 struct smu_table_context *smu_table = &smu->smu_table; 2480 2340 struct gpu_metrics_v1_7 *gpu_metrics = 2481 2341 (struct gpu_metrics_v1_7 *)smu_table->gpu_metrics_table; 2482 2482 - bool flag = smu_v13_0_6_is_unified_metrics(smu); 2342 2342 + bool flag = !smu_v13_0_6_cap_supported(smu, SMU_CAP(UNI_METRICS)); 2483 2343 int ret = 0, xcc_id, inst, i, j, k, idx; 2484 2344 struct amdgpu_device *adev = smu->adev; 2485 2345 MetricsTableX_t *metrics_x; ··· 2486 2348 struct amdgpu_xcp *xcp; 2487 2349 u16 link_width_level; 2488 2350 u32 inst_mask; 2351 2351 + bool per_inst; 2489 2352 2490 2353 metrics_x = kzalloc(max(sizeof(MetricsTableX_t), sizeof(MetricsTableA_t)), GFP_KERNEL); 2491 2354 ret = smu_v13_0_6_get_metrics_table(smu, metrics_x, true); ··· 2560 2421 * table for both pf & one vf for smu version 85.99.0 or higher else report only 2561 2422 * for pf from registers 2562 2423 */ 2563 2563 - if (smu->smc_fw_version >= 0x556300) { 2424 2424 + if (smu_v13_0_6_cap_supported(smu, SMU_CAP(PCIE_METRICS))) { 2564 2425 gpu_metrics->pcie_link_width = metrics_x->PCIeLinkWidth; 2565 2426 gpu_metrics->pcie_link_speed = 2566 2427 pcie_gen_to_speed(metrics_x->PCIeLinkSpeed); ··· 2589 2450 metrics_x->PCIeNAKSentCountAcc; 2590 2451 gpu_metrics->pcie_nak_rcvd_count_acc = 2591 2452 metrics_x->PCIeNAKReceivedCountAcc; 2592 2592 - if (smu_v13_0_6_is_other_end_count_available(smu)) 2453 2453 + if (smu_v13_0_6_cap_supported(smu, SMU_CAP(OTHER_END_METRICS))) 2593 2454 gpu_metrics->pcie_lc_perf_other_end_recovery = 2594 2455 metrics_x->PCIeOtherEndRecoveryAcc; 2595 2456 ··· 2614 2475 2615 2476 gpu_metrics->num_partition = adev->xcp_mgr->num_xcps; 2616 2477 2617 2617 - apu_per_inst = (adev->flags & AMD_IS_APU) && (smu->smc_fw_version >= 0x04556A00); 2618 2618 - smu_13_0_6_per_inst = !(adev->flags & AMD_IS_APU) && 2619 2619 - (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) 2620 2620 - == IP_VERSION(13, 0, 6)) && 2621 2621 - (smu->smc_fw_version >= 0x556F00); 2622 2622 - smu_13_0_14_per_inst = !(adev->flags & AMD_IS_APU) && 2623 2623 - (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) 2624 2624 - == IP_VERSION(13, 0, 14)) && 2625 2625 - (smu->smc_fw_version >= 0x05550B00); 2626 2626 - 2627 2627 - per_inst = apu_per_inst || smu_13_0_6_per_inst || smu_13_0_14_per_inst; 2478 2478 + per_inst = smu_v13_0_6_cap_supported(smu, SMU_CAP(PER_INST_METRICS)); 2628 2479 2629 2480 for_each_xcp(adev->xcp_mgr, xcp, i) { 2630 2481 amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); ··· 2645 2516 gpu_metrics->xcp_stats[i].gfx_busy_acc[idx] = 2646 2517 SMUQ10_ROUND(metrics_x->GfxBusyAcc[inst]); 2647 2518 2648 2648 - if (smu_v13_0_6_is_blw_host_limit_available(smu)) 2519 2519 + if (smu_v13_0_6_cap_supported( 2520 2520 + smu, SMU_CAP(HST_LIMIT_METRICS))) 2649 2521 gpu_metrics->xcp_stats[i].gfx_below_host_limit_acc[idx] = 2650 2522 SMUQ10_ROUND(metrics_x->GfxclkBelowHostLimitAcc 2651 2523 [inst]); ··· 2754 2624 return -EINVAL; 2755 2625 2756 2626 /*Check smu version, GetCtfLimit message only supported for smu version 85.69 or higher */ 2757 2757 - if (smu->smc_fw_version < 0x554500) 2627 2627 + if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(CTF_LIMIT))) 2758 2628 return 0; 2759 2629 2760 2630 /* Get SOC Max operating temperature */ ··· 2856 2726 2857 2727 static int smu_v13_0_6_send_rma_reason(struct smu_context *smu) 2858 2728 { 2859 2859 - struct amdgpu_device *adev = smu->adev; 2860 2729 int ret; 2861 2730 2862 2731 /* NOTE: the message is only valid on dGPU with pmfw 85.90.0 and above */ 2863 2863 - if ((adev->flags & AMD_IS_APU) || smu->smc_fw_version < 0x00555a00) 2732 2732 + if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(RMA_MSG))) 2864 2733 return 0; 2865 2734 2866 2735 ret = smu_cmn_send_smc_msg(smu, SMU_MSG_RmaDueToBadPageThreshold, NULL); ··· 2873 2744 2874 2745 static int smu_v13_0_6_reset_sdma(struct smu_context *smu, uint32_t inst_mask) 2875 2746 { 2876 2876 - uint32_t smu_program; 2877 2747 int ret = 0; 2878 2748 2879 2879 - smu_program = (smu->smc_fw_version >> 24) & 0xff; 2880 2880 - switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) { 2881 2881 - case IP_VERSION(13, 0, 6): 2882 2882 - if (((smu_program == 7) && (smu->smc_fw_version > 0x07550700)) || 2883 2883 - ((smu_program == 0) && (smu->smc_fw_version > 0x00557700))) 2884 2884 - ret = smu_cmn_send_smc_msg_with_param(smu, 2885 2885 - SMU_MSG_ResetSDMA, inst_mask, NULL); 2886 2886 - else if ((smu_program == 4) && 2887 2887 - (smu->smc_fw_version > 0x4556e6c)) 2888 2888 - ret = smu_cmn_send_smc_msg_with_param(smu, 2889 2889 - SMU_MSG_ResetSDMA2, inst_mask, NULL); 2890 2890 - break; 2891 2891 - case IP_VERSION(13, 0, 14): 2892 2892 - if ((smu_program == 5) && 2893 2893 - (smu->smc_fw_version > 0x05550f00)) 2894 2894 - ret = smu_cmn_send_smc_msg_with_param(smu, 2895 2895 - SMU_MSG_ResetSDMA2, inst_mask, NULL); 2896 2896 - break; 2897 2897 - default: 2898 2898 - break; 2899 2899 - } 2749 2749 + if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(SDMA_RESET))) 2750 2750 + return -EOPNOTSUPP; 2900 2751 2752 2752 + ret = smu_cmn_send_smc_msg_with_param(smu, 2753 2753 + SMU_MSG_ResetSDMA, inst_mask, NULL); 2901 2754 if (ret) 2902 2755 dev_err(smu->adev->dev, 2903 2756 "failed to send ResetSDMA event with mask 0x%x\n", ··· 3198 3087 if (instlo != 0x03b30400) 3199 3088 return false; 3200 3089 3201 3201 - if (!(adev->flags & AMD_IS_APU) && smu->smc_fw_version >= 0x00555600) { 3090 3090 + if (smu_v13_0_6_cap_supported(smu, SMU_CAP(ACA_SYND))) { 3202 3091 errcode = MCA_REG__SYND__ERRORINFORMATION(entry->regs[MCA_REG_IDX_SYND]); 3203 3092 errcode &= 0xff; 3204 3093 } else { ··· 3484 3373 3485 3374 static int aca_smu_parse_error_code(struct amdgpu_device *adev, struct aca_bank *bank) 3486 3375 { 3376 3376 + struct smu_context *smu = adev->powerplay.pp_handle; 3487 3377 int error_code; 3488 3378 3489 3489 - if (!(adev->flags & AMD_IS_APU) && adev->pm.fw_version >= 0x00555600) 3379 3379 + if (smu_v13_0_6_cap_supported(smu, SMU_CAP(ACA_SYND))) 3490 3380 error_code = ACA_REG__SYND__ERRORINFORMATION(bank->regs[ACA_REG_IDX_SYND]); 3491 3381 else 3492 3382 error_code = ACA_REG__STATUS__ERRORCODE(bank->regs[ACA_REG_IDX_STATUS]); ··· 3525 3413 .fini_power = smu_v13_0_fini_power, 3526 3414 .check_fw_status = smu_v13_0_6_check_fw_status, 3527 3415 /* pptable related */ 3528 3528 - .check_fw_version = smu_v13_0_check_fw_version, 3416 3416 + .check_fw_version = smu_v13_0_6_check_fw_version, 3529 3417 .set_driver_table_location = smu_v13_0_set_driver_table_location, 3530 3418 .set_tool_table_location = smu_v13_0_set_tool_table_location, 3531 3419 .notify_memory_pool_location = smu_v13_0_notify_memory_pool_location,

+9

drivers/gpu/drm/drm_client_modeset.c

reviewed

··· 743 743 if ((conn_configured & mask) != mask && conn_configured != conn_seq) 744 744 goto retry; 745 745 746 746 + for (i = 0; i < count; i++) { 747 747 + struct drm_connector *connector = connectors[i]; 748 748 + 749 749 + if (connector->has_tile) 750 750 + drm_client_get_tile_offsets(dev, connectors, connector_count, 751 751 + modes, offsets, i, 752 752 + connector->tile_h_loc, connector->tile_v_loc); 753 753 + } 754 754 + 746 755 /* 747 756 * If the BIOS didn't enable everything it could, fall back to have the 748 757 * same user experiencing of lighting up as much as possible like the

+8 -6

drivers/gpu/drm/drm_fb_helper.c

reviewed

··· 1354 1354 } 1355 1355 EXPORT_SYMBOL(drm_fb_helper_set_par); 1356 1356 1357 1357 - static void pan_set(struct drm_fb_helper *fb_helper, int x, int y) 1357 1357 + static void pan_set(struct drm_fb_helper *fb_helper, int dx, int dy) 1358 1358 { 1359 1359 struct drm_mode_set *mode_set; 1360 1360 1361 1361 mutex_lock(&fb_helper->client.modeset_mutex); 1362 1362 drm_client_for_each_modeset(mode_set, &fb_helper->client) { 1363 1363 - mode_set->x = x; 1364 1364 - mode_set->y = y; 1363 1363 + mode_set->x += dx; 1364 1364 + mode_set->y += dy; 1365 1365 } 1366 1366 mutex_unlock(&fb_helper->client.modeset_mutex); 1367 1367 } ··· 1370 1370 struct fb_info *info) 1371 1371 { 1372 1372 struct drm_fb_helper *fb_helper = info->par; 1373 1373 - int ret; 1373 1373 + int ret, dx, dy; 1374 1374 1375 1375 - pan_set(fb_helper, var->xoffset, var->yoffset); 1375 1375 + dx = var->xoffset - info->var.xoffset; 1376 1376 + dy = var->yoffset - info->var.yoffset; 1377 1377 + pan_set(fb_helper, dx, dy); 1376 1378 1377 1379 ret = drm_client_modeset_commit_locked(&fb_helper->client); 1378 1380 if (!ret) { 1379 1381 info->var.xoffset = var->xoffset; 1380 1382 info->var.yoffset = var->yoffset; 1381 1383 } else 1382 1382 - pan_set(fb_helper, info->var.xoffset, info->var.yoffset); 1384 1384 + pan_set(fb_helper, -dx, -dy); 1383 1385 1384 1386 return ret; 1385 1387 }

-1

drivers/gpu/drm/tiny/bochs.c

reviewed

··· 757 757 758 758 drm_dev_unplug(dev); 759 759 drm_atomic_helper_shutdown(dev); 760 760 - drm_dev_put(dev); 761 760 } 762 761 763 762 static void bochs_pci_shutdown(struct pci_dev *pdev)

+12 -4

drivers/gpu/drm/v3d/v3d_irq.c

reviewed

··· 107 107 108 108 v3d_job_update_stats(&v3d->bin_job->base, V3D_BIN); 109 109 trace_v3d_bcl_irq(&v3d->drm, fence->seqno); 110 110 - dma_fence_signal(&fence->base); 110 110 + 111 111 v3d->bin_job = NULL; 112 112 + dma_fence_signal(&fence->base); 113 113 + 112 114 status = IRQ_HANDLED; 113 115 } 114 116 ··· 120 118 121 119 v3d_job_update_stats(&v3d->render_job->base, V3D_RENDER); 122 120 trace_v3d_rcl_irq(&v3d->drm, fence->seqno); 123 123 - dma_fence_signal(&fence->base); 121 121 + 124 122 v3d->render_job = NULL; 123 123 + dma_fence_signal(&fence->base); 124 124 + 125 125 status = IRQ_HANDLED; 126 126 } 127 127 ··· 133 129 134 130 v3d_job_update_stats(&v3d->csd_job->base, V3D_CSD); 135 131 trace_v3d_csd_irq(&v3d->drm, fence->seqno); 136 136 - dma_fence_signal(&fence->base); 132 132 + 137 133 v3d->csd_job = NULL; 134 134 + dma_fence_signal(&fence->base); 135 135 + 138 136 status = IRQ_HANDLED; 139 137 } 140 138 ··· 173 167 174 168 v3d_job_update_stats(&v3d->tfu_job->base, V3D_TFU); 175 169 trace_v3d_tfu_irq(&v3d->drm, fence->seqno); 176 176 - dma_fence_signal(&fence->base); 170 170 + 177 171 v3d->tfu_job = NULL; 172 172 + dma_fence_signal(&fence->base); 173 173 + 178 174 status = IRQ_HANDLED; 179 175 } 180 176

+6 -5

drivers/gpu/drm/virtio/virtgpu_prime.c

reviewed

··· 189 189 struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj); 190 190 struct virtio_gpu_device *vgdev = obj->dev->dev_private; 191 191 struct dma_buf_attachment *attach = obj->import_attach; 192 192 - struct dma_resv *resv = attach->dmabuf->resv; 193 192 194 193 if (attach) { 195 195 - dma_resv_lock(resv, NULL); 194 194 + struct dma_buf *dmabuf = attach->dmabuf; 195 195 + 196 196 + dma_resv_lock(dmabuf->resv, NULL); 196 197 197 198 virtio_gpu_detach_object_fenced(bo); 198 199 ··· 201 200 dma_buf_unmap_attachment(attach, bo->sgt, 202 201 DMA_BIDIRECTIONAL); 203 202 204 204 - dma_resv_unlock(resv); 203 203 + dma_resv_unlock(dmabuf->resv); 205 204 206 206 - dma_buf_detach(attach->dmabuf, attach); 207 207 - dma_buf_put(attach->dmabuf); 205 205 + dma_buf_detach(dmabuf, attach); 206 206 + dma_buf_put(dmabuf); 208 207 } 209 208 210 209 if (bo->created) {

+1 -2

drivers/gpu/drm/xlnx/zynqmp_dp.c

reviewed

··· 1564 1564 1565 1565 pm_runtime_get_sync(dp->dev); 1566 1566 1567 1567 - mutex_lock(&dp->lock); 1567 1567 + guard(mutex)(&dp->lock); 1568 1568 zynqmp_dp_disp_enable(dp, old_bridge_state); 1569 1569 1570 1570 /* ··· 1624 1624 zynqmp_dp_write(dp, ZYNQMP_DP_SOFTWARE_RESET, 1625 1625 ZYNQMP_DP_SOFTWARE_RESET_ALL); 1626 1626 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_ENABLE, 1); 1627 1627 - mutex_unlock(&dp->lock); 1628 1627 } 1629 1628 1630 1629 static void zynqmp_dp_bridge_atomic_disable(struct drm_bridge *bridge,

+1

drivers/gpu/drm/xlnx/zynqmp_dpsub.h

reviewed

··· 60 60 * @layers: Video and graphics layers 61 61 * @dp: The DisplayPort controller 62 62 * @dma_align: DMA alignment constraint (must be a power of 2) 63 63 + * @audio: DP audio data 63 64 */ 64 65 struct zynqmp_dpsub { 65 66 struct device *dev;

-1

init/Kconfig

reviewed

··· 1131 1131 1132 1132 config CGROUP_RDMA 1133 1133 bool "RDMA controller" 1134 1134 - select PAGE_COUNTER 1135 1134 help 1136 1135 Provides enforcement of RDMA resources defined by IB stack. 1137 1136 It is fairly easy for consumers to exhaust RDMA resources, which