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iommu/amd: Add support for hw_info for iommu capability query

AMD IOMMU Extended Feature (EFR) and Extended Feature 2 (EFR2) registers
specify features supported by each IOMMU hardware instance.
The IOMMU driver checks each feature-specific bits before enabling
each feature at run time.

For IOMMUFD, the hypervisor passes the raw value of amd_iommu_efr and
amd_iommu_efr2 to VMM via iommufd IOMMU_DEVICE_GET_HW_INFO ioctl.

Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

authored by

Suravee Suthikulpanit and committed by
Joerg Roedel
7d8b06ec 2e666595

+87
+10
drivers/iommu/amd/Kconfig
··· 30 30 your BIOS for an option to enable it or if you have an IVRS ACPI 31 31 table. 32 32 33 + config AMD_IOMMU_IOMMUFD 34 + bool "Enable IOMMUFD features for AMD IOMMU (EXPERIMENTAL)" 35 + depends on IOMMUFD 36 + depends on AMD_IOMMU 37 + help 38 + Support for IOMMUFD features intended to support virtual machines 39 + with accelerated virtual IOMMUs. 40 + 41 + Say Y here if you are doing development and testing on this feature. 42 + 33 43 config AMD_IOMMU_DEBUGFS 34 44 bool "Enable AMD IOMMU internals in DebugFS" 35 45 depends on AMD_IOMMU && IOMMU_DEBUGFS
+1
drivers/iommu/amd/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0-only 2 2 obj-y += iommu.o init.o quirks.o ppr.o pasid.o 3 + obj-$(CONFIG_AMD_IOMMU_IOMMUFD) += iommufd.o 3 4 obj-$(CONFIG_AMD_IOMMU_DEBUGFS) += debugfs.o
+2
drivers/iommu/amd/iommu.c
··· 43 43 #include <linux/generic_pt/iommu.h> 44 44 45 45 #include "amd_iommu.h" 46 + #include "iommufd.h" 46 47 #include "../irq_remapping.h" 47 48 #include "../iommu-pages.h" 48 49 ··· 3084 3083 3085 3084 const struct iommu_ops amd_iommu_ops = { 3086 3085 .capable = amd_iommu_capable, 3086 + .hw_info = amd_iommufd_hw_info, 3087 3087 .blocked_domain = &blocked_domain, 3088 3088 .release_domain = &blocked_domain, 3089 3089 .identity_domain = &identity_domain.domain,
+31
drivers/iommu/amd/iommufd.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * Copyright (C) 2025 Advanced Micro Devices, Inc. 4 + */ 5 + 6 + #include <linux/iommu.h> 7 + 8 + #include "iommufd.h" 9 + #include "amd_iommu.h" 10 + #include "amd_iommu_types.h" 11 + 12 + void *amd_iommufd_hw_info(struct device *dev, u32 *length, u32 *type) 13 + { 14 + struct iommu_hw_info_amd *hwinfo; 15 + 16 + if (*type != IOMMU_HW_INFO_TYPE_DEFAULT && 17 + *type != IOMMU_HW_INFO_TYPE_AMD) 18 + return ERR_PTR(-EOPNOTSUPP); 19 + 20 + hwinfo = kzalloc(sizeof(*hwinfo), GFP_KERNEL); 21 + if (!hwinfo) 22 + return ERR_PTR(-ENOMEM); 23 + 24 + *length = sizeof(*hwinfo); 25 + *type = IOMMU_HW_INFO_TYPE_AMD; 26 + 27 + hwinfo->efr = amd_iommu_efr; 28 + hwinfo->efr2 = amd_iommu_efr2; 29 + 30 + return hwinfo; 31 + }
+15
drivers/iommu/amd/iommufd.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (C) 2025 Advanced Micro Devices, Inc. 4 + */ 5 + 6 + #ifndef AMD_IOMMUFD_H 7 + #define AMD_IOMMUFD_H 8 + 9 + #if IS_ENABLED(CONFIG_AMD_IOMMU_IOMMUFD) 10 + void *amd_iommufd_hw_info(struct device *dev, u32 *length, u32 *type); 11 + #else 12 + #define amd_iommufd_hw_info NULL 13 + #endif /* CONFIG_AMD_IOMMU_IOMMUFD */ 14 + 15 + #endif /* AMD_IOMMUFD_H */
+28
include/uapi/linux/iommufd.h
··· 624 624 }; 625 625 626 626 /** 627 + * struct iommu_hw_info_amd - AMD IOMMU device info 628 + * 629 + * @efr : Value of AMD IOMMU Extended Feature Register (EFR) 630 + * @efr2: Value of AMD IOMMU Extended Feature 2 Register (EFR2) 631 + * 632 + * Please See description of these registers in the following sections of 633 + * the AMD I/O Virtualization Technology (IOMMU) Specification. 634 + * (https://docs.amd.com/v/u/en-US/48882_3.10_PUB) 635 + * 636 + * - MMIO Offset 0030h IOMMU Extended Feature Register 637 + * - MMIO Offset 01A0h IOMMU Extended Feature 2 Register 638 + * 639 + * Note: The EFR and EFR2 are raw values reported by hardware. 640 + * VMM is responsible to determine the appropriate flags to be exposed to 641 + * the VM since cetertain features are not currently supported by the kernel 642 + * for HW-vIOMMU. 643 + * 644 + * Current VMM-allowed list of feature flags are: 645 + * - EFR[GTSup, GASup, GioSup, PPRSup, EPHSup, GATS, GLX, PASmax] 646 + */ 647 + struct iommu_hw_info_amd { 648 + __aligned_u64 efr; 649 + __aligned_u64 efr2; 650 + }; 651 + 652 + /** 627 653 * enum iommu_hw_info_type - IOMMU Hardware Info Types 628 654 * @IOMMU_HW_INFO_TYPE_NONE: Output by the drivers that do not report hardware 629 655 * info ··· 658 632 * @IOMMU_HW_INFO_TYPE_ARM_SMMUV3: ARM SMMUv3 iommu info type 659 633 * @IOMMU_HW_INFO_TYPE_TEGRA241_CMDQV: NVIDIA Tegra241 CMDQV (extension for ARM 660 634 * SMMUv3) info type 635 + * @IOMMU_HW_INFO_TYPE_AMD: AMD IOMMU info type 661 636 */ 662 637 enum iommu_hw_info_type { 663 638 IOMMU_HW_INFO_TYPE_NONE = 0, ··· 666 639 IOMMU_HW_INFO_TYPE_INTEL_VTD = 1, 667 640 IOMMU_HW_INFO_TYPE_ARM_SMMUV3 = 2, 668 641 IOMMU_HW_INFO_TYPE_TEGRA241_CMDQV = 3, 642 + IOMMU_HW_INFO_TYPE_AMD = 4, 669 643 }; 670 644 671 645 /**