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ARM: dts: renesas: r7s72100: Add interrupt-names to SCIF nodes

Add "interrupt-names" properties to SCIF nodes for clarity.

This allows us to update the DT bindings to mark the "interrupt-names"
property required for all SoCs which have multiple interrupts, and to
validate the DTBs using dtbs_check.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240318174345.46824-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Lad Prabhakar and committed by
Geert Uytterhoeven 7db74b65 e4caa0ba

+8
+8
arch/arm/boot/dts/renesas/r7s72100.dtsi
··· 125 125 <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 126 126 <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 127 127 <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 128 + interrupt-names = "eri", "rxi", "txi", "bri"; 128 129 clocks = <&mstp4_clks R7S72100_CLK_SCIF0>; 129 130 clock-names = "fck"; 130 131 power-domains = <&cpg_clocks>; ··· 139 138 <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>, 140 139 <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 141 140 <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 141 + interrupt-names = "eri", "rxi", "txi", "bri"; 142 142 clocks = <&mstp4_clks R7S72100_CLK_SCIF1>; 143 143 clock-names = "fck"; 144 144 power-domains = <&cpg_clocks>; ··· 153 151 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 154 152 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 155 153 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 154 + interrupt-names = "eri", "rxi", "txi", "bri"; 156 155 clocks = <&mstp4_clks R7S72100_CLK_SCIF2>; 157 156 clock-names = "fck"; 158 157 power-domains = <&cpg_clocks>; ··· 167 164 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 168 165 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 169 166 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>; 167 + interrupt-names = "eri", "rxi", "txi", "bri"; 170 168 clocks = <&mstp4_clks R7S72100_CLK_SCIF3>; 171 169 clock-names = "fck"; 172 170 power-domains = <&cpg_clocks>; ··· 181 177 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 182 178 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 183 179 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; 180 + interrupt-names = "eri", "rxi", "txi", "bri"; 184 181 clocks = <&mstp4_clks R7S72100_CLK_SCIF4>; 185 182 clock-names = "fck"; 186 183 power-domains = <&cpg_clocks>; ··· 195 190 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 196 191 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 197 192 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; 193 + interrupt-names = "eri", "rxi", "txi", "bri"; 198 194 clocks = <&mstp4_clks R7S72100_CLK_SCIF5>; 199 195 clock-names = "fck"; 200 196 power-domains = <&cpg_clocks>; ··· 209 203 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, 210 204 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 211 205 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; 206 + interrupt-names = "eri", "rxi", "txi", "bri"; 212 207 clocks = <&mstp4_clks R7S72100_CLK_SCIF6>; 213 208 clock-names = "fck"; 214 209 power-domains = <&cpg_clocks>; ··· 223 216 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 224 217 <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 225 218 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; 219 + interrupt-names = "eri", "rxi", "txi", "bri"; 226 220 clocks = <&mstp4_clks R7S72100_CLK_SCIF7>; 227 221 clock-names = "fck"; 228 222 power-domains = <&cpg_clocks>;