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drm/i915/vga: Assert that VGA register accesses are going to the right GPU

We want our VGA register accesses to land on the correct GPU.
Check that the VGA routing is appropriately configured.

For the iGPU this just means the IO decode enable on the GPU, but
for dGPUs we also need the entire chain of bridges to forward the
VGA accesses.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251208182637.334-10-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>

+24
+24
drivers/gpu/drm/i915/display/intel_vga.c
··· 58 58 return DISPLAY_VER(display) < 7; 59 59 } 60 60 61 + static bool intel_pci_has_vga_io_decode(struct pci_dev *pdev) 62 + { 63 + u16 cmd = 0; 64 + 65 + pci_read_config_word(pdev, PCI_COMMAND, &cmd); 66 + if ((cmd & PCI_COMMAND_IO) == 0) 67 + return false; 68 + 69 + pdev = pdev->bus->self; 70 + while (pdev) { 71 + u16 ctl = 0; 72 + 73 + pci_read_config_word(pdev, PCI_BRIDGE_CONTROL, &ctl); 74 + if ((ctl & PCI_BRIDGE_CTL_VGA) == 0) 75 + return false; 76 + 77 + pdev = pdev->bus->self; 78 + } 79 + 80 + return true; 81 + } 82 + 61 83 static bool intel_pci_set_io_decode(struct pci_dev *pdev, bool enable) 62 84 { 63 85 u16 old = 0, cmd; ··· 190 168 } 191 169 192 170 io_decode = intel_vga_get(display); 171 + 172 + drm_WARN_ON(display->drm, !intel_pci_has_vga_io_decode(pdev)); 193 173 194 174 outb(0x01, VGA_SEQ_I); 195 175 sr1 = inb(VGA_SEQ_D);