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phy: exynos5-usbdrd: convert some FIELD_PREP_CONST() to FIELD_PREP()

Use of FIELD_PREP_CONST() was a thinko - it's meant to be used for
(constant) initialisers, not constant values.

Use FIELD_PREP() where possible. It has better error checking and is
therefore the preferred macro to use in those cases.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240710-phy-field-prep-v1-1-2fa3f7dc4fc7@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

André Draszik and committed by
Vinod Koul 7e6c2ffe 4bf8b462

+6 -6
+6 -6
drivers/phy/samsung/phy-exynos5-usbdrd.c
··· 607 607 608 608 reg = readl(regs_base + EXYNOS850_DRD_SECPMACTL); 609 609 reg &= ~SECPMACTL_PMA_REF_FREQ_SEL; 610 - reg |= FIELD_PREP_CONST(SECPMACTL_PMA_REF_FREQ_SEL, 1); 610 + reg |= FIELD_PREP(SECPMACTL_PMA_REF_FREQ_SEL, 1); 611 611 /* SFR reset */ 612 612 reg |= (SECPMACTL_PMA_LOW_PWR | SECPMACTL_PMA_APB_SW_RST); 613 613 reg &= ~(SECPMACTL_PMA_ROPLL_REF_CLK_SEL | ··· 1123 1123 reg &= ~SSPPLLCTL_FSEL; 1124 1124 switch (phy_drd->extrefclk) { 1125 1125 case EXYNOS5_FSEL_50MHZ: 1126 - reg |= FIELD_PREP_CONST(SSPPLLCTL_FSEL, 7); 1126 + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 7); 1127 1127 break; 1128 1128 case EXYNOS5_FSEL_26MHZ: 1129 - reg |= FIELD_PREP_CONST(SSPPLLCTL_FSEL, 6); 1129 + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 6); 1130 1130 break; 1131 1131 case EXYNOS5_FSEL_24MHZ: 1132 - reg |= FIELD_PREP_CONST(SSPPLLCTL_FSEL, 2); 1132 + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 2); 1133 1133 break; 1134 1134 case EXYNOS5_FSEL_20MHZ: 1135 - reg |= FIELD_PREP_CONST(SSPPLLCTL_FSEL, 1); 1135 + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 1); 1136 1136 break; 1137 1137 case EXYNOS5_FSEL_19MHZ2: 1138 - reg |= FIELD_PREP_CONST(SSPPLLCTL_FSEL, 0); 1138 + reg |= FIELD_PREP(SSPPLLCTL_FSEL, 0); 1139 1139 break; 1140 1140 default: 1141 1141 dev_warn(phy_drd->dev, "unsupported ref clk: %#.2x\n",