Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'i2c-for-6.11-final-but-missed-it' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"The Aspeed driver tracks the controller's state (stop, pending, start,
etc.). Previously, when the stop command was sent, the state was not
updated. The fix ensures the driver's state is aligned with the device
status.
The Intel SCH driver receives a new look, and among the cleanups,
there is a fix where, due to an oversight, an if/else statement was
missing the else, causing it to move forward instead of exiting the
function in case of an error.
The Qualcomm GENI I2C driver adds the IRQF_NO_AUTOEN flag to the IRQ
setup to prevent unwanted interrupts during probe.
The Xilinx XPS controller fixes TX FIFO handling to avoid missed NAKs.
Another fix ensures the controller is reinitialized when the bus
appears busy"
* tag 'i2c-for-6.11-final-but-missed-it' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: qcom-geni: Use IRQF_NO_AUTOEN flag in request_irq()
i2c: isch: Add missed 'else'
i2c: xiic: Try re-initialization on bus busy timeout
i2c: xiic: Wait for TX empty to avoid missed TX NAKs
i2c: aspeed: Update the stop sw state when the bus recovery occurs
+45
-38
+8
-8
drivers/i2c/busses/i2c-aspeed.c
+8
-8
drivers/i2c/busses/i2c-aspeed.c
···
170
170
171
171
static int aspeed_i2c_reset(struct aspeed_i2c_bus *bus);
172
172
173
+
/* precondition: bus.lock has been acquired. */
174
+
static void aspeed_i2c_do_stop(struct aspeed_i2c_bus *bus)
175
+
{
176
+
bus->master_state = ASPEED_I2C_MASTER_STOP;
177
+
writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
178
+
}
179
+
173
180
static int aspeed_i2c_recover_bus(struct aspeed_i2c_bus *bus)
174
181
{
175
182
unsigned long time_left, flags;
···
194
187
command);
195
188
196
189
reinit_completion(&bus->cmd_complete);
197
-
writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
190
+
aspeed_i2c_do_stop(bus);
198
191
spin_unlock_irqrestore(&bus->lock, flags);
199
192
200
193
time_left = wait_for_completion_timeout(
···
395
388
396
389
writel(slave_addr, bus->base + ASPEED_I2C_BYTE_BUF_REG);
397
390
writel(command, bus->base + ASPEED_I2C_CMD_REG);
398
-
}
399
-
400
-
/* precondition: bus.lock has been acquired. */
401
-
static void aspeed_i2c_do_stop(struct aspeed_i2c_bus *bus)
402
-
{
403
-
bus->master_state = ASPEED_I2C_MASTER_STOP;
404
-
writel(ASPEED_I2CD_M_STOP_CMD, bus->base + ASPEED_I2C_CMD_REG);
405
391
}
406
392
407
393
/* precondition: bus.lock has been acquired. */
+1
-2
drivers/i2c/busses/i2c-isch.c
+1
-2
drivers/i2c/busses/i2c-isch.c
···
99
99
if (retries > MAX_RETRIES) {
100
100
dev_err(&sch_adapter.dev, "SMBus Timeout!\n");
101
101
result = -ETIMEDOUT;
102
-
}
103
-
if (temp & 0x04) {
102
+
} else if (temp & 0x04) {
104
103
result = -EIO;
105
104
dev_dbg(&sch_adapter.dev, "Bus collision! SMBus may be "
106
105
"locked until next hard reset. (sorry!)\n");
+1
-3
drivers/i2c/busses/i2c-qcom-geni.c
+1
-3
drivers/i2c/busses/i2c-qcom-geni.c
···
818
818
init_completion(&gi2c->done);
819
819
spin_lock_init(&gi2c->lock);
820
820
platform_set_drvdata(pdev, gi2c);
821
-
ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, 0,
821
+
ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, IRQF_NO_AUTOEN,
822
822
dev_name(dev), gi2c);
823
823
if (ret) {
824
824
dev_err(dev, "Request_irq failed:%d: err:%d\n",
825
825
gi2c->irq, ret);
826
826
return ret;
827
827
}
828
-
/* Disable the interrupt so that the system can enter low-power mode */
829
-
disable_irq(gi2c->irq);
830
828
i2c_set_adapdata(&gi2c->adap, gi2c);
831
829
gi2c->adap.dev.parent = dev;
832
830
gi2c->adap.dev.of_node = dev->of_node;
+35
-25
drivers/i2c/busses/i2c-xiic.c
+35
-25
drivers/i2c/busses/i2c-xiic.c
···
772
772
goto out;
773
773
}
774
774
775
-
xiic_fill_tx_fifo(i2c);
776
-
777
-
/* current message sent and there is space in the fifo */
778
-
if (!xiic_tx_space(i2c) && xiic_tx_fifo_space(i2c) >= 2) {
775
+
if (xiic_tx_space(i2c)) {
776
+
xiic_fill_tx_fifo(i2c);
777
+
} else {
778
+
/* current message fully written */
779
779
dev_dbg(i2c->adap.dev.parent,
780
780
"%s end of message sent, nmsgs: %d\n",
781
781
__func__, i2c->nmsgs);
782
-
if (i2c->nmsgs > 1) {
782
+
/* Don't move onto the next message until the TX FIFO empties,
783
+
* to ensure that a NAK is not missed.
784
+
*/
785
+
if (i2c->nmsgs > 1 && (pend & XIIC_INTR_TX_EMPTY_MASK)) {
783
786
i2c->nmsgs--;
784
787
i2c->tx_msg++;
785
788
xfer_more = 1;
···
793
790
"%s Got TX IRQ but no more to do...\n",
794
791
__func__);
795
792
}
796
-
} else if (!xiic_tx_space(i2c) && (i2c->nmsgs == 1))
797
-
/* current frame is sent and is last,
798
-
* make sure to disable tx half
799
-
*/
800
-
xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK);
793
+
}
801
794
}
802
795
803
796
if (pend & XIIC_INTR_BNB_MASK) {
···
843
844
return (sr & XIIC_SR_BUS_BUSY_MASK) ? -EBUSY : 0;
844
845
}
845
846
846
-
static int xiic_busy(struct xiic_i2c *i2c)
847
+
static int xiic_wait_not_busy(struct xiic_i2c *i2c)
847
848
{
848
849
int tries = 3;
849
850
int err;
850
-
851
-
if (i2c->tx_msg || i2c->rx_msg)
852
-
return -EBUSY;
853
-
854
-
/* In single master mode bus can only be busy, when in use by this
855
-
* driver. If the register indicates bus being busy for some reason we
856
-
* should ignore it, since bus will never be released and i2c will be
857
-
* stuck forever.
858
-
*/
859
-
if (i2c->singlemaster) {
860
-
return 0;
861
-
}
862
851
863
852
/* for instance if previous transfer was terminated due to TX error
864
853
* it might be that the bus is on it's way to become available
···
1091
1104
1092
1105
mutex_lock(&i2c->lock);
1093
1106
1094
-
ret = xiic_busy(i2c);
1095
-
if (ret) {
1107
+
if (i2c->tx_msg || i2c->rx_msg) {
1096
1108
dev_err(i2c->adap.dev.parent,
1097
1109
"cannot start a transfer while busy\n");
1110
+
ret = -EBUSY;
1098
1111
goto out;
1112
+
}
1113
+
1114
+
/* In single master mode bus can only be busy, when in use by this
1115
+
* driver. If the register indicates bus being busy for some reason we
1116
+
* should ignore it, since bus will never be released and i2c will be
1117
+
* stuck forever.
1118
+
*/
1119
+
if (!i2c->singlemaster) {
1120
+
ret = xiic_wait_not_busy(i2c);
1121
+
if (ret) {
1122
+
/* If the bus is stuck in a busy state, such as due to spurious low
1123
+
* pulses on the bus causing a false start condition to be detected,
1124
+
* then try to recover by re-initializing the controller and check
1125
+
* again if the bus is still busy.
1126
+
*/
1127
+
dev_warn(i2c->adap.dev.parent, "I2C bus busy timeout, reinitializing\n");
1128
+
ret = xiic_reinit(i2c);
1129
+
if (ret)
1130
+
goto out;
1131
+
ret = xiic_wait_not_busy(i2c);
1132
+
if (ret)
1133
+
goto out;
1134
+
}
1099
1135
}
1100
1136
1101
1137
i2c->tx_msg = msgs;