tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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usb: dwc2: Add eUSB2 PHY disconnect flow support

To support eUSB2 PHY disconnect flow required in Soft disconnect
state set GOTGCTL_EUSB2_DISC_SUPP bit, if applicable.

On Session End Detected interrupt clear PCGCTL_GATEHCLK and
PCGCTL_STOPPCLK bits if eusb2_disc parameter true.

Signed-off-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
Link: https://lore.kernel.org/r/9d50b83df693cda8c391313e90048df8dd611c04.1708948356.git.Minas.Harutyunyan@synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Minas Harutyunyan and committed by
Greg Kroah-Hartman 7fd22e5b bc5d81b8

+22 -4
+18 -3
drivers/usb/dwc2/core_intr.c
··· 84 84 u32 gotgint; 85 85 u32 gotgctl; 86 86 u32 gintmsk; 87 + u32 pcgctl; 87 88 88 89 gotgint = dwc2_readl(hsotg, GOTGINT); 89 90 gotgctl = dwc2_readl(hsotg, GOTGCTL); ··· 97 96 dwc2_op_state_str(hsotg)); 98 97 gotgctl = dwc2_readl(hsotg, GOTGCTL); 99 98 100 - if (dwc2_is_device_mode(hsotg)) 99 + if (dwc2_is_device_mode(hsotg)) { 100 + if (hsotg->params.eusb2_disc) { 101 + /* Clear the Gate hclk. */ 102 + pcgctl = dwc2_readl(hsotg, PCGCTL); 103 + pcgctl &= ~PCGCTL_GATEHCLK; 104 + dwc2_writel(hsotg, pcgctl, PCGCTL); 105 + udelay(5); 106 + 107 + /* Clear Phy Clock bit. */ 108 + pcgctl = dwc2_readl(hsotg, PCGCTL); 109 + pcgctl &= ~PCGCTL_STOPPCLK; 110 + dwc2_writel(hsotg, pcgctl, PCGCTL); 111 + udelay(5); 112 + } 101 113 dwc2_hsotg_disconnect(hsotg); 114 + } 102 115 103 116 if (hsotg->op_state == OTG_STATE_B_HOST) { 104 117 hsotg->op_state = OTG_STATE_B_PERIPHERAL; ··· 132 117 * disconnected 133 118 */ 134 119 /* Reset to a clean state */ 135 - hsotg->lx_state = DWC2_L0; 120 + hsotg->lx_state = DWC2_L3; 136 121 } 137 122 138 123 gotgctl = dwc2_readl(hsotg, GOTGCTL); ··· 301 286 hsotg->lx_state); 302 287 303 288 if (dwc2_is_device_mode(hsotg)) { 304 - if (hsotg->lx_state == DWC2_L2) { 289 + if (hsotg->lx_state != DWC2_L0) { 305 290 if (hsotg->in_ppd) { 306 291 ret = dwc2_exit_partial_power_down(hsotg, 0, 307 292 true);
+4 -1
drivers/usb/dwc2/gadget.c
··· 3420 3420 3421 3421 dwc2_hsotg_init_fifo(hsotg); 3422 3422 3423 - if (!is_usb_reset) 3423 + if (!is_usb_reset) { 3424 3424 dwc2_set_bit(hsotg, DCTL, DCTL_SFTDISCON); 3425 + if (hsotg->params.eusb2_disc) 3426 + dwc2_set_bit(hsotg, GOTGCTL, GOTGCTL_EUSB2_DISC_SUPP); 3427 + } 3425 3428 3426 3429 dcfg |= DCFG_EPMISCNT(1); 3427 3430