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clk: at91: sckc: Use SCKC_{TD, MD}_SLCK IDs for clk32k clocks

Use the newly introduced macros instead of raw numbers. With this the code
is a bit easier to understand.

Reviewed-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20240826173116.3628337-3-claudiu.beznea@tuxon.dev
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

+13 -11
+13 -11
drivers/clk/at91/sckc.c
··· 12 12 #include <linux/of_address.h> 13 13 #include <linux/io.h> 14 14 15 + #include <dt-bindings/clock/at91.h> 16 + 15 17 #define SLOW_CLOCK_FREQ 32768 16 18 #define SLOWCK_SW_CYCLES 5 17 19 #define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \ ··· 472 470 { 473 471 void __iomem *regbase = of_iomap(np, 0); 474 472 struct clk_hw_onecell_data *clk_data; 475 - struct clk_hw *slow_rc, *slow_osc; 473 + struct clk_hw *slow_rc, *slow_osc, *hw; 476 474 const char *xtal_name; 477 475 const struct clk_hw *parent_hws[2]; 478 476 static struct clk_parent_data parent_data = { ··· 508 506 509 507 /* MD_SLCK and TD_SLCK. */ 510 508 clk_data->num = 2; 511 - clk_data->hws[0] = clk_hw_register_fixed_rate_parent_hw(NULL, "md_slck", 512 - slow_rc, 513 - 0, 32768); 514 - if (IS_ERR(clk_data->hws[0])) 509 + hw = clk_hw_register_fixed_rate_parent_hw(NULL, "md_slck", slow_rc, 510 + 0, 32768); 511 + if (IS_ERR(hw)) 515 512 goto clk_data_free; 513 + clk_data->hws[SCKC_MD_SLCK] = hw; 516 514 517 515 parent_hws[0] = slow_rc; 518 516 parent_hws[1] = slow_osc; 519 - clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck", 520 - parent_hws, 2, 521 - &at91sam9x60_bits); 522 - if (IS_ERR(clk_data->hws[1])) 517 + hw = at91_clk_register_sam9x5_slow(regbase, "td_slck", parent_hws, 518 + 2, &at91sam9x60_bits); 519 + if (IS_ERR(hw)) 523 520 goto unregister_md_slck; 521 + clk_data->hws[SCKC_TD_SLCK] = hw; 524 522 525 523 ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data); 526 524 if (WARN_ON(ret)) ··· 529 527 return; 530 528 531 529 unregister_td_slck: 532 - at91_clk_unregister_sam9x5_slow(clk_data->hws[1]); 530 + at91_clk_unregister_sam9x5_slow(clk_data->hws[SCKC_TD_SLCK]); 533 531 unregister_md_slck: 534 - clk_hw_unregister(clk_data->hws[0]); 532 + clk_hw_unregister(clk_data->hws[SCKC_MD_SLCK]); 535 533 clk_data_free: 536 534 kfree(clk_data); 537 535 unregister_slow_osc: