Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/mst: use intel_dp_compute_config_limits() for DP MST
There's a lot of duplication between mst_stream_compute_config_limits()
and intel_dp_compute_config_limits(). Adjust the latter to suit the
needs of the former, and use the same function for both. This reduces
duplication and highlights the differences for SST and MST and UHBR.
Remove the kernel-doc for intel_dp_compute_config_link_bpp_limits()
which now becomes static.
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241211144310.701895-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+35
-50
+28
-18
drivers/gpu/drm/i915/display/intel_dp.c
+28
-18
drivers/gpu/drm/i915/display/intel_dp.c
···
2455
2455
return 0;
2456
2456
}
2457
2457
2458
-
/**
2459
-
* intel_dp_compute_config_link_bpp_limits - compute output link bpp limits
2460
-
* @intel_dp: intel DP
2461
-
* @crtc_state: crtc state
2462
-
* @dsc: DSC compression mode
2463
-
* @limits: link configuration limits
2464
-
*
2465
-
* Calculates the output link min, max bpp values in @limits based on the
2466
-
* pipe bpp range, @crtc_state and @dsc mode.
2467
-
*
2468
-
* Returns %true in case of success.
2458
+
/*
2459
+
* Calculate the output link min, max bpp values in limits based on the pipe bpp
2460
+
* range, crtc_state and dsc mode. Return true on success.
2469
2461
*/
2470
-
bool
2462
+
static bool
2471
2463
intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
2472
2464
const struct intel_crtc_state *crtc_state,
2473
2465
bool dsc,
···
2507
2515
return true;
2508
2516
}
2509
2517
2510
-
static bool
2518
+
bool
2511
2519
intel_dp_compute_config_limits(struct intel_dp *intel_dp,
2512
2520
struct intel_crtc_state *crtc_state,
2513
2521
bool respect_downstream_limits,
2514
2522
bool dsc,
2515
2523
struct link_config_limits *limits)
2516
2524
{
2525
+
bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
2526
+
2517
2527
limits->min_rate = intel_dp_min_link_rate(intel_dp);
2518
2528
limits->max_rate = intel_dp_max_link_rate(intel_dp);
2519
2529
2520
2530
/* FIXME 128b/132b SST support missing */
2521
-
limits->max_rate = min(limits->max_rate, 810000);
2531
+
if (!is_mst)
2532
+
limits->max_rate = min(limits->max_rate, 810000);
2522
2533
limits->min_rate = min(limits->min_rate, limits->max_rate);
2523
2534
2524
2535
limits->min_lane_count = intel_dp_min_lane_count(intel_dp);
2525
2536
limits->max_lane_count = intel_dp_max_lane_count(intel_dp);
2526
2537
2527
2538
limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);
2528
-
limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
2529
-
respect_downstream_limits);
2530
-
2531
-
if (intel_dp->use_max_params) {
2539
+
if (is_mst) {
2532
2540
/*
2541
+
* FIXME: If all the streams can't fit into the link with their
2542
+
* current pipe_bpp we should reduce pipe_bpp across the board
2543
+
* until things start to fit. Until then we limit to <= 8bpc
2544
+
* since that's what was hardcoded for all MST streams
2545
+
* previously. This hack should be removed once we have the
2546
+
* proper retry logic in place.
2547
+
*/
2548
+
limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
2549
+
} else {
2550
+
limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
2551
+
respect_downstream_limits);
2552
+
}
2553
+
2554
+
if (is_mst || intel_dp->use_max_params) {
2555
+
/*
2556
+
* For MST we always configure max link bw - the spec doesn't
2557
+
* seem to suggest we should do otherwise.
2558
+
*
2533
2559
* Use the maximum clock and number of lanes the eDP panel
2534
2560
* advertizes being capable of in case the initial fast
2535
2561
* optimal params failed us. The panels are generally
+5
-5
drivers/gpu/drm/i915/display/intel_dp.h
+5
-5
drivers/gpu/drm/i915/display/intel_dp.h
···
193
193
void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
194
194
int intel_dp_output_bpp(enum intel_output_format output_format, int bpp);
195
195
196
-
bool
197
-
intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
198
-
const struct intel_crtc_state *crtc_state,
199
-
bool dsc,
200
-
struct link_config_limits *limits);
196
+
bool intel_dp_compute_config_limits(struct intel_dp *intel_dp,
197
+
struct intel_crtc_state *crtc_state,
198
+
bool respect_downstream_limits,
199
+
bool dsc,
200
+
struct link_config_limits *limits);
201
201
202
202
void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector);
203
203
bool intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder);
+2
-27
drivers/gpu/drm/i915/display/intel_dp_mst.c
+2
-27
drivers/gpu/drm/i915/display/intel_dp_mst.c
···
585
585
bool dsc,
586
586
struct link_config_limits *limits)
587
587
{
588
-
/*
589
-
* for MST we always configure max link bw - the spec doesn't
590
-
* seem to suggest we should do otherwise.
591
-
*/
592
-
limits->min_rate = limits->max_rate =
593
-
intel_dp_max_link_rate(intel_dp);
594
-
595
-
limits->min_lane_count = limits->max_lane_count =
596
-
intel_dp_max_lane_count(intel_dp);
597
-
598
-
limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);
599
-
/*
600
-
* FIXME: If all the streams can't fit into the link with
601
-
* their current pipe_bpp we should reduce pipe_bpp across
602
-
* the board until things start to fit. Until then we
603
-
* limit to <= 8bpc since that's what was hardcoded for all
604
-
* MST streams previously. This hack should be removed once
605
-
* we have the proper retry logic in place.
606
-
*/
607
-
limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
608
-
609
-
intel_dp_test_compute_config(intel_dp, crtc_state, limits);
610
-
611
-
if (!intel_dp_compute_config_link_bpp_limits(intel_dp,
612
-
crtc_state,
613
-
dsc,
614
-
limits))
588
+
if (!intel_dp_compute_config_limits(intel_dp, crtc_state, false, dsc,
589
+
limits))
615
590
return false;
616
591
617
592
return adjust_limits_for_dsc_hblank_expansion_quirk(connector,