Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma
Pull rdma fixes from Jason Gunthorpe:
"Collected driver fixes from the last few weeks, I was surprised how
significant many of them seemed to be.
- Fix rdma-core test failures due to wrong startup ordering in rxe
- Don't crash in bnxt_re if the FW supports more than 64k QPs
- Fix wrong QP table indexing math in bnxt_re
- Calculate the max SRQs for userspace properly in bnxt_re
- Don't try to do math on errno for mlx5's rate calculation
- Properly allow userspace to control the VLAN in the QP state during
INIT->RTR for bnxt_re
- 6 bug fixes for HNS:
- Soft lockup when processing huge MRs, add a cond_resched()
- Fix missed error unwind for doorbell allocation
- Prevent bad send queue parameters from userspace
- Wrong error unwind in qp creation
- Missed xa_destroy during driver shutdown
- Fix reporting to userspace of max_sge_rd, hns doesn't have a
read/write difference"
* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma:
RDMA/hns: Fix wrong value of max_sge_rd
RDMA/hns: Fix missing xa_destroy()
RDMA/hns: Fix a missing rollback in error path of hns_roce_create_qp_common()
RDMA/hns: Fix invalid sq params not being blocked
RDMA/hns: Fix unmatched condition in error path of alloc_user_qp_db()
RDMA/hns: Fix soft lockup during bt pages loop
RDMA/bnxt_re: Avoid clearing VLAN_ID mask in modify qp path
RDMA/mlx5: Handle errors returned from mlx5r_ib_rate()
RDMA/bnxt_re: Fix reporting maximum SRQs on P7 chips
RDMA/bnxt_re: Add missing paranthesis in map_qp_id_to_tbl_indx
RDMA/bnxt_re: Fix allocation of QP table
RDMA/rxe: Fix the failure of ibv_query_device() and ibv_query_device_ex() tests
+77
-59
-6
drivers/infiniband/hw/bnxt_re/bnxt_re.h
-6
drivers/infiniband/hw/bnxt_re/bnxt_re.h
···
53
53
#define BNXT_RE_MAX_MR_SIZE_HIGH BIT_ULL(39)
54
54
#define BNXT_RE_MAX_MR_SIZE BNXT_RE_MAX_MR_SIZE_HIGH
55
55
56
-
#define BNXT_RE_MAX_QPC_COUNT (64 * 1024)
57
-
#define BNXT_RE_MAX_MRW_COUNT (64 * 1024)
58
-
#define BNXT_RE_MAX_SRQC_COUNT (64 * 1024)
59
-
#define BNXT_RE_MAX_CQ_COUNT (64 * 1024)
60
-
#define BNXT_RE_MAX_MRW_COUNT_64K (64 * 1024)
61
-
#define BNXT_RE_MAX_MRW_COUNT_256K (256 * 1024)
62
56
63
57
/* Number of MRs to reserve for PF, leaving remainder for VFs */
64
58
#define BNXT_RE_RESVD_MR_FOR_PF (32 * 1024)
+1
-2
drivers/infiniband/hw/bnxt_re/main.c
+1
-2
drivers/infiniband/hw/bnxt_re/main.c
···
2130
2130
* memory for the function and all child VFs
2131
2131
*/
2132
2132
rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw,
2133
-
&rdev->qplib_ctx,
2134
-
BNXT_RE_MAX_QPC_COUNT);
2133
+
&rdev->qplib_ctx);
2135
2134
if (rc) {
2136
2135
ibdev_err(&rdev->ibdev,
2137
2136
"Failed to allocate RCFW Channel: %#x\n", rc);
-2
drivers/infiniband/hw/bnxt_re/qplib_fp.c
-2
drivers/infiniband/hw/bnxt_re/qplib_fp.c
···
1217
1217
qp->path_mtu =
1218
1218
CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
1219
1219
}
1220
-
qp->modify_flags &=
1221
-
~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID;
1222
1220
/* Bono FW require the max_dest_rd_atomic to be >= 1 */
1223
1221
if (qp->max_dest_rd_atomic < 1)
1224
1222
qp->max_dest_rd_atomic = 1;
+1
-9
drivers/infiniband/hw/bnxt_re/qplib_rcfw.c
+1
-9
drivers/infiniband/hw/bnxt_re/qplib_rcfw.c
···
915
915
916
916
void bnxt_qplib_free_rcfw_channel(struct bnxt_qplib_rcfw *rcfw)
917
917
{
918
-
kfree(rcfw->qp_tbl);
919
918
kfree(rcfw->crsqe_tbl);
920
919
bnxt_qplib_free_hwq(rcfw->res, &rcfw->cmdq.hwq);
921
920
bnxt_qplib_free_hwq(rcfw->res, &rcfw->creq.hwq);
···
923
924
924
925
int bnxt_qplib_alloc_rcfw_channel(struct bnxt_qplib_res *res,
925
926
struct bnxt_qplib_rcfw *rcfw,
926
-
struct bnxt_qplib_ctx *ctx,
927
-
int qp_tbl_sz)
927
+
struct bnxt_qplib_ctx *ctx)
928
928
{
929
929
struct bnxt_qplib_hwq_attr hwq_attr = {};
930
930
struct bnxt_qplib_sg_info sginfo = {};
···
967
969
if (!rcfw->crsqe_tbl)
968
970
goto fail;
969
971
970
-
/* Allocate one extra to hold the QP1 entries */
971
-
rcfw->qp_tbl_size = qp_tbl_sz + 1;
972
-
rcfw->qp_tbl = kcalloc(rcfw->qp_tbl_size, sizeof(struct bnxt_qplib_qp_node),
973
-
GFP_KERNEL);
974
-
if (!rcfw->qp_tbl)
975
-
goto fail;
976
972
spin_lock_init(&rcfw->tbl_lock);
977
973
978
974
rcfw->max_timeout = res->cctx->hwrm_cmd_max_timeout;
+3
-3
drivers/infiniband/hw/bnxt_re/qplib_rcfw.h
+3
-3
drivers/infiniband/hw/bnxt_re/qplib_rcfw.h
···
262
262
void bnxt_qplib_free_rcfw_channel(struct bnxt_qplib_rcfw *rcfw);
263
263
int bnxt_qplib_alloc_rcfw_channel(struct bnxt_qplib_res *res,
264
264
struct bnxt_qplib_rcfw *rcfw,
265
-
struct bnxt_qplib_ctx *ctx,
266
-
int qp_tbl_sz);
265
+
struct bnxt_qplib_ctx *ctx);
267
266
void bnxt_qplib_rcfw_stop_irq(struct bnxt_qplib_rcfw *rcfw, bool kill);
268
267
void bnxt_qplib_disable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw);
269
268
int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector,
···
284
285
int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw,
285
286
struct bnxt_qplib_ctx *ctx, int is_virtfn);
286
287
void bnxt_qplib_mark_qp_error(void *qp_handle);
288
+
287
289
static inline u32 map_qp_id_to_tbl_indx(u32 qid, struct bnxt_qplib_rcfw *rcfw)
288
290
{
289
291
/* Last index of the qp_tbl is for QP1 ie. qp_tbl_size - 1*/
290
-
return (qid == 1) ? rcfw->qp_tbl_size - 1 : qid % rcfw->qp_tbl_size - 2;
292
+
return (qid == 1) ? rcfw->qp_tbl_size - 1 : (qid % (rcfw->qp_tbl_size - 2));
291
293
}
292
294
#endif /* __BNXT_QPLIB_RCFW_H__ */
+9
drivers/infiniband/hw/bnxt_re/qplib_res.c
+9
drivers/infiniband/hw/bnxt_re/qplib_res.c
···
871
871
872
872
void bnxt_qplib_free_res(struct bnxt_qplib_res *res)
873
873
{
874
+
kfree(res->rcfw->qp_tbl);
874
875
bnxt_qplib_free_sgid_tbl(res, &res->sgid_tbl);
875
876
bnxt_qplib_free_pd_tbl(&res->pd_tbl);
876
877
bnxt_qplib_free_dpi_tbl(res, &res->dpi_tbl);
···
879
878
880
879
int bnxt_qplib_alloc_res(struct bnxt_qplib_res *res, struct net_device *netdev)
881
880
{
881
+
struct bnxt_qplib_rcfw *rcfw = res->rcfw;
882
882
struct bnxt_qplib_dev_attr *dev_attr;
883
883
int rc;
884
884
885
885
res->netdev = netdev;
886
886
dev_attr = res->dattr;
887
+
888
+
/* Allocate one extra to hold the QP1 entries */
889
+
rcfw->qp_tbl_size = max_t(u32, BNXT_RE_MAX_QPC_COUNT + 1, dev_attr->max_qp);
890
+
rcfw->qp_tbl = kcalloc(rcfw->qp_tbl_size, sizeof(struct bnxt_qplib_qp_node),
891
+
GFP_KERNEL);
892
+
if (!rcfw->qp_tbl)
893
+
return -ENOMEM;
887
894
888
895
rc = bnxt_qplib_alloc_sgid_tbl(res, &res->sgid_tbl, dev_attr->max_sgid);
889
896
if (rc)
+12
drivers/infiniband/hw/bnxt_re/qplib_res.h
+12
drivers/infiniband/hw/bnxt_re/qplib_res.h
···
49
49
#define CHIP_NUM_58818 0xd818
50
50
#define CHIP_NUM_57608 0x1760
51
51
52
+
#define BNXT_RE_MAX_QPC_COUNT (64 * 1024)
53
+
#define BNXT_RE_MAX_MRW_COUNT (64 * 1024)
54
+
#define BNXT_RE_MAX_SRQC_COUNT (64 * 1024)
55
+
#define BNXT_RE_MAX_CQ_COUNT (64 * 1024)
56
+
#define BNXT_RE_MAX_MRW_COUNT_64K (64 * 1024)
57
+
#define BNXT_RE_MAX_MRW_COUNT_256K (256 * 1024)
58
+
52
59
#define BNXT_QPLIB_DBR_VALID (0x1UL << 26)
53
60
#define BNXT_QPLIB_DBR_EPOCH_SHIFT 24
54
61
#define BNXT_QPLIB_DBR_TOGGLE_SHIFT 25
···
605
598
static inline bool _is_cq_coalescing_supported(u16 dev_cap_ext_flags2)
606
599
{
607
600
return dev_cap_ext_flags2 & CREQ_QUERY_FUNC_RESP_SB_CQ_COALESCING_SUPPORTED;
601
+
}
602
+
603
+
static inline bool _is_max_srq_ext_supported(u16 dev_cap_ext_flags_2)
604
+
{
605
+
return !!(dev_cap_ext_flags_2 & CREQ_QUERY_FUNC_RESP_SB_MAX_SRQ_EXTENDED);
608
606
}
609
607
610
608
#endif /* __BNXT_QPLIB_RES_H__ */
+3
drivers/infiniband/hw/bnxt_re/qplib_sp.c
+3
drivers/infiniband/hw/bnxt_re/qplib_sp.c
···
176
176
attr->dev_cap_flags = le16_to_cpu(sb->dev_cap_flags);
177
177
attr->dev_cap_flags2 = le16_to_cpu(sb->dev_cap_ext_flags_2);
178
178
179
+
if (_is_max_srq_ext_supported(attr->dev_cap_flags2))
180
+
attr->max_srq += le16_to_cpu(sb->max_srq_ext);
181
+
179
182
bnxt_qplib_query_version(rcfw, attr->fw_ver);
180
183
181
184
for (i = 0; i < MAX_TQM_ALLOC_REQ / 4; i++) {
+2
-1
drivers/infiniband/hw/bnxt_re/roce_hsi.h
+2
-1
drivers/infiniband/hw/bnxt_re/roce_hsi.h
···
2215
2215
#define CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_IQM_MSN_TABLE (0x2UL << 4)
2216
2216
#define CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_LAST \
2217
2217
CREQ_QUERY_FUNC_RESP_SB_REQ_RETRANSMISSION_SUPPORT_IQM_MSN_TABLE
2218
+
#define CREQ_QUERY_FUNC_RESP_SB_MAX_SRQ_EXTENDED 0x40UL
2218
2219
#define CREQ_QUERY_FUNC_RESP_SB_MIN_RNR_RTR_RTS_OPT_SUPPORTED 0x1000UL
2219
2220
__le16 max_xp_qp_size;
2220
2221
__le16 create_qp_batch_size;
2221
2222
__le16 destroy_qp_batch_size;
2222
-
__le16 reserved16;
2223
+
__le16 max_srq_ext;
2223
2224
__le64 reserved64;
2224
2225
};
2225
2226
+3
-1
drivers/infiniband/hw/hns/hns_roce_alloc.c
+3
-1
drivers/infiniband/hw/hns/hns_roce_alloc.c
···
175
175
if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_XRC)
176
176
ida_destroy(&hr_dev->xrcd_ida.ida);
177
177
178
-
if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ)
178
+
if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ) {
179
179
ida_destroy(&hr_dev->srq_table.srq_ida.ida);
180
+
xa_destroy(&hr_dev->srq_table.xa);
181
+
}
180
182
hns_roce_cleanup_qp_table(hr_dev);
181
183
hns_roce_cleanup_cq_table(hr_dev);
182
184
ida_destroy(&hr_dev->mr_table.mtpt_ida.ida);
+1
drivers/infiniband/hw/hns/hns_roce_cq.c
+1
drivers/infiniband/hw/hns/hns_roce_cq.c
+15
-1
drivers/infiniband/hw/hns/hns_roce_hem.c
+15
-1
drivers/infiniband/hw/hns/hns_roce_hem.c
···
1361
1361
return ret;
1362
1362
}
1363
1363
1364
+
/* This is the bottom bt pages number of a 100G MR on 4K OS, assuming
1365
+
* the bt page size is not expanded by cal_best_bt_pg_sz()
1366
+
*/
1367
+
#define RESCHED_LOOP_CNT_THRESHOLD_ON_4K 12800
1368
+
1364
1369
/* construct the base address table and link them by address hop config */
1365
1370
int hns_roce_hem_list_request(struct hns_roce_dev *hr_dev,
1366
1371
struct hns_roce_hem_list *hem_list,
···
1374
1369
{
1375
1370
const struct hns_roce_buf_region *r;
1376
1371
int ofs, end;
1372
+
int loop;
1377
1373
int unit;
1378
1374
int ret;
1379
1375
int i;
···
1392
1386
continue;
1393
1387
1394
1388
end = r->offset + r->count;
1395
-
for (ofs = r->offset; ofs < end; ofs += unit) {
1389
+
for (ofs = r->offset, loop = 1; ofs < end; ofs += unit, loop++) {
1390
+
if (!(loop % RESCHED_LOOP_CNT_THRESHOLD_ON_4K))
1391
+
cond_resched();
1392
+
1396
1393
ret = hem_list_alloc_mid_bt(hr_dev, r, unit, ofs,
1397
1394
hem_list->mid_bt[i],
1398
1395
&hem_list->btm_bt);
···
1452
1443
struct list_head *head = &hem_list->btm_bt;
1453
1444
struct hns_roce_hem_item *hem, *temp_hem;
1454
1445
void *cpu_base = NULL;
1446
+
int loop = 1;
1455
1447
int nr = 0;
1456
1448
1457
1449
list_for_each_entry_safe(hem, temp_hem, head, sibling) {
1450
+
if (!(loop % RESCHED_LOOP_CNT_THRESHOLD_ON_4K))
1451
+
cond_resched();
1452
+
loop++;
1453
+
1458
1454
if (hem_list_page_is_in_range(hem, offset)) {
1459
1455
nr = offset - hem->start;
1460
1456
cpu_base = hem->addr + nr * BA_BYTE_LEN;
+1
-1
drivers/infiniband/hw/hns/hns_roce_main.c
+1
-1
drivers/infiniband/hw/hns/hns_roce_main.c
···
183
183
IB_DEVICE_RC_RNR_NAK_GEN;
184
184
props->max_send_sge = hr_dev->caps.max_sq_sg;
185
185
props->max_recv_sge = hr_dev->caps.max_rq_sg;
186
-
props->max_sge_rd = 1;
186
+
props->max_sge_rd = hr_dev->caps.max_sq_sg;
187
187
props->max_cq = hr_dev->caps.num_cqs;
188
188
props->max_cqe = hr_dev->caps.max_cqes;
189
189
props->max_mr = hr_dev->caps.num_mtpts;
+11
-9
drivers/infiniband/hw/hns/hns_roce_qp.c
+11
-9
drivers/infiniband/hw/hns/hns_roce_qp.c
···
868
868
struct hns_roce_ib_create_qp *ucmd,
869
869
struct hns_roce_ib_create_qp_resp *resp)
870
870
{
871
+
bool has_sdb = user_qp_has_sdb(hr_dev, init_attr, udata, resp, ucmd);
871
872
struct hns_roce_ucontext *uctx = rdma_udata_to_drv_context(udata,
872
873
struct hns_roce_ucontext, ibucontext);
874
+
bool has_rdb = user_qp_has_rdb(hr_dev, init_attr, udata, resp);
873
875
struct ib_device *ibdev = &hr_dev->ib_dev;
874
876
int ret;
875
877
876
-
if (user_qp_has_sdb(hr_dev, init_attr, udata, resp, ucmd)) {
878
+
if (has_sdb) {
877
879
ret = hns_roce_db_map_user(uctx, ucmd->sdb_addr, &hr_qp->sdb);
878
880
if (ret) {
879
881
ibdev_err(ibdev,
···
886
884
hr_qp->en_flags |= HNS_ROCE_QP_CAP_SQ_RECORD_DB;
887
885
}
888
886
889
-
if (user_qp_has_rdb(hr_dev, init_attr, udata, resp)) {
887
+
if (has_rdb) {
890
888
ret = hns_roce_db_map_user(uctx, ucmd->db_addr, &hr_qp->rdb);
891
889
if (ret) {
892
890
ibdev_err(ibdev,
···
900
898
return 0;
901
899
902
900
err_sdb:
903
-
if (hr_qp->en_flags & HNS_ROCE_QP_CAP_SQ_RECORD_DB)
901
+
if (has_sdb)
904
902
hns_roce_db_unmap_user(uctx, &hr_qp->sdb);
905
903
err_out:
906
904
return ret;
···
1121
1119
ibucontext);
1122
1120
hr_qp->config = uctx->config;
1123
1121
ret = set_user_sq_size(hr_dev, &init_attr->cap, hr_qp, ucmd);
1124
-
if (ret)
1122
+
if (ret) {
1125
1123
ibdev_err(ibdev,
1126
1124
"failed to set user SQ size, ret = %d.\n",
1127
1125
ret);
1126
+
return ret;
1127
+
}
1128
1128
1129
1129
ret = set_congest_param(hr_dev, hr_qp, ucmd);
1130
-
if (ret)
1131
-
return ret;
1132
1130
} else {
1133
1131
if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)
1134
1132
hr_qp->config = HNS_ROCE_EXSGE_FLAGS;
1133
+
default_congest_type(hr_dev, hr_qp);
1135
1134
ret = set_kernel_sq_size(hr_dev, &init_attr->cap, hr_qp);
1136
1135
if (ret)
1137
1136
ibdev_err(ibdev,
1138
1137
"failed to set kernel SQ size, ret = %d.\n",
1139
1138
ret);
1140
-
1141
-
default_congest_type(hr_dev, hr_qp);
1142
1139
}
1143
1140
1144
1141
return ret;
···
1220
1219
min(udata->outlen, sizeof(resp)));
1221
1220
if (ret) {
1222
1221
ibdev_err(ibdev, "copy qp resp failed!\n");
1223
-
goto err_store;
1222
+
goto err_flow_ctrl;
1224
1223
}
1225
1224
}
1226
1225
···
1603
1602
for (i = 0; i < HNS_ROCE_QP_BANK_NUM; i++)
1604
1603
ida_destroy(&hr_dev->qp_table.bank[i].ida);
1605
1604
xa_destroy(&hr_dev->qp_table.dip_xa);
1605
+
xa_destroy(&hr_dev->qp_table_xa);
1606
1606
mutex_destroy(&hr_dev->qp_table.bank_mutex);
1607
1607
mutex_destroy(&hr_dev->qp_table.scc_mutex);
1608
1608
}
+9
-5
drivers/infiniband/hw/mlx5/ah.c
+9
-5
drivers/infiniband/hw/mlx5/ah.c
···
50
50
return sport;
51
51
}
52
52
53
-
static void create_ib_ah(struct mlx5_ib_dev *dev, struct mlx5_ib_ah *ah,
53
+
static int create_ib_ah(struct mlx5_ib_dev *dev, struct mlx5_ib_ah *ah,
54
54
struct rdma_ah_init_attr *init_attr)
55
55
{
56
56
struct rdma_ah_attr *ah_attr = init_attr->ah_attr;
57
57
enum ib_gid_type gid_type;
58
+
int rate_val;
58
59
59
60
if (rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH) {
60
61
const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
···
68
67
ah->av.tclass = grh->traffic_class;
69
68
}
70
69
71
-
ah->av.stat_rate_sl =
72
-
(mlx5r_ib_rate(dev, rdma_ah_get_static_rate(ah_attr)) << 4);
70
+
rate_val = mlx5r_ib_rate(dev, rdma_ah_get_static_rate(ah_attr));
71
+
if (rate_val < 0)
72
+
return rate_val;
73
+
ah->av.stat_rate_sl = rate_val << 4;
73
74
74
75
if (ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE) {
75
76
if (init_attr->xmit_slave)
···
92
89
ah->av.fl_mlid = rdma_ah_get_path_bits(ah_attr) & 0x7f;
93
90
ah->av.stat_rate_sl |= (rdma_ah_get_sl(ah_attr) & 0xf);
94
91
}
92
+
93
+
return 0;
95
94
}
96
95
97
96
int mlx5_ib_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *init_attr,
···
126
121
return err;
127
122
}
128
123
129
-
create_ib_ah(dev, ah, init_attr);
130
-
return 0;
124
+
return create_ib_ah(dev, ah, init_attr);
131
125
}
132
126
133
127
int mlx5_ib_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
+6
-19
drivers/infiniband/sw/rxe/rxe.c
+6
-19
drivers/infiniband/sw/rxe/rxe.c
···
38
38
}
39
39
40
40
/* initialize rxe device parameters */
41
-
static void rxe_init_device_param(struct rxe_dev *rxe)
41
+
static void rxe_init_device_param(struct rxe_dev *rxe, struct net_device *ndev)
42
42
{
43
-
struct net_device *ndev;
44
-
45
43
rxe->max_inline_data = RXE_MAX_INLINE_DATA;
46
44
47
45
rxe->attr.vendor_id = RXE_VENDOR_ID;
···
72
74
rxe->attr.max_pkeys = RXE_MAX_PKEYS;
73
75
rxe->attr.local_ca_ack_delay = RXE_LOCAL_CA_ACK_DELAY;
74
76
75
-
ndev = rxe_ib_device_get_netdev(&rxe->ib_dev);
76
-
if (!ndev)
77
-
return;
78
-
79
77
addrconf_addr_eui48((unsigned char *)&rxe->attr.sys_image_guid,
80
78
ndev->dev_addr);
81
-
82
-
dev_put(ndev);
83
79
84
80
rxe->max_ucontext = RXE_MAX_UCONTEXT;
85
81
}
···
107
115
/* initialize port state, note IB convention that HCA ports are always
108
116
* numbered from 1
109
117
*/
110
-
static void rxe_init_ports(struct rxe_dev *rxe)
118
+
static void rxe_init_ports(struct rxe_dev *rxe, struct net_device *ndev)
111
119
{
112
120
struct rxe_port *port = &rxe->port;
113
-
struct net_device *ndev;
114
121
115
122
rxe_init_port_param(port);
116
-
ndev = rxe_ib_device_get_netdev(&rxe->ib_dev);
117
-
if (!ndev)
118
-
return;
119
123
addrconf_addr_eui48((unsigned char *)&port->port_guid,
120
124
ndev->dev_addr);
121
-
dev_put(ndev);
122
125
spin_lock_init(&port->port_lock);
123
126
}
124
127
···
131
144
}
132
145
133
146
/* initialize rxe device state */
134
-
static void rxe_init(struct rxe_dev *rxe)
147
+
static void rxe_init(struct rxe_dev *rxe, struct net_device *ndev)
135
148
{
136
149
/* init default device parameters */
137
-
rxe_init_device_param(rxe);
150
+
rxe_init_device_param(rxe, ndev);
138
151
139
-
rxe_init_ports(rxe);
152
+
rxe_init_ports(rxe, ndev);
140
153
rxe_init_pools(rxe);
141
154
142
155
/* init pending mmap list */
···
171
184
int rxe_add(struct rxe_dev *rxe, unsigned int mtu, const char *ibdev_name,
172
185
struct net_device *ndev)
173
186
{
174
-
rxe_init(rxe);
187
+
rxe_init(rxe, ndev);
175
188
rxe_set_mtu(rxe, mtu);
176
189
177
190
return rxe_register_device(rxe, ibdev_name, ndev);