tjh.dev / kernel
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Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
"Mostly quiet now:

i915:
fixing userspace visiblie issues, all stable marked

radeon:
one more pll fix, two crashers, one suspend/resume regression"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon: Resume fbcon last
drm/radeon: only allocate necessary size for vm bo list
drm/radeon: don't allow RADEON_GEM_DOMAIN_CPU for command submission
drm/radeon: avoid crash if VM command submission isn't available
drm/radeon: lower the ref * post PLL maximum once more
drm/i915: Prevent negative relocation deltas from wrapping
drm/i915: Only copy back the modified fields to userspace from execbuffer
drm/i915: Fix dynamic allocation of physical handles

Linus Torvalds 80e06794 9f12600f

+298 -304
-1
drivers/gpu/drm/i915/i915_dma.c
··· 1833 1833 flush_workqueue(dev_priv->wq); 1834 1834 1835 1835 mutex_lock(&dev->struct_mutex); 1836 - i915_gem_free_all_phys_object(dev); 1837 1836 i915_gem_cleanup_ringbuffer(dev); 1838 1837 i915_gem_context_fini(dev); 1839 1838 WARN_ON(dev_priv->mm.aliasing_ppgtt);
+7 -23
drivers/gpu/drm/i915/i915_drv.h
··· 242 242 #define WATCH_LISTS 0 243 243 #define WATCH_GTT 0 244 244 245 - #define I915_GEM_PHYS_CURSOR_0 1 246 - #define I915_GEM_PHYS_CURSOR_1 2 247 - #define I915_GEM_PHYS_OVERLAY_REGS 3 248 - #define I915_MAX_PHYS_OBJECT (I915_GEM_PHYS_OVERLAY_REGS) 249 - 250 - struct drm_i915_gem_phys_object { 251 - int id; 252 - struct page **page_list; 253 - drm_dma_handle_t *handle; 254 - struct drm_i915_gem_object *cur_obj; 255 - }; 256 - 257 245 struct opregion_header; 258 246 struct opregion_acpi; 259 247 struct opregion_swsci; ··· 1175 1187 /** Bit 6 swizzling required for Y tiling */ 1176 1188 uint32_t bit_6_swizzle_y; 1177 1189 1178 - /* storage for physical objects */ 1179 - struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; 1180 - 1181 1190 /* accounting, useful for userland debugging */ 1182 1191 spinlock_t object_stat_lock; 1183 1192 size_t object_memory; ··· 1754 1769 struct drm_file *pin_filp; 1755 1770 1756 1771 /** for phy allocated objects */ 1757 - struct drm_i915_gem_phys_object *phys_obj; 1772 + drm_dma_handle_t *phys_handle; 1758 1773 }; 1759 1774 1760 1775 #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base) ··· 2189 2204 #define PIN_MAPPABLE 0x1 2190 2205 #define PIN_NONBLOCK 0x2 2191 2206 #define PIN_GLOBAL 0x4 2207 + #define PIN_OFFSET_BIAS 0x8 2208 + #define PIN_OFFSET_MASK (~4095) 2192 2209 int __must_check i915_gem_object_pin(struct drm_i915_gem_object *obj, 2193 2210 struct i915_address_space *vm, 2194 2211 uint32_t alignment, 2195 - unsigned flags); 2212 + uint64_t flags); 2196 2213 int __must_check i915_vma_unbind(struct i915_vma *vma); 2197 2214 int i915_gem_object_put_pages(struct drm_i915_gem_object *obj); 2198 2215 void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv); ··· 2321 2334 u32 alignment, 2322 2335 struct intel_ring_buffer *pipelined); 2323 2336 void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj); 2324 - int i915_gem_attach_phys_object(struct drm_device *dev, 2325 - struct drm_i915_gem_object *obj, 2326 - int id, 2337 + int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, 2327 2338 int align); 2328 - void i915_gem_detach_phys_object(struct drm_device *dev, 2329 - struct drm_i915_gem_object *obj); 2330 - void i915_gem_free_all_phys_object(struct drm_device *dev); 2331 2339 int i915_gem_open(struct drm_device *dev, struct drm_file *file); 2332 2340 void i915_gem_release(struct drm_device *dev, struct drm_file *file); 2333 2341 ··· 2447 2465 int min_size, 2448 2466 unsigned alignment, 2449 2467 unsigned cache_level, 2468 + unsigned long start, 2469 + unsigned long end, 2450 2470 unsigned flags); 2451 2471 int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle); 2452 2472 int i915_gem_evict_everything(struct drm_device *dev);
+160 -205
drivers/gpu/drm/i915/i915_gem.c
··· 43 43 static __must_check int 44 44 i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj, 45 45 bool readonly); 46 - static int i915_gem_phys_pwrite(struct drm_device *dev, 47 - struct drm_i915_gem_object *obj, 48 - struct drm_i915_gem_pwrite *args, 49 - struct drm_file *file); 50 46 51 47 static void i915_gem_write_fence(struct drm_device *dev, int reg, 52 48 struct drm_i915_gem_object *obj); ··· 202 206 args->aper_size = dev_priv->gtt.base.total; 203 207 args->aper_available_size = args->aper_size - pinned; 204 208 209 + return 0; 210 + } 211 + 212 + static void i915_gem_object_detach_phys(struct drm_i915_gem_object *obj) 213 + { 214 + drm_dma_handle_t *phys = obj->phys_handle; 215 + 216 + if (!phys) 217 + return; 218 + 219 + if (obj->madv == I915_MADV_WILLNEED) { 220 + struct address_space *mapping = file_inode(obj->base.filp)->i_mapping; 221 + char *vaddr = phys->vaddr; 222 + int i; 223 + 224 + for (i = 0; i < obj->base.size / PAGE_SIZE; i++) { 225 + struct page *page = shmem_read_mapping_page(mapping, i); 226 + if (!IS_ERR(page)) { 227 + char *dst = kmap_atomic(page); 228 + memcpy(dst, vaddr, PAGE_SIZE); 229 + drm_clflush_virt_range(dst, PAGE_SIZE); 230 + kunmap_atomic(dst); 231 + 232 + set_page_dirty(page); 233 + mark_page_accessed(page); 234 + page_cache_release(page); 235 + } 236 + vaddr += PAGE_SIZE; 237 + } 238 + i915_gem_chipset_flush(obj->base.dev); 239 + } 240 + 241 + #ifdef CONFIG_X86 242 + set_memory_wb((unsigned long)phys->vaddr, phys->size / PAGE_SIZE); 243 + #endif 244 + drm_pci_free(obj->base.dev, phys); 245 + obj->phys_handle = NULL; 246 + } 247 + 248 + int 249 + i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, 250 + int align) 251 + { 252 + drm_dma_handle_t *phys; 253 + struct address_space *mapping; 254 + char *vaddr; 255 + int i; 256 + 257 + if (obj->phys_handle) { 258 + if ((unsigned long)obj->phys_handle->vaddr & (align -1)) 259 + return -EBUSY; 260 + 261 + return 0; 262 + } 263 + 264 + if (obj->madv != I915_MADV_WILLNEED) 265 + return -EFAULT; 266 + 267 + if (obj->base.filp == NULL) 268 + return -EINVAL; 269 + 270 + /* create a new object */ 271 + phys = drm_pci_alloc(obj->base.dev, obj->base.size, align); 272 + if (!phys) 273 + return -ENOMEM; 274 + 275 + vaddr = phys->vaddr; 276 + #ifdef CONFIG_X86 277 + set_memory_wc((unsigned long)vaddr, phys->size / PAGE_SIZE); 278 + #endif 279 + mapping = file_inode(obj->base.filp)->i_mapping; 280 + for (i = 0; i < obj->base.size / PAGE_SIZE; i++) { 281 + struct page *page; 282 + char *src; 283 + 284 + page = shmem_read_mapping_page(mapping, i); 285 + if (IS_ERR(page)) { 286 + #ifdef CONFIG_X86 287 + set_memory_wb((unsigned long)phys->vaddr, phys->size / PAGE_SIZE); 288 + #endif 289 + drm_pci_free(obj->base.dev, phys); 290 + return PTR_ERR(page); 291 + } 292 + 293 + src = kmap_atomic(page); 294 + memcpy(vaddr, src, PAGE_SIZE); 295 + kunmap_atomic(src); 296 + 297 + mark_page_accessed(page); 298 + page_cache_release(page); 299 + 300 + vaddr += PAGE_SIZE; 301 + } 302 + 303 + obj->phys_handle = phys; 304 + return 0; 305 + } 306 + 307 + static int 308 + i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, 309 + struct drm_i915_gem_pwrite *args, 310 + struct drm_file *file_priv) 311 + { 312 + struct drm_device *dev = obj->base.dev; 313 + void *vaddr = obj->phys_handle->vaddr + args->offset; 314 + char __user *user_data = to_user_ptr(args->data_ptr); 315 + 316 + if (__copy_from_user_inatomic_nocache(vaddr, user_data, args->size)) { 317 + unsigned long unwritten; 318 + 319 + /* The physical object once assigned is fixed for the lifetime 320 + * of the obj, so we can safely drop the lock and continue 321 + * to access vaddr. 322 + */ 323 + mutex_unlock(&dev->struct_mutex); 324 + unwritten = copy_from_user(vaddr, user_data, args->size); 325 + mutex_lock(&dev->struct_mutex); 326 + if (unwritten) 327 + return -EFAULT; 328 + } 329 + 330 + i915_gem_chipset_flush(dev); 205 331 return 0; 206 332 } 207 333 ··· 1039 921 * pread/pwrite currently are reading and writing from the CPU 1040 922 * perspective, requiring manual detiling by the client. 1041 923 */ 1042 - if (obj->phys_obj) { 1043 - ret = i915_gem_phys_pwrite(dev, obj, args, file); 924 + if (obj->phys_handle) { 925 + ret = i915_gem_phys_pwrite(obj, args, file); 1044 926 goto out; 1045 927 } 1046 928 ··· 3326 3208 i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, 3327 3209 struct i915_address_space *vm, 3328 3210 unsigned alignment, 3329 - unsigned flags) 3211 + uint64_t flags) 3330 3212 { 3331 3213 struct drm_device *dev = obj->base.dev; 3332 3214 struct drm_i915_private *dev_priv = dev->dev_private; 3333 3215 u32 size, fence_size, fence_alignment, unfenced_alignment; 3334 - size_t gtt_max = 3216 + unsigned long start = 3217 + flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0; 3218 + unsigned long end = 3335 3219 flags & PIN_MAPPABLE ? dev_priv->gtt.mappable_end : vm->total; 3336 3220 struct i915_vma *vma; 3337 3221 int ret; ··· 3362 3242 /* If the object is bigger than the entire aperture, reject it early 3363 3243 * before evicting everything in a vain attempt to find space. 3364 3244 */ 3365 - if (obj->base.size > gtt_max) { 3366 - DRM_DEBUG("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%zu\n", 3245 + if (obj->base.size > end) { 3246 + DRM_DEBUG("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%lu\n", 3367 3247 obj->base.size, 3368 3248 flags & PIN_MAPPABLE ? "mappable" : "total", 3369 - gtt_max); 3249 + end); 3370 3250 return ERR_PTR(-E2BIG); 3371 3251 } 3372 3252 ··· 3383 3263 search_free: 3384 3264 ret = drm_mm_insert_node_in_range_generic(&vm->mm, &vma->node, 3385 3265 size, alignment, 3386 - obj->cache_level, 0, gtt_max, 3266 + obj->cache_level, 3267 + start, end, 3387 3268 DRM_MM_SEARCH_DEFAULT, 3388 3269 DRM_MM_CREATE_DEFAULT); 3389 3270 if (ret) { 3390 3271 ret = i915_gem_evict_something(dev, vm, size, alignment, 3391 - obj->cache_level, flags); 3272 + obj->cache_level, 3273 + start, end, 3274 + flags); 3392 3275 if (ret == 0) 3393 3276 goto search_free; 3394 3277 ··· 3951 3828 return ret; 3952 3829 } 3953 3830 3831 + static bool 3832 + i915_vma_misplaced(struct i915_vma *vma, uint32_t alignment, uint64_t flags) 3833 + { 3834 + struct drm_i915_gem_object *obj = vma->obj; 3835 + 3836 + if (alignment && 3837 + vma->node.start & (alignment - 1)) 3838 + return true; 3839 + 3840 + if (flags & PIN_MAPPABLE && !obj->map_and_fenceable) 3841 + return true; 3842 + 3843 + if (flags & PIN_OFFSET_BIAS && 3844 + vma->node.start < (flags & PIN_OFFSET_MASK)) 3845 + return true; 3846 + 3847 + return false; 3848 + } 3849 + 3954 3850 int 3955 3851 i915_gem_object_pin(struct drm_i915_gem_object *obj, 3956 3852 struct i915_address_space *vm, 3957 3853 uint32_t alignment, 3958 - unsigned flags) 3854 + uint64_t flags) 3959 3855 { 3960 3856 struct i915_vma *vma; 3961 3857 int ret; ··· 3987 3845 if (WARN_ON(vma->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT)) 3988 3846 return -EBUSY; 3989 3847 3990 - if ((alignment && 3991 - vma->node.start & (alignment - 1)) || 3992 - (flags & PIN_MAPPABLE && !obj->map_and_fenceable)) { 3848 + if (i915_vma_misplaced(vma, alignment, flags)) { 3993 3849 WARN(vma->pin_count, 3994 3850 "bo is already pinned with incorrect alignment:" 3995 3851 " offset=%lx, req.alignment=%x, req.map_and_fenceable=%d," 3996 3852 " obj->map_and_fenceable=%d\n", 3997 3853 i915_gem_obj_offset(obj, vm), alignment, 3998 - flags & PIN_MAPPABLE, 3854 + !!(flags & PIN_MAPPABLE), 3999 3855 obj->map_and_fenceable); 4000 3856 ret = i915_vma_unbind(vma); 4001 3857 if (ret) ··· 4303 4163 4304 4164 trace_i915_gem_object_destroy(obj); 4305 4165 4306 - if (obj->phys_obj) 4307 - i915_gem_detach_phys_object(dev, obj); 4308 - 4309 4166 list_for_each_entry_safe(vma, next, &obj->vma_list, vma_link) { 4310 4167 int ret; 4311 4168 ··· 4319 4182 dev_priv->mm.interruptible = was_interruptible; 4320 4183 } 4321 4184 } 4185 + 4186 + i915_gem_object_detach_phys(obj); 4322 4187 4323 4188 /* Stolen objects don't hold a ref, but do hold pin count. Fix that up 4324 4189 * before progressing. */ ··· 4783 4644 dev_priv->mm.inactive_shrinker.count_objects = i915_gem_inactive_count; 4784 4645 dev_priv->mm.inactive_shrinker.seeks = DEFAULT_SEEKS; 4785 4646 register_shrinker(&dev_priv->mm.inactive_shrinker); 4786 - } 4787 - 4788 - /* 4789 - * Create a physically contiguous memory object for this object 4790 - * e.g. for cursor + overlay regs 4791 - */ 4792 - static int i915_gem_init_phys_object(struct drm_device *dev, 4793 - int id, int size, int align) 4794 - { 4795 - struct drm_i915_private *dev_priv = dev->dev_private; 4796 - struct drm_i915_gem_phys_object *phys_obj; 4797 - int ret; 4798 - 4799 - if (dev_priv->mm.phys_objs[id - 1] || !size) 4800 - return 0; 4801 - 4802 - phys_obj = kzalloc(sizeof(*phys_obj), GFP_KERNEL); 4803 - if (!phys_obj) 4804 - return -ENOMEM; 4805 - 4806 - phys_obj->id = id; 4807 - 4808 - phys_obj->handle = drm_pci_alloc(dev, size, align); 4809 - if (!phys_obj->handle) { 4810 - ret = -ENOMEM; 4811 - goto kfree_obj; 4812 - } 4813 - #ifdef CONFIG_X86 4814 - set_memory_wc((unsigned long)phys_obj->handle->vaddr, phys_obj->handle->size / PAGE_SIZE); 4815 - #endif 4816 - 4817 - dev_priv->mm.phys_objs[id - 1] = phys_obj; 4818 - 4819 - return 0; 4820 - kfree_obj: 4821 - kfree(phys_obj); 4822 - return ret; 4823 - } 4824 - 4825 - static void i915_gem_free_phys_object(struct drm_device *dev, int id) 4826 - { 4827 - struct drm_i915_private *dev_priv = dev->dev_private; 4828 - struct drm_i915_gem_phys_object *phys_obj; 4829 - 4830 - if (!dev_priv->mm.phys_objs[id - 1]) 4831 - return; 4832 - 4833 - phys_obj = dev_priv->mm.phys_objs[id - 1]; 4834 - if (phys_obj->cur_obj) { 4835 - i915_gem_detach_phys_object(dev, phys_obj->cur_obj); 4836 - } 4837 - 4838 - #ifdef CONFIG_X86 4839 - set_memory_wb((unsigned long)phys_obj->handle->vaddr, phys_obj->handle->size / PAGE_SIZE); 4840 - #endif 4841 - drm_pci_free(dev, phys_obj->handle); 4842 - kfree(phys_obj); 4843 - dev_priv->mm.phys_objs[id - 1] = NULL; 4844 - } 4845 - 4846 - void i915_gem_free_all_phys_object(struct drm_device *dev) 4847 - { 4848 - int i; 4849 - 4850 - for (i = I915_GEM_PHYS_CURSOR_0; i <= I915_MAX_PHYS_OBJECT; i++) 4851 - i915_gem_free_phys_object(dev, i); 4852 - } 4853 - 4854 - void i915_gem_detach_phys_object(struct drm_device *dev, 4855 - struct drm_i915_gem_object *obj) 4856 - { 4857 - struct address_space *mapping = file_inode(obj->base.filp)->i_mapping; 4858 - char *vaddr; 4859 - int i; 4860 - int page_count; 4861 - 4862 - if (!obj->phys_obj) 4863 - return; 4864 - vaddr = obj->phys_obj->handle->vaddr; 4865 - 4866 - page_count = obj->base.size / PAGE_SIZE; 4867 - for (i = 0; i < page_count; i++) { 4868 - struct page *page = shmem_read_mapping_page(mapping, i); 4869 - if (!IS_ERR(page)) { 4870 - char *dst = kmap_atomic(page); 4871 - memcpy(dst, vaddr + i*PAGE_SIZE, PAGE_SIZE); 4872 - kunmap_atomic(dst); 4873 - 4874 - drm_clflush_pages(&page, 1); 4875 - 4876 - set_page_dirty(page); 4877 - mark_page_accessed(page); 4878 - page_cache_release(page); 4879 - } 4880 - } 4881 - i915_gem_chipset_flush(dev); 4882 - 4883 - obj->phys_obj->cur_obj = NULL; 4884 - obj->phys_obj = NULL; 4885 - } 4886 - 4887 - int 4888 - i915_gem_attach_phys_object(struct drm_device *dev, 4889 - struct drm_i915_gem_object *obj, 4890 - int id, 4891 - int align) 4892 - { 4893 - struct address_space *mapping = file_inode(obj->base.filp)->i_mapping; 4894 - struct drm_i915_private *dev_priv = dev->dev_private; 4895 - int ret = 0; 4896 - int page_count; 4897 - int i; 4898 - 4899 - if (id > I915_MAX_PHYS_OBJECT) 4900 - return -EINVAL; 4901 - 4902 - if (obj->phys_obj) { 4903 - if (obj->phys_obj->id == id) 4904 - return 0; 4905 - i915_gem_detach_phys_object(dev, obj); 4906 - } 4907 - 4908 - /* create a new object */ 4909 - if (!dev_priv->mm.phys_objs[id - 1]) { 4910 - ret = i915_gem_init_phys_object(dev, id, 4911 - obj->base.size, align); 4912 - if (ret) { 4913 - DRM_ERROR("failed to init phys object %d size: %zu\n", 4914 - id, obj->base.size); 4915 - return ret; 4916 - } 4917 - } 4918 - 4919 - /* bind to the object */ 4920 - obj->phys_obj = dev_priv->mm.phys_objs[id - 1]; 4921 - obj->phys_obj->cur_obj = obj; 4922 - 4923 - page_count = obj->base.size / PAGE_SIZE; 4924 - 4925 - for (i = 0; i < page_count; i++) { 4926 - struct page *page; 4927 - char *dst, *src; 4928 - 4929 - page = shmem_read_mapping_page(mapping, i); 4930 - if (IS_ERR(page)) 4931 - return PTR_ERR(page); 4932 - 4933 - src = kmap_atomic(page); 4934 - dst = obj->phys_obj->handle->vaddr + (i * PAGE_SIZE); 4935 - memcpy(dst, src, PAGE_SIZE); 4936 - kunmap_atomic(src); 4937 - 4938 - mark_page_accessed(page); 4939 - page_cache_release(page); 4940 - } 4941 - 4942 - return 0; 4943 - } 4944 - 4945 - static int 4946 - i915_gem_phys_pwrite(struct drm_device *dev, 4947 - struct drm_i915_gem_object *obj, 4948 - struct drm_i915_gem_pwrite *args, 4949 - struct drm_file *file_priv) 4950 - { 4951 - void *vaddr = obj->phys_obj->handle->vaddr + args->offset; 4952 - char __user *user_data = to_user_ptr(args->data_ptr); 4953 - 4954 - if (__copy_from_user_inatomic_nocache(vaddr, user_data, args->size)) { 4955 - unsigned long unwritten; 4956 - 4957 - /* The physical object once assigned is fixed for the lifetime 4958 - * of the obj, so we can safely drop the lock and continue 4959 - * to access vaddr. 4960 - */ 4961 - mutex_unlock(&dev->struct_mutex); 4962 - unwritten = copy_from_user(vaddr, user_data, args->size); 4963 - mutex_lock(&dev->struct_mutex); 4964 - if (unwritten) 4965 - return -EFAULT; 4966 - } 4967 - 4968 - i915_gem_chipset_flush(dev); 4969 - return 0; 4970 4647 } 4971 4648 4972 4649 void i915_gem_release(struct drm_device *dev, struct drm_file *file)
+4 -5
drivers/gpu/drm/i915/i915_gem_evict.c
··· 68 68 int 69 69 i915_gem_evict_something(struct drm_device *dev, struct i915_address_space *vm, 70 70 int min_size, unsigned alignment, unsigned cache_level, 71 + unsigned long start, unsigned long end, 71 72 unsigned flags) 72 73 { 73 - struct drm_i915_private *dev_priv = dev->dev_private; 74 74 struct list_head eviction_list, unwind_list; 75 75 struct i915_vma *vma; 76 76 int ret = 0; ··· 102 102 */ 103 103 104 104 INIT_LIST_HEAD(&unwind_list); 105 - if (flags & PIN_MAPPABLE) { 106 - BUG_ON(!i915_is_ggtt(vm)); 105 + if (start != 0 || end != vm->total) { 107 106 drm_mm_init_scan_with_range(&vm->mm, min_size, 108 - alignment, cache_level, 0, 109 - dev_priv->gtt.mappable_end); 107 + alignment, cache_level, 108 + start, end); 110 109 } else 111 110 drm_mm_init_scan(&vm->mm, min_size, alignment, cache_level); 112 111
+89 -41
drivers/gpu/drm/i915/i915_gem_execbuffer.c
··· 35 35 36 36 #define __EXEC_OBJECT_HAS_PIN (1<<31) 37 37 #define __EXEC_OBJECT_HAS_FENCE (1<<30) 38 + #define __EXEC_OBJECT_NEEDS_BIAS (1<<28) 39 + 40 + #define BATCH_OFFSET_BIAS (256*1024) 38 41 39 42 struct eb_vmas { 40 43 struct list_head vmas; ··· 548 545 struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; 549 546 bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4; 550 547 bool need_fence; 551 - unsigned flags; 548 + uint64_t flags; 552 549 int ret; 553 550 554 551 flags = 0; ··· 562 559 563 560 if (entry->flags & EXEC_OBJECT_NEEDS_GTT) 564 561 flags |= PIN_GLOBAL; 562 + if (entry->flags & __EXEC_OBJECT_NEEDS_BIAS) 563 + flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; 565 564 566 565 ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, flags); 567 566 if (ret) ··· 595 590 } 596 591 597 592 return 0; 593 + } 594 + 595 + static bool 596 + eb_vma_misplaced(struct i915_vma *vma, bool has_fenced_gpu_access) 597 + { 598 + struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; 599 + struct drm_i915_gem_object *obj = vma->obj; 600 + bool need_fence, need_mappable; 601 + 602 + need_fence = 603 + has_fenced_gpu_access && 604 + entry->flags & EXEC_OBJECT_NEEDS_FENCE && 605 + obj->tiling_mode != I915_TILING_NONE; 606 + need_mappable = need_fence || need_reloc_mappable(vma); 607 + 608 + WARN_ON((need_mappable || need_fence) && 609 + !i915_is_ggtt(vma->vm)); 610 + 611 + if (entry->alignment && 612 + vma->node.start & (entry->alignment - 1)) 613 + return true; 614 + 615 + if (need_mappable && !obj->map_and_fenceable) 616 + return true; 617 + 618 + if (entry->flags & __EXEC_OBJECT_NEEDS_BIAS && 619 + vma->node.start < BATCH_OFFSET_BIAS) 620 + return true; 621 + 622 + return false; 598 623 } 599 624 600 625 static int ··· 688 653 689 654 /* Unbind any ill-fitting objects or pin. */ 690 655 list_for_each_entry(vma, vmas, exec_list) { 691 - struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; 692 - bool need_fence, need_mappable; 693 - 694 - obj = vma->obj; 695 - 696 656 if (!drm_mm_node_allocated(&vma->node)) 697 657 continue; 698 658 699 - need_fence = 700 - has_fenced_gpu_access && 701 - entry->flags & EXEC_OBJECT_NEEDS_FENCE && 702 - obj->tiling_mode != I915_TILING_NONE; 703 - need_mappable = need_fence || need_reloc_mappable(vma); 704 - 705 - WARN_ON((need_mappable || need_fence) && 706 - !i915_is_ggtt(vma->vm)); 707 - 708 - if ((entry->alignment && 709 - vma->node.start & (entry->alignment - 1)) || 710 - (need_mappable && !obj->map_and_fenceable)) 659 + if (eb_vma_misplaced(vma, has_fenced_gpu_access)) 711 660 ret = i915_vma_unbind(vma); 712 661 else 713 662 ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs); ··· 792 773 * relocations were valid. 793 774 */ 794 775 for (j = 0; j < exec[i].relocation_count; j++) { 795 - if (copy_to_user(&user_relocs[j].presumed_offset, 796 - &invalid_offset, 797 - sizeof(invalid_offset))) { 776 + if (__copy_to_user(&user_relocs[j].presumed_offset, 777 + &invalid_offset, 778 + sizeof(invalid_offset))) { 798 779 ret = -EFAULT; 799 780 mutex_lock(&dev->struct_mutex); 800 781 goto err; ··· 1018 999 return 0; 1019 1000 } 1020 1001 1002 + static struct drm_i915_gem_object * 1003 + eb_get_batch(struct eb_vmas *eb) 1004 + { 1005 + struct i915_vma *vma = list_entry(eb->vmas.prev, typeof(*vma), exec_list); 1006 + 1007 + /* 1008 + * SNA is doing fancy tricks with compressing batch buffers, which leads 1009 + * to negative relocation deltas. Usually that works out ok since the 1010 + * relocate address is still positive, except when the batch is placed 1011 + * very low in the GTT. Ensure this doesn't happen. 1012 + * 1013 + * Note that actual hangs have only been observed on gen7, but for 1014 + * paranoia do it everywhere. 1015 + */ 1016 + vma->exec_entry->flags |= __EXEC_OBJECT_NEEDS_BIAS; 1017 + 1018 + return vma->obj; 1019 + } 1020 + 1021 1021 static int 1022 1022 i915_gem_do_execbuffer(struct drm_device *dev, void *data, 1023 1023 struct drm_file *file, ··· 1191 1153 goto err; 1192 1154 1193 1155 /* take note of the batch buffer before we might reorder the lists */ 1194 - batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj; 1156 + batch_obj = eb_get_batch(eb); 1195 1157 1196 1158 /* Move the objects en-masse into the GTT, evicting if necessary. */ 1197 1159 need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0; ··· 1393 1355 1394 1356 ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list); 1395 1357 if (!ret) { 1358 + struct drm_i915_gem_exec_object __user *user_exec_list = 1359 + to_user_ptr(args->buffers_ptr); 1360 + 1396 1361 /* Copy the new buffer offsets back to the user's exec list. */ 1397 - for (i = 0; i < args->buffer_count; i++) 1398 - exec_list[i].offset = exec2_list[i].offset; 1399 - /* ... and back out to userspace */ 1400 - ret = copy_to_user(to_user_ptr(args->buffers_ptr), 1401 - exec_list, 1402 - sizeof(*exec_list) * args->buffer_count); 1403 - if (ret) { 1404 - ret = -EFAULT; 1405 - DRM_DEBUG("failed to copy %d exec entries " 1406 - "back to user (%d)\n", 1407 - args->buffer_count, ret); 1362 + for (i = 0; i < args->buffer_count; i++) { 1363 + ret = __copy_to_user(&user_exec_list[i].offset, 1364 + &exec2_list[i].offset, 1365 + sizeof(user_exec_list[i].offset)); 1366 + if (ret) { 1367 + ret = -EFAULT; 1368 + DRM_DEBUG("failed to copy %d exec entries " 1369 + "back to user (%d)\n", 1370 + args->buffer_count, ret); 1371 + break; 1372 + } 1408 1373 } 1409 1374 } 1410 1375 ··· 1453 1412 ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list); 1454 1413 if (!ret) { 1455 1414 /* Copy the new buffer offsets back to the user's exec list. */ 1456 - ret = copy_to_user(to_user_ptr(args->buffers_ptr), 1457 - exec2_list, 1458 - sizeof(*exec2_list) * args->buffer_count); 1459 - if (ret) { 1460 - ret = -EFAULT; 1461 - DRM_DEBUG("failed to copy %d exec entries " 1462 - "back to user (%d)\n", 1463 - args->buffer_count, ret); 1415 + struct drm_i915_gem_exec_object2 *user_exec_list = 1416 + to_user_ptr(args->buffers_ptr); 1417 + int i; 1418 + 1419 + for (i = 0; i < args->buffer_count; i++) { 1420 + ret = __copy_to_user(&user_exec_list[i].offset, 1421 + &exec2_list[i].offset, 1422 + sizeof(user_exec_list[i].offset)); 1423 + if (ret) { 1424 + ret = -EFAULT; 1425 + DRM_DEBUG("failed to copy %d exec entries " 1426 + "back to user\n", 1427 + args->buffer_count); 1428 + break; 1429 + } 1464 1430 } 1465 1431 } 1466 1432
+3 -1
drivers/gpu/drm/i915/i915_gem_gtt.c
··· 1089 1089 if (ret == -ENOSPC && !retried) { 1090 1090 ret = i915_gem_evict_something(dev, &dev_priv->gtt.base, 1091 1091 GEN6_PD_SIZE, GEN6_PD_ALIGN, 1092 - I915_CACHE_NONE, 0); 1092 + I915_CACHE_NONE, 1093 + 0, dev_priv->gtt.base.total, 1094 + 0); 1093 1095 if (ret) 1094 1096 return ret; 1095 1097
+3 -8
drivers/gpu/drm/i915/intel_display.c
··· 7825 7825 addr = i915_gem_obj_ggtt_offset(obj); 7826 7826 } else { 7827 7827 int align = IS_I830(dev) ? 16 * 1024 : 256; 7828 - ret = i915_gem_attach_phys_object(dev, obj, 7829 - (intel_crtc->pipe == 0) ? I915_GEM_PHYS_CURSOR_0 : I915_GEM_PHYS_CURSOR_1, 7830 - align); 7828 + ret = i915_gem_object_attach_phys(obj, align); 7831 7829 if (ret) { 7832 7830 DRM_DEBUG_KMS("failed to attach phys object\n"); 7833 7831 goto fail_locked; 7834 7832 } 7835 - addr = obj->phys_obj->handle->busaddr; 7833 + addr = obj->phys_handle->busaddr; 7836 7834 } 7837 7835 7838 7836 if (IS_GEN2(dev)) ··· 7838 7840 7839 7841 finish: 7840 7842 if (intel_crtc->cursor_bo) { 7841 - if (INTEL_INFO(dev)->cursor_needs_physical) { 7842 - if (intel_crtc->cursor_bo != obj) 7843 - i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo); 7844 - } else 7843 + if (!INTEL_INFO(dev)->cursor_needs_physical) 7845 7844 i915_gem_object_unpin_from_display_plane(intel_crtc->cursor_bo); 7846 7845 drm_gem_object_unreference(&intel_crtc->cursor_bo->base); 7847 7846 }
+5 -7
drivers/gpu/drm/i915/intel_overlay.c
··· 193 193 struct overlay_registers __iomem *regs; 194 194 195 195 if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) 196 - regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_obj->handle->vaddr; 196 + regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr; 197 197 else 198 198 regs = io_mapping_map_wc(dev_priv->gtt.mappable, 199 199 i915_gem_obj_ggtt_offset(overlay->reg_bo)); ··· 1340 1340 overlay->reg_bo = reg_bo; 1341 1341 1342 1342 if (OVERLAY_NEEDS_PHYSICAL(dev)) { 1343 - ret = i915_gem_attach_phys_object(dev, reg_bo, 1344 - I915_GEM_PHYS_OVERLAY_REGS, 1345 - PAGE_SIZE); 1343 + ret = i915_gem_object_attach_phys(reg_bo, PAGE_SIZE); 1346 1344 if (ret) { 1347 1345 DRM_ERROR("failed to attach phys overlay regs\n"); 1348 1346 goto out_free_bo; 1349 1347 } 1350 - overlay->flip_addr = reg_bo->phys_obj->handle->busaddr; 1348 + overlay->flip_addr = reg_bo->phys_handle->busaddr; 1351 1349 } else { 1352 1350 ret = i915_gem_obj_ggtt_pin(reg_bo, PAGE_SIZE, PIN_MAPPABLE); 1353 1351 if (ret) { ··· 1426 1428 /* Cast to make sparse happy, but it's wc memory anyway, so 1427 1429 * equivalent to the wc io mapping on X86. */ 1428 1430 regs = (struct overlay_registers __iomem *) 1429 - overlay->reg_bo->phys_obj->handle->vaddr; 1431 + overlay->reg_bo->phys_handle->vaddr; 1430 1432 else 1431 1433 regs = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, 1432 1434 i915_gem_obj_ggtt_offset(overlay->reg_bo)); ··· 1460 1462 error->dovsta = I915_READ(DOVSTA); 1461 1463 error->isr = I915_READ(ISR); 1462 1464 if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) 1463 - error->base = (__force long)overlay->reg_bo->phys_obj->handle->vaddr; 1465 + error->base = (__force long)overlay->reg_bo->phys_handle->vaddr; 1464 1466 else 1465 1467 error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo); 1466 1468
+17 -4
drivers/gpu/drm/radeon/radeon_cs.c
··· 152 152 uint32_t domain = r->write_domain ? 153 153 r->write_domain : r->read_domains; 154 154 155 + if (domain & RADEON_GEM_DOMAIN_CPU) { 156 + DRM_ERROR("RADEON_GEM_DOMAIN_CPU is not valid " 157 + "for command submission\n"); 158 + return -EINVAL; 159 + } 160 + 155 161 p->relocs[i].domain = domain; 156 162 if (domain == RADEON_GEM_DOMAIN_VRAM) 157 163 domain |= RADEON_GEM_DOMAIN_GTT; ··· 348 342 return -EINVAL; 349 343 350 344 /* we only support VM on some SI+ rings */ 351 - if ((p->rdev->asic->ring[p->ring]->cs_parse == NULL) && 352 - ((p->cs_flags & RADEON_CS_USE_VM) == 0)) { 353 - DRM_ERROR("Ring %d requires VM!\n", p->ring); 354 - return -EINVAL; 345 + if ((p->cs_flags & RADEON_CS_USE_VM) == 0) { 346 + if (p->rdev->asic->ring[p->ring]->cs_parse == NULL) { 347 + DRM_ERROR("Ring %d requires VM!\n", p->ring); 348 + return -EINVAL; 349 + } 350 + } else { 351 + if (p->rdev->asic->ring[p->ring]->ib_parse == NULL) { 352 + DRM_ERROR("VM not supported on ring %d!\n", 353 + p->ring); 354 + return -EINVAL; 355 + } 355 356 } 356 357 } 357 358
+6 -5
drivers/gpu/drm/radeon/radeon_device.c
··· 1533 1533 1534 1534 radeon_restore_bios_scratch_regs(rdev); 1535 1535 1536 - if (fbcon) { 1537 - radeon_fbdev_set_suspend(rdev, 0); 1538 - console_unlock(); 1539 - } 1540 - 1541 1536 /* init dig PHYs, disp eng pll */ 1542 1537 if (rdev->is_atom_bios) { 1543 1538 radeon_atom_encoder_init(rdev); ··· 1557 1562 } 1558 1563 1559 1564 drm_kms_helper_poll_enable(dev); 1565 + 1566 + if (fbcon) { 1567 + radeon_fbdev_set_suspend(rdev, 0); 1568 + console_unlock(); 1569 + } 1570 + 1560 1571 return 0; 1561 1572 } 1562 1573
+1 -1
drivers/gpu/drm/radeon/radeon_display.c
··· 862 862 unsigned *fb_div, unsigned *ref_div) 863 863 { 864 864 /* limit reference * post divider to a maximum */ 865 - ref_div_max = min(128 / post_div, ref_div_max); 865 + ref_div_max = max(min(100 / post_div, ref_div_max), 1u); 866 866 867 867 /* get matching reference and feedback divider */ 868 868 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max);
+3 -3
drivers/gpu/drm/radeon/radeon_vm.c
··· 130 130 struct list_head *head) 131 131 { 132 132 struct radeon_cs_reloc *list; 133 - unsigned i, idx, size; 133 + unsigned i, idx; 134 134 135 - size = (radeon_vm_num_pdes(rdev) + 1) * sizeof(struct radeon_cs_reloc); 136 - list = kmalloc(size, GFP_KERNEL); 135 + list = kmalloc_array(vm->max_pde_used + 1, 136 + sizeof(struct radeon_cs_reloc), GFP_KERNEL); 137 137 if (!list) 138 138 return NULL; 139 139