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dt-bindings: aspeed-i2c: Convert txt to yaml format

Convert aspeed i2c to yaml.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Link: https://lore.kernel.org/r/20210603024839.27976-2-jamin_lin@aspeedtech.com
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Jamin Lin and committed by
Rob Herring
810e4441 000fe967

+75 -49
+75
Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings 8 + 9 + maintainers: 10 + - Rayn Chen <rayn_chen@aspeedtech.com> 11 + 12 + allOf: 13 + - $ref: /schemas/i2c/i2c-controller.yaml# 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - aspeed,ast2400-i2c-bus 19 + - aspeed,ast2500-i2c-bus 20 + - aspeed,ast2600-i2c-bus 21 + 22 + reg: 23 + minItems: 1 24 + maxItems: 2 25 + items: 26 + - description: address offset and range of bus 27 + - description: address offset and range of bus buffer 28 + 29 + interrupts: 30 + maxItems: 1 31 + 32 + clocks: 33 + maxItems: 1 34 + description: 35 + root clock of bus, should reference the APB 36 + clock in the second cell 37 + 38 + resets: 39 + maxItems: 1 40 + 41 + bus-frequency: 42 + minimum: 500 43 + maximum: 4000000 44 + default: 100000 45 + description: frequency of the bus clock in Hz defaults to 100 kHz when not 46 + specified 47 + 48 + multi-master: 49 + type: boolean 50 + description: 51 + states that there is another master active on this bus 52 + 53 + required: 54 + - reg 55 + - compatible 56 + - clocks 57 + - resets 58 + 59 + unevaluatedProperties: false 60 + 61 + examples: 62 + - | 63 + #include <dt-bindings/clock/aspeed-clock.h> 64 + i2c0: i2c-bus@40 { 65 + #address-cells = <1>; 66 + #size-cells = <0>; 67 + #interrupt-cells = <1>; 68 + compatible = "aspeed,ast2500-i2c-bus"; 69 + reg = <0x40 0x40>; 70 + clocks = <&syscon ASPEED_CLK_APB>; 71 + resets = <&syscon ASPEED_RESET_I2C>; 72 + bus-frequency = <100000>; 73 + interrupts = <0>; 74 + interrupt-parent = <&i2c_ic>; 75 + };
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Documentation/devicetree/bindings/i2c/i2c-aspeed.txt
··· 1 - Device tree configuration for the I2C busses on the AST24XX, AST25XX, and AST26XX SoCs. 2 - 3 - Required Properties: 4 - - #address-cells : should be 1 5 - - #size-cells : should be 0 6 - - reg : address offset and range of bus 7 - - compatible : should be "aspeed,ast2400-i2c-bus" 8 - or "aspeed,ast2500-i2c-bus" 9 - or "aspeed,ast2600-i2c-bus" 10 - - clocks : root clock of bus, should reference the APB 11 - clock in the second cell 12 - - resets : phandle to reset controller with the reset number in 13 - the second cell 14 - - interrupts : interrupt number 15 - 16 - Optional Properties: 17 - - bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not 18 - specified 19 - - multi-master : states that there is another master active on this bus. 20 - 21 - Example: 22 - 23 - i2c { 24 - compatible = "simple-bus"; 25 - #address-cells = <1>; 26 - #size-cells = <1>; 27 - ranges = <0 0x1e78a000 0x1000>; 28 - 29 - i2c_ic: interrupt-controller@0 { 30 - #interrupt-cells = <1>; 31 - compatible = "aspeed,ast2400-i2c-ic"; 32 - reg = <0x0 0x40>; 33 - interrupts = <12>; 34 - interrupt-controller; 35 - }; 36 - 37 - i2c0: i2c-bus@40 { 38 - #address-cells = <1>; 39 - #size-cells = <0>; 40 - #interrupt-cells = <1>; 41 - reg = <0x40 0x40>; 42 - compatible = "aspeed,ast2400-i2c-bus"; 43 - clocks = <&syscon ASPEED_CLK_APB>; 44 - resets = <&syscon ASPEED_RESET_I2C>; 45 - bus-frequency = <100000>; 46 - interrupts = <0>; 47 - interrupt-parent = <&i2c_ic>; 48 - }; 49 - };