tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

drm/msm/dpu: Skip trigger flush and start for CWB

For concurrent writeback, the real time encoder is responsible for
trigger flush and trigger start. Return early for trigger start and
trigger flush for the concurrent writeback encoders.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/637505/
Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-12-a44c293cf422@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

authored by

Jessica Zhang and committed by
Dmitry Baryshkov 8144d17a 95bbde1d

+18
+18
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
··· 1618 1618 static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc, 1619 1619 struct dpu_encoder_phys *phys, uint32_t extra_flush_bits) 1620 1620 { 1621 + struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc); 1621 1622 struct dpu_hw_ctl *ctl; 1622 1623 int pending_kickoff_cnt; 1623 1624 u32 ret = UINT_MAX; ··· 1635 1634 } 1636 1635 1637 1636 pending_kickoff_cnt = dpu_encoder_phys_inc_pending(phys); 1637 + 1638 + /* Return early if encoder is writeback and in clone mode */ 1639 + if (drm_enc->encoder_type == DRM_MODE_ENCODER_VIRTUAL && 1640 + dpu_enc->cwb_mask) { 1641 + DPU_DEBUG("encoder %d skip flush for concurrent writeback encoder\n", 1642 + DRMID(drm_enc)); 1643 + return; 1644 + } 1645 + 1638 1646 1639 1647 if (extra_flush_bits && ctl->ops.update_pending_flush) 1640 1648 ctl->ops.update_pending_flush(ctl, extra_flush_bits); ··· 1667 1657 */ 1668 1658 static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys) 1669 1659 { 1660 + struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(phys->parent); 1661 + 1670 1662 if (!phys) { 1671 1663 DPU_ERROR("invalid argument(s)\n"); 1672 1664 return; ··· 1676 1664 1677 1665 if (!phys->hw_pp) { 1678 1666 DPU_ERROR("invalid pingpong hw\n"); 1667 + return; 1668 + } 1669 + 1670 + if (phys->parent->encoder_type == DRM_MODE_ENCODER_VIRTUAL && 1671 + dpu_enc->cwb_mask) { 1672 + DPU_DEBUG("encoder %d CWB enabled, skipping\n", DRMID(phys->parent)); 1679 1673 return; 1680 1674 } 1681 1675