tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'qcom-arm64-fixes-for-5.19' into arm64-for-5.20

This merges the 'qcom-arm64-fixes-for-5.19' tag into arm64-for-5.20 to
handle the merge conflict related to the header file changes in
sc7180-trogdor.

Bjorn Andersson 817c2f35 a10b760b

+20 -9
+1
MAINTAINERS
··· 2537 2537 ARM/QUALCOMM SUPPORT 2538 2538 M: Andy Gross <agross@kernel.org> 2539 2539 M: Bjorn Andersson <bjorn.andersson@linaro.org> 2540 + R: Konrad Dybcio <konrad.dybcio@somainline.org> 2540 2541 L: linux-arm-msm@vger.kernel.org 2541 2542 S: Maintained 2542 2543 T: git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
+1 -1
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead.dtsi
··· 74 74 vdd_l17_29-supply = <&vph_pwr>; 75 75 vdd_l20_21-supply = <&vph_pwr>; 76 76 vdd_l25-supply = <&pm8994_s5>; 77 - vdd_lvs1_2 = <&pm8994_s4>; 77 + vdd_lvs1_2-supply = <&pm8994_s4>; 78 78 79 79 /* S1, S2, S6 and S12 are managed by RPMPD */ 80 80
+1 -1
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
··· 169 169 vdd_l17_29-supply = <&vph_pwr>; 170 170 vdd_l20_21-supply = <&vph_pwr>; 171 171 vdd_l25-supply = <&pm8994_s5>; 172 - vdd_lvs1_2 = <&pm8994_s4>; 172 + vdd_lvs1_2-supply = <&pm8994_s4>; 173 173 174 174 /* S1, S2, S6 and S12 are managed by RPMPD */ 175 175
+2 -2
arch/arm64/boot/dts/qcom/msm8994.dtsi
··· 100 100 CPU6: cpu@102 { 101 101 device_type = "cpu"; 102 102 compatible = "arm,cortex-a57"; 103 - reg = <0x0 0x101>; 103 + reg = <0x0 0x102>; 104 104 enable-method = "psci"; 105 105 next-level-cache = <&L2_1>; 106 106 }; ··· 108 108 CPU7: cpu@103 { 109 109 device_type = "cpu"; 110 110 compatible = "arm,cortex-a57"; 111 - reg = <0x0 0x101>; 111 + reg = <0x0 0x103>; 112 112 enable-method = "psci"; 113 113 next-level-cache = <&L2_1>; 114 114 };
+1 -1
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
··· 5 5 * Copyright 2021 Google LLC. 6 6 */ 7 7 8 - #include "sc7180-trogdor.dtsi" 8 + /* This file must be included after sc7180-trogdor.dtsi */ 9 9 10 10 / { 11 11 /* BOARD-SPECIFIC TOP LEVEL NODES */
+1 -1
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi
··· 5 5 * Copyright 2020 Google LLC. 6 6 */ 7 7 8 - #include "sc7180-trogdor.dtsi" 8 + /* This file must be included after sc7180-trogdor.dtsi */ 9 9 #include <arm/cros-ec-keyboard.dtsi> 10 10 11 11 &ap_sar_sensor {
+1 -1
arch/arm64/boot/dts/qcom/sdm845.dtsi
··· 4244 4244 4245 4245 power-domains = <&dispcc MDSS_GDSC>; 4246 4246 4247 - clocks = <&gcc GCC_DISP_AHB_CLK>, 4247 + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 4248 4248 <&dispcc DISP_CC_MDSS_MDP_CLK>; 4249 4249 clock-names = "iface", "core"; 4250 4250
+12 -2
arch/arm64/boot/dts/qcom/sm8450.dtsi
··· 2872 2872 reg = <0x0 0x17100000 0x0 0x10000>, /* GICD */ 2873 2873 <0x0 0x17180000 0x0 0x200000>; /* GICR * 8 */ 2874 2874 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 2875 + #address-cells = <2>; 2876 + #size-cells = <2>; 2877 + ranges; 2878 + 2879 + gic_its: msi-controller@17140000 { 2880 + compatible = "arm,gic-v3-its"; 2881 + reg = <0x0 0x17140000 0x0 0x20000>; 2882 + msi-controller; 2883 + #msi-cells = <1>; 2884 + }; 2875 2885 }; 2876 2886 2877 2887 timer@17420000 { ··· 3066 3056 3067 3057 iommus = <&apps_smmu 0xe0 0x0>; 3068 3058 3069 - interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>, 3070 - <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>; 3059 + interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, 3060 + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; 3071 3061 interconnect-names = "ufs-ddr", "cpu-ufs"; 3072 3062 clock-names = 3073 3063 "core_clk",