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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus:
MIPS: Octeon: Place cnmips_cu2_setup in __init memory.
MIPS: Don't place cu2 notifiers in __cpuinitdata
MIPS: Calculate VMLINUZ_LOAD_ADDRESS based on the length of vmlinux.bin
MIPS: Alchemy: Resolve prom section mismatches
MIPS: Fix syscall 64 bit number comments.
MIPS: Hookup fanotify_init, fanotify_mark, and prlimit64 syscalls.
MIPS: TX49xx: Rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN
MIPS: N32: Fix getdents64 syscall for n32
MIPS: Remove pr_<level> uses of KERN_<level>
MIPS: PNX8550: Sort out machine halt, restart and powerdown functions.
MIPS: GIC: Remove dependencies from Malta files.
MIPS: Kconfig: Fix and clarify kconfig help text for VSMP and SMTC.
MIPS: DMA: Fix computation of DMA flags from device's coherent_dma_mask.
MIPS: Audit: Fix hang in entry.S.
MIPS: Document why RELOC_HIDE is there.
MIPS: Octeon: Determine if helper needs to be built
MIPS: Use generic atomic64 for 32-bit kernels
MIPS: RM7000: Symbol should be static
MIPS: kspd: Adjust confusing if indentation
MIPS: Fix a typo.

+125 -57
+19 -2
arch/mips/Kconfig
··· 13 13 select HAVE_KPROBES 14 14 select HAVE_KRETPROBES 15 15 select RTC_LIB if !MACH_LOONGSON 16 + select GENERIC_ATOMIC64 if !64BIT 16 17 17 18 mainmenu "Linux/MIPS Kernel Configuration" 18 19 ··· 1647 1646 select SYS_SUPPORTS_SMP 1648 1647 select SMP_UP 1649 1648 help 1650 - This is a kernel model which is also known a VSMP or lately 1651 - has been marketesed into SMVP. 1649 + This is a kernel model which is known a VSMP but lately has been 1650 + marketesed into SMVP. 1651 + Virtual SMP uses the processor's VPEs to implement virtual 1652 + processors. In currently available configuration of the 34K processor 1653 + this allows for a dual processor. Both processors will share the same 1654 + primary caches; each will obtain the half of the TLB for it's own 1655 + exclusive use. For a layman this model can be described as similar to 1656 + what Intel calls Hyperthreading. 1657 + 1658 + For further information see http://www.linux-mips.org/wiki/34K#VSMP 1652 1659 1653 1660 config MIPS_MT_SMTC 1654 1661 bool "SMTC: Use all TCs on all VPEs for SMP" ··· 1673 1664 help 1674 1665 This is a kernel model which is known a SMTC or lately has been 1675 1666 marketesed into SMVP. 1667 + is presenting the available TC's of the core as processors to Linux. 1668 + On currently available 34K processors this means a Linux system will 1669 + see up to 5 processors. The implementation of the SMTC kernel differs 1670 + significantly from VSMP and cannot efficiently coexist in the same 1671 + kernel binary so the choice between VSMP and SMTC is a compile time 1672 + decision. 1673 + 1674 + For further information see http://www.linux-mips.org/wiki/34K#SMTC 1676 1675 1677 1676 endchoice 1678 1677
+2 -3
arch/mips/alchemy/common/prom.c
··· 43 43 char **prom_argv; 44 44 char **prom_envp; 45 45 46 - void prom_init_cmdline(void) 46 + void __init prom_init_cmdline(void) 47 47 { 48 48 int i; 49 49 ··· 104 104 } 105 105 } 106 106 107 - int prom_get_ethernet_addr(char *ethernet_addr) 107 + int __init prom_get_ethernet_addr(char *ethernet_addr) 108 108 { 109 109 char *ethaddr_str; 110 110 ··· 123 123 124 124 return 0; 125 125 } 126 - EXPORT_SYMBOL(prom_get_ethernet_addr); 127 126 128 127 void __init prom_free_prom_memory(void) 129 128 {
+1 -1
arch/mips/boot/compressed/Makefile
··· 59 59 hostprogs-y := calc_vmlinuz_load_addr 60 60 61 61 VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \ 62 - $(objtree)/$(KBUILD_IMAGE) $(VMLINUX_LOAD_ADDRESS)) 62 + $(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS)) 63 63 64 64 vmlinuzobjs-y += $(obj)/piggy.o 65 65
+4
arch/mips/cavium-octeon/Kconfig
··· 83 83 def_bool y 84 84 select SPARSEMEM_STATIC 85 85 depends on CPU_CAVIUM_OCTEON 86 + 87 + config CAVIUM_OCTEON_HELPER 88 + def_bool y 89 + depends on OCTEON_ETHERNET || PCI
+1 -1
arch/mips/cavium-octeon/cpu.c
··· 41 41 return NOTIFY_OK; /* Let default notifier send signals */ 42 42 } 43 43 44 - static int cnmips_cu2_setup(void) 44 + static int __init cnmips_cu2_setup(void) 45 45 { 46 46 return cu2_notifier(cnmips_cu2_call, 0); 47 47 }
+1 -1
arch/mips/cavium-octeon/executive/Makefile
··· 11 11 12 12 obj-y += cvmx-bootmem.o cvmx-l2c.o cvmx-sysinfo.o octeon-model.o 13 13 14 - obj-$(CONFIG_PCI) += cvmx-helper-errata.o cvmx-helper-jtag.o 14 + obj-$(CONFIG_CAVIUM_OCTEON_HELPER) += cvmx-helper-errata.o cvmx-helper-jtag.o
+4
arch/mips/include/asm/atomic.h
··· 782 782 */ 783 783 #define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0) 784 784 785 + #else /* !CONFIG_64BIT */ 786 + 787 + #include <asm-generic/atomic64.h> 788 + 785 789 #endif /* CONFIG_64BIT */ 786 790 787 791 /*
+1 -1
arch/mips/include/asm/cop2.h
··· 24 24 25 25 #define cu2_notifier(fn, pri) \ 26 26 ({ \ 27 - static struct notifier_block fn##_nb __cpuinitdata = { \ 27 + static struct notifier_block fn##_nb = { \ 28 28 .notifier_call = fn, \ 29 29 .priority = pri \ 30 30 }; \
+1
arch/mips/include/asm/gic.h
··· 321 321 */ 322 322 struct gic_intr_map { 323 323 unsigned int cpunum; /* Directed to this CPU */ 324 + #define GIC_UNUSED 0xdead /* Dummy data */ 324 325 unsigned int pin; /* Directed to this Pin */ 325 326 unsigned int polarity; /* Polarity : +/- */ 326 327 unsigned int trigtype; /* Trigger : Edge/Levl */
+1 -1
arch/mips/include/asm/mach-tx49xx/kmalloc.h
··· 1 1 #ifndef __ASM_MACH_TX49XX_KMALLOC_H 2 2 #define __ASM_MACH_TX49XX_KMALLOC_H 3 3 4 - #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES 4 + #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 5 5 6 6 #endif /* __ASM_MACH_TX49XX_KMALLOC_H */
-3
arch/mips/include/asm/mips-boards/maltaint.h
··· 88 88 89 89 #define GIC_EXT_INTR(x) x 90 90 91 - /* Dummy data */ 92 - #define X 0xdead 93 - 94 91 /* External Interrupts used for IPI */ 95 92 #define GIC_IPI_EXT_INTR_RESCHED_VPE0 16 96 93 #define GIC_IPI_EXT_INTR_CALLFNC_VPE0 17
+14
arch/mips/include/asm/page.h
··· 150 150 ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET) 151 151 #endif 152 152 #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) 153 + 154 + /* 155 + * RELOC_HIDE was originally added by 6007b903dfe5f1d13e0c711ac2894bdd4a61b1ad 156 + * (lmo) rsp. 8431fd094d625b94d364fe393076ccef88e6ce18 (kernel.org). The 157 + * discussion can be found in lkml posting 158 + * <a2ebde260608230500o3407b108hc03debb9da6e62c@mail.gmail.com> which is 159 + * archived at http://lists.linuxcoding.com/kernel/2006-q3/msg17360.html 160 + * 161 + * It is unclear if the misscompilations mentioned in 162 + * http://lkml.org/lkml/2010/8/8/138 also affect MIPS so we keep this one 163 + * until GCC 3.x has been retired before we can apply 164 + * https://patchwork.linux-mips.org/patch/1541/ 165 + */ 166 + 153 167 #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0)) 154 168 155 169 #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
+2 -1
arch/mips/include/asm/thread_info.h
··· 146 146 #define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH) 147 147 148 148 /* work to do on interrupt/exception return */ 149 - #define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP) 149 + #define _TIF_WORK_MASK (0x0000ffef & \ 150 + ~(_TIF_SECCOMP | _TIF_SYSCALL_AUDIT)) 150 151 /* work to do on any return to u-space */ 151 152 #define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP) 152 153
+15 -6
arch/mips/include/asm/unistd.h
··· 356 356 #define __NR_perf_event_open (__NR_Linux + 333) 357 357 #define __NR_accept4 (__NR_Linux + 334) 358 358 #define __NR_recvmmsg (__NR_Linux + 335) 359 + #define __NR_fanotify_init (__NR_Linux + 336) 360 + #define __NR_fanotify_mark (__NR_Linux + 337) 361 + #define __NR_prlimit64 (__NR_Linux + 338) 359 362 360 363 /* 361 364 * Offset of the last Linux o32 flavoured syscall 362 365 */ 363 - #define __NR_Linux_syscalls 335 366 + #define __NR_Linux_syscalls 338 364 367 365 368 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 366 369 367 370 #define __NR_O32_Linux 4000 368 - #define __NR_O32_Linux_syscalls 335 371 + #define __NR_O32_Linux_syscalls 338 369 372 370 373 #if _MIPS_SIM == _MIPS_SIM_ABI64 371 374 ··· 671 668 #define __NR_perf_event_open (__NR_Linux + 292) 672 669 #define __NR_accept4 (__NR_Linux + 293) 673 670 #define __NR_recvmmsg (__NR_Linux + 294) 671 + #define __NR_fanotify_init (__NR_Linux + 295) 672 + #define __NR_fanotify_mark (__NR_Linux + 296) 673 + #define __NR_prlimit64 (__NR_Linux + 297) 674 674 675 675 /* 676 676 * Offset of the last Linux 64-bit flavoured syscall 677 677 */ 678 - #define __NR_Linux_syscalls 294 678 + #define __NR_Linux_syscalls 297 679 679 680 680 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 681 681 682 682 #define __NR_64_Linux 5000 683 - #define __NR_64_Linux_syscalls 294 683 + #define __NR_64_Linux_syscalls 297 684 684 685 685 #if _MIPS_SIM == _MIPS_SIM_NABI32 686 686 ··· 991 985 #define __NR_accept4 (__NR_Linux + 297) 992 986 #define __NR_recvmmsg (__NR_Linux + 298) 993 987 #define __NR_getdents64 (__NR_Linux + 299) 988 + #define __NR_fanotify_init (__NR_Linux + 300) 989 + #define __NR_fanotify_mark (__NR_Linux + 301) 990 + #define __NR_prlimit64 (__NR_Linux + 302) 994 991 995 992 /* 996 993 * Offset of the last N32 flavoured syscall 997 994 */ 998 - #define __NR_Linux_syscalls 299 995 + #define __NR_Linux_syscalls 302 999 996 1000 997 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1001 998 1002 999 #define __NR_N32_Linux 6000 1003 - #define __NR_N32_Linux_syscalls 299 1000 + #define __NR_N32_Linux_syscalls 302 1004 1001 1005 1002 #ifdef __KERNEL__ 1006 1003
+2 -3
arch/mips/kernel/irq-gic.c
··· 7 7 #include <asm/io.h> 8 8 #include <asm/gic.h> 9 9 #include <asm/gcmpregs.h> 10 - #include <asm/mips-boards/maltaint.h> 11 10 #include <asm/irq.h> 12 11 #include <linux/hardirq.h> 13 12 #include <asm-generic/bitops/find.h> ··· 130 131 int i; 131 132 132 133 irq -= _irqbase; 133 - pr_debug(KERN_DEBUG "%s(%d) called\n", __func__, irq); 134 + pr_debug("%s(%d) called\n", __func__, irq); 134 135 cpumask_and(&tmp, cpumask, cpu_online_mask); 135 136 if (cpus_empty(tmp)) 136 137 return -1; ··· 221 222 /* Setup specifics */ 222 223 for (i = 0; i < mapsize; i++) { 223 224 cpu = intrmap[i].cpunum; 224 - if (cpu == X) 225 + if (cpu == GIC_UNUSED) 225 226 continue; 226 227 if (cpu == 0 && i != 0 && intrmap[i].flags == 0) 227 228 continue;
+1 -1
arch/mips/kernel/kgdb.c
··· 283 283 struct pt_regs *regs = args->regs; 284 284 int trap = (regs->cp0_cause & 0x7c) >> 2; 285 285 286 - /* Userpace events, ignore. */ 286 + /* Userspace events, ignore. */ 287 287 if (user_mode(regs)) 288 288 return NOTIFY_DONE; 289 289
+1 -1
arch/mips/kernel/kspd.c
··· 251 251 memset(&tz, 0, sizeof(tz)); 252 252 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv, 253 253 (int)&tz, 0, 0)) == 0) 254 - ret.retval = tv.tv_sec; 254 + ret.retval = tv.tv_sec; 255 255 break; 256 256 257 257 case MTSP_SYSCALL_EXIT:
+7
arch/mips/kernel/linux32.c
··· 341 341 { 342 342 return sys_lookup_dcookie(merge_64(a0, a1), buf, len); 343 343 } 344 + 345 + SYSCALL_DEFINE6(32_fanotify_mark, int, fanotify_fd, unsigned int, flags, 346 + u64, a3, u64, a4, int, dfd, const char __user *, pathname) 347 + { 348 + return sys_fanotify_mark(fanotify_fd, flags, merge_64(a3, a4), 349 + dfd, pathname); 350 + }
+4 -1
arch/mips/kernel/scall32-o32.S
··· 583 583 sys sys_rt_tgsigqueueinfo 4 584 584 sys sys_perf_event_open 5 585 585 sys sys_accept4 4 586 - sys sys_recvmmsg 5 586 + sys sys_recvmmsg 5 /* 4335 */ 587 + sys sys_fanotify_init 2 588 + sys sys_fanotify_mark 6 589 + sys sys_prlimit64 4 587 590 .endm 588 591 589 592 /* We pre-compute the number of _instruction_ bytes needed to
+5 -2
arch/mips/kernel/scall64-64.S
··· 416 416 PTR sys_pipe2 417 417 PTR sys_inotify_init1 418 418 PTR sys_preadv 419 - PTR sys_pwritev /* 5390 */ 419 + PTR sys_pwritev /* 5290 */ 420 420 PTR sys_rt_tgsigqueueinfo 421 421 PTR sys_perf_event_open 422 422 PTR sys_accept4 423 - PTR sys_recvmmsg 423 + PTR sys_recvmmsg 424 + PTR sys_fanotify_init /* 5295 */ 425 + PTR sys_fanotify_mark 426 + PTR sys_prlimit64 424 427 .size sys_call_table,.-sys_call_table
+4 -1
arch/mips/kernel/scall64-n32.S
··· 419 419 PTR sys_perf_event_open 420 420 PTR sys_accept4 421 421 PTR compat_sys_recvmmsg 422 - PTR sys_getdents 422 + PTR sys_getdents64 423 + PTR sys_fanotify_init /* 6300 */ 424 + PTR sys_fanotify_mark 425 + PTR sys_prlimit64 423 426 .size sysn32_call_table,.-sysn32_call_table
+4 -1
arch/mips/kernel/scall64-o32.S
··· 538 538 PTR compat_sys_rt_tgsigqueueinfo 539 539 PTR sys_perf_event_open 540 540 PTR sys_accept4 541 - PTR compat_sys_recvmmsg 541 + PTR compat_sys_recvmmsg /* 4335 */ 542 + PTR sys_fanotify_init 543 + PTR sys_32_fanotify_mark 544 + PTR sys_prlimit64 542 545 .size sys_call_table,.-sys_call_table
+20 -8
arch/mips/mm/dma-default.c
··· 44 44 45 45 static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp) 46 46 { 47 + gfp_t dma_flag; 48 + 47 49 /* ignore region specifiers */ 48 50 gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); 49 51 50 - #ifdef CONFIG_ZONE_DMA 52 + #ifdef CONFIG_ISA 51 53 if (dev == NULL) 52 - gfp |= __GFP_DMA; 53 - else if (dev->coherent_dma_mask < DMA_BIT_MASK(24)) 54 - gfp |= __GFP_DMA; 54 + dma_flag = __GFP_DMA; 55 55 else 56 56 #endif 57 - #ifdef CONFIG_ZONE_DMA32 57 + #if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA) 58 58 if (dev->coherent_dma_mask < DMA_BIT_MASK(32)) 59 - gfp |= __GFP_DMA32; 59 + dma_flag = __GFP_DMA; 60 + else if (dev->coherent_dma_mask < DMA_BIT_MASK(64)) 61 + dma_flag = __GFP_DMA32; 60 62 else 61 63 #endif 62 - ; 64 + #if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA) 65 + if (dev->coherent_dma_mask < DMA_BIT_MASK(64)) 66 + dma_flag = __GFP_DMA32; 67 + else 68 + #endif 69 + #if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32) 70 + if (dev->coherent_dma_mask < DMA_BIT_MASK(64)) 71 + dma_flag = __GFP_DMA; 72 + else 73 + #endif 74 + dma_flag = 0; 63 75 64 76 /* Don't invoke OOM killer */ 65 77 gfp |= __GFP_NORETRY; 66 78 67 - return gfp; 79 + return gfp | dma_flag; 68 80 } 69 81 70 82 void *dma_alloc_noncoherent(struct device *dev, size_t size,
+1 -1
arch/mips/mm/sc-rm7k.c
··· 30 30 #define tc_lsize 32 31 31 32 32 extern unsigned long icache_way_size, dcache_way_size; 33 - unsigned long tcache_size; 33 + static unsigned long tcache_size; 34 34 35 35 #include <asm/r4kcache.h> 36 36
+3
arch/mips/mti-malta/malta-int.c
··· 385 385 */ 386 386 387 387 #define GIC_CPU_NMI GIC_MAP_TO_NMI_MSK 388 + #define X GIC_UNUSED 389 + 388 390 static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { 389 391 { X, X, X, X, 0 }, 390 392 { X, X, X, X, 0 }, ··· 406 404 { X, X, X, X, 0 }, 407 405 /* The remainder of this table is initialised by fill_ipi_map */ 408 406 }; 407 + #undef X 409 408 410 409 /* 411 410 * GCMP needs to be detected before any SMP initialisation
+1 -1
arch/mips/pci/pci-rc32434.c
··· 118 118 if (!((pcicvalue == PCIM_H_EA) || 119 119 (pcicvalue == PCIM_H_IA_FIX) || 120 120 (pcicvalue == PCIM_H_IA_RR))) { 121 - pr_err(KERN_ERR "PCI init error!!!\n"); 121 + pr_err("PCI init error!!!\n"); 122 122 /* Not in Host Mode, return ERROR */ 123 123 return -1; 124 124 }
+5 -15
arch/mips/pnx8550/common/reset.c
··· 22 22 */ 23 23 #include <linux/kernel.h> 24 24 25 + #include <asm/processor.h> 25 26 #include <asm/reboot.h> 26 27 #include <glb.h> 27 28 28 29 void pnx8550_machine_restart(char *command) 29 30 { 30 - char head[] = "************* Machine restart *************"; 31 - char foot[] = "*******************************************"; 32 - 33 - printk("\n\n"); 34 - printk("%s\n", head); 35 - if (command != NULL) 36 - printk("* %s\n", command); 37 - printk("%s\n", foot); 38 - 39 31 PNX8550_RST_CTL = PNX8550_RST_DO_SW_RST; 40 32 } 41 33 42 34 void pnx8550_machine_halt(void) 43 35 { 44 - printk("*** Machine halt. (Not implemented) ***\n"); 45 - } 46 - 47 - void pnx8550_machine_power_off(void) 48 - { 49 - printk("*** Machine power off. (Not implemented) ***\n"); 36 + while (1) { 37 + if (cpu_wait) 38 + cpu_wait(); 39 + } 50 40 }
+1 -2
arch/mips/pnx8550/common/setup.c
··· 44 44 extern void __init board_setup(void); 45 45 extern void pnx8550_machine_restart(char *); 46 46 extern void pnx8550_machine_halt(void); 47 - extern void pnx8550_machine_power_off(void); 48 47 extern struct resource ioport_resource; 49 48 extern struct resource iomem_resource; 50 49 extern char *prom_getcmdline(void); ··· 99 100 100 101 _machine_restart = pnx8550_machine_restart; 101 102 _machine_halt = pnx8550_machine_halt; 102 - pm_power_off = pnx8550_machine_power_off; 103 + pm_power_off = pnx8550_machine_halt; 103 104 104 105 /* Clear the Global 2 Register, PCI Inta Output Enable Registers 105 106 Bit 1:Enable DAC Powerdown