-6

drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c

reviewed

··· 584 584 return true; 585 585 } 586 586 587 587 - static int acp_soft_reset(struct amdgpu_ip_block *ip_block) 588 588 - { 589 589 - return 0; 590 590 - } 591 591 - 592 587 static int acp_set_clockgating_state(void *handle, 593 588 enum amd_clockgating_state state) 594 589 { ··· 612 617 .suspend = acp_suspend, 613 618 .resume = acp_resume, 614 619 .is_idle = acp_is_idle, 615 615 - .soft_reset = acp_soft_reset, 616 620 .set_clockgating_state = acp_set_clockgating_state, 617 621 .set_powergating_state = acp_set_powergating_state, 618 622 .dump_ip_state = NULL,

-6

drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

reviewed

··· 128 128 return true; 129 129 } 130 130 131 131 - static int isp_soft_reset(struct amdgpu_ip_block *ip_block) 132 132 - { 133 133 - return 0; 134 134 - } 135 135 - 136 131 static int isp_set_clockgating_state(void *handle, 137 132 enum amd_clockgating_state state) 138 133 { ··· 147 152 .hw_init = isp_hw_init, 148 153 .hw_fini = isp_hw_fini, 149 154 .is_idle = isp_is_idle, 150 150 - .soft_reset = isp_soft_reset, 151 155 .set_clockgating_state = isp_set_clockgating_state, 152 156 .set_powergating_state = isp_set_powergating_state, 153 157 };

-6

drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

reviewed

··· 632 632 return true; 633 633 } 634 634 635 635 - static int amdgpu_vkms_soft_reset(struct amdgpu_ip_block *ip_block) 636 636 - { 637 637 - return 0; 638 638 - } 639 639 - 640 635 static int amdgpu_vkms_set_clockgating_state(void *handle, 641 636 enum amd_clockgating_state state) 642 637 { ··· 655 660 .suspend = amdgpu_vkms_suspend, 656 661 .resume = amdgpu_vkms_resume, 657 662 .is_idle = amdgpu_vkms_is_idle, 658 658 - .soft_reset = amdgpu_vkms_soft_reset, 659 663 .set_clockgating_state = amdgpu_vkms_set_clockgating_state, 660 664 .set_powergating_state = amdgpu_vkms_set_powergating_state, 661 665 .dump_ip_state = NULL,

-6

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

reviewed

··· 3186 3186 return -ETIMEDOUT; 3187 3187 } 3188 3188 3189 3189 - static int gfx_v6_0_soft_reset(struct amdgpu_ip_block *ip_block) 3190 3190 - { 3191 3191 - return 0; 3192 3192 - } 3193 3193 - 3194 3189 static void gfx_v6_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, 3195 3190 enum amdgpu_interrupt_state state) 3196 3191 { ··· 3444 3449 .resume = gfx_v6_0_resume, 3445 3450 .is_idle = gfx_v6_0_is_idle, 3446 3451 .wait_for_idle = gfx_v6_0_wait_for_idle, 3447 3447 - .soft_reset = gfx_v6_0_soft_reset, 3448 3452 .set_clockgating_state = gfx_v6_0_set_clockgating_state, 3449 3453 .set_powergating_state = gfx_v6_0_set_powergating_state, 3450 3454 .dump_ip_state = NULL,

-6

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

reviewed

··· 1085 1085 return 0; 1086 1086 } 1087 1087 1088 1088 - static int gmc_v10_0_soft_reset(struct amdgpu_ip_block *ip_block) 1089 1089 - { 1090 1090 - return 0; 1091 1091 - } 1092 1092 - 1093 1088 static int gmc_v10_0_set_clockgating_state(void *handle, 1094 1089 enum amd_clockgating_state state) 1095 1090 { ··· 1146 1151 .resume = gmc_v10_0_resume, 1147 1152 .is_idle = gmc_v10_0_is_idle, 1148 1153 .wait_for_idle = gmc_v10_0_wait_for_idle, 1149 1149 - .soft_reset = gmc_v10_0_soft_reset, 1150 1154 .set_clockgating_state = gmc_v10_0_set_clockgating_state, 1151 1155 .set_powergating_state = gmc_v10_0_set_powergating_state, 1152 1156 .get_clockgating_state = gmc_v10_0_get_clockgating_state,

-6

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

reviewed

··· 993 993 return 0; 994 994 } 995 995 996 996 - static int gmc_v11_0_soft_reset(struct amdgpu_ip_block *ip_block) 997 997 - { 998 998 - return 0; 999 999 - } 1000 1000 - 1001 996 static int gmc_v11_0_set_clockgating_state(void *handle, 1002 997 enum amd_clockgating_state state) 1003 998 { ··· 1033 1038 .resume = gmc_v11_0_resume, 1034 1039 .is_idle = gmc_v11_0_is_idle, 1035 1040 .wait_for_idle = gmc_v11_0_wait_for_idle, 1036 1036 - .soft_reset = gmc_v11_0_soft_reset, 1037 1041 .set_clockgating_state = gmc_v11_0_set_clockgating_state, 1038 1042 .set_powergating_state = gmc_v11_0_set_powergating_state, 1039 1043 .get_clockgating_state = gmc_v11_0_get_clockgating_state,

-6

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

reviewed

··· 977 977 return 0; 978 978 } 979 979 980 980 - static int gmc_v12_0_soft_reset(struct amdgpu_ip_block *ip_block) 981 981 - { 982 982 - return 0; 983 983 - } 984 984 - 985 980 static int gmc_v12_0_set_clockgating_state(void *handle, 986 981 enum amd_clockgating_state state) 987 982 { ··· 1017 1022 .resume = gmc_v12_0_resume, 1018 1023 .is_idle = gmc_v12_0_is_idle, 1019 1024 .wait_for_idle = gmc_v12_0_wait_for_idle, 1020 1020 - .soft_reset = gmc_v12_0_soft_reset, 1021 1025 .set_clockgating_state = gmc_v12_0_set_clockgating_state, 1022 1026 .set_powergating_state = gmc_v12_0_set_powergating_state, 1023 1027 .get_clockgating_state = gmc_v12_0_get_clockgating_state,

-6

drivers/gpu/drm/amd/amdgpu/nv.c

reviewed

··· 1039 1039 return true; 1040 1040 } 1041 1041 1042 1042 - static int nv_common_soft_reset(struct amdgpu_ip_block *ip_block) 1043 1043 - { 1044 1044 - return 0; 1045 1045 - } 1046 1046 - 1047 1042 static int nv_common_set_clockgating_state(void *handle, 1048 1043 enum amd_clockgating_state state) 1049 1044 { ··· 1101 1106 .suspend = nv_common_suspend, 1102 1107 .resume = nv_common_resume, 1103 1108 .is_idle = nv_common_is_idle, 1104 1104 - .soft_reset = nv_common_soft_reset, 1105 1109 .set_clockgating_state = nv_common_set_clockgating_state, 1106 1110 .set_powergating_state = nv_common_set_powergating_state, 1107 1111 .get_clockgating_state = nv_common_get_clockgating_state,

-6

drivers/gpu/drm/amd/amdgpu/si.c

reviewed

··· 2649 2649 return true; 2650 2650 } 2651 2651 2652 2652 - static int si_common_soft_reset(struct amdgpu_ip_block *ip_block) 2653 2653 - { 2654 2654 - return 0; 2655 2655 - } 2656 2656 - 2657 2652 static int si_common_set_clockgating_state(void *handle, 2658 2653 enum amd_clockgating_state state) 2659 2654 { ··· 2669 2674 .hw_fini = si_common_hw_fini, 2670 2675 .resume = si_common_resume, 2671 2676 .is_idle = si_common_is_idle, 2672 2672 - .soft_reset = si_common_soft_reset, 2673 2677 .set_clockgating_state = si_common_set_clockgating_state, 2674 2678 .set_powergating_state = si_common_set_powergating_state, 2675 2679 .dump_ip_state = NULL,

-6

drivers/gpu/drm/amd/amdgpu/soc15.c

reviewed

··· 1341 1341 return true; 1342 1342 } 1343 1343 1344 1344 - static int soc15_common_soft_reset(struct amdgpu_ip_block *ip_block) 1345 1345 - { 1346 1346 - return 0; 1347 1347 - } 1348 1348 - 1349 1344 static void soc15_update_drm_clock_gating(struct amdgpu_device *adev, bool enable) 1350 1345 { 1351 1346 uint32_t def, data; ··· 1491 1496 .suspend = soc15_common_suspend, 1492 1497 .resume = soc15_common_resume, 1493 1498 .is_idle = soc15_common_is_idle, 1494 1494 - .soft_reset = soc15_common_soft_reset, 1495 1499 .set_clockgating_state = soc15_common_set_clockgating_state, 1496 1500 .set_powergating_state = soc15_common_set_powergating_state, 1497 1501 .get_clockgating_state= soc15_common_get_clockgating_state,

-6

drivers/gpu/drm/amd/amdgpu/soc21.c

reviewed

··· 927 927 return true; 928 928 } 929 929 930 930 - static int soc21_common_soft_reset(struct amdgpu_ip_block *ip_block) 931 931 - { 932 932 - return 0; 933 933 - } 934 934 - 935 930 static int soc21_common_set_clockgating_state(void *handle, 936 931 enum amd_clockgating_state state) 937 932 { ··· 990 995 .suspend = soc21_common_suspend, 991 996 .resume = soc21_common_resume, 992 997 .is_idle = soc21_common_is_idle, 993 993 - .soft_reset = soc21_common_soft_reset, 994 998 .set_clockgating_state = soc21_common_set_clockgating_state, 995 999 .set_powergating_state = soc21_common_set_powergating_state, 996 1000 .get_clockgating_state = soc21_common_get_clockgating_state,

-6

drivers/gpu/drm/amd/amdgpu/soc24.c

reviewed

··· 522 522 return true; 523 523 } 524 524 525 525 - static int soc24_common_soft_reset(struct amdgpu_ip_block *ip_block) 526 526 - { 527 527 - return 0; 528 528 - } 529 529 - 530 525 static int soc24_common_set_clockgating_state(void *handle, 531 526 enum amd_clockgating_state state) 532 527 { ··· 581 586 .suspend = soc24_common_suspend, 582 587 .resume = soc24_common_resume, 583 588 .is_idle = soc24_common_is_idle, 584 584 - .soft_reset = soc24_common_soft_reset, 585 589 .set_clockgating_state = soc24_common_set_clockgating_state, 586 590 .set_powergating_state = soc24_common_set_powergating_state, 587 591 .get_clockgating_state = soc24_common_get_clockgating_state,

-6

drivers/gpu/drm/amd/amdgpu/vi.c

reviewed

··· 1741 1741 return true; 1742 1742 } 1743 1743 1744 1744 - static int vi_common_soft_reset(struct amdgpu_ip_block *ip_block) 1745 1745 - { 1746 1746 - return 0; 1747 1747 - } 1748 1748 - 1749 1744 static void vi_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev, 1750 1745 bool enable) 1751 1746 { ··· 2033 2038 .suspend = vi_common_suspend, 2034 2039 .resume = vi_common_resume, 2035 2040 .is_idle = vi_common_is_idle, 2036 2036 - .soft_reset = vi_common_soft_reset, 2037 2041 .set_clockgating_state = vi_common_set_clockgating_state, 2038 2042 .set_powergating_state = vi_common_set_powergating_state, 2039 2043 .get_clockgating_state = vi_common_get_clockgating_state,

-6

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

reviewed

··· 3099 3099 return true; 3100 3100 } 3101 3101 3102 3102 - static int kv_dpm_soft_reset(struct amdgpu_ip_block *ip_block) 3103 3103 - { 3104 3104 - return 0; 3105 3105 - } 3106 3106 - 3107 3102 static int kv_dpm_set_interrupt_state(struct amdgpu_device *adev, 3108 3103 struct amdgpu_irq_src *src, 3109 3104 unsigned type, ··· 3302 3307 .suspend = kv_dpm_suspend, 3303 3308 .resume = kv_dpm_resume, 3304 3309 .is_idle = kv_dpm_is_idle, 3305 3305 - .soft_reset = kv_dpm_soft_reset, 3306 3310 .set_clockgating_state = kv_dpm_set_clockgating_state, 3307 3311 .set_powergating_state = kv_dpm_set_powergating_state, 3308 3312 .dump_ip_state = NULL,

-6

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

reviewed

··· 7849 7849 return 0; 7850 7850 } 7851 7851 7852 7852 - static int si_dpm_soft_reset(struct amdgpu_ip_block *ip_block) 7853 7853 - { 7854 7854 - return 0; 7855 7855 - } 7856 7856 - 7857 7852 static int si_dpm_set_clockgating_state(void *handle, 7858 7853 enum amd_clockgating_state state) 7859 7854 { ··· 8044 8049 .resume = si_dpm_resume, 8045 8050 .is_idle = si_dpm_is_idle, 8046 8051 .wait_for_idle = si_dpm_wait_for_idle, 8047 8047 - .soft_reset = si_dpm_soft_reset, 8048 8052 .set_clockgating_state = si_dpm_set_clockgating_state, 8049 8053 .set_powergating_state = si_dpm_set_powergating_state, 8050 8054 .dump_ip_state = NULL,

-6

drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c

reviewed

··· 244 244 return false; 245 245 } 246 246 247 247 - static int pp_sw_reset(struct amdgpu_ip_block *ip_block) 248 248 - { 249 249 - return 0; 250 250 - } 251 251 - 252 247 static int pp_set_powergating_state(void *handle, 253 248 enum amd_powergating_state state) 254 249 { ··· 285 290 .suspend = pp_suspend, 286 291 .resume = pp_resume, 287 292 .is_idle = pp_is_idle, 288 288 - .soft_reset = pp_sw_reset, 289 293 .set_clockgating_state = pp_set_clockgating_state, 290 294 .set_powergating_state = pp_set_powergating_state, 291 295 .dump_ip_state = NULL,