Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'soc-arm-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC ARM code updates from Arnd Bergmann:
"These are again very minimal updates:
- A workaround for firmware on Google Nexus 10
- A fix for early debugging on OMAP1
- A rework for Microchip SoC configuration
- Cleanups on OMAP2 an R-Car-Gen2"
* tag 'soc-arm-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: omap2: dead code cleanup in kconfig for ARCH_OMAP4
ARM: OMAP1: Fix DEBUG_LL and earlyprintk on OMAP16XX
arm64: Kconfig: provide a top-level switch for Microchip platforms
ARM: shmobile: rcar-gen2: Use of_phandle_args_equal() helper
ARM: omap: fix all kernel-doc warnings
ARM: omap2: Replace scnprintf with strscpy in omap3_cpuinfo
ARM: samsung: exynos5250: Allow CPU1 to boot
+17
-26
+2
-2
arch/arm/mach-exynos/firmware.c
+2
-2
arch/arm/mach-exynos/firmware.c
···
61
61
* Exynos3250 doesn't need to send smc command for secondary CPU boot
62
62
* because Exynos3250 removes WFE in secure mode.
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*
64
-
* On Exynos5 devices the call is ignored by trustzone firmware.
64
+
* On most Exynos5 devices the call is ignored by trustzone firmware.
65
65
*/
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if (!soc_is_exynos4210() && !soc_is_exynos4212() &&
67
-
!soc_is_exynos4412())
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+
!soc_is_exynos4412() && !of_machine_is_compatible("google,manta"))
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68
return 0;
69
69
70
70
/*
+2
-2
arch/arm/mach-omap1/clock_data.c
+2
-2
arch/arm/mach-omap1/clock_data.c
···
700
700
/* Make sure UART clocks are enabled early */
701
701
if (cpu_is_omap16xx())
702
702
omap_writel(omap_readl(MOD_CONF_CTRL_0) |
703
-
CONF_MOD_UART1_CLK_MODE_R |
704
-
CONF_MOD_UART3_CLK_MODE_R, MOD_CONF_CTRL_0);
703
+
(1 << CONF_MOD_UART1_CLK_MODE_R) |
704
+
(1 << CONF_MOD_UART3_CLK_MODE_R), MOD_CONF_CTRL_0);
705
705
#endif
706
706
707
707
/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
-1
arch/arm/mach-omap2/Kconfig
-1
arch/arm/mach-omap2/Kconfig
+2
-1
arch/arm/mach-omap2/id.c
+2
-1
arch/arm/mach-omap2/id.c
···
17
17
#include <linux/io.h>
18
18
#include <linux/random.h>
19
19
#include <linux/slab.h>
20
+
#include <linux/string.h>
20
21
21
22
#ifdef CONFIG_SOC_BUS
22
23
#include <linux/sys_soc.h>
···
251
250
cpu_name = "OMAP3503";
252
251
}
253
252
254
-
scnprintf(soc_name, sizeof(soc_name), "%s", cpu_name);
253
+
strscpy(soc_name, cpu_name);
255
254
256
255
/* Print verbose information */
257
256
n += scnprintf(buf, sizeof(buf) - n, "%s %s (", soc_name, soc_rev);
+4
-12
arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
+4
-12
arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
···
141
141
static int __init rcar_gen2_regulator_quirk(void)
142
142
{
143
143
struct regulator_quirk *quirk, *pos, *tmp;
144
-
struct of_phandle_args *argsa, *argsb;
144
+
struct of_phandle_args *args;
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145
const struct of_device_id *id;
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struct device_node *np;
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147
u32 mon, addr;
···
171
171
goto err_mem;
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172
}
173
173
174
-
argsa = &quirk->irq_args;
174
+
args = &quirk->irq_args;
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175
memcpy(&quirk->i2c_msg, id->data, sizeof(quirk->i2c_msg));
176
176
177
177
quirk->id = id;
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quirk->np = of_node_get(np);
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179
quirk->i2c_msg.addr = addr;
180
180
181
-
ret = of_irq_parse_one(np, 0, argsa);
181
+
ret = of_irq_parse_one(np, 0, args);
182
182
if (ret) { /* Skip invalid entry and continue */
183
183
of_node_put(np);
184
184
kfree(quirk);
···
186
186
}
187
187
188
188
list_for_each_entry(pos, &quirk_list, list) {
189
-
argsb = &pos->irq_args;
190
-
191
-
if (argsa->args_count != argsb->args_count)
192
-
continue;
193
-
194
-
ret = memcmp(argsa->args, argsb->args,
195
-
argsa->args_count *
196
-
sizeof(argsa->args[0]));
197
-
if (!ret) {
189
+
if (of_phandle_args_equal(args, &pos->irq_args)) {
198
190
pos->shared = true;
199
191
quirk->shared = true;
200
192
}
+4
-6
arch/arm64/Kconfig.platforms
+4
-6
arch/arm64/Kconfig.platforms
···
188
188
This enables support for the arm64 based Amlogic SoCs
189
189
such as the s905, S905X/D, S912, A113X/D or S905X/D2
190
190
191
-
menu "Microchip SoC support"
191
+
menuconfig ARCH_MICROCHIP
192
+
bool "Microchip SoC support"
192
193
193
-
config ARCH_MICROCHIP
194
-
bool
194
+
if ARCH_MICROCHIP
195
195
196
196
config ARCH_LAN969X
197
197
bool "Microchip LAN969X SoC family"
198
198
select PINCTRL
199
199
select DW_APB_TIMER_OF
200
-
select ARCH_MICROCHIP
201
200
help
202
201
This enables support for the Microchip LAN969X ARMv8-based
203
202
SoC family of TSN-capable gigabit switches.
···
211
212
bool "Microchip Sparx5 SoC family"
212
213
select PINCTRL
213
214
select DW_APB_TIMER_OF
214
-
select ARCH_MICROCHIP
215
215
help
216
216
This enables support for the Microchip Sparx5 ARMv8-based
217
217
SoC family of TSN-capable gigabit switches.
···
221
223
security through TCAM-based frame processing using versatile
222
224
content aware processor (VCAP).
223
225
224
-
endmenu
226
+
endif
225
227
226
228
config ARCH_MMP
227
229
bool "Marvell MMP SoC Family"
+1
arch/arm64/configs/defconfig
+1
arch/arm64/configs/defconfig
+2
-2
include/linux/platform_data/voltage-omap.h
+2
-2
include/linux/platform_data/voltage-omap.h
···
10
10
11
11
/**
12
12
* struct omap_volt_data - Omap voltage specific data.
13
-
* @voltage_nominal: The possible voltage value in uV
13
+
* @volt_nominal: The possible voltage value in uV
14
14
* @sr_efuse_offs: The offset of the efuse register(from system
15
15
* control module base address) from where to read
16
16
* the n-target value for the smartreflex module.
17
17
* @sr_errminlimit: Error min limit value for smartreflex. This value
18
18
* differs at differnet opp and thus is linked
19
19
* with voltage.
20
-
* @vp_errorgain: Error gain value for the voltage processor. This
20
+
* @vp_errgain: Error gain value for the voltage processor. This
21
21
* field also differs according to the voltage/opp.
22
22
*/
23
23
struct omap_volt_data {