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drm/i915/display: Add and compute scaler parameter

Compute the values for second scaler for sharpness.
Fill the register bits corresponding to the scaler.

v1: Rename the title of patch [Ankit]
v2: Remove setup_casf from here[Ankit]
v3: Add skl_scaler_setup_casf in casf_enable

Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251028120747.3027332-7-ankit.k.nautiyal@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

authored by

Nemesa Garg and committed by
Jani Nikula
82860cba 76f51cdc

+54
+6
drivers/gpu/drm/i915/display/intel_casf.c
··· 9 9 #include "intel_de.h" 10 10 #include "intel_display_regs.h" 11 11 #include "intel_display_types.h" 12 + #include "skl_scaler.h" 12 13 13 14 #define MAX_PIXELS_FOR_3_TAP_FILTER (1920 * 1080) 14 15 #define MAX_PIXELS_FOR_5_TAP_FILTER (3840 * 2160) ··· 266 265 sharpness_ctl |= crtc_state->hw.casf_params.win_size; 267 266 268 267 intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl); 268 + 269 + skl_scaler_setup_casf(crtc_state); 269 270 } 270 271 271 272 void intel_casf_disable(const struct intel_crtc_state *crtc_state) ··· 275 272 struct intel_display *display = to_intel_display(crtc_state); 276 273 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 277 274 275 + intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0); 276 + intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0); 278 277 intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0); 278 + intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0); 279 279 }
+46
drivers/gpu/drm/i915/display/skl_scaler.c
··· 739 739 } 740 740 } 741 741 742 + #define CASF_SCALER_FILTER_SELECT \ 743 + (PS_FILTER_PROGRAMMED | \ 744 + PS_Y_VERT_FILTER_SELECT(0) | \ 745 + PS_Y_HORZ_FILTER_SELECT(0) | \ 746 + PS_UV_VERT_FILTER_SELECT(0) | \ 747 + PS_UV_HORZ_FILTER_SELECT(0)) 748 + 749 + void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state) 750 + { 751 + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 752 + struct intel_display *display = to_intel_display(crtc); 753 + struct drm_display_mode *adjusted_mode = 754 + &crtc_state->hw.adjusted_mode; 755 + struct intel_crtc_scaler_state *scaler_state = 756 + &crtc_state->scaler_state; 757 + struct drm_rect src, dest; 758 + int id, width, height; 759 + int x = 0, y = 0; 760 + enum pipe pipe = crtc->pipe; 761 + u32 ps_ctrl; 762 + 763 + width = adjusted_mode->crtc_hdisplay; 764 + height = adjusted_mode->crtc_vdisplay; 765 + 766 + drm_rect_init(&dest, x, y, width, height); 767 + 768 + width = drm_rect_width(&dest); 769 + height = drm_rect_height(&dest); 770 + id = scaler_state->scaler_id; 771 + 772 + drm_rect_init(&src, 0, 0, 773 + drm_rect_width(&crtc_state->pipe_src) << 16, 774 + drm_rect_height(&crtc_state->pipe_src) << 16); 775 + 776 + trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height); 777 + 778 + ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode | 779 + CASF_SCALER_FILTER_SELECT; 780 + 781 + intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl); 782 + intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id), 783 + PS_WIN_XPOS(x) | PS_WIN_YPOS(y)); 784 + intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id), 785 + PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height)); 786 + } 787 + 742 788 void skl_pfit_enable(const struct intel_crtc_state *crtc_state) 743 789 { 744 790 struct intel_display *display = to_intel_display(crtc_state);
+2
drivers/gpu/drm/i915/display/skl_scaler.h
··· 36 36 37 37 void skl_scaler_get_config(struct intel_crtc_state *crtc_state); 38 38 39 + void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state); 40 + 39 41 enum drm_mode_status 40 42 skl_scaler_mode_valid(struct intel_display *display, 41 43 const struct drm_display_mode *mode,