Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'omap-for-v4.8/ir-rx51-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Merge "omap ir-rx51 driver fixes for multiarch for v4.8 merge window"
from Tony Lindgren:
Fix a long time regression for ir-rx51 driver for n900 device tree
booting.
This driver has been unusable with multiarch because of the hardware
timer access. With the recent PWM changes, we can finally fix the
driver for multiarch and device tree support. And naturally there
is no rush for these for the -rc cycle, these can wait for the
merge window.
The PWM changes have been acked by Thierry. For the media changes
I did not get an ack from Mauro but he was Cc'd in the discussion
and these changes do not conflict with other media changes.
After this series we can drop the remaining omap3 legacy booting
board files finally.
* tag 'omap-for-v4.8/ir-rx51-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ir-rx51: use hrtimer instead of dmtimer
ir-rx51: add DT support to driver
ir-rx51: use PWM framework instead of OMAP dmtimer
pwm: omap-dmtimer: Allow for setting dmtimer clock source
ir-rx51: Fix build after multiarch changes broke it
+111
-174
+20
Documentation/devicetree/bindings/media/nokia,n900-ir
+20
Documentation/devicetree/bindings/media/nokia,n900-ir
···
1
+
Device-Tree bindings for LIRC TX driver for Nokia N900(RX51)
2
+
3
+
Required properties:
4
+
- compatible: should be "nokia,n900-ir".
5
+
- pwms: specifies PWM used for IR signal transmission.
6
+
7
+
Example node:
8
+
9
+
pwm9: dmtimer-pwm@9 {
10
+
compatible = "ti,omap-dmtimer-pwm";
11
+
ti,timers = <&timer9>;
12
+
ti,clock-source = <0x00>; /* timer_sys_ck */
13
+
#pwm-cells = <3>;
14
+
};
15
+
16
+
ir: n900-ir {
17
+
compatible = "nokia,n900-ir";
18
+
19
+
pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
20
+
};
+4
Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt
+4
Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt
···
9
9
10
10
Optional properties:
11
11
- ti,prescaler: Should be a value between 0 and 7, see the timers datasheet
12
+
- ti,clock-source: Set dmtimer parent clock, values between 0 and 2:
13
+
- 0x00 - high-frequency system clock (timer_sys_ck)
14
+
- 0x01 - 32-kHz always-on clock (timer_32k_ck)
15
+
- 0x02 - external clock (timer_ext_ck, OMAP2 only)
12
16
13
17
Example:
14
18
pwm9: dmtimer-pwm@9 {
-5
arch/arm/mach-omap2/board-rx51-peripherals.c
-5
arch/arm/mach-omap2/board-rx51-peripherals.c
···
1242
1242
#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
1243
1243
static struct lirc_rx51_platform_data rx51_lirc_data = {
1244
1244
.set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
1245
-
.pwm_timer = 9, /* Use GPT 9 for CIR */
1246
-
#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
1247
-
.dmtimer = &pwm_dmtimer_pdata,
1248
-
#endif
1249
-
1250
1245
};
1251
1246
1252
1247
static struct platform_device rx51_lirc_device = {
+1
-9
arch/arm/mach-omap2/pdata-quirks.c
+1
-9
arch/arm/mach-omap2/pdata-quirks.c
···
273
273
},
274
274
};
275
275
276
-
static struct platform_device rx51_lirc_device;
277
-
278
276
static void __init nokia_n900_legacy_init(void)
279
277
{
280
278
hsmmc2_internal_input_clk();
···
291
293
292
294
pr_info("RX-51: Registering OMAP3 HWRNG device\n");
293
295
platform_device_register(&omap3_rom_rng_device);
294
-
295
296
}
296
-
297
-
platform_device_register(&rx51_lirc_device);
298
297
}
299
298
300
299
static void __init omap3_tao3530_legacy_init(void)
···
486
491
487
492
static struct lirc_rx51_platform_data __maybe_unused rx51_lirc_data = {
488
493
.set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
489
-
.pwm_timer = 9, /* Use GPT 9 for CIR */
490
-
#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
491
-
.dmtimer = &pwm_dmtimer_pdata,
492
-
#endif
493
494
};
494
495
495
496
static struct platform_device __maybe_unused rx51_lirc_device = {
···
523
532
&omap3_iommu_pdata),
524
533
OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]),
525
534
OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]),
535
+
OF_DEV_AUXDATA("nokia,n900-ir", 0, "n900-ir", &rx51_lirc_data),
526
536
/* Only on am3517 */
527
537
OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
528
538
OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
+1
-1
drivers/media/rc/Kconfig
+1
-1
drivers/media/rc/Kconfig
···
336
336
337
337
config IR_RX51
338
338
tristate "Nokia N900 IR transmitter diode"
339
-
depends on OMAP_DM_TIMER && ARCH_OMAP2PLUS && LIRC && !ARCH_MULTIPLATFORM
339
+
depends on OMAP_DM_TIMER && PWM_OMAP_DMTIMER && ARCH_OMAP2PLUS && LIRC
340
340
---help---
341
341
Say Y or M here if you want to enable support for the IR
342
342
transmitter diode built in the Nokia N900 (RX51) device.
+78
-151
drivers/media/rc/ir-rx51.c
+78
-151
drivers/media/rc/ir-rx51.c
···
12
12
* but WITHOUT ANY WARRANTY; without even the implied warranty of
13
13
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14
14
* GNU General Public License for more details.
15
-
*
16
-
* You should have received a copy of the GNU General Public License
17
-
* along with this program; if not, write to the Free Software
18
-
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
-
*
20
15
*/
21
-
16
+
#include <linux/clk.h>
22
17
#include <linux/module.h>
23
18
#include <linux/interrupt.h>
24
19
#include <linux/uaccess.h>
25
20
#include <linux/platform_device.h>
26
21
#include <linux/sched.h>
27
22
#include <linux/wait.h>
28
-
29
-
#include <plat/dmtimer.h>
30
-
#include <plat/clock.h>
23
+
#include <linux/pwm.h>
24
+
#include <linux/of.h>
25
+
#include <linux/hrtimer.h>
31
26
32
27
#include <media/lirc.h>
33
28
#include <media/lirc_dev.h>
···
36
41
37
42
#define WBUF_LEN 256
38
43
39
-
#define TIMER_MAX_VALUE 0xffffffff
40
-
41
44
struct lirc_rx51 {
42
-
struct omap_dm_timer *pwm_timer;
43
-
struct omap_dm_timer *pulse_timer;
45
+
struct pwm_device *pwm;
46
+
struct hrtimer timer;
44
47
struct device *dev;
45
48
struct lirc_rx51_platform_data *pdata;
46
49
wait_queue_head_t wqueue;
47
50
48
-
unsigned long fclk_khz;
49
51
unsigned int freq; /* carrier frequency */
50
52
unsigned int duty_cycle; /* carrier duty cycle */
51
-
unsigned int irq_num;
52
-
unsigned int match;
53
53
int wbuf[WBUF_LEN];
54
54
int wbuf_index;
55
55
unsigned long device_is_open;
56
-
int pwm_timer_num;
57
56
};
58
57
59
-
static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
58
+
static inline void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
60
59
{
61
-
omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
62
-
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
60
+
pwm_enable(lirc_rx51->pwm);
63
61
}
64
62
65
-
static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
63
+
static inline void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
66
64
{
67
-
omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
68
-
OMAP_TIMER_TRIGGER_NONE);
65
+
pwm_disable(lirc_rx51->pwm);
69
66
}
70
67
71
68
static int init_timing_params(struct lirc_rx51 *lirc_rx51)
72
69
{
73
-
u32 load, match;
70
+
struct pwm_device *pwm = lirc_rx51->pwm;
71
+
int duty, period = DIV_ROUND_CLOSEST(NSEC_PER_SEC, lirc_rx51->freq);
74
72
75
-
load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq);
76
-
match = -(lirc_rx51->duty_cycle * -load / 100);
77
-
omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load);
78
-
omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match);
79
-
omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
80
-
omap_dm_timer_start(lirc_rx51->pwm_timer);
81
-
omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
82
-
omap_dm_timer_start(lirc_rx51->pulse_timer);
73
+
duty = DIV_ROUND_CLOSEST(lirc_rx51->duty_cycle * period, 100);
83
74
84
-
lirc_rx51->match = 0;
75
+
pwm_config(pwm, duty, period);
85
76
86
77
return 0;
87
78
}
88
79
89
-
#define tics_after(a, b) ((long)(b) - (long)(a) < 0)
90
-
91
-
static int pulse_timer_set_timeout(struct lirc_rx51 *lirc_rx51, int usec)
80
+
static enum hrtimer_restart lirc_rx51_timer_cb(struct hrtimer *timer)
92
81
{
93
-
int counter;
82
+
struct lirc_rx51 *lirc_rx51 =
83
+
container_of(timer, struct lirc_rx51, timer);
84
+
ktime_t now;
94
85
95
-
BUG_ON(usec < 0);
96
-
97
-
if (lirc_rx51->match == 0)
98
-
counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer);
99
-
else
100
-
counter = lirc_rx51->match;
101
-
102
-
counter += (u32)(lirc_rx51->fclk_khz * usec / (1000));
103
-
omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter);
104
-
omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer,
105
-
OMAP_TIMER_INT_MATCH);
106
-
if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer),
107
-
counter)) {
108
-
return 1;
109
-
}
110
-
return 0;
111
-
}
112
-
113
-
static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
114
-
{
115
-
unsigned int retval;
116
-
struct lirc_rx51 *lirc_rx51 = ptr;
117
-
118
-
retval = omap_dm_timer_read_status(lirc_rx51->pulse_timer);
119
-
if (!retval)
120
-
return IRQ_NONE;
121
-
122
-
if (retval & ~OMAP_TIMER_INT_MATCH)
123
-
dev_err_ratelimited(lirc_rx51->dev,
124
-
": Unexpected interrupt source: %x\n", retval);
125
-
126
-
omap_dm_timer_write_status(lirc_rx51->pulse_timer,
127
-
OMAP_TIMER_INT_MATCH |
128
-
OMAP_TIMER_INT_OVERFLOW |
129
-
OMAP_TIMER_INT_CAPTURE);
130
86
if (lirc_rx51->wbuf_index < 0) {
131
87
dev_err_ratelimited(lirc_rx51->dev,
132
-
": BUG wbuf_index has value of %i\n",
88
+
"BUG wbuf_index has value of %i\n",
133
89
lirc_rx51->wbuf_index);
134
90
goto end;
135
91
}
···
90
144
* pulses until we catch up.
91
145
*/
92
146
do {
147
+
u64 ns;
148
+
93
149
if (lirc_rx51->wbuf_index >= WBUF_LEN)
94
150
goto end;
95
151
if (lirc_rx51->wbuf[lirc_rx51->wbuf_index] == -1)
···
102
154
else
103
155
lirc_rx51_on(lirc_rx51);
104
156
105
-
retval = pulse_timer_set_timeout(lirc_rx51,
106
-
lirc_rx51->wbuf[lirc_rx51->wbuf_index]);
157
+
ns = 1000 * lirc_rx51->wbuf[lirc_rx51->wbuf_index];
158
+
hrtimer_add_expires_ns(timer, ns);
159
+
107
160
lirc_rx51->wbuf_index++;
108
161
109
-
} while (retval);
162
+
now = timer->base->get_time();
110
163
111
-
return IRQ_HANDLED;
164
+
} while (hrtimer_get_expires_tv64(timer) < now.tv64);
165
+
166
+
return HRTIMER_RESTART;
112
167
end:
113
168
/* Stop TX here */
114
169
lirc_rx51_off(lirc_rx51);
115
170
lirc_rx51->wbuf_index = -1;
116
-
omap_dm_timer_stop(lirc_rx51->pwm_timer);
117
-
omap_dm_timer_stop(lirc_rx51->pulse_timer);
118
-
omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
171
+
119
172
wake_up_interruptible(&lirc_rx51->wqueue);
120
173
121
-
return IRQ_HANDLED;
122
-
}
123
-
124
-
static int lirc_rx51_init_port(struct lirc_rx51 *lirc_rx51)
125
-
{
126
-
struct clk *clk_fclk;
127
-
int retval, pwm_timer = lirc_rx51->pwm_timer_num;
128
-
129
-
lirc_rx51->pwm_timer = omap_dm_timer_request_specific(pwm_timer);
130
-
if (lirc_rx51->pwm_timer == NULL) {
131
-
dev_err(lirc_rx51->dev, ": Error requesting GPT%d timer\n",
132
-
pwm_timer);
133
-
return -EBUSY;
134
-
}
135
-
136
-
lirc_rx51->pulse_timer = omap_dm_timer_request();
137
-
if (lirc_rx51->pulse_timer == NULL) {
138
-
dev_err(lirc_rx51->dev, ": Error requesting pulse timer\n");
139
-
retval = -EBUSY;
140
-
goto err1;
141
-
}
142
-
143
-
omap_dm_timer_set_source(lirc_rx51->pwm_timer, OMAP_TIMER_SRC_SYS_CLK);
144
-
omap_dm_timer_set_source(lirc_rx51->pulse_timer,
145
-
OMAP_TIMER_SRC_SYS_CLK);
146
-
147
-
omap_dm_timer_enable(lirc_rx51->pwm_timer);
148
-
omap_dm_timer_enable(lirc_rx51->pulse_timer);
149
-
150
-
lirc_rx51->irq_num = omap_dm_timer_get_irq(lirc_rx51->pulse_timer);
151
-
retval = request_irq(lirc_rx51->irq_num, lirc_rx51_interrupt_handler,
152
-
IRQF_SHARED, "lirc_pulse_timer", lirc_rx51);
153
-
if (retval) {
154
-
dev_err(lirc_rx51->dev, ": Failed to request interrupt line\n");
155
-
goto err2;
156
-
}
157
-
158
-
clk_fclk = omap_dm_timer_get_fclk(lirc_rx51->pwm_timer);
159
-
lirc_rx51->fclk_khz = clk_fclk->rate / 1000;
160
-
161
-
return 0;
162
-
163
-
err2:
164
-
omap_dm_timer_free(lirc_rx51->pulse_timer);
165
-
err1:
166
-
omap_dm_timer_free(lirc_rx51->pwm_timer);
167
-
168
-
return retval;
169
-
}
170
-
171
-
static int lirc_rx51_free_port(struct lirc_rx51 *lirc_rx51)
172
-
{
173
-
omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
174
-
free_irq(lirc_rx51->irq_num, lirc_rx51);
175
-
lirc_rx51_off(lirc_rx51);
176
-
omap_dm_timer_disable(lirc_rx51->pwm_timer);
177
-
omap_dm_timer_disable(lirc_rx51->pulse_timer);
178
-
omap_dm_timer_free(lirc_rx51->pwm_timer);
179
-
omap_dm_timer_free(lirc_rx51->pulse_timer);
180
-
lirc_rx51->wbuf_index = -1;
181
-
182
-
return 0;
174
+
return HRTIMER_NORESTART;
183
175
}
184
176
185
177
static ssize_t lirc_rx51_write(struct file *file, const char *buf,
···
158
270
159
271
lirc_rx51_on(lirc_rx51);
160
272
lirc_rx51->wbuf_index = 1;
161
-
pulse_timer_set_timeout(lirc_rx51, lirc_rx51->wbuf[0]);
162
-
273
+
hrtimer_start(&lirc_rx51->timer,
274
+
ns_to_ktime(1000 * lirc_rx51->wbuf[0]),
275
+
HRTIMER_MODE_REL);
163
276
/*
164
277
* Don't return back to the userspace until the transfer has
165
278
* finished
···
260
371
if (test_and_set_bit(1, &lirc_rx51->device_is_open))
261
372
return -EBUSY;
262
373
263
-
return lirc_rx51_init_port(lirc_rx51);
374
+
lirc_rx51->pwm = pwm_get(lirc_rx51->dev, NULL);
375
+
if (IS_ERR(lirc_rx51->pwm)) {
376
+
int res = PTR_ERR(lirc_rx51->pwm);
377
+
378
+
dev_err(lirc_rx51->dev, "pwm_get failed: %d\n", res);
379
+
return res;
380
+
}
381
+
382
+
return 0;
264
383
}
265
384
266
385
static int lirc_rx51_release(struct inode *inode, struct file *file)
267
386
{
268
387
struct lirc_rx51 *lirc_rx51 = file->private_data;
269
388
270
-
lirc_rx51_free_port(lirc_rx51);
389
+
hrtimer_cancel(&lirc_rx51->timer);
390
+
lirc_rx51_off(lirc_rx51);
391
+
pwm_put(lirc_rx51->pwm);
271
392
272
393
clear_bit(1, &lirc_rx51->device_is_open);
273
394
···
285
386
}
286
387
287
388
static struct lirc_rx51 lirc_rx51 = {
288
-
.freq = 38000,
289
389
.duty_cycle = 50,
290
390
.wbuf_index = -1,
291
391
};
···
342
444
343
445
static int lirc_rx51_probe(struct platform_device *dev)
344
446
{
447
+
struct pwm_device *pwm;
448
+
345
449
lirc_rx51_driver.features = LIRC_RX51_DRIVER_FEATURES;
346
450
lirc_rx51.pdata = dev->dev.platform_data;
347
-
lirc_rx51.pwm_timer_num = lirc_rx51.pdata->pwm_timer;
451
+
452
+
if (!lirc_rx51.pdata) {
453
+
dev_err(&dev->dev, "Platform Data is missing\n");
454
+
return -ENXIO;
455
+
}
456
+
457
+
pwm = pwm_get(&dev->dev, NULL);
458
+
if (IS_ERR(pwm)) {
459
+
int err = PTR_ERR(pwm);
460
+
461
+
if (err != -EPROBE_DEFER)
462
+
dev_err(&dev->dev, "pwm_get failed: %d\n", err);
463
+
return err;
464
+
}
465
+
466
+
/* Use default, in case userspace does not set the carrier */
467
+
lirc_rx51.freq = DIV_ROUND_CLOSEST(pwm_get_period(pwm), NSEC_PER_SEC);
468
+
pwm_put(pwm);
469
+
470
+
hrtimer_init(&lirc_rx51.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
471
+
lirc_rx51.timer.function = lirc_rx51_timer_cb;
472
+
348
473
lirc_rx51.dev = &dev->dev;
349
474
lirc_rx51_driver.dev = &dev->dev;
350
475
lirc_rx51_driver.minor = lirc_register_driver(&lirc_rx51_driver);
···
378
457
lirc_rx51_driver.minor);
379
458
return lirc_rx51_driver.minor;
380
459
}
381
-
dev_info(lirc_rx51.dev, "registration ok, minor: %d, pwm: %d\n",
382
-
lirc_rx51_driver.minor, lirc_rx51.pwm_timer_num);
383
460
384
461
return 0;
385
462
}
···
387
468
return lirc_unregister_driver(lirc_rx51_driver.minor);
388
469
}
389
470
471
+
static const struct of_device_id lirc_rx51_match[] = {
472
+
{
473
+
.compatible = "nokia,n900-ir",
474
+
},
475
+
{},
476
+
};
477
+
MODULE_DEVICE_TABLE(of, lirc_rx51_match);
478
+
390
479
struct platform_driver lirc_rx51_platform_driver = {
391
480
.probe = lirc_rx51_probe,
392
481
.remove = lirc_rx51_remove,
···
402
475
.resume = lirc_rx51_resume,
403
476
.driver = {
404
477
.name = DRIVER_NAME,
405
-
.owner = THIS_MODULE,
478
+
.of_match_table = of_match_ptr(lirc_rx51_match),
406
479
},
407
480
};
408
481
module_platform_driver(lirc_rx51_platform_driver);
+7
-5
drivers/pwm/pwm-omap-dmtimer.c
+7
-5
drivers/pwm/pwm-omap-dmtimer.c
···
245
245
struct pwm_omap_dmtimer_chip *omap;
246
246
struct pwm_omap_dmtimer_pdata *pdata;
247
247
pwm_omap_dmtimer *dm_timer;
248
-
u32 prescaler;
248
+
u32 v;
249
249
int status;
250
250
251
251
pdata = dev_get_platdata(&pdev->dev);
···
306
306
if (pm_runtime_active(&omap->dm_timer_pdev->dev))
307
307
omap->pdata->stop(omap->dm_timer);
308
308
309
-
/* setup dmtimer prescaler */
310
-
if (!of_property_read_u32(pdev->dev.of_node, "ti,prescaler",
311
-
&prescaler))
312
-
omap->pdata->set_prescaler(omap->dm_timer, prescaler);
309
+
if (!of_property_read_u32(pdev->dev.of_node, "ti,prescaler", &v))
310
+
omap->pdata->set_prescaler(omap->dm_timer, v);
311
+
312
+
/* setup dmtimer clock source */
313
+
if (!of_property_read_u32(pdev->dev.of_node, "ti,clock-source", &v))
314
+
omap->pdata->set_source(omap->dm_timer, v);
313
315
314
316
omap->chip.dev = &pdev->dev;
315
317
omap->chip.ops = &pwm_omap_dmtimer_ops;