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usb: phy: mxs: keep USBPHY2's clk always on

IP require keep USBPHY2's clk always on, so USBPHY2 (PLL7) power can be
controlled by suspend signal. USB remote wakeup needs resume signal be
sent out as soon as possible to match USB requirements.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Peter Chen <peter.chen@kernel.org>
Link: https://lore.kernel.org/r/20240726113207.3393247-2-xu.yang_2@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Xu Yang and committed by
Greg Kroah-Hartman 82c7a816 966d7315

+26 -7
+26 -7
drivers/usb/phy/phy-mxs-usb.c
··· 150 150 #define MXS_PHY_TX_D_CAL_MIN 79 151 151 #define MXS_PHY_TX_D_CAL_MAX 119 152 152 153 + /* 154 + * At imx6q/6sl/6sx, the PHY2's clock is controlled by hardware directly, 155 + * eg, according to PHY's suspend status. In these PHYs, we only need to 156 + * open the clock at the initialization and close it at its shutdown routine. 157 + * These PHYs can send resume signal without software interfere if not 158 + * gate clock. 159 + */ 160 + #define MXS_PHY_HARDWARE_CONTROL_PHY2_CLK BIT(4) 161 + 153 162 struct mxs_phy_data { 154 163 unsigned int flags; 155 164 }; ··· 170 161 static const struct mxs_phy_data imx6q_phy_data = { 171 162 .flags = MXS_PHY_SENDING_SOF_TOO_FAST | 172 163 MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS | 173 - MXS_PHY_NEED_IP_FIX, 164 + MXS_PHY_NEED_IP_FIX | 165 + MXS_PHY_HARDWARE_CONTROL_PHY2_CLK, 174 166 }; 175 167 176 168 static const struct mxs_phy_data imx6sl_phy_data = { 177 169 .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS | 178 - MXS_PHY_NEED_IP_FIX, 170 + MXS_PHY_NEED_IP_FIX | 171 + MXS_PHY_HARDWARE_CONTROL_PHY2_CLK, 179 172 }; 180 173 181 174 static const struct mxs_phy_data vf610_phy_data = { ··· 186 175 }; 187 176 188 177 static const struct mxs_phy_data imx6sx_phy_data = { 189 - .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS, 178 + .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS | 179 + MXS_PHY_HARDWARE_CONTROL_PHY2_CLK, 190 180 }; 191 181 192 182 static const struct mxs_phy_data imx6ul_phy_data = { ··· 530 518 } 531 519 writel(BM_USBPHY_CTRL_CLKGATE, 532 520 x->io_priv + HW_USBPHY_CTRL_SET); 533 - clk_disable_unprepare(mxs_phy->clk); 521 + if (!(mxs_phy->port_id == 1 && 522 + (mxs_phy->data->flags & 523 + MXS_PHY_HARDWARE_CONTROL_PHY2_CLK))) 524 + clk_disable_unprepare(mxs_phy->clk); 534 525 } else { 535 526 mxs_phy_clock_switch_delay(); 536 - ret = clk_prepare_enable(mxs_phy->clk); 537 - if (ret) 538 - return ret; 527 + if (!(mxs_phy->port_id == 1 && 528 + (mxs_phy->data->flags & 529 + MXS_PHY_HARDWARE_CONTROL_PHY2_CLK))) { 530 + ret = clk_prepare_enable(mxs_phy->clk); 531 + if (ret) 532 + return ret; 533 + } 539 534 writel(BM_USBPHY_CTRL_CLKGATE, 540 535 x->io_priv + HW_USBPHY_CTRL_CLR); 541 536 writel(0, x->io_priv + HW_USBPHY_PWD);