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drm/amd/display: Fix compiler warnings

[Why] Implicit conversions from wider integer types to byte-sized fields
were generating compiler warnings. These warnings hide intentional protocol
/storage boundaries and reduce signal quality during builds. Making
conversion intent explicit improves readability and warning hygiene
without changing behavior.

[How] Added explicit, type-safe casts at intentional narrow-storage
boundaries. Kept data models & runtime logic unchanged, only clarifying
conversion intent.

Functionality and behavior is unchanged; only type intent is explicit.
Aligned warning cleanup with existing coding standards for explicit
boundary conversions.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Gaghik Khachatrian and committed by
Alex Deucher
82f510ae 17edfa32

+8 -6
+5 -3
drivers/gpu/drm/amd/display/dc/dc.h
··· 1061 1061 bool hdmi20_disable; 1062 1062 bool skip_detection_link_training; 1063 1063 uint32_t edid_read_retry_times; 1064 - unsigned int force_odm_combine; //bit vector based on otg inst 1065 - unsigned int seamless_boot_odm_combine; 1066 - unsigned int force_odm_combine_4to1; //bit vector based on otg inst 1064 + 1065 + uint8_t force_odm_combine; //bit vector based on otg inst 1066 + uint8_t seamless_boot_odm_combine; 1067 + uint8_t force_odm_combine_4to1; //bit vector based on otg inst 1068 + 1067 1069 int minimum_z8_residency_time; 1068 1070 int minimum_z10_residency_time; 1069 1071 bool disable_z9_mpc;
+2 -2
drivers/gpu/drm/amd/display/dc/dc_stream.h
··· 162 162 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR) 163 163 164 164 struct dc_stream_debug_options { 165 - char force_odm_combine_segments; 165 + uint8_t force_odm_combine_segments; 166 166 /* 167 167 * When force_odm_combine_segments is non zero, allow dc to 168 168 * temporarily transition to ODM bypass when minimal transition state 169 169 * is required to prevent visual glitches showing on the screen 170 170 */ 171 - char allow_transition_for_forced_odm; 171 + uint8_t allow_transition_for_forced_odm; 172 172 }; 173 173 174 174 #define LUMINANCE_DATA_TABLE_SIZE 10
+1 -1
drivers/gpu/drm/amd/display/dc/dc_types.h
··· 205 205 uint32_t audio_latency; 206 206 uint32_t video_latency; 207 207 208 - unsigned int freesync_vcp_code; 208 + unsigned char freesync_vcp_code; 209 209 210 210 uint8_t qs_bit; 211 211 uint8_t qy_bit;