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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Kevin Hilman:
"A collection of ARM SoC fixes for v3.14-rc1.

Mostly a collection of Kconfig, device tree data and compilation fixes
along with fix to drivers/phy that fixes a boot regression on some
Marvell mvebu platforms"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
dma: mv_xor: Silence a bunch of LPAE-related warnings
ARM: ux500: disable msp2 device tree node
ARM: zynq: Reserve not DMAable space in front of the kernel
ARM: multi_v7_defconfig: Select CONFIG_SOC_DRA7XX
ARM: imx6: Initialize low-power mode early again
ARM: pxa: fix various compilation problems
ARM: pxa: fix compilation problem on AM300EPD board
ARM: at91: add Atmel's SAMA5D3 Xplained board
spi/atmel: document clock properties
mmc: atmel-mci: document clock properties
ARM: at91: enable USB host on at91sam9n12ek board
ARM: at91/dt: fix sama5d3 ohci hclk clock reference
ARM: at91/dt: sam9263: fix compatibility string for the I2C
ata: sata_mv: Fix probe failures with optional phys
drivers: phy: Add support for optional phys
drivers: phy: Make NULL a valid phy reference
ARM: fix HAVE_ARM_TWD selection for OMAP and shmobile
ARM: moxart: move DMA_OF selection to driver
ARM: hisi: fix kconfig warning on HAVE_ARM_TWD

+407 -32
+5
Documentation/devicetree/bindings/mmc/atmel-hsmci.txt
··· 13 13 - #address-cells: should be one. The cell is the slot id. 14 14 - #size-cells: should be zero. 15 15 - at least one slot node 16 + - clock-names: tuple listing input clock names. 17 + Required elements: "mci_clk" 18 + - clocks: phandles to input clocks. 16 19 17 20 The node contains child nodes for each slot that the platform uses 18 21 ··· 27 24 interrupts = <12 4>; 28 25 #address-cells = <1>; 29 26 #size-cells = <0>; 27 + clock-names = "mci_clk"; 28 + clocks = <&mci0_clk>; 30 29 31 30 [ child node definitions...] 32 31 };
+5
Documentation/devicetree/bindings/spi/spi_atmel.txt
··· 5 5 - reg: Address and length of the register set for the device 6 6 - interrupts: Should contain spi interrupt 7 7 - cs-gpios: chipselects 8 + - clock-names: tuple listing input clock names. 9 + Required elements: "spi_clk" 10 + - clocks: phandles to input clocks. 8 11 9 12 Example: 10 13 ··· 17 14 interrupts = <13 4 5>; 18 15 #address-cells = <1>; 19 16 #size-cells = <0>; 17 + clocks = <&spi1_clk>; 18 + clock-names = "spi_clk"; 20 19 cs-gpios = <&pioB 3 0>; 21 20 status = "okay"; 22 21
+18 -6
Documentation/phy.txt
··· 75 75 it. This framework provides the following APIs to get a reference to the PHY. 76 76 77 77 struct phy *phy_get(struct device *dev, const char *string); 78 + struct phy *phy_optional_get(struct device *dev, const char *string); 78 79 struct phy *devm_phy_get(struct device *dev, const char *string); 80 + struct phy *devm_phy_optional_get(struct device *dev, const char *string); 79 81 80 - phy_get and devm_phy_get can be used to get the PHY. In the case of dt boot, 81 - the string arguments should contain the phy name as given in the dt data and 82 - in the case of non-dt boot, it should contain the label of the PHY. 83 - The only difference between the two APIs is that devm_phy_get associates the 84 - device with the PHY using devres on successful PHY get. On driver detach, 85 - release function is invoked on the the devres data and devres data is freed. 82 + phy_get, phy_optional_get, devm_phy_get and devm_phy_optional_get can 83 + be used to get the PHY. In the case of dt boot, the string arguments 84 + should contain the phy name as given in the dt data and in the case of 85 + non-dt boot, it should contain the label of the PHY. The two 86 + devm_phy_get associates the device with the PHY using devres on 87 + successful PHY get. On driver detach, release function is invoked on 88 + the the devres data and devres data is freed. phy_optional_get and 89 + devm_phy_optional_get should be used when the phy is optional. These 90 + two functions will never return -ENODEV, but instead returns NULL when 91 + the phy cannot be found. 92 + 93 + It should be noted that NULL is a valid phy reference. All phy 94 + consumer calls on the NULL phy become NOPs. That is the release calls, 95 + the phy_init() and phy_exit() calls, and phy_power_on() and 96 + phy_power_off() calls are all NOP when applied to a NULL phy. The NULL 97 + phy is useful in devices for handling optional phy devices. 86 98 87 99 5. Releasing a reference to the PHY 88 100
+1
arch/arm/boot/dts/Makefile
··· 38 38 dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb 39 39 dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb 40 40 # sama5d3 41 + dtb-$(CONFIG_ARCH_AT91) += at91-sama5d3_xplained.dtb 41 42 dtb-$(CONFIG_ARCH_AT91) += sama5d31ek.dtb 42 43 dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb 43 44 dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
+229
arch/arm/boot/dts/at91-sama5d3_xplained.dts
··· 1 + /* 2 + * at91-sama5d3_xplained.dts - Device Tree file for the SAMA5D3 Xplained board 3 + * 4 + * Copyright (C) 2014 Atmel, 5 + * 2014 Nicolas Ferre <nicolas.ferre@atmel.com> 6 + * 7 + * Licensed under GPLv2 or later. 8 + */ 9 + /dts-v1/; 10 + #include "sama5d36.dtsi" 11 + 12 + / { 13 + model = "SAMA5D3 Xplained"; 14 + compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5"; 15 + 16 + chosen { 17 + bootargs = "console=ttyS0,115200"; 18 + }; 19 + 20 + memory { 21 + reg = <0x20000000 0x10000000>; 22 + }; 23 + 24 + ahb { 25 + apb { 26 + mmc0: mmc@f0000000 { 27 + pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>; 28 + status = "okay"; 29 + slot@0 { 30 + reg = <0>; 31 + bus-width = <8>; 32 + cd-gpios = <&pioE 0 GPIO_ACTIVE_LOW>; 33 + }; 34 + }; 35 + 36 + spi0: spi@f0004000 { 37 + cs-gpios = <&pioD 13 0>; 38 + status = "okay"; 39 + }; 40 + 41 + can0: can@f000c000 { 42 + status = "okay"; 43 + }; 44 + 45 + i2c0: i2c@f0014000 { 46 + status = "okay"; 47 + }; 48 + 49 + i2c1: i2c@f0018000 { 50 + status = "okay"; 51 + }; 52 + 53 + macb0: ethernet@f0028000 { 54 + phy-mode = "rgmii"; 55 + status = "okay"; 56 + }; 57 + 58 + usart0: serial@f001c000 { 59 + status = "okay"; 60 + }; 61 + 62 + usart1: serial@f0020000 { 63 + pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>; 64 + status = "okay"; 65 + }; 66 + 67 + uart0: serial@f0024000 { 68 + status = "okay"; 69 + }; 70 + 71 + mmc1: mmc@f8000000 { 72 + pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; 73 + status = "okay"; 74 + slot@0 { 75 + reg = <0>; 76 + bus-width = <4>; 77 + cd-gpios = <&pioE 1 GPIO_ACTIVE_HIGH>; 78 + }; 79 + }; 80 + 81 + spi1: spi@f8008000 { 82 + cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioD 16 0>; 83 + status = "okay"; 84 + }; 85 + 86 + adc0: adc@f8018000 { 87 + pinctrl-0 = < 88 + &pinctrl_adc0_adtrg 89 + &pinctrl_adc0_ad0 90 + &pinctrl_adc0_ad1 91 + &pinctrl_adc0_ad2 92 + &pinctrl_adc0_ad3 93 + &pinctrl_adc0_ad4 94 + &pinctrl_adc0_ad5 95 + &pinctrl_adc0_ad6 96 + &pinctrl_adc0_ad7 97 + &pinctrl_adc0_ad8 98 + &pinctrl_adc0_ad9 99 + >; 100 + status = "okay"; 101 + }; 102 + 103 + i2c2: i2c@f801c000 { 104 + dmas = <0>, <0>; /* Do not use DMA for i2c2 */ 105 + status = "okay"; 106 + }; 107 + 108 + macb1: ethernet@f802c000 { 109 + phy-mode = "rmii"; 110 + status = "okay"; 111 + }; 112 + 113 + dbgu: serial@ffffee00 { 114 + status = "okay"; 115 + }; 116 + 117 + pinctrl@fffff200 { 118 + board { 119 + pinctrl_mmc0_cd: mmc0_cd { 120 + atmel,pins = 121 + <AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 122 + }; 123 + 124 + pinctrl_mmc1_cd: mmc1_cd { 125 + atmel,pins = 126 + <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 127 + }; 128 + 129 + pinctrl_usba_vbus: usba_vbus { 130 + atmel,pins = 131 + <AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */ 132 + }; 133 + }; 134 + }; 135 + 136 + pmc: pmc@fffffc00 { 137 + main: mainck { 138 + clock-frequency = <12000000>; 139 + }; 140 + }; 141 + }; 142 + 143 + nand0: nand@60000000 { 144 + nand-bus-width = <8>; 145 + nand-ecc-mode = "hw"; 146 + atmel,has-pmecc; 147 + atmel,pmecc-cap = <4>; 148 + atmel,pmecc-sector-size = <512>; 149 + nand-on-flash-bbt; 150 + status = "okay"; 151 + 152 + at91bootstrap@0 { 153 + label = "at91bootstrap"; 154 + reg = <0x0 0x40000>; 155 + }; 156 + 157 + bootloader@40000 { 158 + label = "bootloader"; 159 + reg = <0x40000 0x80000>; 160 + }; 161 + 162 + bootloaderenv@c0000 { 163 + label = "bootloader env"; 164 + reg = <0xc0000 0xc0000>; 165 + }; 166 + 167 + dtb@180000 { 168 + label = "device tree"; 169 + reg = <0x180000 0x80000>; 170 + }; 171 + 172 + kernel@200000 { 173 + label = "kernel"; 174 + reg = <0x200000 0x600000>; 175 + }; 176 + 177 + rootfs@800000 { 178 + label = "rootfs"; 179 + reg = <0x800000 0x0f800000>; 180 + }; 181 + }; 182 + 183 + usb0: gadget@00500000 { 184 + atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>; /* PE9, conflicts with A9 */ 185 + pinctrl-names = "default"; 186 + pinctrl-0 = <&pinctrl_usba_vbus>; 187 + status = "okay"; 188 + }; 189 + 190 + usb1: ohci@00600000 { 191 + num-ports = <3>; 192 + atmel,vbus-gpio = <0 193 + &pioE 3 GPIO_ACTIVE_LOW 194 + &pioE 4 GPIO_ACTIVE_LOW 195 + >; 196 + status = "okay"; 197 + }; 198 + 199 + usb2: ehci@00700000 { 200 + status = "okay"; 201 + }; 202 + }; 203 + 204 + gpio_keys { 205 + compatible = "gpio-keys"; 206 + 207 + bp3 { 208 + label = "PB_USER"; 209 + gpios = <&pioE 29 GPIO_ACTIVE_LOW>; 210 + linux,code = <0x104>; 211 + gpio-key,wakeup; 212 + }; 213 + }; 214 + 215 + leds { 216 + compatible = "gpio-leds"; 217 + 218 + d2 { 219 + label = "d2"; 220 + gpios = <&pioE 23 GPIO_ACTIVE_LOW>; /* PE23, conflicts with A23, CTS2 */ 221 + linux,default-trigger = "heartbeat"; 222 + }; 223 + 224 + d3 { 225 + label = "d3"; 226 + gpios = <&pioE 24 GPIO_ACTIVE_HIGH>; 227 + }; 228 + }; 229 + };
+1 -1
arch/arm/boot/dts/at91sam9263.dtsi
··· 523 523 }; 524 524 525 525 i2c0: i2c@fff88000 { 526 - compatible = "atmel,at91sam9263-i2c"; 526 + compatible = "atmel,at91sam9260-i2c"; 527 527 reg = <0xfff88000 0x100>; 528 528 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 529 529 #address-cells = <1>;
+4
arch/arm/boot/dts/at91sam9n12ek.dts
··· 124 124 nand-on-flash-bbt; 125 125 status = "okay"; 126 126 }; 127 + 128 + usb0: ohci@00500000 { 129 + status = "okay"; 130 + }; 127 131 }; 128 132 129 133 leds {
+1 -1
arch/arm/boot/dts/sama5d3.dtsi
··· 1228 1228 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1229 1229 reg = <0x00600000 0x100000>; 1230 1230 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1231 - clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>, 1231 + clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, 1232 1232 <&uhpck>; 1233 1233 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; 1234 1234 status = "disabled";
-1
arch/arm/boot/dts/ste-href.dtsi
··· 188 188 msp2: msp@80117000 { 189 189 pinctrl-names = "default"; 190 190 pinctrl-0 = <&msp2_default_mode>; 191 - status = "okay"; 192 191 }; 193 192 194 193 msp3: msp@80125000 {
+1
arch/arm/configs/multi_v7_defconfig
··· 29 29 CONFIG_ARCH_OMAP4=y 30 30 CONFIG_SOC_OMAP5=y 31 31 CONFIG_SOC_AM33XX=y 32 + CONFIG_SOC_DRA7XX=y 32 33 CONFIG_SOC_AM43XX=y 33 34 CONFIG_ARCH_ROCKCHIP=y 34 35 CONFIG_ARCH_SOCFPGA=y
+1 -1
arch/arm/mach-hisi/Kconfig
··· 8 8 select CLKSRC_OF 9 9 select GENERIC_CLOCKEVENTS 10 10 select HAVE_ARM_SCU 11 - select HAVE_ARM_TWD 11 + select HAVE_ARM_TWD if SMP 12 12 select HAVE_SMP 13 13 select PINCTRL 14 14 select PINCTRL_SINGLE
+3
arch/arm/mach-imx/clk-imx6q.c
··· 482 482 if (IS_ENABLED(CONFIG_PCI_IMX6)) 483 483 clk_set_parent(clk[lvds1_sel], clk[sata_ref]); 484 484 485 + /* Set initial power mode */ 486 + imx6q_set_lpm(WAIT_CLOCKED); 487 + 485 488 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); 486 489 base = of_iomap(np, 0); 487 490 WARN_ON(!base);
+3
arch/arm/mach-imx/clk-imx6sl.c
··· 266 266 /* Audio-related clocks configuration */ 267 267 clk_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL], clks[IMX6SL_CLK_PLL3_PFD3]); 268 268 269 + /* Set initial power mode */ 270 + imx6q_set_lpm(WAIT_CLOCKED); 271 + 269 272 np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-gpt"); 270 273 base = of_iomap(np, 0); 271 274 WARN_ON(!base);
-2
arch/arm/mach-imx/pm-imx6q.c
··· 236 236 regmap_update_bits(gpr, IOMUXC_GPR1, IMX6Q_GPR1_GINT, 237 237 IMX6Q_GPR1_GINT); 238 238 239 - /* Set initial power mode */ 240 - imx6q_set_lpm(WAIT_CLOCKED); 241 239 242 240 suspend_set_ops(&imx6q_pm_ops); 243 241 }
-1
arch/arm/mach-moxart/Kconfig
··· 2 2 bool "MOXA ART SoC" if ARCH_MULTI_V4T 3 3 select CPU_FA526 4 4 select ARM_DMA_MEM_BUFFERABLE 5 - select DMA_OF 6 5 select USE_OF 7 6 select CLKSRC_OF 8 7 select CLKSRC_MMIO
+1 -1
arch/arm/mach-omap2/Kconfig
··· 54 54 select ARM_GIC 55 55 select CPU_V7 56 56 select HAVE_ARM_SCU if SMP 57 - select HAVE_ARM_TWD if LOCAL_TIMERS 57 + select HAVE_ARM_TWD if SMP 58 58 select HAVE_SMP 59 59 select HAVE_ARM_ARCH_TIMER 60 60 select ARM_ERRATA_798181 if SMP
+1
arch/arm/mach-pxa/am300epd.c
··· 30 30 31 31 #include <mach/gumstix.h> 32 32 #include <mach/mfp-pxa25x.h> 33 + #include <mach/irqs.h> 33 34 #include <linux/platform_data/video-pxafb.h> 34 35 35 36 #include "generic.h"
+2
arch/arm/mach-pxa/include/mach/balloon3.h
··· 14 14 #ifndef ASM_ARCH_BALLOON3_H 15 15 #define ASM_ARCH_BALLOON3_H 16 16 17 + #include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ 18 + 17 19 enum balloon3_features { 18 20 BALLOON3_FEATURE_OHCI, 19 21 BALLOON3_FEATURE_MMC,
+1
arch/arm/mach-pxa/include/mach/corgi.h
··· 13 13 #ifndef __ASM_ARCH_CORGI_H 14 14 #define __ASM_ARCH_CORGI_H 1 15 15 16 + #include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ 16 17 17 18 /* 18 19 * Corgi (Non Standard) GPIO Definitions
+2
arch/arm/mach-pxa/include/mach/csb726.h
··· 11 11 #ifndef CSB726_H 12 12 #define CSB726_H 13 13 14 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 15 + 14 16 #define CSB726_GPIO_IRQ_LAN 52 15 17 #define CSB726_GPIO_IRQ_SM501 53 16 18 #define CSB726_GPIO_MMC_DETECT 100
+1
arch/arm/mach-pxa/include/mach/gumstix.h
··· 6 6 * published by the Free Software Foundation. 7 7 */ 8 8 9 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 9 10 10 11 /* BTRESET - Reset line to Bluetooth module, active low signal. */ 11 12 #define GPIO_GUMSTIX_BTRESET 7
+1
arch/arm/mach-pxa/include/mach/idp.h
··· 23 23 * IDP hardware. 24 24 */ 25 25 26 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 26 27 27 28 #define IDP_FLASH_PHYS (PXA_CS0_PHYS) 28 29 #define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS)
+2
arch/arm/mach-pxa/include/mach/palmld.h
··· 13 13 #ifndef _INCLUDE_PALMLD_H_ 14 14 #define _INCLUDE_PALMLD_H_ 15 15 16 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 17 + 16 18 /** HERE ARE GPIOs **/ 17 19 18 20 /* GPIOs */
+2
arch/arm/mach-pxa/include/mach/palmt5.h
··· 15 15 #ifndef _INCLUDE_PALMT5_H_ 16 16 #define _INCLUDE_PALMT5_H_ 17 17 18 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 19 + 18 20 /** HERE ARE GPIOs **/ 19 21 20 22 /* GPIOs */
+2
arch/arm/mach-pxa/include/mach/palmtc.h
··· 16 16 #ifndef _INCLUDE_PALMTC_H_ 17 17 #define _INCLUDE_PALMTC_H_ 18 18 19 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 20 + 19 21 /** HERE ARE GPIOs **/ 20 22 21 23 /* GPIOs */
+2
arch/arm/mach-pxa/include/mach/palmtx.h
··· 16 16 #ifndef _INCLUDE_PALMTX_H_ 17 17 #define _INCLUDE_PALMTX_H_ 18 18 19 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 20 + 19 21 /** HERE ARE GPIOs **/ 20 22 21 23 /* GPIOs */
+2
arch/arm/mach-pxa/include/mach/pcm027.h
··· 23 23 * Definitions of CPU card resources only 24 24 */ 25 25 26 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 27 + 26 28 /* phyCORE-PXA270 (PCM027) Interrupts */ 27 29 #define PCM027_IRQ(x) (IRQ_BOARD_START + (x)) 28 30 #define PCM027_BTDET_IRQ PCM027_IRQ(0)
+1
arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
··· 20 20 */ 21 21 22 22 #include <mach/pcm027.h> 23 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 23 24 24 25 /* 25 26 * definitions relevant only when the PCM-990
+2
arch/arm/mach-pxa/include/mach/poodle.h
··· 15 15 #ifndef __ASM_ARCH_POODLE_H 16 16 #define __ASM_ARCH_POODLE_H 1 17 17 18 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 19 + 18 20 /* 19 21 * GPIOs 20 22 */
+1 -1
arch/arm/mach-pxa/include/mach/spitz.h
··· 15 15 #define __ASM_ARCH_SPITZ_H 1 16 16 #endif 17 17 18 + #include "irqs.h" /* PXA_NR_BUILTIN_GPIO, PXA_GPIO_TO_IRQ */ 18 19 #include <linux/fb.h> 19 - #include <linux/gpio.h> 20 20 21 21 /* Spitz/Akita GPIOs */ 22 22
+2
arch/arm/mach-pxa/include/mach/tosa.h
··· 13 13 #ifndef _ASM_ARCH_TOSA_H_ 14 14 #define _ASM_ARCH_TOSA_H_ 1 15 15 16 + #include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ 17 + 16 18 /* TOSA Chip selects */ 17 19 #define TOSA_LCDC_PHYS PXA_CS4_PHYS 18 20 /* Internel Scoop */
+2
arch/arm/mach-pxa/include/mach/trizeps4.h
··· 10 10 #ifndef _TRIPEPS4_H_ 11 11 #define _TRIPEPS4_H_ 12 12 13 + #include "irqs.h" /* PXA_GPIO_TO_IRQ */ 14 + 13 15 /* physical memory regions */ 14 16 #define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ 15 17 #define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */
+1 -1
arch/arm/mach-shmobile/Kconfig
··· 8 8 select CPU_V7 9 9 select GENERIC_CLOCKEVENTS 10 10 select HAVE_ARM_SCU if SMP 11 - select HAVE_ARM_TWD if LOCAL_TIMERS 11 + select HAVE_ARM_TWD if SMP 12 12 select HAVE_SMP 13 13 select ARM_GIC 14 14 select MIGHT_HAVE_CACHE_L2X0
+14
arch/arm/mach-zynq/common.c
··· 25 25 #include <linux/of_irq.h> 26 26 #include <linux/of_platform.h> 27 27 #include <linux/of.h> 28 + #include <linux/memblock.h> 28 29 #include <linux/irqchip.h> 29 30 #include <linux/irqchip/arm-gic.h> 30 31 ··· 41 40 #include "common.h" 42 41 43 42 void __iomem *zynq_scu_base; 43 + 44 + /** 45 + * zynq_memory_init - Initialize special memory 46 + * 47 + * We need to stop things allocating the low memory as DMA can't work in 48 + * the 1st 512K of memory. 49 + */ 50 + static void __init zynq_memory_init(void) 51 + { 52 + if (!__pa(PAGE_OFFSET)) 53 + memblock_reserve(__pa(PAGE_OFFSET), __pa(swapper_pg_dir)); 54 + } 44 55 45 56 static struct platform_device zynq_cpuidle_device = { 46 57 .name = "cpuidle-zynq", ··· 130 117 .init_machine = zynq_init_machine, 131 118 .init_time = zynq_timer_init, 132 119 .dt_compat = zynq_dt_match, 120 + .reserve = zynq_memory_init, 133 121 .restart = zynq_system_reset, 134 122 MACHINE_END
+5 -3
drivers/ata/sata_mv.c
··· 4126 4126 clk_prepare_enable(hpriv->port_clks[port]); 4127 4127 4128 4128 sprintf(port_number, "port%d", port); 4129 - hpriv->port_phys[port] = devm_phy_get(&pdev->dev, port_number); 4129 + hpriv->port_phys[port] = devm_phy_optional_get(&pdev->dev, 4130 + port_number); 4130 4131 if (IS_ERR(hpriv->port_phys[port])) { 4131 4132 rc = PTR_ERR(hpriv->port_phys[port]); 4132 4133 hpriv->port_phys[port] = NULL; 4133 - if ((rc != -EPROBE_DEFER) && (rc != -ENODEV)) 4134 - dev_warn(&pdev->dev, "error getting phy"); 4134 + if (rc != -EPROBE_DEFER) 4135 + dev_warn(&pdev->dev, "error getting phy %d", 4136 + rc); 4135 4137 goto err; 4136 4138 } else 4137 4139 phy_power_on(hpriv->port_phys[port]);
+1
drivers/dma/Kconfig
··· 346 346 tristate "MOXART DMA support" 347 347 depends on ARCH_MOXART 348 348 select DMA_ENGINE 349 + select DMA_OF 349 350 select DMA_VIRTUAL_CHANNELS 350 351 help 351 352 Enable support for the MOXA ART SoC DMA controller.
+12 -12
drivers/dma/mv_xor.c
··· 497 497 if (!mv_can_chain(grp_start)) 498 498 goto submit_done; 499 499 500 - dev_dbg(mv_chan_to_devp(mv_chan), "Append to last desc %x\n", 501 - old_chain_tail->async_tx.phys); 500 + dev_dbg(mv_chan_to_devp(mv_chan), "Append to last desc %pa\n", 501 + &old_chain_tail->async_tx.phys); 502 502 503 503 /* fix up the hardware chain */ 504 504 mv_desc_set_next_desc(old_chain_tail, grp_start->async_tx.phys); ··· 527 527 /* returns the number of allocated descriptors */ 528 528 static int mv_xor_alloc_chan_resources(struct dma_chan *chan) 529 529 { 530 - char *hw_desc; 530 + void *virt_desc; 531 + dma_addr_t dma_desc; 531 532 int idx; 532 533 struct mv_xor_chan *mv_chan = to_mv_xor_chan(chan); 533 534 struct mv_xor_desc_slot *slot = NULL; ··· 543 542 " %d descriptor slots", idx); 544 543 break; 545 544 } 546 - hw_desc = (char *) mv_chan->dma_desc_pool_virt; 547 - slot->hw_desc = (void *) &hw_desc[idx * MV_XOR_SLOT_SIZE]; 545 + virt_desc = mv_chan->dma_desc_pool_virt; 546 + slot->hw_desc = virt_desc + idx * MV_XOR_SLOT_SIZE; 548 547 549 548 dma_async_tx_descriptor_init(&slot->async_tx, chan); 550 549 slot->async_tx.tx_submit = mv_xor_tx_submit; 551 550 INIT_LIST_HEAD(&slot->chain_node); 552 551 INIT_LIST_HEAD(&slot->slot_node); 553 552 INIT_LIST_HEAD(&slot->tx_list); 554 - hw_desc = (char *) mv_chan->dma_desc_pool; 555 - slot->async_tx.phys = 556 - (dma_addr_t) &hw_desc[idx * MV_XOR_SLOT_SIZE]; 553 + dma_desc = mv_chan->dma_desc_pool; 554 + slot->async_tx.phys = dma_desc + idx * MV_XOR_SLOT_SIZE; 557 555 slot->idx = idx++; 558 556 559 557 spin_lock_bh(&mv_chan->lock); ··· 582 582 int slot_cnt; 583 583 584 584 dev_dbg(mv_chan_to_devp(mv_chan), 585 - "%s dest: %x src %x len: %u flags: %ld\n", 586 - __func__, dest, src, len, flags); 585 + "%s dest: %pad src %pad len: %u flags: %ld\n", 586 + __func__, &dest, &src, len, flags); 587 587 if (unlikely(len < MV_XOR_MIN_BYTE_COUNT)) 588 588 return NULL; 589 589 ··· 626 626 BUG_ON(len > MV_XOR_MAX_BYTE_COUNT); 627 627 628 628 dev_dbg(mv_chan_to_devp(mv_chan), 629 - "%s src_cnt: %d len: dest %x %u flags: %ld\n", 630 - __func__, src_cnt, len, dest, flags); 629 + "%s src_cnt: %d len: %u dest %pad flags: %ld\n", 630 + __func__, src_cnt, len, &dest, flags); 631 631 632 632 spin_lock_bh(&mv_chan->lock); 633 633 slot_cnt = mv_chan_xor_slot_count(len, src_cnt);
+61 -1
drivers/phy/phy-core.c
··· 162 162 { 163 163 int ret; 164 164 165 + if (!phy) 166 + return 0; 167 + 165 168 ret = phy_pm_runtime_get_sync(phy); 166 169 if (ret < 0 && ret != -ENOTSUPP) 167 170 return ret; ··· 190 187 { 191 188 int ret; 192 189 190 + if (!phy) 191 + return 0; 192 + 193 193 ret = phy_pm_runtime_get_sync(phy); 194 194 if (ret < 0 && ret != -ENOTSUPP) 195 195 return ret; ··· 217 211 int phy_power_on(struct phy *phy) 218 212 { 219 213 int ret; 214 + 215 + if (!phy) 216 + return 0; 220 217 221 218 ret = phy_pm_runtime_get_sync(phy); 222 219 if (ret < 0 && ret != -ENOTSUPP) ··· 248 239 int phy_power_off(struct phy *phy) 249 240 { 250 241 int ret; 242 + 243 + if (!phy) 244 + return 0; 251 245 252 246 mutex_lock(&phy->mutex); 253 247 if (phy->power_count == 1 && phy->ops->power_off) { ··· 320 308 */ 321 309 void phy_put(struct phy *phy) 322 310 { 323 - if (IS_ERR(phy)) 311 + if (!phy || IS_ERR(phy)) 324 312 return; 325 313 326 314 module_put(phy->ops->owner); ··· 339 327 void devm_phy_put(struct device *dev, struct phy *phy) 340 328 { 341 329 int r; 330 + 331 + if (!phy) 332 + return; 342 333 343 334 r = devres_destroy(dev, devm_phy_release, devm_phy_match, phy); 344 335 dev_WARN_ONCE(dev, r, "couldn't find PHY resource\n"); ··· 426 411 EXPORT_SYMBOL_GPL(phy_get); 427 412 428 413 /** 414 + * phy_optional_get() - lookup and obtain a reference to an optional phy. 415 + * @dev: device that requests this phy 416 + * @string: the phy name as given in the dt data or the name of the controller 417 + * port for non-dt case 418 + * 419 + * Returns the phy driver, after getting a refcount to it; or 420 + * NULL if there is no such phy. The caller is responsible for 421 + * calling phy_put() to release that count. 422 + */ 423 + struct phy *phy_optional_get(struct device *dev, const char *string) 424 + { 425 + struct phy *phy = phy_get(dev, string); 426 + 427 + if (PTR_ERR(phy) == -ENODEV) 428 + phy = NULL; 429 + 430 + return phy; 431 + } 432 + EXPORT_SYMBOL_GPL(phy_optional_get); 433 + 434 + /** 429 435 * devm_phy_get() - lookup and obtain a reference to a phy. 430 436 * @dev: device that requests this phy 431 437 * @string: the phy name as given in the dt data or phy device name ··· 475 439 return phy; 476 440 } 477 441 EXPORT_SYMBOL_GPL(devm_phy_get); 442 + 443 + /** 444 + * devm_phy_optional_get() - lookup and obtain a reference to an optional phy. 445 + * @dev: device that requests this phy 446 + * @string: the phy name as given in the dt data or phy device name 447 + * for non-dt case 448 + * 449 + * Gets the phy using phy_get(), and associates a device with it using 450 + * devres. On driver detach, release function is invoked on the devres 451 + * data, then, devres data is freed. This differs to devm_phy_get() in 452 + * that if the phy does not exist, it is not considered an error and 453 + * -ENODEV will not be returned. Instead the NULL phy is returned, 454 + * which can be passed to all other phy consumer calls. 455 + */ 456 + struct phy *devm_phy_optional_get(struct device *dev, const char *string) 457 + { 458 + struct phy *phy = devm_phy_get(dev, string); 459 + 460 + if (PTR_ERR(phy) == -ENODEV) 461 + phy = NULL; 462 + 463 + return phy; 464 + } 465 + EXPORT_SYMBOL_GPL(devm_phy_optional_get); 478 466 479 467 /** 480 468 * phy_create() - create a new phy
+14
include/linux/phy/phy.h
··· 146 146 phy->attrs.bus_width = bus_width; 147 147 } 148 148 struct phy *phy_get(struct device *dev, const char *string); 149 + struct phy *phy_optional_get(struct device *dev, const char *string); 149 150 struct phy *devm_phy_get(struct device *dev, const char *string); 151 + struct phy *devm_phy_optional_get(struct device *dev, const char *string); 150 152 void phy_put(struct phy *phy); 151 153 void devm_phy_put(struct device *dev, struct phy *phy); 152 154 struct phy *of_phy_simple_xlate(struct device *dev, ··· 234 232 return ERR_PTR(-ENOSYS); 235 233 } 236 234 235 + static inline struct phy *phy_optional_get(struct device *dev, 236 + const char *string) 237 + { 238 + return ERR_PTR(-ENOSYS); 239 + } 240 + 237 241 static inline struct phy *devm_phy_get(struct device *dev, const char *string) 242 + { 243 + return ERR_PTR(-ENOSYS); 244 + } 245 + 246 + static inline struct phy *devm_phy_optional_get(struct device *dev, 247 + const char *string) 238 248 { 239 249 return ERR_PTR(-ENOSYS); 240 250 }