tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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MIPS: Always record SEGBITS in cpu_data.vmbits

With a 32-bit kernel running on 64-bit MIPS hardware the hardcoded value
of `cpu_vmbits' only records the size of compatibility useg and does not
reflect the size of native xuseg or the complete range of values allowed
in the VPN2 field of TLB entries.

An upcoming change will need the actual VPN2 value range permitted even
in 32-bit kernel configurations, so always include the `vmbits' member
in `struct cpuinfo_mips' and probe for SEGBITS when running on 64-bit
hardware and resorting to the currently hardcoded value of 31 on 32-bit
processors. No functional change for users of `cpu_vmbits'.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

authored by

Maciej W. Rozycki and committed by
Thomas Bogendoerfer 8374c2cb ec8bf188

+12 -8
-1
arch/mips/include/asm/cpu-features.h
··· 484 484 # endif 485 485 # ifndef cpu_vmbits 486 486 # define cpu_vmbits cpu_data[0].vmbits 487 - # define __NEED_VMBITS_PROBE 488 487 # endif 489 488 #endif 490 489
-2
arch/mips/include/asm/cpu-info.h
··· 80 80 int srsets; /* Shadow register sets */ 81 81 int package;/* physical package number */ 82 82 unsigned int globalnumber; 83 - #ifdef CONFIG_64BIT 84 83 int vmbits; /* Virtual memory size in bits */ 85 - #endif 86 84 void *data; /* Additional data */ 87 85 unsigned int watch_reg_count; /* Number that exist */ 88 86 unsigned int watch_reg_use_cnt; /* Usable by ptrace */
+2
arch/mips/include/asm/mipsregs.h
··· 1871 1871 1872 1872 #define read_c0_entryhi() __read_ulong_c0_register($10, 0) 1873 1873 #define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val) 1874 + #define read_c0_entryhi_64() __read_64bit_c0_register($10, 0) 1875 + #define write_c0_entryhi_64(val) __write_64bit_c0_register($10, 0, val) 1874 1876 1875 1877 #define read_c0_guestctl1() __read_32bit_c0_register($10, 4) 1876 1878 #define write_c0_guestctl1(val) __write_32bit_c0_register($10, 4, val)
+8 -5
arch/mips/kernel/cpu-probe.c
··· 210 210 211 211 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) 212 212 { 213 - #ifdef __NEED_VMBITS_PROBE 214 - write_c0_entryhi(0x3fffffffffffe000ULL); 215 - back_to_back_c0_hazard(); 216 - c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL); 217 - #endif 213 + int vmbits = 31; 214 + 215 + if (cpu_has_64bits) { 216 + write_c0_entryhi_64(0x3fffffffffffe000ULL); 217 + back_to_back_c0_hazard(); 218 + vmbits = fls64(read_c0_entryhi_64() & 0x3fffffffffffe000ULL); 219 + } 220 + c->vmbits = vmbits; 218 221 } 219 222 220 223 static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
+2
arch/mips/kernel/cpu-r3k-probe.c
··· 137 137 else 138 138 cpu_set_nofpu_opts(c); 139 139 140 + c->vmbits = 31; 141 + 140 142 reserve_exception_space(0, 0x400); 141 143 } 142 144