tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'soc-fixes-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
"This is a fairly large set of bugfixes, most of which had been sent a
while ago but only now made it into the soc tree:

Maintainer file updates:

- Claudiu Beznea now co-maintains the at91 soc family, replacing
Ludovic Desroches.

- Michael Walle maintains the sl28cpld drivers

- Alain Volmat and Raphael Gallais-Pou take over some drivers for ST
platforms

- Alim Akhtar is an additional reviewer for Samsung platforms

Code fixes:

- Op-tee had a problem with object lifetime that needs a slightly
complex fix, as well as another bug with error handling.

- Several minor issues for the OMAP platform, including a regression
with the timer

- A Kconfig change to fix a build-time issue on Intel SoCFPGA

Device tree fixes:

- The Amlogic Meson platform fixes a boot regression on am1-odroid, a
spurious interrupt, and a problem with reserved memory regions

- In the i.MX platform, several bug fixes are needed to make devices
work correctly: SD card detection, alarmtimer, and sound card on
some board. One patch for the GPU got in there by accident and gets
reverted again.

- TI K3 needs a fix for J721S2 serial port numbers

- ux500 needs a fix to mount the SD card as root on the Skomer phone"

* tag 'soc-fixes-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (46 commits)
Revert "arm64: dts: imx8mn-venice-gw7902: disable gpu"
arm64: Remove ARCH_VULCAN
MAINTAINERS: add myself as a maintainer for the sl28cpld
MAINTAINERS: add IRC to ARM sub-architectures and Devicetree
MAINTAINERS: arm: samsung: add Git tree and IRC
ARM: dts: Fix boot regression on Skomer
ARM: dts: spear320: Drop unused and undocumented 'irq-over-gpio' property
soc: aspeed: lpc-ctrl: Block error printing on probe defer cases
docs/ABI: testing: aspeed-uart-routing: Escape asterisk
MAINTAINERS: update drm/stm drm/sti and cec/sti maintainers
MAINTAINERS: Update Benjamin Gaignard maintainer status
ARM: socfpga: fix missing RESET_CONTROLLER
arm64: dts: meson-sm1-odroid: fix boot loop after reboot
arm64: dts: meson-g12: drop BL32 region from SEI510/SEI610
arm64: dts: meson-g12: add ATF BL32 reserved-memory region
arm64: dts: meson-gx: add ATF BL32 reserved-memory region
arm64: dts: meson-sm1-bananapi-m5: fix wrong GPIO domain for GPIOE_2
arm64: dts: meson-sm1-odroid: use correct enable-gpio pin for tf-io regulator
arm64: dts: meson-g12b-odroid-n2: fix typo 'dio2133'
optee: use driver internal tee_context for some rpc
...

Linus Torvalds 83e39664 adccc16e

+263 -238
+3 -3
Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
··· 1 - What: /sys/bus/platform/drivers/aspeed-uart-routing/*/uart* 1 + What: /sys/bus/platform/drivers/aspeed-uart-routing/\*/uart\* 2 2 Date: September 2021 3 3 Contact: Oskar Senft <osk@google.com> 4 4 Chia-Wei Wang <chiawei_wang@aspeedtech.com> ··· 9 9 depends on the selected file. 10 10 11 11 e.g. 12 - cat /sys/bus/platform/drivers/aspeed-uart-routing/*.uart_routing/uart1 12 + cat /sys/bus/platform/drivers/aspeed-uart-routing/\*.uart_routing/uart1 13 13 [io1] io2 io3 io4 uart2 uart3 uart4 io6 14 14 15 15 In this case, UART1 gets its input from IO1 (physical serial port 1). ··· 17 17 Users: OpenBMC. Proposed changes should be mailed to 18 18 openbmc@lists.ozlabs.org 19 19 20 - What: /sys/bus/platform/drivers/aspeed-uart-routing/*/io* 20 + What: /sys/bus/platform/drivers/aspeed-uart-routing/\*/io\* 21 21 Date: September 2021 22 22 Contact: Oskar Senft <osk@google.com> 23 23 Chia-Wei Wang <chiawei_wang@aspeedtech.com>
+3
Documentation/devicetree/bindings/arm/omap/omap.txt
··· 119 119 - OMAP3 BeagleBoard : Low cost community board 120 120 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3" 121 121 122 + - OMAP3 BeagleBoard A to B4 : Early BeagleBoard revisions A to B4 with a timer quirk 123 + compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3" 124 + 122 125 - OMAP3 Tobi with Overo : Commercial expansion board with daughter board 123 126 compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3" 124 127
+30 -4
MAINTAINERS
··· 1620 1620 M: soc@kernel.org 1621 1621 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1622 1622 S: Maintained 1623 + C: irc://irc.libera.chat/armlinux 1623 1624 T: git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git 1624 1625 F: arch/arm/boot/dts/Makefile 1625 1626 F: arch/arm64/boot/dts/Makefile ··· 1628 1627 ARM SUB-ARCHITECTURES 1629 1628 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1630 1629 S: Maintained 1630 + C: irc://irc.libera.chat/armlinux 1631 1631 T: git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git 1632 1632 F: arch/arm/mach-*/ 1633 1633 F: arch/arm/plat-*/ ··· 1782 1780 F: drivers/mailbox/apple-mailbox.c 1783 1781 F: drivers/pinctrl/pinctrl-apple-gpio.c 1784 1782 F: drivers/soc/apple/* 1783 + F: drivers/watchdog/apple_wdt.c 1785 1784 F: include/dt-bindings/interrupt-controller/apple-aic.h 1786 1785 F: include/dt-bindings/pinctrl/apple.h 1787 1786 F: include/linux/apple-mailbox.h ··· 2573 2570 2574 2571 ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES 2575 2572 M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 2573 + R: Alim Akhtar <alim.akhtar@samsung.com> 2576 2574 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2577 2575 L: linux-samsung-soc@vger.kernel.org 2578 2576 S: Maintained 2577 + C: irc://irc.libera.chat/linux-exynos 2579 2578 Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/ 2579 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git 2580 2580 F: Documentation/arm/samsung/ 2581 2581 F: Documentation/devicetree/bindings/arm/samsung/ 2582 2582 F: Documentation/devicetree/bindings/power/pd-samsung.yaml ··· 5778 5772 5779 5773 DMA-BUF HEAPS FRAMEWORK 5780 5774 M: Sumit Semwal <sumit.semwal@linaro.org> 5781 - R: Benjamin Gaignard <benjamin.gaignard@linaro.org> 5775 + R: Benjamin Gaignard <benjamin.gaignard@collabora.com> 5782 5776 R: Liam Mark <lmark@codeaurora.org> 5783 5777 R: Laura Abbott <labbott@redhat.com> 5784 5778 R: Brian Starkey <Brian.Starkey@arm.com> ··· 6508 6502 F: drivers/gpu/drm/rockchip/ 6509 6503 6510 6504 DRM DRIVERS FOR STI 6511 - M: Benjamin Gaignard <benjamin.gaignard@linaro.org> 6505 + M: Alain Volmat <alain.volmat@foss.st.com> 6512 6506 L: dri-devel@lists.freedesktop.org 6513 6507 S: Maintained 6514 6508 T: git git://anongit.freedesktop.org/drm/drm-misc ··· 6517 6511 6518 6512 DRM DRIVERS FOR STM 6519 6513 M: Yannick Fertre <yannick.fertre@foss.st.com> 6514 + M: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> 6520 6515 M: Philippe Cornu <philippe.cornu@foss.st.com> 6521 - M: Benjamin Gaignard <benjamin.gaignard@linaro.org> 6522 6516 L: dri-devel@lists.freedesktop.org 6523 6517 S: Maintained 6524 6518 T: git git://anongit.freedesktop.org/drm/drm-misc ··· 14401 14395 M: Frank Rowand <frowand.list@gmail.com> 14402 14396 L: devicetree@vger.kernel.org 14403 14397 S: Maintained 14398 + C: irc://irc.libera.chat/devicetree 14404 14399 W: http://www.devicetree.org/ 14405 14400 T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git 14406 14401 F: Documentation/ABI/testing/sysfs-firmware-ofw ··· 14413 14406 M: Rob Herring <robh+dt@kernel.org> 14414 14407 L: devicetree@vger.kernel.org 14415 14408 S: Maintained 14409 + C: irc://irc.libera.chat/devicetree 14416 14410 Q: http://patchwork.ozlabs.org/project/devicetree-bindings/list/ 14417 14411 T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git 14418 14412 F: Documentation/devicetree/ ··· 15304 15296 M: Tomasz Figa <tomasz.figa@gmail.com> 15305 15297 M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 15306 15298 M: Sylwester Nawrocki <s.nawrocki@samsung.com> 15299 + R: Alim Akhtar <alim.akhtar@samsung.com> 15307 15300 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 15308 15301 L: linux-samsung-soc@vger.kernel.org 15309 15302 S: Maintained 15303 + C: irc://irc.libera.chat/linux-exynos 15310 15304 Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/ 15311 15305 T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git 15312 15306 F: Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt ··· 17105 17095 M: Sylwester Nawrocki <s.nawrocki@samsung.com> 17106 17096 M: Tomasz Figa <tomasz.figa@gmail.com> 17107 17097 M: Chanwoo Choi <cw00.choi@samsung.com> 17098 + R: Alim Akhtar <alim.akhtar@samsung.com> 17108 17099 L: linux-samsung-soc@vger.kernel.org 17109 17100 S: Supported 17110 17101 T: git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git ··· 17741 17730 S: Maintained 17742 17731 W: http://www.winischhofer.at/linuxsisusbvga.shtml 17743 17732 F: drivers/usb/misc/sisusbvga/ 17733 + 17734 + SL28 CPLD MFD DRIVER 17735 + M: Michael Walle <michael@walle.cc> 17736 + S: Maintained 17737 + F: Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml 17738 + F: Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml 17739 + F: Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml 17740 + F: Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml 17741 + F: Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml 17742 + F: Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml 17743 + F: drivers/gpio/gpio-sl28cpld.c 17744 + F: drivers/hwmon/sl28cpld-hwmon.c 17745 + F: drivers/irqchip/irq-sl28cpld.c 17746 + F: drivers/pwm/pwm-sl28cpld.c 17747 + F: drivers/watchdog/sl28cpld_wdt.c 17744 17748 17745 17749 SLAB ALLOCATOR 17746 17750 M: Christoph Lameter <cl@linux.com> ··· 18473 18447 F: sound/soc/sti/ 18474 18448 18475 18449 STI CEC DRIVER 18476 - M: Benjamin Gaignard <benjamin.gaignard@linaro.org> 18450 + M: Alain Volmat <alain.volmat@foss.st.com> 18477 18451 S: Maintained 18478 18452 F: Documentation/devicetree/bindings/media/stih-cec.txt 18479 18453 F: drivers/media/cec/platform/sti/
+1
arch/arm/boot/dts/Makefile
··· 806 806 logicpd-som-lv-37xx-devkit.dtb \ 807 807 omap3430-sdp.dtb \ 808 808 omap3-beagle.dtb \ 809 + omap3-beagle-ab4.dtb \ 809 810 omap3-beagle-xm.dtb \ 810 811 omap3-beagle-xm-ab.dtb \ 811 812 omap3-cm-t3517.dtb \
+1 -1
arch/arm/boot/dts/am335x-wega.dtsi
··· 55 55 2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */ 56 56 >; 57 57 tx-num-evt = <16>; 58 - rt-num-evt = <16>; 58 + rx-num-evt = <16>; 59 59 status = "okay"; 60 60 }; 61 61
+10 -10
arch/arm/boot/dts/dra7.dtsi
··· 160 160 target-module@48210000 { 161 161 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 162 162 power-domains = <&prm_mpu>; 163 - clocks = <&mpu_clkctrl DRA7_MPU_CLKCTRL 0>; 163 + clocks = <&mpu_clkctrl DRA7_MPU_MPU_CLKCTRL 0>; 164 164 clock-names = "fck"; 165 165 #address-cells = <1>; 166 166 #size-cells = <1>; ··· 875 875 <0x58000014 4>; 876 876 reg-names = "rev", "syss"; 877 877 ti,syss-mask = <1>; 878 - clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 0>, 879 - <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 9>, 880 - <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 10>, 881 - <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 11>; 878 + clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 0>, 879 + <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 9>, 880 + <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 10>, 881 + <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 11>; 882 882 clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk"; 883 883 #address-cells = <1>; 884 884 #size-cells = <1>; ··· 912 912 SYSC_OMAP2_SOFTRESET | 913 913 SYSC_OMAP2_AUTOIDLE)>; 914 914 ti,syss-mask = <1>; 915 - clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>; 915 + clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>; 916 916 clock-names = "fck"; 917 917 #address-cells = <1>; 918 918 #size-cells = <1>; ··· 939 939 <SYSC_IDLE_SMART>, 940 940 <SYSC_IDLE_SMART_WKUP>; 941 941 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET)>; 942 - clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 9>, 943 - <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>; 942 + clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 9>, 943 + <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>; 944 944 clock-names = "fck", "dss_clk"; 945 945 #address-cells = <1>; 946 946 #size-cells = <1>; ··· 979 979 compatible = "vivante,gc"; 980 980 reg = <0x0 0x700>; 981 981 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 982 - clocks = <&dss_clkctrl DRA7_BB2D_CLKCTRL 0>; 982 + clocks = <&dss_clkctrl DRA7_DSS_BB2D_CLKCTRL 0>; 983 983 clock-names = "core"; 984 984 }; 985 985 }; ··· 1333 1333 ti,no-reset-on-init; 1334 1334 ti,no-idle; 1335 1335 timer@0 { 1336 - assigned-clocks = <&wkupaon_clkctrl DRA7_TIMER1_CLKCTRL 24>; 1336 + assigned-clocks = <&wkupaon_clkctrl DRA7_WKUPAON_TIMER1_CLKCTRL 24>; 1337 1337 assigned-clock-parents = <&sys_32k_ck>; 1338 1338 }; 1339 1339 };
-1
arch/arm/boot/dts/imx23-evk.dts
··· 79 79 MX23_PAD_LCD_RESET__GPIO_1_18 80 80 MX23_PAD_PWM3__GPIO_1_29 81 81 MX23_PAD_PWM4__GPIO_1_30 82 - MX23_PAD_SSP1_DETECT__SSP1_DETECT 83 82 >; 84 83 fsl,drive-strength = <MXS_DRIVE_4mA>; 85 84 fsl,voltage = <MXS_VOLTAGE_HIGH>;
+4 -1
arch/arm/boot/dts/imx6qdl-udoo.dtsi
··· 5 5 * Author: Fabio Estevam <fabio.estevam@freescale.com> 6 6 */ 7 7 8 + #include <dt-bindings/gpio/gpio.h> 9 + 8 10 / { 9 11 aliases { 10 12 backlight = &backlight; ··· 228 226 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 229 227 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 230 228 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 229 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 231 230 >; 232 231 }; 233 232 ··· 307 304 &usdhc3 { 308 305 pinctrl-names = "default"; 309 306 pinctrl-0 = <&pinctrl_usdhc3>; 310 - non-removable; 307 + cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 311 308 status = "okay"; 312 309 }; 313 310
+1 -1
arch/arm/boot/dts/imx7ulp.dtsi
··· 259 259 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 260 260 clocks = <&pcc2 IMX7ULP_CLK_WDG1>; 261 261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>; 262 - assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>; 262 + assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>; 263 263 timeout-sec = <40>; 264 264 }; 265 265
+4 -4
arch/arm/boot/dts/meson.dtsi
··· 59 59 }; 60 60 61 61 uart_A: serial@84c0 { 62 - compatible = "amlogic,meson6-uart", "amlogic,meson-uart"; 62 + compatible = "amlogic,meson6-uart"; 63 63 reg = <0x84c0 0x18>; 64 64 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 65 65 fifo-size = <128>; ··· 67 67 }; 68 68 69 69 uart_B: serial@84dc { 70 - compatible = "amlogic,meson6-uart", "amlogic,meson-uart"; 70 + compatible = "amlogic,meson6-uart"; 71 71 reg = <0x84dc 0x18>; 72 72 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 73 73 status = "disabled"; ··· 105 105 }; 106 106 107 107 uart_C: serial@8700 { 108 - compatible = "amlogic,meson6-uart", "amlogic,meson-uart"; 108 + compatible = "amlogic,meson6-uart"; 109 109 reg = <0x8700 0x18>; 110 110 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; 111 111 status = "disabled"; ··· 228 228 }; 229 229 230 230 uart_AO: serial@4c0 { 231 - compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart"; 231 + compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart"; 232 232 reg = <0x4c0 0x18>; 233 233 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 234 234 status = "disabled";
+12 -12
arch/arm/boot/dts/meson8.dtsi
··· 736 736 }; 737 737 738 738 &uart_AO { 739 - compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; 740 - clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>; 741 - clock-names = "baud", "xtal", "pclk"; 739 + compatible = "amlogic,meson8-uart", "amlogic,meson-ao-uart"; 740 + clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>; 741 + clock-names = "xtal", "pclk", "baud"; 742 742 }; 743 743 744 744 &uart_A { 745 - compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; 746 - clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>; 747 - clock-names = "baud", "xtal", "pclk"; 745 + compatible = "amlogic,meson8-uart"; 746 + clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>; 747 + clock-names = "xtal", "pclk", "baud"; 748 748 }; 749 749 750 750 &uart_B { 751 - compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; 752 - clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>; 753 - clock-names = "baud", "xtal", "pclk"; 751 + compatible = "amlogic,meson8-uart"; 752 + clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>; 753 + clock-names = "xtal", "pclk", "baud"; 754 754 }; 755 755 756 756 &uart_C { 757 - compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; 758 - clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>; 759 - clock-names = "baud", "xtal", "pclk"; 757 + compatible = "amlogic,meson8-uart"; 758 + clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>; 759 + clock-names = "xtal", "pclk", "baud"; 760 760 }; 761 761 762 762 &usb0 {
+12 -12
arch/arm/boot/dts/meson8b.dtsi
··· 724 724 }; 725 725 726 726 &uart_AO { 727 - compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; 728 - clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>; 729 - clock-names = "baud", "xtal", "pclk"; 727 + compatible = "amlogic,meson8b-uart", "amlogic,meson-ao-uart"; 728 + clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>; 729 + clock-names = "xtal", "pclk", "baud"; 730 730 }; 731 731 732 732 &uart_A { 733 - compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; 734 - clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>; 735 - clock-names = "baud", "xtal", "pclk"; 733 + compatible = "amlogic,meson8b-uart"; 734 + clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>; 735 + clock-names = "xtal", "pclk", "baud"; 736 736 }; 737 737 738 738 &uart_B { 739 - compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; 740 - clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>; 741 - clock-names = "baud", "xtal", "pclk"; 739 + compatible = "amlogic,meson8b-uart"; 740 + clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>; 741 + clock-names = "xtal", "pclk", "baud"; 742 742 }; 743 743 744 744 &uart_C { 745 - compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; 746 - clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>; 747 - clock-names = "baud", "xtal", "pclk"; 745 + compatible = "amlogic,meson8b-uart"; 746 + clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>; 747 + clock-names = "xtal", "pclk", "baud"; 748 748 }; 749 749 750 750 &usb0 {
+47
arch/arm/boot/dts/omap3-beagle-ab4.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /dts-v1/; 3 + 4 + #include "omap3-beagle.dts" 5 + 6 + / { 7 + model = "TI OMAP3 BeagleBoard A to B4"; 8 + compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3"; 9 + }; 10 + 11 + /* 12 + * Workaround for capacitor C70 issue, see "Boards revision A and < B5" 13 + * section at https://elinux.org/BeagleBoard_Community 14 + */ 15 + 16 + /* Unusable as clocksource because of unreliable oscillator */ 17 + &counter32k { 18 + status = "disabled"; 19 + }; 20 + 21 + /* Unusable as clockevent because of unreliable oscillator, allow to idle */ 22 + &timer1_target { 23 + /delete-property/ti,no-reset-on-init; 24 + /delete-property/ti,no-idle; 25 + timer@0 { 26 + /delete-property/ti,timer-alwon; 27 + }; 28 + }; 29 + 30 + /* Preferred always-on timer for clocksource */ 31 + &timer12_target { 32 + ti,no-reset-on-init; 33 + ti,no-idle; 34 + timer@0 { 35 + /* Always clocked by secure_32k_fck */ 36 + }; 37 + }; 38 + 39 + /* Preferred timer for clockevent */ 40 + &timer2_target { 41 + ti,no-reset-on-init; 42 + ti,no-idle; 43 + timer@0 { 44 + assigned-clocks = <&gpt2_fck>; 45 + assigned-clock-parents = <&sys_ck>; 46 + }; 47 + };
-33
arch/arm/boot/dts/omap3-beagle.dts
··· 304 304 phys = <0 &hsusb2_phy>; 305 305 }; 306 306 307 - /* Unusable as clocksource because of unreliable oscillator */ 308 - &counter32k { 309 - status = "disabled"; 310 - }; 311 - 312 - /* Unusable as clockevent because if unreliable oscillator, allow to idle */ 313 - &timer1_target { 314 - /delete-property/ti,no-reset-on-init; 315 - /delete-property/ti,no-idle; 316 - timer@0 { 317 - /delete-property/ti,timer-alwon; 318 - }; 319 - }; 320 - 321 - /* Preferred always-on timer for clocksource */ 322 - &timer12_target { 323 - ti,no-reset-on-init; 324 - ti,no-idle; 325 - timer@0 { 326 - /* Always clocked by secure_32k_fck */ 327 - }; 328 - }; 329 - 330 - /* Preferred timer for clockevent */ 331 - &timer2_target { 332 - ti,no-reset-on-init; 333 - ti,no-idle; 334 - timer@0 { 335 - assigned-clocks = <&gpt2_fck>; 336 - assigned-clock-parents = <&sys_ck>; 337 - }; 338 - }; 339 - 340 307 &twl_gpio { 341 308 ti,use-leds; 342 309 /* pullups: BIT(1) */
-1
arch/arm/boot/dts/spear320-hmi.dts
··· 235 235 #address-cells = <1>; 236 236 #size-cells = <0>; 237 237 reg = <0x41>; 238 - irq-over-gpio; 239 238 irq-gpios = <&gpiopinctrl 29 0x4>; 240 239 id = <0>; 241 240 blocks = <0x5>;
-4
arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
··· 185 185 cap-sd-highspeed; 186 186 cap-mmc-highspeed; 187 187 /* All direction control is used */ 188 - st,sig-dir-cmd; 189 - st,sig-dir-dat0; 190 - st,sig-dir-dat2; 191 - st,sig-dir-dat31; 192 188 st,sig-pin-fbclk; 193 189 full-pwr-cycle; 194 190 vmmc-supply = <&ab8500_ldo_aux3_reg>;
+1 -1
arch/arm/mach-omap2/display.c
··· 263 263 } 264 264 265 265 r = of_platform_populate(node, NULL, NULL, &pdev->dev); 266 + put_device(&pdev->dev); 266 267 if (r) { 267 268 pr_err("Unable to populate DSS submodule devices\n"); 268 - put_device(&pdev->dev); 269 269 return r; 270 270 } 271 271
+3 -1
arch/arm/mach-omap2/omap_hwmod.c
··· 752 752 753 753 for_each_matching_node(np, ti_clkctrl_match_table) { 754 754 ret = _setup_clkctrl_provider(np); 755 - if (ret) 755 + if (ret) { 756 + of_node_put(np); 756 757 break; 758 + } 757 759 } 758 760 759 761 return ret;
+2
arch/arm/mach-socfpga/Kconfig
··· 2 2 menuconfig ARCH_INTEL_SOCFPGA 3 3 bool "Altera SOCFPGA family" 4 4 depends on ARCH_MULTI_V7 5 + select ARCH_HAS_RESET_CONTROLLER 5 6 select ARCH_SUPPORTS_BIG_ENDIAN 6 7 select ARM_AMBA 7 8 select ARM_GIC ··· 19 18 select PL310_ERRATA_727915 20 19 select PL310_ERRATA_753970 if PL310 21 20 select PL310_ERRATA_769419 21 + select RESET_CONTROLLER 22 22 23 23 if ARCH_INTEL_SOCFPGA 24 24 config SOCFPGA_SUSPEND
-3
arch/arm64/Kconfig.platforms
··· 309 309 help 310 310 This enables support for Toshiba Visconti SoCs Family. 311 311 312 - config ARCH_VULCAN 313 - def_bool n 314 - 315 312 config ARCH_XGENE 316 313 bool "AppliedMicro X-Gene SOC Family" 317 314 help
+6
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
··· 107 107 no-map; 108 108 }; 109 109 110 + /* 32 MiB reserved for ARM Trusted Firmware (BL32) */ 111 + secmon_reserved_bl32: secmon@5300000 { 112 + reg = <0x0 0x05300000 0x0 0x2000000>; 113 + no-map; 114 + }; 115 + 110 116 linux,cma { 111 117 compatible = "shared-dma-pool"; 112 118 reusable;
-8
arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
··· 157 157 regulator-always-on; 158 158 }; 159 159 160 - reserved-memory { 161 - /* TEE Reserved Memory */ 162 - bl32_reserved: bl32@5000000 { 163 - reg = <0x0 0x05300000 0x0 0x2000000>; 164 - no-map; 165 - }; 166 - }; 167 - 168 160 sdio_pwrseq: sdio-pwrseq { 169 161 compatible = "mmc-pwrseq-simple"; 170 162 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+2 -2
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
··· 17 17 rtc1 = &vrtc; 18 18 }; 19 19 20 - dioo2133: audio-amplifier-0 { 20 + dio2133: audio-amplifier-0 { 21 21 compatible = "simple-audio-amplifier"; 22 22 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; 23 23 VCC-supply = <&vcc_5v>; ··· 219 219 audio-widgets = "Line", "Lineout"; 220 220 audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>, 221 221 <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>, 222 - <&dioo2133>; 222 + <&dio2133>; 223 223 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", 224 224 "TDMOUT_B IN 1", "FRDDR_B OUT 1", 225 225 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+6
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
··· 49 49 no-map; 50 50 }; 51 51 52 + /* 32 MiB reserved for ARM Trusted Firmware (BL32) */ 53 + secmon_reserved_bl32: secmon@5300000 { 54 + reg = <0x0 0x05300000 0x0 0x2000000>; 55 + no-map; 56 + }; 57 + 52 58 linux,cma { 53 59 compatible = "shared-dma-pool"; 54 60 reusable;
+1 -1
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
··· 123 123 regulator-min-microvolt = <1800000>; 124 124 regulator-max-microvolt = <3300000>; 125 125 126 - enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>; 126 + enable-gpio = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>; 127 127 enable-active-high; 128 128 regulator-always-on; 129 129
+1 -1
arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
··· 48 48 regulator-max-microvolt = <3300000>; 49 49 vin-supply = <&vcc_5v>; 50 50 51 - enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>; 51 + enable-gpio = <&gpio_ao GPIOE_2 GPIO_OPEN_DRAIN>; 52 52 enable-active-high; 53 53 regulator-always-on; 54 54
-8
arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
··· 203 203 regulator-always-on; 204 204 }; 205 205 206 - reserved-memory { 207 - /* TEE Reserved Memory */ 208 - bl32_reserved: bl32@5000000 { 209 - reg = <0x0 0x05300000 0x0 0x2000000>; 210 - no-map; 211 - }; 212 - }; 213 - 214 206 sdio_pwrseq: sdio-pwrseq { 215 207 compatible = "mmc-pwrseq-simple"; 216 208 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
+4
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
··· 157 157 }; 158 158 }; 159 159 160 + &ftm_alarm0 { 161 + status = "okay"; 162 + }; 163 + 160 164 &gpio1 { 161 165 gpio-line-names = 162 166 "", "", "", "", "", "", "", "",
+2 -2
arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
··· 1115 1115 status = "okay"; 1116 1116 1117 1117 ports { 1118 - port@1 { 1119 - reg = <1>; 1118 + port@0 { 1119 + reg = <0>; 1120 1120 1121 1121 mipi1_sensor_ep: endpoint { 1122 1122 remote-endpoint = <&camera1_ep>;
+5 -5
arch/arm64/boot/dts/freescale/imx8mq.dtsi
··· 554 554 assigned-clock-rates = <0>, <0>, <0>, <594000000>; 555 555 status = "disabled"; 556 556 557 - port@0 { 557 + port { 558 558 lcdif_mipi_dsi: endpoint { 559 559 remote-endpoint = <&mipi_dsi_lcdif_in>; 560 560 }; ··· 1151 1151 #address-cells = <1>; 1152 1152 #size-cells = <0>; 1153 1153 1154 - port@0 { 1155 - reg = <0>; 1154 + port@1 { 1155 + reg = <1>; 1156 1156 1157 1157 csi1_mipi_ep: endpoint { 1158 1158 remote-endpoint = <&csi1_ep>; ··· 1203 1203 #address-cells = <1>; 1204 1204 #size-cells = <0>; 1205 1205 1206 - port@0 { 1207 - reg = <0>; 1206 + port@1 { 1207 + reg = <1>; 1208 1208 1209 1209 csi2_mipi_ep: endpoint { 1210 1210 remote-endpoint = <&csi2_ep>;
+1 -1
arch/arm64/boot/dts/freescale/mba8mx.dtsi
··· 91 91 92 92 sound { 93 93 compatible = "fsl,imx-audio-tlv320aic32x4"; 94 - model = "tqm-tlv320aic32"; 94 + model = "imx-audio-tlv320aic32x4"; 95 95 ssi-controller = <&sai3>; 96 96 audio-codec = <&tlv320aic3x04>; 97 97 };
+12 -2
arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
··· 15 15 model = "Texas Instruments J721S2 EVM"; 16 16 17 17 chosen { 18 - stdout-path = "serial10:115200n8"; 19 - bootargs = "console=ttyS10,115200n8 earlycon=ns16550a,mmio32,2880000"; 18 + stdout-path = "serial2:115200n8"; 19 + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,2880000"; 20 + }; 21 + 22 + aliases { 23 + serial1 = &mcu_uart0; 24 + serial2 = &main_uart8; 25 + mmc0 = &main_sdhci0; 26 + mmc1 = &main_sdhci1; 27 + can0 = &main_mcan16; 28 + can1 = &mcu_mcan0; 29 + can2 = &mcu_mcan1; 20 30 }; 21 31 22 32 evm_12v0: fixedregulator-evm12v0 {
-22
arch/arm64/boot/dts/ti/k3-j721s2.dtsi
··· 21 21 #address-cells = <2>; 22 22 #size-cells = <2>; 23 23 24 - aliases { 25 - serial0 = &wkup_uart0; 26 - serial1 = &mcu_uart0; 27 - serial2 = &main_uart0; 28 - serial3 = &main_uart1; 29 - serial4 = &main_uart2; 30 - serial5 = &main_uart3; 31 - serial6 = &main_uart4; 32 - serial7 = &main_uart5; 33 - serial8 = &main_uart6; 34 - serial9 = &main_uart7; 35 - serial10 = &main_uart8; 36 - serial11 = &main_uart9; 37 - mmc0 = &main_sdhci0; 38 - mmc1 = &main_sdhci1; 39 - can0 = &main_mcan16; 40 - can1 = &mcu_mcan0; 41 - can2 = &mcu_mcan1; 42 - can3 = &main_mcan3; 43 - can4 = &main_mcan5; 44 - }; 45 - 46 24 chosen { }; 47 25 48 26 cpus {
+1 -1
drivers/clocksource/timer-ti-dm-systimer.c
··· 241 241 bool quirk_unreliable_oscillator = false; 242 242 243 243 /* Quirk unreliable 32 KiHz oscillator with incomplete dts */ 244 - if (of_machine_is_compatible("ti,omap3-beagle") || 244 + if (of_machine_is_compatible("ti,omap3-beagle-ab4") || 245 245 of_machine_is_compatible("timll,omap3-devkit8000")) { 246 246 quirk_unreliable_oscillator = true; 247 247 counter_32k = -ENODEV;
+3 -4
drivers/soc/aspeed/aspeed-lpc-ctrl.c
··· 306 306 } 307 307 308 308 lpc_ctrl->clk = devm_clk_get(dev, NULL); 309 - if (IS_ERR(lpc_ctrl->clk)) { 310 - dev_err(dev, "couldn't get clock\n"); 311 - return PTR_ERR(lpc_ctrl->clk); 312 - } 309 + if (IS_ERR(lpc_ctrl->clk)) 310 + return dev_err_probe(dev, PTR_ERR(lpc_ctrl->clk), 311 + "couldn't get clock\n"); 313 312 rc = clk_prepare_enable(lpc_ctrl->clk); 314 313 if (rc) { 315 314 dev_err(dev, "couldn't enable clock\n");
+1 -1
drivers/soc/samsung/Kconfig
··· 31 31 help 32 32 Enable support for USI block. USI (Universal Serial Interface) is an 33 33 IP-core found in modern Samsung Exynos SoCs, like Exynos850 and 34 - ExynosAutoV0. USI block can be configured to provide one of the 34 + ExynosAutoV9. USI block can be configured to provide one of the 35 35 following serial protocols: UART, SPI or High Speed I2C. 36 36 37 37 This driver allows one to configure USI for desired protocol, which
+1
drivers/tee/optee/core.c
··· 158 158 optee_unregister_devices(); 159 159 160 160 optee_notif_uninit(optee); 161 + teedev_close_context(optee->ctx); 161 162 /* 162 163 * The two devices have to be unregistered before we can free the 163 164 * other resources.
+55 -37
drivers/tee/optee/ffa_abi.c
··· 424 424 */ 425 425 426 426 static void handle_ffa_rpc_func_cmd_shm_alloc(struct tee_context *ctx, 427 + struct optee *optee, 427 428 struct optee_msg_arg *arg) 428 429 { 429 430 struct tee_shm *shm; ··· 440 439 shm = optee_rpc_cmd_alloc_suppl(ctx, arg->params[0].u.value.b); 441 440 break; 442 441 case OPTEE_RPC_SHM_TYPE_KERNEL: 443 - shm = tee_shm_alloc(ctx, arg->params[0].u.value.b, 442 + shm = tee_shm_alloc(optee->ctx, arg->params[0].u.value.b, 444 443 TEE_SHM_MAPPED | TEE_SHM_PRIV); 445 444 break; 446 445 default: ··· 494 493 } 495 494 496 495 static void handle_ffa_rpc_func_cmd(struct tee_context *ctx, 496 + struct optee *optee, 497 497 struct optee_msg_arg *arg) 498 498 { 499 - struct optee *optee = tee_get_drvdata(ctx->teedev); 500 - 501 499 arg->ret_origin = TEEC_ORIGIN_COMMS; 502 500 switch (arg->cmd) { 503 501 case OPTEE_RPC_CMD_SHM_ALLOC: 504 - handle_ffa_rpc_func_cmd_shm_alloc(ctx, arg); 502 + handle_ffa_rpc_func_cmd_shm_alloc(ctx, optee, arg); 505 503 break; 506 504 case OPTEE_RPC_CMD_SHM_FREE: 507 505 handle_ffa_rpc_func_cmd_shm_free(ctx, optee, arg); ··· 510 510 } 511 511 } 512 512 513 - static void optee_handle_ffa_rpc(struct tee_context *ctx, u32 cmd, 514 - struct optee_msg_arg *arg) 513 + static void optee_handle_ffa_rpc(struct tee_context *ctx, struct optee *optee, 514 + u32 cmd, struct optee_msg_arg *arg) 515 515 { 516 516 switch (cmd) { 517 517 case OPTEE_FFA_YIELDING_CALL_RETURN_RPC_CMD: 518 - handle_ffa_rpc_func_cmd(ctx, arg); 518 + handle_ffa_rpc_func_cmd(ctx, optee, arg); 519 519 break; 520 520 case OPTEE_FFA_YIELDING_CALL_RETURN_INTERRUPT: 521 521 /* Interrupt delivered by now */ ··· 582 582 * above. 583 583 */ 584 584 cond_resched(); 585 - optee_handle_ffa_rpc(ctx, data->data1, rpc_arg); 585 + optee_handle_ffa_rpc(ctx, optee, data->data1, rpc_arg); 586 586 cmd = OPTEE_FFA_YIELDING_CALL_RESUME; 587 587 data->data0 = cmd; 588 588 data->data1 = 0; ··· 619 619 .data2 = (u32)(shm->sec_world_id >> 32), 620 620 .data3 = shm->offset, 621 621 }; 622 - struct optee_msg_arg *arg = tee_shm_get_va(shm, 0); 623 - unsigned int rpc_arg_offs = OPTEE_MSG_GET_ARG_SIZE(arg->num_params); 624 - struct optee_msg_arg *rpc_arg = tee_shm_get_va(shm, rpc_arg_offs); 622 + struct optee_msg_arg *arg; 623 + unsigned int rpc_arg_offs; 624 + struct optee_msg_arg *rpc_arg; 625 + 626 + arg = tee_shm_get_va(shm, 0); 627 + if (IS_ERR(arg)) 628 + return PTR_ERR(arg); 629 + 630 + rpc_arg_offs = OPTEE_MSG_GET_ARG_SIZE(arg->num_params); 631 + rpc_arg = tee_shm_get_va(shm, rpc_arg_offs); 632 + if (IS_ERR(rpc_arg)) 633 + return PTR_ERR(rpc_arg); 625 634 626 635 return optee_ffa_yielding_call(ctx, &data, rpc_arg); 627 636 } ··· 802 793 { 803 794 const struct ffa_dev_ops *ffa_ops; 804 795 unsigned int rpc_arg_count; 796 + struct tee_shm_pool *pool; 805 797 struct tee_device *teedev; 798 + struct tee_context *ctx; 806 799 struct optee *optee; 807 800 int rc; 808 801 ··· 824 813 if (!optee) 825 814 return -ENOMEM; 826 815 827 - optee->pool = optee_ffa_config_dyn_shm(); 828 - if (IS_ERR(optee->pool)) { 829 - rc = PTR_ERR(optee->pool); 830 - optee->pool = NULL; 831 - goto err; 816 + pool = optee_ffa_config_dyn_shm(); 817 + if (IS_ERR(pool)) { 818 + rc = PTR_ERR(pool); 819 + goto err_free_optee; 832 820 } 821 + optee->pool = pool; 833 822 834 823 optee->ops = &optee_ffa_ops; 835 824 optee->ffa.ffa_dev = ffa_dev; ··· 840 829 optee); 841 830 if (IS_ERR(teedev)) { 842 831 rc = PTR_ERR(teedev); 843 - goto err; 832 + goto err_free_pool; 844 833 } 845 834 optee->teedev = teedev; 846 835 ··· 848 837 optee); 849 838 if (IS_ERR(teedev)) { 850 839 rc = PTR_ERR(teedev); 851 - goto err; 840 + goto err_unreg_teedev; 852 841 } 853 842 optee->supp_teedev = teedev; 854 843 855 844 rc = tee_device_register(optee->teedev); 856 845 if (rc) 857 - goto err; 846 + goto err_unreg_supp_teedev; 858 847 859 848 rc = tee_device_register(optee->supp_teedev); 860 849 if (rc) 861 - goto err; 850 + goto err_unreg_supp_teedev; 862 851 863 852 rc = rhashtable_init(&optee->ffa.global_ids, &shm_rhash_params); 864 853 if (rc) 865 - goto err; 854 + goto err_unreg_supp_teedev; 866 855 mutex_init(&optee->ffa.mutex); 867 856 mutex_init(&optee->call_queue.mutex); 868 857 INIT_LIST_HEAD(&optee->call_queue.waiters); 869 858 optee_supp_init(&optee->supp); 870 859 ffa_dev_set_drvdata(ffa_dev, optee); 860 + ctx = teedev_open(optee->teedev); 861 + if (IS_ERR(ctx)) 862 + goto err_rhashtable_free; 863 + optee->ctx = ctx; 871 864 rc = optee_notif_init(optee, OPTEE_DEFAULT_MAX_NOTIF_VALUE); 872 - if (rc) { 873 - optee_ffa_remove(ffa_dev); 874 - return rc; 875 - } 865 + if (rc) 866 + goto err_close_ctx; 876 867 877 868 rc = optee_enumerate_devices(PTA_CMD_GET_DEVICES); 878 - if (rc) { 879 - optee_ffa_remove(ffa_dev); 880 - return rc; 881 - } 869 + if (rc) 870 + goto err_unregister_devices; 882 871 883 872 pr_info("initialized driver\n"); 884 873 return 0; 885 - err: 886 - /* 887 - * tee_device_unregister() is safe to call even if the 888 - * devices hasn't been registered with 889 - * tee_device_register() yet. 890 - */ 874 + 875 + err_unregister_devices: 876 + optee_unregister_devices(); 877 + optee_notif_uninit(optee); 878 + err_close_ctx: 879 + teedev_close_context(ctx); 880 + err_rhashtable_free: 881 + rhashtable_free_and_destroy(&optee->ffa.global_ids, rh_free_fn, NULL); 882 + optee_supp_uninit(&optee->supp); 883 + mutex_destroy(&optee->call_queue.mutex); 884 + err_unreg_supp_teedev: 891 885 tee_device_unregister(optee->supp_teedev); 886 + err_unreg_teedev: 892 887 tee_device_unregister(optee->teedev); 893 - if (optee->pool) 894 - tee_shm_pool_free(optee->pool); 888 + err_free_pool: 889 + tee_shm_pool_free(pool); 890 + err_free_optee: 895 891 kfree(optee); 896 892 return rc; 897 893 }
+1 -1
drivers/tee/optee/notif.c
··· 121 121 122 122 void optee_notif_uninit(struct optee *optee) 123 123 { 124 - kfree(optee->notif.bitmap); 124 + bitmap_free(optee->notif.bitmap); 125 125 }
+3 -2
drivers/tee/optee/optee_private.h
··· 53 53 54 54 struct optee_notif { 55 55 u_int max_key; 56 - struct tee_context *ctx; 57 56 /* Serializes access to the elements below in this struct */ 58 57 spinlock_t lock; 59 58 struct list_head db; ··· 133 134 /** 134 135 * struct optee - main service struct 135 136 * @supp_teedev: supplicant device 137 + * @teedev: client device 136 138 * @ops: internal callbacks for different ways to reach secure 137 139 * world 138 - * @teedev: client device 140 + * @ctx: driver internal TEE context 139 141 * @smc: specific to SMC ABI 140 142 * @ffa: specific to FF-A ABI 141 143 * @call_queue: queue of threads waiting to call @invoke_fn ··· 152 152 struct tee_device *supp_teedev; 153 153 struct tee_device *teedev; 154 154 const struct optee_ops *ops; 155 + struct tee_context *ctx; 155 156 union { 156 157 struct optee_smc smc; 157 158 struct optee_ffa ffa;
+17 -41
drivers/tee/optee/smc_abi.c
··· 75 75 p->u.memref.shm_offs = mp->u.tmem.buf_ptr - pa; 76 76 p->u.memref.shm = shm; 77 77 78 - /* Check that the memref is covered by the shm object */ 79 - if (p->u.memref.size) { 80 - size_t o = p->u.memref.shm_offs + 81 - p->u.memref.size - 1; 82 - 83 - rc = tee_shm_get_pa(shm, o, NULL); 84 - if (rc) 85 - return rc; 86 - } 87 - 88 78 return 0; 89 79 } 90 80 ··· 612 622 } 613 623 614 624 static void handle_rpc_func_cmd_shm_alloc(struct tee_context *ctx, 625 + struct optee *optee, 615 626 struct optee_msg_arg *arg, 616 627 struct optee_call_ctx *call_ctx) 617 628 { ··· 642 651 shm = optee_rpc_cmd_alloc_suppl(ctx, sz); 643 652 break; 644 653 case OPTEE_RPC_SHM_TYPE_KERNEL: 645 - shm = tee_shm_alloc(ctx, sz, TEE_SHM_MAPPED | TEE_SHM_PRIV); 654 + shm = tee_shm_alloc(optee->ctx, sz, 655 + TEE_SHM_MAPPED | TEE_SHM_PRIV); 646 656 break; 647 657 default: 648 658 arg->ret = TEEC_ERROR_BAD_PARAMETERS; ··· 739 747 switch (arg->cmd) { 740 748 case OPTEE_RPC_CMD_SHM_ALLOC: 741 749 free_pages_list(call_ctx); 742 - handle_rpc_func_cmd_shm_alloc(ctx, arg, call_ctx); 750 + handle_rpc_func_cmd_shm_alloc(ctx, optee, arg, call_ctx); 743 751 break; 744 752 case OPTEE_RPC_CMD_SHM_FREE: 745 753 handle_rpc_func_cmd_shm_free(ctx, arg); ··· 768 776 769 777 switch (OPTEE_SMC_RETURN_GET_RPC_FUNC(param->a0)) { 770 778 case OPTEE_SMC_RPC_FUNC_ALLOC: 771 - shm = tee_shm_alloc(ctx, param->a1, 779 + shm = tee_shm_alloc(optee->ctx, param->a1, 772 780 TEE_SHM_MAPPED | TEE_SHM_PRIV); 773 781 if (!IS_ERR(shm) && !tee_shm_get_pa(shm, 0, &pa)) { 774 782 reg_pair_from_64(&param->a1, &param->a2, pa); ··· 946 954 { 947 955 struct optee *optee = dev_id; 948 956 949 - optee_smc_do_bottom_half(optee->notif.ctx); 957 + optee_smc_do_bottom_half(optee->ctx); 950 958 951 959 return IRQ_HANDLED; 952 960 } 953 961 954 962 static int optee_smc_notif_init_irq(struct optee *optee, u_int irq) 955 963 { 956 - struct tee_context *ctx; 957 964 int rc; 958 965 959 - ctx = teedev_open(optee->teedev); 960 - if (IS_ERR(ctx)) 961 - return PTR_ERR(ctx); 962 - 963 - optee->notif.ctx = ctx; 964 966 rc = request_threaded_irq(irq, notif_irq_handler, 965 967 notif_irq_thread_fn, 966 968 0, "optee_notification", optee); 967 969 if (rc) 968 - goto err_close_ctx; 970 + return rc; 969 971 970 972 optee->smc.notif_irq = irq; 971 973 972 974 return 0; 973 - 974 - err_close_ctx: 975 - teedev_close_context(optee->notif.ctx); 976 - optee->notif.ctx = NULL; 977 - 978 - return rc; 979 975 } 980 976 981 977 static void optee_smc_notif_uninit_irq(struct optee *optee) 982 978 { 983 - if (optee->notif.ctx) { 984 - optee_smc_stop_async_notif(optee->notif.ctx); 979 + if (optee->smc.sec_caps & OPTEE_SMC_SEC_CAP_ASYNC_NOTIF) { 980 + optee_smc_stop_async_notif(optee->ctx); 985 981 if (optee->smc.notif_irq) { 986 982 free_irq(optee->smc.notif_irq, optee); 987 983 irq_dispose_mapping(optee->smc.notif_irq); 988 984 } 989 - 990 - /* 991 - * The thread normally working with optee->notif.ctx was 992 - * stopped with free_irq() above. 993 - * 994 - * Note we're not using teedev_close_context() or 995 - * tee_client_close_context() since we have already called 996 - * tee_device_put() while initializing to avoid a circular 997 - * reference counting. 998 - */ 999 - teedev_close_context(optee->notif.ctx); 1000 985 } 1001 986 } 1002 987 ··· 1335 1366 struct optee *optee = NULL; 1336 1367 void *memremaped_shm = NULL; 1337 1368 struct tee_device *teedev; 1369 + struct tee_context *ctx; 1338 1370 u32 max_notif_value; 1339 1371 u32 sec_caps; 1340 1372 int rc; ··· 1416 1446 optee->pool = pool; 1417 1447 1418 1448 platform_set_drvdata(pdev, optee); 1449 + ctx = teedev_open(optee->teedev); 1450 + if (IS_ERR(ctx)) 1451 + goto err_supp_uninit; 1452 + optee->ctx = ctx; 1419 1453 rc = optee_notif_init(optee, max_notif_value); 1420 1454 if (rc) 1421 - goto err_supp_uninit; 1455 + goto err_close_ctx; 1422 1456 1423 1457 if (sec_caps & OPTEE_SMC_SEC_CAP_ASYNC_NOTIF) { 1424 1458 unsigned int irq; ··· 1470 1496 optee_unregister_devices(); 1471 1497 err_notif_uninit: 1472 1498 optee_notif_uninit(optee); 1499 + err_close_ctx: 1500 + teedev_close_context(ctx); 1473 1501 err_supp_uninit: 1474 1502 optee_supp_uninit(&optee->supp); 1475 1503 mutex_destroy(&optee->call_queue.mutex);
+7 -7
include/dt-bindings/clock/dra7.h
··· 84 84 #define DRA7_L3_MAIN_2_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 85 85 #define DRA7_L3_INSTR_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) 86 86 87 - /* iva clocks */ 88 - #define DRA7_IVA_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 89 - #define DRA7_SL2IF_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) 90 - 91 87 /* dss clocks */ 92 88 #define DRA7_DSS_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 93 89 #define DRA7_BB2D_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) 94 - 95 - /* gpu clocks */ 96 - #define DRA7_GPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 97 90 98 91 /* l3init clocks */ 99 92 #define DRA7_MMC1_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) ··· 260 267 #define DRA7_L3INSTR_L3_MAIN_2_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 261 268 #define DRA7_L3INSTR_L3_INSTR_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) 262 269 270 + /* iva clocks */ 271 + #define DRA7_IVA_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 272 + #define DRA7_SL2IF_CLKCTRL DRA7_CLKCTRL_INDEX(0x28) 273 + 263 274 /* dss clocks */ 264 275 #define DRA7_DSS_DSS_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 265 276 #define DRA7_DSS_BB2D_CLKCTRL DRA7_CLKCTRL_INDEX(0x30) 277 + 278 + /* gpu clocks */ 279 + #define DRA7_GPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x20) 266 280 267 281 /* l3init clocks */ 268 282 #define DRA7_L3INIT_MMC1_CLKCTRL DRA7_CLKCTRL_INDEX(0x28)