Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/xe/lnl: Drop pre-production workaround support
LNL has been out long enough that all of our internal usage of
pre-production hardware has been phased out and we no longer need to
maintain workarounds that were exclusive to pre-production parts.
Production LNL hardware always has B0 or later steppings for both
graphics and media IP. Eliminate all workarounds that were exclusive to
A-step hardware and set the 'has_prod_wa_only' device flag for LNL to
make sure we warn and taint if someone tries to load the driver on an
old pre-production part.
Bspec: 70821
Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Link: https://patch.msgid.link/20251212181411.294854-4-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+2
-70
+1
-1
drivers/gpu/drm/xe/xe_guc_ads.c
+1
-1
drivers/gpu/drm/xe/xe_guc_ads.c
···
317
317
offset = guc_ads_waklv_offset(ads);
318
318
remain = guc_ads_waklv_size(ads);
319
319
320
-
if (XE_GT_WA(gt, 14019882105) || XE_GT_WA(gt, 16021333562))
320
+
if (XE_GT_WA(gt, 16021333562))
321
321
guc_waklv_enable(ads, NULL, 0, &offset, &remain,
322
322
GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED);
323
323
if (XE_GT_WA(gt, 18024947630))
-1
drivers/gpu/drm/xe/xe_pci.c
-1
drivers/gpu/drm/xe/xe_pci.c
-18
drivers/gpu/drm/xe/xe_ring_ops.c
-18
drivers/gpu/drm/xe/xe_ring_ops.c
···
211
211
return emit_pipe_control(dw, i, flags0, flags1, 0, 0);
212
212
}
213
213
214
-
static int emit_pipe_control_to_ring_end(struct xe_exec_queue *q, u32 *dw, int i)
215
-
{
216
-
struct xe_hw_engine *hwe = q->hwe;
217
-
218
-
if (hwe->class != XE_ENGINE_CLASS_RENDER)
219
-
return i;
220
-
221
-
xe_gt_assert(q->gt, !xe_exec_queue_is_multi_queue(q));
222
-
223
-
if (XE_GT_WA(hwe->gt, 16020292621))
224
-
i = emit_pipe_control(dw, i, 0, PIPE_CONTROL_LRI_POST_SYNC,
225
-
RING_NOPID(hwe->mmio_base).addr, 0);
226
-
227
-
return i;
228
-
}
229
-
230
214
static int emit_pipe_imm_ggtt(struct xe_exec_queue *q, u32 addr, u32 value,
231
215
bool stall_only, u32 *dw, int i)
232
216
{
···
396
412
i = emit_pipe_imm_ggtt(job->q, xe_lrc_seqno_ggtt_addr(lrc), seqno, lacks_render, dw, i);
397
413
398
414
i = emit_user_interrupt(dw, i);
399
-
400
-
i = emit_pipe_control_to_ring_end(job->q, dw, i);
401
415
402
416
xe_gt_assert(gt, i <= MAX_JOB_SIZE_DW);
403
417
-45
drivers/gpu/drm/xe/xe_wa.c
-45
drivers/gpu/drm/xe/xe_wa.c
···
217
217
XE_RTP_ACTIONS(SET(XELPMP_SQCNT1, ENFORCE_RAR))
218
218
},
219
219
220
-
/* Xe2_LPG */
221
-
222
-
{ XE_RTP_NAME("16020975621"),
223
-
XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)),
224
-
XE_RTP_ACTIONS(SET(XEHP_SLICE_UNIT_LEVEL_CLKGATE, SBEUNIT_CLKGATE_DIS))
225
-
},
226
-
{ XE_RTP_NAME("14018157293"),
227
-
XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)),
228
-
XE_RTP_ACTIONS(SET(XEHPC_L3CLOS_MASK(0), ~0),
229
-
SET(XEHPC_L3CLOS_MASK(1), ~0),
230
-
SET(XEHPC_L3CLOS_MASK(2), ~0),
231
-
SET(XEHPC_L3CLOS_MASK(3), ~0))
232
-
},
233
-
234
220
/* Xe2_LPM */
235
221
236
222
{ XE_RTP_NAME("14017421178"),
···
495
509
XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
496
510
XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, XE2_ALLOC_DPA_STARVE_FIX_DIS))
497
511
},
498
-
{ XE_RTP_NAME("14018957109"),
499
-
XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0),
500
-
FUNC(xe_rtp_match_first_render_or_compute)),
501
-
XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN5, DISABLE_SAMPLE_G_PERFORMANCE))
502
-
},
503
512
{ XE_RTP_NAME("14020338487"),
504
513
XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
505
514
XE_RTP_ACTIONS(SET(ROW_CHICKEN3, XE2_EUPEND_CHK_FLUSH_DIS))
···
503
522
XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004),
504
523
FUNC(xe_rtp_match_first_render_or_compute)),
505
524
XE_RTP_ACTIONS(SET(ROW_CHICKEN4, DISABLE_TDL_PUSH))
506
-
},
507
-
{ XE_RTP_NAME("14019322943"),
508
-
XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0),
509
-
FUNC(xe_rtp_match_first_render_or_compute)),
510
-
XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, TGM_WRITE_EOM_FORCE))
511
525
},
512
526
{ XE_RTP_NAME("14018471104"),
513
527
XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
···
780
804
781
805
/* Xe2_LPG */
782
806
783
-
{ XE_RTP_NAME("16020518922"),
784
-
XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0),
785
-
ENGINE_CLASS(RENDER)),
786
-
XE_RTP_ACTIONS(SET(FF_MODE,
787
-
DIS_TE_AUTOSTRIP |
788
-
DIS_MESH_PARTIAL_AUTOSTRIP |
789
-
DIS_MESH_AUTOSTRIP),
790
-
SET(VFLSKPD,
791
-
DIS_PARTIAL_AUTOSTRIP |
792
-
DIS_AUTOSTRIP))
793
-
},
794
807
{ XE_RTP_NAME("14019386621"),
795
808
XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
796
809
XE_RTP_ACTIONS(SET(VF_SCRATCHPAD, XE2_VFG_TED_CREDIT_INTERFACE_DISABLE))
···
788
823
XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
789
824
XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FD_END_COLLECT))
790
825
},
791
-
{ XE_RTP_NAME("14020013138"),
792
-
XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0),
793
-
ENGINE_CLASS(RENDER)),
794
-
XE_RTP_ACTIONS(SET(WM_CHICKEN3, HIZ_PLANE_COMPRESSION_DIS))
795
-
},
796
826
{ XE_RTP_NAME("14019988906"),
797
827
XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
798
828
XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FLSH_IGNORES_PSD))
799
-
},
800
-
{ XE_RTP_NAME("16020183090"),
801
-
XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0),
802
-
ENGINE_CLASS(RENDER)),
803
-
XE_RTP_ACTIONS(SET(INSTPM(RENDER_RING_BASE), ENABLE_SEMAPHORE_POLL_BIT))
804
829
},
805
830
{ XE_RTP_NAME("18033852989"),
806
831
XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
+1
-5
drivers/gpu/drm/xe/xe_wa_oob.rules
+1
-5
drivers/gpu/drm/xe/xe_wa_oob.rules
···
16
16
16017236439 PLATFORM(PVC)
17
17
14019821291 MEDIA_VERSION_RANGE(1300, 2000)
18
18
14015076503 MEDIA_VERSION(1300)
19
-
16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
20
-
14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
21
-
MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
22
-
GRAPHICS_VERSION_RANGE(1270, 1274)
19
+
14018913170 GRAPHICS_VERSION_RANGE(1270, 1274)
23
20
MEDIA_VERSION(1300)
24
21
PLATFORM(DG2)
25
22
14018094691 GRAPHICS_VERSION_RANGE(2001, 2002)
26
23
GRAPHICS_VERSION(2004)
27
-
14019882105 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
28
24
18024947630 GRAPHICS_VERSION(2001)
29
25
GRAPHICS_VERSION(2004)
30
26
MEDIA_VERSION(2000)