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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
ARM: omap2: remove unused USB code
Some musb related code is no longer in use after commit 4d62dbda8561
("ARM: OMAP3: Remove legacy support for am3517-evm") and can be removed.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-160
-2
arch/arm/mach-omap2/common.h
-2
arch/arm/mach-omap2/common.h
-87
arch/arm/mach-omap2/omap_phy_internal.c
-87
arch/arm/mach-omap2/omap_phy_internal.c
···
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#include "soc.h"
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#include "control.h"
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#include "usb.h"
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#define CONTROL_DEV_CONF 0x300
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#define PHY_PD 0x1
···
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return 0;
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}
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omap_early_initcall(omap4430_phy_power_down);
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void am35x_musb_reset(void)
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{
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u32 regval;
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/* Reset the musb interface */
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regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
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regval |= AM35XX_USBOTGSS_SW_RST;
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omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
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regval &= ~AM35XX_USBOTGSS_SW_RST;
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omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
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regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
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}
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void am35x_musb_phy_power(u8 on)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(100);
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u32 devconf2;
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if (on) {
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/*
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* Start the on-chip PHY and its PLL.
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*/
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devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
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devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
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devconf2 |= CONF2_PHY_PLLON;
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omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
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pr_info("Waiting for PHY clock good...\n");
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while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
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& CONF2_PHYCLKGD)) {
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cpu_relax();
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if (time_after(jiffies, timeout)) {
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pr_err("musb PHY clock good timed out\n");
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break;
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}
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}
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} else {
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/*
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* Power down the on-chip PHY.
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*/
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devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
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devconf2 &= ~CONF2_PHY_PLLON;
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devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN;
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omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
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}
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}
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void am35x_musb_clear_irq(void)
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{
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u32 regval;
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regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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regval |= AM35XX_USBOTGSS_INT_CLR;
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omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
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regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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}
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void am35x_set_mode(u8 musb_mode)
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{
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u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
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devconf2 &= ~CONF2_OTGMODE;
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switch (musb_mode) {
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case MUSB_HOST: /* Force VBUS valid, ID = 0 */
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devconf2 |= CONF2_FORCE_HOST;
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break;
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case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
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devconf2 |= CONF2_FORCE_DEVICE;
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break;
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case MUSB_OTG: /* Don't override the VBUS/ID comparators */
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devconf2 |= CONF2_NO_OVERRIDE;
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break;
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default:
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pr_info("Unsupported mode %u\n", musb_mode);
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}
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omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
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}
-71
arch/arm/mach-omap2/usb.h
-71
arch/arm/mach-omap2/usb.h
···
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/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/platform_data/usb-omap.h>
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/* AM35x */
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/* USB 2.0 PHY Control */
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#define CONF2_PHY_GPIOMODE (1 << 23)
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#define CONF2_OTGMODE (3 << 14)
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#define CONF2_NO_OVERRIDE (0 << 14)
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#define CONF2_FORCE_HOST (1 << 14)
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#define CONF2_FORCE_DEVICE (2 << 14)
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#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
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#define CONF2_SESENDEN (1 << 13)
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#define CONF2_VBDTCTEN (1 << 12)
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#define CONF2_REFFREQ_24MHZ (2 << 8)
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#define CONF2_REFFREQ_26MHZ (7 << 8)
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#define CONF2_REFFREQ_13MHZ (6 << 8)
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#define CONF2_REFFREQ (0xf << 8)
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#define CONF2_PHYCLKGD (1 << 7)
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#define CONF2_VBUSSENSE (1 << 6)
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#define CONF2_PHY_PLLON (1 << 5)
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#define CONF2_RESET (1 << 4)
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#define CONF2_PHYPWRDN (1 << 3)
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#define CONF2_OTGPWRDN (1 << 2)
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#define CONF2_DATPOL (1 << 1)
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/* TI81XX specific definitions */
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#define USBCTRL0 0x620
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#define USBSTAT0 0x624
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/* TI816X PHY controls bits */
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#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
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#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
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/* TI814X PHY controls bits */
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#define USBPHY_CM_PWRDN (1 << 0)
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#define USBPHY_OTG_PWRDN (1 << 1)
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#define USBPHY_CHGDET_DIS (1 << 2)
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#define USBPHY_CHGDET_RSTRT (1 << 3)
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#define USBPHY_SRCONDM (1 << 4)
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#define USBPHY_SINKONDP (1 << 5)
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#define USBPHY_CHGISINK_EN (1 << 6)
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#define USBPHY_CHGVSRC_EN (1 << 7)
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#define USBPHY_DMPULLUP (1 << 8)
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#define USBPHY_DPPULLUP (1 << 9)
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#define USBPHY_CDET_EXTCTL (1 << 10)
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#define USBPHY_GPIO_MODE (1 << 12)
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#define USBPHY_DPOPBUFCTL (1 << 13)
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#define USBPHY_DMOPBUFCTL (1 << 14)
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#define USBPHY_DPINPUT (1 << 15)
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#define USBPHY_DMINPUT (1 << 16)
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#define USBPHY_DPGPIO_PD (1 << 17)
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#define USBPHY_DMGPIO_PD (1 << 18)
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#define USBPHY_OTGVDET_EN (1 << 19)
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#define USBPHY_OTGSESSEND_EN (1 << 20)
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#define USBPHY_DATA_POLARITY (1 << 23)
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struct usbhs_phy_data {
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int port; /* 1 indexed port number */
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int reset_gpio;
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int vcc_gpio;
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bool vcc_polarity; /* 1 active high, 0 active low */
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};
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extern void usb_musb_init(struct omap_musb_board_data *board_data);
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extern void usbhs_init(struct usbhs_omap_platform_data *pdata);
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extern int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys);
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extern void am35x_musb_reset(void);
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extern void am35x_musb_phy_power(u8 on);
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extern void am35x_musb_clear_irq(void);
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extern void am35x_set_mode(u8 musb_mode);