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Merge tag 'powerpc-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
"Two fixes for fallout from the hugetlb changes we merged this cycle.

Ten other fixes, four only affect Power9, and the rest are a bit of a
mixture though nothing terrible.

Thanks to: Aneesh Kumar K.V, Anton Blanchard, Benjamin Herrenschmidt,
Dave Martin, Gavin Shan, Madhavan Srinivasan, Nicholas Piggin, Reza
Arbab"

* tag 'powerpc-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc: Ignore reserved field in DCSR and PVR reads and writes
powerpc/ptrace: Preserve previous TM fprs/vsrs on short regset write
powerpc/ptrace: Preserve previous fprs/vsrs on short regset write
powerpc/perf: Use MSR to report privilege level on P9 DD1
selftest/powerpc: Wrong PMC initialized in pmc56_overflow test
powerpc/eeh: Enable IO path on permanent error
powerpc/perf: Fix PM_BRU_CMPL event code for power9
powerpc/mm: Fix little-endian 4K hugetlb
powerpc/mm/hugetlb: Don't panic when we don't find the default huge page size
powerpc: Fix pgtable pmd cache init
powerpc/icp-opal: Fix missing KVM case and harden replay
powerpc/mm: Fix memory hotplug BUG() on radix

+132 -59
+3 -2
arch/powerpc/include/asm/book3s/64/hash-4k.h
··· 36 36 #ifdef CONFIG_HUGETLB_PAGE 37 37 static inline int hash__hugepd_ok(hugepd_t hpd) 38 38 { 39 + unsigned long hpdval = hpd_val(hpd); 39 40 /* 40 41 * if it is not a pte and have hugepd shift mask 41 42 * set, then it is a hugepd directory pointer 42 43 */ 43 - if (!(hpd.pd & _PAGE_PTE) && 44 - ((hpd.pd & HUGEPD_SHIFT_MASK) != 0)) 44 + if (!(hpdval & _PAGE_PTE) && 45 + ((hpdval & HUGEPD_SHIFT_MASK) != 0)) 45 46 return true; 46 47 return false; 47 48 }
+4
arch/powerpc/include/asm/book3s/64/hash.h
··· 201 201 unsigned long phys); 202 202 extern void hash__vmemmap_remove_mapping(unsigned long start, 203 203 unsigned long page_size); 204 + 205 + int hash__create_section_mapping(unsigned long start, unsigned long end); 206 + int hash__remove_section_mapping(unsigned long start, unsigned long end); 207 + 204 208 #endif /* !__ASSEMBLY__ */ 205 209 #endif /* __KERNEL__ */ 206 210 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */
+8 -6
arch/powerpc/include/asm/hugetlb.h
··· 21 21 * We have only four bits to encode, MMU page size 22 22 */ 23 23 BUILD_BUG_ON((MMU_PAGE_COUNT - 1) > 0xf); 24 - return __va(hpd.pd & HUGEPD_ADDR_MASK); 24 + return __va(hpd_val(hpd) & HUGEPD_ADDR_MASK); 25 25 } 26 26 27 27 static inline unsigned int hugepd_mmu_psize(hugepd_t hpd) 28 28 { 29 - return (hpd.pd & HUGEPD_SHIFT_MASK) >> 2; 29 + return (hpd_val(hpd) & HUGEPD_SHIFT_MASK) >> 2; 30 30 } 31 31 32 32 static inline unsigned int hugepd_shift(hugepd_t hpd) ··· 52 52 { 53 53 BUG_ON(!hugepd_ok(hpd)); 54 54 #ifdef CONFIG_PPC_8xx 55 - return (pte_t *)__va(hpd.pd & ~(_PMD_PAGE_MASK | _PMD_PRESENT_MASK)); 55 + return (pte_t *)__va(hpd_val(hpd) & 56 + ~(_PMD_PAGE_MASK | _PMD_PRESENT_MASK)); 56 57 #else 57 - return (pte_t *)((hpd.pd & ~HUGEPD_SHIFT_MASK) | PD_HUGE); 58 + return (pte_t *)((hpd_val(hpd) & 59 + ~HUGEPD_SHIFT_MASK) | PD_HUGE); 58 60 #endif 59 61 } 60 62 61 63 static inline unsigned int hugepd_shift(hugepd_t hpd) 62 64 { 63 65 #ifdef CONFIG_PPC_8xx 64 - return ((hpd.pd & _PMD_PAGE_MASK) >> 1) + 17; 66 + return ((hpd_val(hpd) & _PMD_PAGE_MASK) >> 1) + 17; 65 67 #else 66 - return hpd.pd & HUGEPD_SHIFT_MASK; 68 + return hpd_val(hpd) & HUGEPD_SHIFT_MASK; 67 69 #endif 68 70 } 69 71
+3 -2
arch/powerpc/include/asm/nohash/pgtable.h
··· 227 227 static inline int hugepd_ok(hugepd_t hpd) 228 228 { 229 229 #ifdef CONFIG_PPC_8xx 230 - return ((hpd.pd & 0x4) != 0); 230 + return ((hpd_val(hpd) & 0x4) != 0); 231 231 #else 232 - return (hpd.pd > 0); 232 + /* We clear the top bit to indicate hugepd */ 233 + return ((hpd_val(hpd) & PD_HUGE) == 0); 233 234 #endif 234 235 } 235 236
-3
arch/powerpc/include/asm/page.h
··· 294 294 #include <asm/pgtable-types.h> 295 295 #endif 296 296 297 - typedef struct { signed long pd; } hugepd_t; 298 297 299 298 #ifndef CONFIG_HUGETLB_PAGE 300 299 #define is_hugepd(pdep) (0) 301 300 #define pgd_huge(pgd) (0) 302 301 #endif /* CONFIG_HUGETLB_PAGE */ 303 - 304 - #define __hugepd(x) ((hugepd_t) { (x) }) 305 302 306 303 struct page; 307 304 extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
+1
arch/powerpc/include/asm/perf_event_server.h
··· 65 65 #define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */ 66 66 #define PPMU_HAS_SIER 0x00000040 /* Has SIER */ 67 67 #define PPMU_ARCH_207S 0x00000080 /* PMC is architecture v2.07S */ 68 + #define PPMU_NO_SIAR 0x00000100 /* Do not use SIAR */ 68 69 69 70 /* 70 71 * Values for flags to get_alternatives()
+8
arch/powerpc/include/asm/pgtable-be-types.h
··· 104 104 return pmd_raw(old) == prev; 105 105 } 106 106 107 + typedef struct { __be64 pdbe; } hugepd_t; 108 + #define __hugepd(x) ((hugepd_t) { cpu_to_be64(x) }) 109 + 110 + static inline unsigned long hpd_val(hugepd_t x) 111 + { 112 + return be64_to_cpu(x.pdbe); 113 + } 114 + 107 115 #endif /* _ASM_POWERPC_PGTABLE_BE_TYPES_H */
+7
arch/powerpc/include/asm/pgtable-types.h
··· 66 66 } 67 67 #endif 68 68 69 + typedef struct { unsigned long pd; } hugepd_t; 70 + #define __hugepd(x) ((hugepd_t) { (x) }) 71 + static inline unsigned long hpd_val(hugepd_t x) 72 + { 73 + return x.pd; 74 + } 75 + 69 76 #endif /* _ASM_POWERPC_PGTABLE_TYPES_H */
+5 -5
arch/powerpc/include/asm/ppc-opcode.h
··· 157 157 #define PPC_INST_MCRXR 0x7c000400 158 158 #define PPC_INST_MCRXR_MASK 0xfc0007fe 159 159 #define PPC_INST_MFSPR_PVR 0x7c1f42a6 160 - #define PPC_INST_MFSPR_PVR_MASK 0xfc1fffff 160 + #define PPC_INST_MFSPR_PVR_MASK 0xfc1ffffe 161 161 #define PPC_INST_MFTMR 0x7c0002dc 162 162 #define PPC_INST_MSGSND 0x7c00019c 163 163 #define PPC_INST_MSGCLR 0x7c0001dc ··· 174 174 #define PPC_INST_RFDI 0x4c00004e 175 175 #define PPC_INST_RFMCI 0x4c00004c 176 176 #define PPC_INST_MFSPR_DSCR 0x7c1102a6 177 - #define PPC_INST_MFSPR_DSCR_MASK 0xfc1fffff 177 + #define PPC_INST_MFSPR_DSCR_MASK 0xfc1ffffe 178 178 #define PPC_INST_MTSPR_DSCR 0x7c1103a6 179 - #define PPC_INST_MTSPR_DSCR_MASK 0xfc1fffff 179 + #define PPC_INST_MTSPR_DSCR_MASK 0xfc1ffffe 180 180 #define PPC_INST_MFSPR_DSCR_USER 0x7c0302a6 181 - #define PPC_INST_MFSPR_DSCR_USER_MASK 0xfc1fffff 181 + #define PPC_INST_MFSPR_DSCR_USER_MASK 0xfc1ffffe 182 182 #define PPC_INST_MTSPR_DSCR_USER 0x7c0303a6 183 - #define PPC_INST_MTSPR_DSCR_USER_MASK 0xfc1fffff 183 + #define PPC_INST_MTSPR_DSCR_USER_MASK 0xfc1ffffe 184 184 #define PPC_INST_MFVSRD 0x7c000066 185 185 #define PPC_INST_MTVSRD 0x7c000166 186 186 #define PPC_INST_SLBFEE 0x7c0007a7
+9 -1
arch/powerpc/kernel/eeh.c
··· 298 298 * 299 299 * For pHyp, we have to enable IO for log retrieval. Otherwise, 300 300 * 0xFF's is always returned from PCI config space. 301 + * 302 + * When the @severity is EEH_LOG_PERM, the PE is going to be 303 + * removed. Prior to that, the drivers for devices included in 304 + * the PE will be closed. The drivers rely on working IO path 305 + * to bring the devices to quiet state. Otherwise, PCI traffic 306 + * from those devices after they are removed is like to cause 307 + * another unexpected EEH error. 301 308 */ 302 309 if (!(pe->type & EEH_PE_PHB)) { 303 - if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG)) 310 + if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG) || 311 + severity == EEH_LOG_PERM) 304 312 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); 305 313 306 314 /*
+14
arch/powerpc/kernel/ptrace.c
··· 463 463 464 464 flush_fp_to_thread(target); 465 465 466 + for (i = 0; i < 32 ; i++) 467 + buf[i] = target->thread.TS_FPR(i); 468 + buf[32] = target->thread.fp_state.fpscr; 469 + 466 470 /* copy to local buffer then write that out */ 467 471 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 468 472 if (i) ··· 675 671 flush_fp_to_thread(target); 676 672 flush_altivec_to_thread(target); 677 673 flush_vsx_to_thread(target); 674 + 675 + for (i = 0; i < 32 ; i++) 676 + buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; 678 677 679 678 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 680 679 buf, 0, 32 * sizeof(double)); ··· 1026 1019 flush_fp_to_thread(target); 1027 1020 flush_altivec_to_thread(target); 1028 1021 1022 + for (i = 0; i < 32; i++) 1023 + buf[i] = target->thread.TS_CKFPR(i); 1024 + buf[32] = target->thread.ckfp_state.fpscr; 1025 + 1029 1026 /* copy to local buffer then write that out */ 1030 1027 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 1031 1028 if (i) ··· 1293 1282 flush_fp_to_thread(target); 1294 1283 flush_altivec_to_thread(target); 1295 1284 flush_vsx_to_thread(target); 1285 + 1286 + for (i = 0; i < 32 ; i++) 1287 + buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET]; 1296 1288 1297 1289 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 1298 1290 buf, 0, 32 * sizeof(double));
+2 -2
arch/powerpc/mm/hash_utils_64.c
··· 747 747 } 748 748 749 749 #ifdef CONFIG_MEMORY_HOTPLUG 750 - int create_section_mapping(unsigned long start, unsigned long end) 750 + int hash__create_section_mapping(unsigned long start, unsigned long end) 751 751 { 752 752 int rc = htab_bolt_mapping(start, end, __pa(start), 753 753 pgprot_val(PAGE_KERNEL), mmu_linear_psize, ··· 761 761 return rc; 762 762 } 763 763 764 - int remove_section_mapping(unsigned long start, unsigned long end) 764 + int hash__remove_section_mapping(unsigned long start, unsigned long end) 765 765 { 766 766 int rc = htab_remove_mapping(start, end, mmu_linear_psize, 767 767 mmu_kernel_ssize);
+4 -1
arch/powerpc/mm/hugetlbpage-hash64.c
··· 125 125 int hugepd_ok(hugepd_t hpd) 126 126 { 127 127 bool is_hugepd; 128 + unsigned long hpdval; 129 + 130 + hpdval = hpd_val(hpd); 128 131 129 132 /* 130 133 * We should not find this format in page directory, warn otherwise. 131 134 */ 132 - is_hugepd = (((hpd.pd & 0x3) == 0x0) && ((hpd.pd & HUGEPD_SHIFT_MASK) != 0)); 135 + is_hugepd = (((hpdval & 0x3) == 0x0) && ((hpdval & HUGEPD_SHIFT_MASK) != 0)); 133 136 WARN(is_hugepd, "Found wrong page directory format\n"); 134 137 return 0; 135 138 }
+12 -19
arch/powerpc/mm/hugetlbpage.c
··· 53 53 static unsigned nr_gpages; 54 54 #endif 55 55 56 - #define hugepd_none(hpd) ((hpd).pd == 0) 56 + #define hugepd_none(hpd) (hpd_val(hpd) == 0) 57 57 58 58 pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr) 59 59 { ··· 103 103 for (i = 0; i < num_hugepd; i++, hpdp++) { 104 104 if (unlikely(!hugepd_none(*hpdp))) 105 105 break; 106 - else 106 + else { 107 107 #ifdef CONFIG_PPC_BOOK3S_64 108 - hpdp->pd = __pa(new) | 109 - (shift_to_mmu_psize(pshift) << 2); 108 + *hpdp = __hugepd(__pa(new) | 109 + (shift_to_mmu_psize(pshift) << 2)); 110 110 #elif defined(CONFIG_PPC_8xx) 111 - hpdp->pd = __pa(new) | 112 - (pshift == PAGE_SHIFT_8M ? _PMD_PAGE_8M : 113 - _PMD_PAGE_512K) | 114 - _PMD_PRESENT; 111 + *hpdp = __hugepd(__pa(new) | 112 + (pshift == PAGE_SHIFT_8M ? _PMD_PAGE_8M : 113 + _PMD_PAGE_512K) | _PMD_PRESENT); 115 114 #else 116 115 /* We use the old format for PPC_FSL_BOOK3E */ 117 - hpdp->pd = ((unsigned long)new & ~PD_HUGE) | pshift; 116 + *hpdp = __hugepd(((unsigned long)new & ~PD_HUGE) | pshift); 118 117 #endif 118 + } 119 119 } 120 120 /* If we bailed from the for loop early, an error occurred, clean up */ 121 121 if (i < num_hugepd) { 122 122 for (i = i - 1 ; i >= 0; i--, hpdp--) 123 - hpdp->pd = 0; 123 + *hpdp = __hugepd(0); 124 124 kmem_cache_free(cachep, new); 125 125 } 126 126 spin_unlock(&mm->page_table_lock); ··· 454 454 return; 455 455 456 456 for (i = 0; i < num_hugepd; i++, hpdp++) 457 - hpdp->pd = 0; 457 + *hpdp = __hugepd(0); 458 458 459 459 if (shift >= pdshift) 460 460 hugepd_free(tlb, hugepte); ··· 810 810 * if we have pdshift and shift value same, we don't 811 811 * use pgt cache for hugepd. 812 812 */ 813 - if (pdshift > shift) { 813 + if (pdshift > shift) 814 814 pgtable_cache_add(pdshift - shift, NULL); 815 - if (!PGT_CACHE(pdshift - shift)) 816 - panic("hugetlbpage_init(): could not create " 817 - "pgtable cache for %d bit pagesize\n", shift); 818 - } 819 815 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx) 820 816 else if (!hugepte_cache) { 821 817 /* ··· 848 852 else if (mmu_psize_defs[MMU_PAGE_2M].shift) 849 853 HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_2M].shift; 850 854 #endif 851 - else 852 - panic("%s: Unable to set default huge page size\n", __func__); 853 - 854 855 return 0; 855 856 } 856 857
+5 -8
arch/powerpc/mm/init-common.c
··· 78 78 align = max_t(unsigned long, align, minalign); 79 79 name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift); 80 80 new = kmem_cache_create(name, table_size, align, 0, ctor); 81 + if (!new) 82 + panic("Could not allocate pgtable cache for order %d", shift); 83 + 81 84 kfree(name); 82 85 pgtable_cache[shift - 1] = new; 86 + 83 87 pr_debug("Allocated pgtable cache for order %d\n", shift); 84 88 } 85 89 ··· 92 88 { 93 89 pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor); 94 90 95 - if (PMD_INDEX_SIZE && !PGT_CACHE(PMD_INDEX_SIZE)) 91 + if (PMD_CACHE_INDEX && !PGT_CACHE(PMD_CACHE_INDEX)) 96 92 pgtable_cache_add(PMD_CACHE_INDEX, pmd_ctor); 97 93 /* 98 94 * In all current configs, when the PUD index exists it's the ··· 101 97 */ 102 98 if (PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE)) 103 99 pgtable_cache_add(PUD_INDEX_SIZE, pud_ctor); 104 - 105 - if (!PGT_CACHE(PGD_INDEX_SIZE)) 106 - panic("Couldn't allocate pgd cache"); 107 - if (PMD_INDEX_SIZE && !PGT_CACHE(PMD_INDEX_SIZE)) 108 - panic("Couldn't allocate pmd pgtable caches"); 109 - if (PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE)) 110 - panic("Couldn't allocate pud pgtable caches"); 111 100 }
+18
arch/powerpc/mm/pgtable-book3s64.c
··· 126 126 else if (mmu_hash_ops.hpte_clear_all) 127 127 mmu_hash_ops.hpte_clear_all(); 128 128 } 129 + 130 + #ifdef CONFIG_MEMORY_HOTPLUG 131 + int create_section_mapping(unsigned long start, unsigned long end) 132 + { 133 + if (radix_enabled()) 134 + return -ENODEV; 135 + 136 + return hash__create_section_mapping(start, end); 137 + } 138 + 139 + int remove_section_mapping(unsigned long start, unsigned long end) 140 + { 141 + if (radix_enabled()) 142 + return -ENODEV; 143 + 144 + return hash__remove_section_mapping(start, end); 145 + } 146 + #endif /* CONFIG_MEMORY_HOTPLUG */
+2
arch/powerpc/perf/core-book3s.c
··· 295 295 */ 296 296 if (TRAP(regs) != 0xf00) 297 297 use_siar = 0; 298 + else if ((ppmu->flags & PPMU_NO_SIAR)) 299 + use_siar = 0; 298 300 else if (marked) 299 301 use_siar = 1; 300 302 else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING))
+1 -1
arch/powerpc/perf/power9-events-list.h
··· 16 16 EVENT(PM_ICT_NOSLOT_CYC, 0x100f8) 17 17 EVENT(PM_CMPLU_STALL, 0x1e054) 18 18 EVENT(PM_INST_CMPL, 0x00002) 19 - EVENT(PM_BRU_CMPL, 0x40060) 19 + EVENT(PM_BRU_CMPL, 0x10012) 20 20 EVENT(PM_BR_MPRED_CMPL, 0x400f6) 21 21 22 22 /* All L1 D cache load references counted at finish, gated by reject */
+1 -1
arch/powerpc/perf/power9-pmu.c
··· 384 384 .bhrb_filter_map = power9_bhrb_filter_map, 385 385 .get_constraint = isa207_get_constraint, 386 386 .disable_pmc = isa207_disable_pmc, 387 - .flags = PPMU_HAS_SIER | PPMU_ARCH_207S, 387 + .flags = PPMU_NO_SIAR | PPMU_ARCH_207S, 388 388 .n_generic = ARRAY_SIZE(power9_generic_events), 389 389 .generic_events = power9_generic_events, 390 390 .cache_events = &power9_cache_events,
+24 -7
arch/powerpc/sysdev/xics/icp-opal.c
··· 20 20 #include <asm/xics.h> 21 21 #include <asm/io.h> 22 22 #include <asm/opal.h> 23 + #include <asm/kvm_ppc.h> 23 24 24 25 static void icp_opal_teardown_cpu(void) 25 26 { ··· 40 39 * Should we be flagging idle loop instead? 41 40 * Or creating some task to be scheduled? 42 41 */ 43 - opal_int_eoi((0x00 << 24) | XICS_IPI); 42 + if (opal_int_eoi((0x00 << 24) | XICS_IPI) > 0) 43 + force_external_irq_replay(); 44 + } 45 + 46 + static unsigned int icp_opal_get_xirr(void) 47 + { 48 + unsigned int kvm_xirr; 49 + __be32 hw_xirr; 50 + int64_t rc; 51 + 52 + /* Handle an interrupt latched by KVM first */ 53 + kvm_xirr = kvmppc_get_xics_latch(); 54 + if (kvm_xirr) 55 + return kvm_xirr; 56 + 57 + /* Then ask OPAL */ 58 + rc = opal_int_get_xirr(&hw_xirr, false); 59 + if (rc < 0) 60 + return 0; 61 + return be32_to_cpu(hw_xirr); 44 62 } 45 63 46 64 static unsigned int icp_opal_get_irq(void) ··· 67 47 unsigned int xirr; 68 48 unsigned int vec; 69 49 unsigned int irq; 70 - int64_t rc; 71 50 72 - rc = opal_int_get_xirr(&xirr, false); 73 - if (rc < 0) 74 - return 0; 75 - xirr = be32_to_cpu(xirr); 51 + xirr = icp_opal_get_xirr(); 76 52 vec = xirr & 0x00ffffff; 77 53 if (vec == XICS_IRQ_SPURIOUS) 78 54 return 0; ··· 83 67 xics_mask_unknown_vec(vec); 84 68 85 69 /* We might learn about it later, so EOI it */ 86 - opal_int_eoi(xirr); 70 + if (opal_int_eoi(xirr) > 0) 71 + force_external_irq_replay(); 87 72 88 73 return 0; 89 74 }
+1 -1
tools/testing/selftests/powerpc/pmu/ebb/pmc56_overflow_test.c
··· 66 66 67 67 FAIL_IF(ebb_event_enable(&event)); 68 68 69 - mtspr(SPRN_PMC1, pmc_sample_period(sample_period)); 69 + mtspr(SPRN_PMC2, pmc_sample_period(sample_period)); 70 70 mtspr(SPRN_PMC5, 0); 71 71 mtspr(SPRN_PMC6, 0); 72 72