Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'pinctrl-v6.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
- Compilation fix for Sunplus sp7021
- Add some missing headers after a cleanup to the Nomadik driver
- Fix pull type and mux routes on Rockchip RK3568
* tag 'pinctrl-v6.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: rockchip: fix mux route data for rk3568
pinctrl: rockchip: fix reading pull type on rk3568
pinctrl: nomadik: Add missing header(s)
pinctrl: sp7021: fix unused function warning
+79
-50
+2
-1
drivers/pinctrl/nomadik/pinctrl-ab8500.c
+2
-1
drivers/pinctrl/nomadik/pinctrl-ab8500.c
+2
-1
drivers/pinctrl/nomadik/pinctrl-ab8505.c
+2
-1
drivers/pinctrl/nomadik/pinctrl-ab8505.c
+20
-16
drivers/pinctrl/nomadik/pinctrl-abx500.c
+20
-16
drivers/pinctrl/nomadik/pinctrl-abx500.c
···
6
6
*
7
7
* Driver allows to use AxB5xx unused pins to be used as GPIO
8
8
*/
9
-
#include <linux/kernel.h>
10
-
#include <linux/types.h>
11
-
#include <linux/slab.h>
12
-
#include <linux/init.h>
9
+
#include <linux/bitops.h>
13
10
#include <linux/err.h>
11
+
#include <linux/gpio/driver.h>
12
+
#include <linux/init.h>
13
+
#include <linux/interrupt.h>
14
+
#include <linux/irq.h>
15
+
#include <linux/irqdomain.h>
16
+
#include <linux/kernel.h>
14
17
#include <linux/of.h>
15
18
#include <linux/of_device.h>
16
19
#include <linux/platform_device.h>
17
-
#include <linux/gpio/driver.h>
18
-
#include <linux/irq.h>
19
-
#include <linux/irqdomain.h>
20
-
#include <linux/interrupt.h>
21
-
#include <linux/bitops.h>
20
+
#include <linux/seq_file.h>
21
+
#include <linux/slab.h>
22
+
#include <linux/types.h>
23
+
22
24
#include <linux/mfd/abx500.h>
23
25
#include <linux/mfd/abx500/ab8500.h>
24
-
#include <linux/pinctrl/pinctrl.h>
25
-
#include <linux/pinctrl/consumer.h>
26
-
#include <linux/pinctrl/pinmux.h>
27
-
#include <linux/pinctrl/pinconf.h>
28
-
#include <linux/pinctrl/pinconf-generic.h>
29
-
#include <linux/pinctrl/machine.h>
30
26
31
-
#include "pinctrl-abx500.h"
27
+
#include <linux/pinctrl/consumer.h>
28
+
#include <linux/pinctrl/machine.h>
29
+
#include <linux/pinctrl/pinconf-generic.h>
30
+
#include <linux/pinctrl/pinconf.h>
31
+
#include <linux/pinctrl/pinctrl.h>
32
+
#include <linux/pinctrl/pinmux.h>
33
+
32
34
#include "../core.h"
33
35
#include "../pinconf.h"
34
36
#include "../pinctrl-utils.h"
37
+
38
+
#include "pinctrl-abx500.h"
35
39
36
40
/*
37
41
* GPIO registers offset
+4
drivers/pinctrl/nomadik/pinctrl-abx500.h
+4
drivers/pinctrl/nomadik/pinctrl-abx500.h
+3
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c
+3
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c
+3
drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c
+3
drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c
+18
-16
drivers/pinctrl/nomadik/pinctrl-nomadik.c
+18
-16
drivers/pinctrl/nomadik/pinctrl-nomadik.c
···
7
7
* Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
8
8
* Copyright (C) 2011-2013 Linus Walleij <linus.walleij@linaro.org>
9
9
*/
10
-
#include <linux/kernel.h>
11
-
#include <linux/init.h>
12
-
#include <linux/device.h>
13
-
#include <linux/platform_device.h>
14
-
#include <linux/io.h>
10
+
#include <linux/bitops.h>
15
11
#include <linux/clk.h>
12
+
#include <linux/device.h>
16
13
#include <linux/err.h>
17
14
#include <linux/gpio/driver.h>
18
-
#include <linux/spinlock.h>
15
+
#include <linux/init.h>
19
16
#include <linux/interrupt.h>
20
-
#include <linux/slab.h>
21
-
#include <linux/of_device.h>
17
+
#include <linux/io.h>
18
+
#include <linux/kernel.h>
22
19
#include <linux/of_address.h>
23
-
#include <linux/bitops.h>
24
-
#include <linux/pinctrl/machine.h>
25
-
#include <linux/pinctrl/pinctrl.h>
26
-
#include <linux/pinctrl/pinmux.h>
27
-
#include <linux/pinctrl/pinconf.h>
20
+
#include <linux/of_device.h>
21
+
#include <linux/platform_device.h>
22
+
#include <linux/seq_file.h>
23
+
#include <linux/slab.h>
24
+
#include <linux/spinlock.h>
25
+
28
26
/* Since we request GPIOs from ourself */
29
27
#include <linux/pinctrl/consumer.h>
30
-
#include "pinctrl-nomadik.h"
28
+
#include <linux/pinctrl/machine.h>
29
+
#include <linux/pinctrl/pinconf.h>
30
+
#include <linux/pinctrl/pinctrl.h>
31
+
#include <linux/pinctrl/pinmux.h>
32
+
31
33
#include "../core.h"
32
34
#include "../pinctrl-utils.h"
35
+
36
+
#include "pinctrl-nomadik.h"
33
37
34
38
/*
35
39
* The GPIO module in the Nomadik family of Systems-on-Chip is an
···
910
906
911
907
return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
912
908
}
913
-
914
-
#include <linux/seq_file.h>
915
909
916
910
static void nmk_gpio_dbg_show_one(struct seq_file *s,
917
911
struct pinctrl_dev *pctldev, struct gpio_chip *chip,
+5
drivers/pinctrl/nomadik/pinctrl-nomadik.h
+5
drivers/pinctrl/nomadik/pinctrl-nomadik.h
+20
-11
drivers/pinctrl/pinctrl-rockchip.c
+20
-11
drivers/pinctrl/pinctrl-rockchip.c
···
926
926
RK_MUXROUTE_PMU(0, RK_PB5, 4, 0x0110, WRITE_MASK_VAL(3, 2, 1)), /* PWM1 IO mux M1 */
927
927
RK_MUXROUTE_PMU(0, RK_PC1, 1, 0x0110, WRITE_MASK_VAL(5, 4, 0)), /* PWM2 IO mux M0 */
928
928
RK_MUXROUTE_PMU(0, RK_PB6, 4, 0x0110, WRITE_MASK_VAL(5, 4, 1)), /* PWM2 IO mux M1 */
929
-
RK_MUXROUTE_PMU(0, RK_PB3, 2, 0x0300, WRITE_MASK_VAL(0, 0, 0)), /* CAN0 IO mux M0 */
929
+
RK_MUXROUTE_GRF(0, RK_PB3, 2, 0x0300, WRITE_MASK_VAL(0, 0, 0)), /* CAN0 IO mux M0 */
930
930
RK_MUXROUTE_GRF(2, RK_PA1, 4, 0x0300, WRITE_MASK_VAL(0, 0, 1)), /* CAN0 IO mux M1 */
931
931
RK_MUXROUTE_GRF(1, RK_PA1, 3, 0x0300, WRITE_MASK_VAL(2, 2, 0)), /* CAN1 IO mux M0 */
932
932
RK_MUXROUTE_GRF(4, RK_PC3, 3, 0x0300, WRITE_MASK_VAL(2, 2, 1)), /* CAN1 IO mux M1 */
933
933
RK_MUXROUTE_GRF(4, RK_PB5, 3, 0x0300, WRITE_MASK_VAL(4, 4, 0)), /* CAN2 IO mux M0 */
934
934
RK_MUXROUTE_GRF(2, RK_PB2, 4, 0x0300, WRITE_MASK_VAL(4, 4, 1)), /* CAN2 IO mux M1 */
935
935
RK_MUXROUTE_GRF(4, RK_PC4, 1, 0x0300, WRITE_MASK_VAL(6, 6, 0)), /* HPDIN IO mux M0 */
936
-
RK_MUXROUTE_PMU(0, RK_PC2, 2, 0x0300, WRITE_MASK_VAL(6, 6, 1)), /* HPDIN IO mux M1 */
936
+
RK_MUXROUTE_GRF(0, RK_PC2, 2, 0x0300, WRITE_MASK_VAL(6, 6, 1)), /* HPDIN IO mux M1 */
937
937
RK_MUXROUTE_GRF(3, RK_PB1, 3, 0x0300, WRITE_MASK_VAL(8, 8, 0)), /* GMAC1 IO mux M0 */
938
938
RK_MUXROUTE_GRF(4, RK_PA7, 3, 0x0300, WRITE_MASK_VAL(8, 8, 1)), /* GMAC1 IO mux M1 */
939
939
RK_MUXROUTE_GRF(4, RK_PD1, 1, 0x0300, WRITE_MASK_VAL(10, 10, 0)), /* HDMITX IO mux M0 */
940
-
RK_MUXROUTE_PMU(0, RK_PC7, 1, 0x0300, WRITE_MASK_VAL(10, 10, 1)), /* HDMITX IO mux M1 */
941
-
RK_MUXROUTE_PMU(0, RK_PB6, 1, 0x0300, WRITE_MASK_VAL(14, 14, 0)), /* I2C2 IO mux M0 */
940
+
RK_MUXROUTE_GRF(0, RK_PC7, 1, 0x0300, WRITE_MASK_VAL(10, 10, 1)), /* HDMITX IO mux M1 */
941
+
RK_MUXROUTE_GRF(0, RK_PB6, 1, 0x0300, WRITE_MASK_VAL(14, 14, 0)), /* I2C2 IO mux M0 */
942
942
RK_MUXROUTE_GRF(4, RK_PB4, 1, 0x0300, WRITE_MASK_VAL(14, 14, 1)), /* I2C2 IO mux M1 */
943
943
RK_MUXROUTE_GRF(1, RK_PA0, 1, 0x0304, WRITE_MASK_VAL(0, 0, 0)), /* I2C3 IO mux M0 */
944
944
RK_MUXROUTE_GRF(3, RK_PB6, 4, 0x0304, WRITE_MASK_VAL(0, 0, 1)), /* I2C3 IO mux M1 */
···
964
964
RK_MUXROUTE_GRF(4, RK_PC3, 1, 0x0308, WRITE_MASK_VAL(12, 12, 1)), /* PWM15 IO mux M1 */
965
965
RK_MUXROUTE_GRF(3, RK_PD2, 3, 0x0308, WRITE_MASK_VAL(14, 14, 0)), /* SDMMC2 IO mux M0 */
966
966
RK_MUXROUTE_GRF(3, RK_PA5, 5, 0x0308, WRITE_MASK_VAL(14, 14, 1)), /* SDMMC2 IO mux M1 */
967
-
RK_MUXROUTE_PMU(0, RK_PB5, 2, 0x030c, WRITE_MASK_VAL(0, 0, 0)), /* SPI0 IO mux M0 */
967
+
RK_MUXROUTE_GRF(0, RK_PB5, 2, 0x030c, WRITE_MASK_VAL(0, 0, 0)), /* SPI0 IO mux M0 */
968
968
RK_MUXROUTE_GRF(2, RK_PD3, 3, 0x030c, WRITE_MASK_VAL(0, 0, 1)), /* SPI0 IO mux M1 */
969
969
RK_MUXROUTE_GRF(2, RK_PB5, 3, 0x030c, WRITE_MASK_VAL(2, 2, 0)), /* SPI1 IO mux M0 */
970
970
RK_MUXROUTE_GRF(3, RK_PC3, 3, 0x030c, WRITE_MASK_VAL(2, 2, 1)), /* SPI1 IO mux M1 */
···
973
973
RK_MUXROUTE_GRF(4, RK_PB3, 4, 0x030c, WRITE_MASK_VAL(6, 6, 0)), /* SPI3 IO mux M0 */
974
974
RK_MUXROUTE_GRF(4, RK_PC2, 2, 0x030c, WRITE_MASK_VAL(6, 6, 1)), /* SPI3 IO mux M1 */
975
975
RK_MUXROUTE_GRF(2, RK_PB4, 2, 0x030c, WRITE_MASK_VAL(8, 8, 0)), /* UART1 IO mux M0 */
976
-
RK_MUXROUTE_PMU(0, RK_PD1, 1, 0x030c, WRITE_MASK_VAL(8, 8, 1)), /* UART1 IO mux M1 */
977
-
RK_MUXROUTE_PMU(0, RK_PD1, 1, 0x030c, WRITE_MASK_VAL(10, 10, 0)), /* UART2 IO mux M0 */
976
+
RK_MUXROUTE_GRF(3, RK_PD6, 4, 0x030c, WRITE_MASK_VAL(8, 8, 1)), /* UART1 IO mux M1 */
977
+
RK_MUXROUTE_GRF(0, RK_PD1, 1, 0x030c, WRITE_MASK_VAL(10, 10, 0)), /* UART2 IO mux M0 */
978
978
RK_MUXROUTE_GRF(1, RK_PD5, 2, 0x030c, WRITE_MASK_VAL(10, 10, 1)), /* UART2 IO mux M1 */
979
979
RK_MUXROUTE_GRF(1, RK_PA1, 2, 0x030c, WRITE_MASK_VAL(12, 12, 0)), /* UART3 IO mux M0 */
980
980
RK_MUXROUTE_GRF(3, RK_PB7, 4, 0x030c, WRITE_MASK_VAL(12, 12, 1)), /* UART3 IO mux M1 */
···
1004
1004
RK_MUXROUTE_GRF(3, RK_PD6, 5, 0x0314, WRITE_MASK_VAL(1, 0, 1)), /* PDM IO mux M1 */
1005
1005
RK_MUXROUTE_GRF(4, RK_PA0, 4, 0x0314, WRITE_MASK_VAL(1, 0, 1)), /* PDM IO mux M1 */
1006
1006
RK_MUXROUTE_GRF(3, RK_PC4, 5, 0x0314, WRITE_MASK_VAL(1, 0, 2)), /* PDM IO mux M2 */
1007
-
RK_MUXROUTE_PMU(0, RK_PA5, 3, 0x0314, WRITE_MASK_VAL(3, 2, 0)), /* PCIE20 IO mux M0 */
1007
+
RK_MUXROUTE_GRF(0, RK_PA5, 3, 0x0314, WRITE_MASK_VAL(3, 2, 0)), /* PCIE20 IO mux M0 */
1008
1008
RK_MUXROUTE_GRF(2, RK_PD0, 4, 0x0314, WRITE_MASK_VAL(3, 2, 1)), /* PCIE20 IO mux M1 */
1009
1009
RK_MUXROUTE_GRF(1, RK_PB0, 4, 0x0314, WRITE_MASK_VAL(3, 2, 2)), /* PCIE20 IO mux M2 */
1010
-
RK_MUXROUTE_PMU(0, RK_PA4, 3, 0x0314, WRITE_MASK_VAL(5, 4, 0)), /* PCIE30X1 IO mux M0 */
1010
+
RK_MUXROUTE_GRF(0, RK_PA4, 3, 0x0314, WRITE_MASK_VAL(5, 4, 0)), /* PCIE30X1 IO mux M0 */
1011
1011
RK_MUXROUTE_GRF(2, RK_PD2, 4, 0x0314, WRITE_MASK_VAL(5, 4, 1)), /* PCIE30X1 IO mux M1 */
1012
1012
RK_MUXROUTE_GRF(1, RK_PA5, 4, 0x0314, WRITE_MASK_VAL(5, 4, 2)), /* PCIE30X1 IO mux M2 */
1013
-
RK_MUXROUTE_PMU(0, RK_PA6, 2, 0x0314, WRITE_MASK_VAL(7, 6, 0)), /* PCIE30X2 IO mux M0 */
1013
+
RK_MUXROUTE_GRF(0, RK_PA6, 2, 0x0314, WRITE_MASK_VAL(7, 6, 0)), /* PCIE30X2 IO mux M0 */
1014
1014
RK_MUXROUTE_GRF(2, RK_PD4, 4, 0x0314, WRITE_MASK_VAL(7, 6, 1)), /* PCIE30X2 IO mux M1 */
1015
1015
RK_MUXROUTE_GRF(4, RK_PC2, 4, 0x0314, WRITE_MASK_VAL(7, 6, 2)), /* PCIE30X2 IO mux M2 */
1016
1016
};
···
2436
2436
case RK3308:
2437
2437
case RK3368:
2438
2438
case RK3399:
2439
+
case RK3568:
2439
2440
case RK3588:
2440
2441
pull_type = bank->pull_type[pin_num / 8];
2441
2442
data >>= bit;
2442
2443
data &= (1 << RK3188_PULL_BITS_PER_PIN) - 1;
2444
+
/*
2445
+
* In the TRM, pull-up being 1 for everything except the GPIO0_D3-D6,
2446
+
* where that pull up value becomes 3.
2447
+
*/
2448
+
if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
2449
+
if (data == 3)
2450
+
data = 1;
2451
+
}
2443
2452
2444
2453
return rockchip_pull_list[pull_type][data];
2445
2454
default:
···
2506
2497
}
2507
2498
}
2508
2499
/*
2509
-
* In the TRM, pull-up being 1 for everything except the GPIO0_D0-D6,
2500
+
* In the TRM, pull-up being 1 for everything except the GPIO0_D3-D6,
2510
2501
* where that pull up value becomes 3.
2511
2502
*/
2512
2503
if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
+2
-5
drivers/pinctrl/sunplus/sppctl.c
+2
-5
drivers/pinctrl/sunplus/sppctl.c
···
499
499
return 0;
500
500
}
501
501
502
-
#ifdef CONFIG_DEBUG_FS
503
502
static void sppctl_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
504
503
{
505
504
const char *label;
···
520
521
seq_puts(s, "\n");
521
522
}
522
523
}
523
-
#endif
524
524
525
525
static int sppctl_gpio_new(struct platform_device *pdev, struct sppctl_pdata *pctl)
526
526
{
···
548
550
gchip->get = sppctl_gpio_get;
549
551
gchip->set = sppctl_gpio_set;
550
552
gchip->set_config = sppctl_gpio_set_config;
551
-
#ifdef CONFIG_DEBUG_FS
552
-
gchip->dbg_show = sppctl_gpio_dbg_show;
553
-
#endif
553
+
gchip->dbg_show = IS_ENABLED(CONFIG_DEBUG_FS) ?
554
+
sppctl_gpio_dbg_show : NULL;
554
555
gchip->base = -1;
555
556
gchip->ngpio = sppctl_gpio_list_sz;
556
557
gchip->names = sppctl_gpio_list_s;