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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
iio: mpl3115: add support for DRDY interrupt
MPL3115 sensor features a "data ready" interrupt which indicates the
presence of new measurements.
Signed-off-by: Antoni Pokusinski <apokusinski01@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
Antoni Pokusinski
and committed by
Jonathan Cameron
8464f610
b4105b20
+175
-8
+175
-8
drivers/iio/pressure/mpl3115.c
+175
-8
drivers/iio/pressure/mpl3115.c
···
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* (7-bit I2C slave address 0x60)
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*
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* TODO: FIFO buffer, altimeter mode, oversampling, continuous mode,
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* interrupts, user offset correction, raw mode
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* user offset correction, raw mode
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*/
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-
#include <linux/module.h>
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#include <linux/cleanup.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/delay.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/trigger.h>
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#define MPL3115_STATUS 0x00
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#define MPL3115_OUT_PRESS 0x01 /* MSB first, 20 bit */
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#define MPL3115_OUT_TEMP 0x04 /* MSB first, 12 bit */
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#define MPL3115_WHO_AM_I 0x0c
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#define MPL3115_INT_SOURCE 0x12
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#define MPL3115_PT_DATA_CFG 0x13
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#define MPL3115_CTRL_REG1 0x26
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#define MPL3115_CTRL_REG3 0x28
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#define MPL3115_CTRL_REG4 0x29
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#define MPL3115_CTRL_REG5 0x2a
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#define MPL3115_DEVICE_ID 0xc4
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#define MPL3115_STATUS_PRESS_RDY BIT(2)
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#define MPL3115_STATUS_TEMP_RDY BIT(1)
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#define MPL3115_INT_SRC_DRDY BIT(7)
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#define MPL3115_PT_DATA_EVENT_ALL GENMASK(2, 0)
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#define MPL3115_CTRL1_RESET BIT(2) /* software reset */
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#define MPL3115_CTRL1_OST BIT(1) /* initiate measurement */
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#define MPL3115_CTRL1_ACTIVE BIT(0) /* continuous measurement */
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#define MPL3115_CTRL1_OS_258MS GENMASK(5, 4) /* 64x oversampling */
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#define MPL3115_CTRL3_IPOL1 BIT(5)
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#define MPL3115_CTRL3_IPOL2 BIT(1)
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#define MPL3115_CTRL4_INT_EN_DRDY BIT(7)
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#define MPL3115_CTRL5_INT_CFG_DRDY BIT(7)
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struct mpl3115_data {
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struct i2c_client *client;
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struct iio_trigger *drdy_trig;
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struct mutex lock;
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u8 ctrl_reg1;
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};
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enum mpl3115_irq_pin {
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MPL3115_IRQ_INT1,
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MPL3115_IRQ_INT2,
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};
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static int mpl3115_request(struct mpl3115_data *data)
···
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struct mpl3115_data *data = iio_priv(indio_dev);
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int ret, pos = 0;
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ret = mpl3115_request(data);
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if (ret < 0)
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return ret;
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if (!(data->ctrl_reg1 & MPL3115_CTRL1_ACTIVE)) {
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ret = mpl3115_request(data);
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if (ret < 0)
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return ret;
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}
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if (test_bit(0, indio_dev->active_scan_mask)) {
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ret = i2c_smbus_read_i2c_block_data(data->client,
···
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IIO_CHAN_SOFT_TIMESTAMP(2),
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};
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static irqreturn_t mpl3115_interrupt_handler(int irq, void *private)
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{
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struct iio_dev *indio_dev = private;
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struct mpl3115_data *data = iio_priv(indio_dev);
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int ret;
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ret = i2c_smbus_read_byte_data(data->client, MPL3115_INT_SOURCE);
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if (ret < 0)
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return IRQ_HANDLED;
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if (!(ret & MPL3115_INT_SRC_DRDY))
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return IRQ_NONE;
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iio_trigger_poll_nested(data->drdy_trig);
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return IRQ_HANDLED;
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}
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static int mpl3115_config_interrupt(struct mpl3115_data *data,
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u8 ctrl_reg1, u8 ctrl_reg4)
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{
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int ret;
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ret = i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1,
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ctrl_reg1);
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if (ret < 0)
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return ret;
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ret = i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG4,
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ctrl_reg4);
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if (ret < 0)
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goto reg1_cleanup;
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data->ctrl_reg1 = ctrl_reg1;
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return 0;
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reg1_cleanup:
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i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG1,
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data->ctrl_reg1);
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return ret;
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}
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static int mpl3115_set_trigger_state(struct iio_trigger *trig, bool state)
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{
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struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
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struct mpl3115_data *data = iio_priv(indio_dev);
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u8 ctrl_reg1 = data->ctrl_reg1;
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u8 ctrl_reg4 = state ? MPL3115_CTRL4_INT_EN_DRDY : 0;
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if (state)
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ctrl_reg1 |= MPL3115_CTRL1_ACTIVE;
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else
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ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
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guard(mutex)(&data->lock);
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return mpl3115_config_interrupt(data, ctrl_reg1, ctrl_reg4);
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}
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static const struct iio_trigger_ops mpl3115_trigger_ops = {
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.set_trigger_state = mpl3115_set_trigger_state,
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};
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static const struct iio_info mpl3115_info = {
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.read_raw = &mpl3115_read_raw,
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};
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static int mpl3115_trigger_probe(struct mpl3115_data *data,
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struct iio_dev *indio_dev)
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{
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struct fwnode_handle *fwnode = dev_fwnode(&data->client->dev);
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int ret, irq, irq_type, irq_pin = MPL3115_IRQ_INT1;
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irq = fwnode_irq_get_byname(fwnode, "INT1");
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if (irq < 0) {
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irq = fwnode_irq_get_byname(fwnode, "INT2");
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if (irq < 0)
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return 0;
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irq_pin = MPL3115_IRQ_INT2;
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}
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irq_type = irq_get_trigger_type(irq);
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if (irq_type != IRQF_TRIGGER_RISING && irq_type != IRQF_TRIGGER_FALLING)
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return -EINVAL;
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ret = i2c_smbus_write_byte_data(data->client, MPL3115_PT_DATA_CFG,
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MPL3115_PT_DATA_EVENT_ALL);
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if (ret < 0)
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return ret;
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if (irq_pin == MPL3115_IRQ_INT1) {
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ret = i2c_smbus_write_byte_data(data->client,
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MPL3115_CTRL_REG5,
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MPL3115_CTRL5_INT_CFG_DRDY);
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if (ret)
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return ret;
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if (irq_type == IRQF_TRIGGER_RISING) {
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ret = i2c_smbus_write_byte_data(data->client,
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MPL3115_CTRL_REG3,
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MPL3115_CTRL3_IPOL1);
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if (ret)
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return ret;
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}
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} else if (irq_type == IRQF_TRIGGER_RISING) {
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ret = i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG3,
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MPL3115_CTRL3_IPOL2);
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if (ret)
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return ret;
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}
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data->drdy_trig = devm_iio_trigger_alloc(&data->client->dev,
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"%s-dev%d",
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indio_dev->name,
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iio_device_id(indio_dev));
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if (!data->drdy_trig)
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return -ENOMEM;
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data->drdy_trig->ops = &mpl3115_trigger_ops;
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iio_trigger_set_drvdata(data->drdy_trig, indio_dev);
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ret = devm_request_threaded_irq(&data->client->dev, irq, NULL,
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mpl3115_interrupt_handler,
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IRQF_ONESHOT,
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"mpl3115_irq", indio_dev);
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if (ret)
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return ret;
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ret = devm_iio_trigger_register(&data->client->dev, data->drdy_trig);
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if (ret)
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return ret;
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indio_dev->trig = iio_trigger_get(data->drdy_trig);
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return 0;
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}
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static int mpl3115_probe(struct i2c_client *client)
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{
···
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ret = i2c_smbus_write_byte_data(client, MPL3115_CTRL_REG1,
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data->ctrl_reg1);
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if (ret < 0)
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return ret;
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ret = mpl3115_trigger_probe(data, indio_dev);
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if (ret)
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return ret;
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ret = iio_triggered_buffer_setup(indio_dev, NULL,