Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdgpu: remove mdelay in psp v12
Since secure firmware is more stable than bring up phase, I believe we
don't need such mdelays any more before wait PSP response on PSP v12.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Trigger Huang <Trigger.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Huang Rui
and committed by
Alex Deucher
8465f0a3
2d274bf7
-16
-16
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
-16
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
···
99
99
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,
100
100
psp_gfxdrv_command_reg);
101
101
102
-
/* there might be handshake issue with hardware which needs delay */
103
-
mdelay(20);
104
-
105
102
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
106
103
0x80000000, 0x80000000, false);
107
104
···
135
138
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,
136
139
psp_gfxdrv_command_reg);
137
140
138
-
/* there might be handshake issue with hardware which needs delay */
139
-
mdelay(20);
140
141
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81),
141
142
RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81),
142
143
0, true);
···
156
161
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp);
157
162
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);
158
163
159
-
mdelay(20);
160
164
psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
161
165
0x80000000, 0x8000FFFF, false);
162
166
···
167
173
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp);
168
174
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);
169
175
170
-
mdelay(20);
171
176
psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
172
177
0x80000000, 0x8000FFFF, false);
173
178
}
···
193
200
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,
194
201
GFX_CTRL_CMD_ID_INIT_GPCOM_RING);
195
202
196
-
/* there might be handshake issue with hardware which needs delay */
197
-
mdelay(20);
198
-
199
203
/* Wait for response flag (bit 31) in C2PMSG_101 */
200
204
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101),
201
205
0x80000000, 0x8000FFFF, false);
···
211
221
psp_ring_reg = ring_type;
212
222
psp_ring_reg = psp_ring_reg << 16;
213
223
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
214
-
215
-
/* there might be handshake issue with hardware which needs delay */
216
-
mdelay(20);
217
224
218
225
/* Wait for response flag (bit 31) in C2PMSG_64 */
219
226
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
···
233
246
else
234
247
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
235
248
GFX_CTRL_CMD_ID_DESTROY_RINGS);
236
-
237
-
/* there might be handshake issue with hardware which needs delay */
238
-
mdelay(20);
239
249
240
250
/* Wait for response flag (bit 31) */
241
251
if (amdgpu_sriov_vf(adev))