Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/vc4: hvs: Reset muxes at probe time
By default, the HVS driver will force the HVS output 3 to be muxed to
the HVS channel 2. However, the Transposer can only be assigned to the
HVS channel 2, so whenever we try to use the writeback connector, we'll
mux its associated output (Output 2) to the channel 2.
This leads to both the output 2 and 3 feeding from the same channel,
which is explicitly discouraged in the documentation.
In order to avoid this, let's reset all the output muxes to their reset
value.
Fixes: 87ebcd42fb7b ("drm/vc4: crtc: Assign output to channel automatically")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://lore.kernel.org/r/20220328153659.2382206-2-maxime@cerno.tech
+21
-5
+21
-5
drivers/gpu/drm/vc4/vc4_hvs.c
+21
-5
drivers/gpu/drm/vc4/vc4_hvs.c
···
611
611
struct vc4_hvs *hvs = NULL;
612
612
int ret;
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u32 dispctrl;
614
+
u32 reg;
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hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL);
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617
if (!hvs)
···
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682
684
683
vc4->hvs = hvs;
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684
685
+
reg = HVS_READ(SCALER_DISPECTRL);
686
+
reg &= ~SCALER_DISPECTRL_DSP2_MUX_MASK;
687
+
HVS_WRITE(SCALER_DISPECTRL,
688
+
reg | VC4_SET_FIELD(0, SCALER_DISPECTRL_DSP2_MUX));
689
+
690
+
reg = HVS_READ(SCALER_DISPCTRL);
691
+
reg &= ~SCALER_DISPCTRL_DSP3_MUX_MASK;
692
+
HVS_WRITE(SCALER_DISPCTRL,
693
+
reg | VC4_SET_FIELD(3, SCALER_DISPCTRL_DSP3_MUX));
694
+
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+
reg = HVS_READ(SCALER_DISPEOLN);
696
+
reg &= ~SCALER_DISPEOLN_DSP4_MUX_MASK;
697
+
HVS_WRITE(SCALER_DISPEOLN,
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+
reg | VC4_SET_FIELD(3, SCALER_DISPEOLN_DSP4_MUX));
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+
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+
reg = HVS_READ(SCALER_DISPDITHER);
701
+
reg &= ~SCALER_DISPDITHER_DSP5_MUX_MASK;
702
+
HVS_WRITE(SCALER_DISPDITHER,
703
+
reg | VC4_SET_FIELD(3, SCALER_DISPDITHER_DSP5_MUX));
704
+
686
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dispctrl = HVS_READ(SCALER_DISPCTRL);
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706
688
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dispctrl |= SCALER_DISPCTRL_ENABLE;
···
710
689
SCALER_DISPCTRL_DISPEIRQ(1) |
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690
SCALER_DISPCTRL_DISPEIRQ(2);
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691
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-
/* Set DSP3 (PV1) to use HVS channel 2, which would otherwise
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-
* be unused.
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-
*/
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-
dispctrl &= ~SCALER_DISPCTRL_DSP3_MUX_MASK;
717
692
dispctrl &= ~(SCALER_DISPCTRL_DMAEIRQ |
718
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SCALER_DISPCTRL_SLVWREIRQ |
719
694
SCALER_DISPCTRL_SLVRDEIRQ |
···
723
706
SCALER_DISPCTRL_DSPEISLUR(1) |
724
707
SCALER_DISPCTRL_DSPEISLUR(2) |
725
708
SCALER_DISPCTRL_SCLEIRQ);
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-
dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_DSP3_MUX);
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HVS_WRITE(SCALER_DISPCTRL, dispctrl);
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