Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull sparc fixes from David Miller:
1) Fix race in sparc64 TLB shootdowns, we have to synchronize with the
sibling cpus completing if we are passing them a reference via
pointer to a data structure.
2) Fix cleaning of bitmaps in sparc32, from Akinobu Mita.
3) Fix various sparc header mistakes, some of which resulted in
userland build breakage. From Sam Ravnborg.
4) Kill ghost declarations and defines missed when several bits of code
got deleted recently.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
sparc64: Fix race in TLB batch processing.
sparc: use asm-generic version of types.h
bbc_i2c: fix section mismatch warning
sparc: use generic headers
sparc:cleanup unused code in smp_32.h
sparc/iommu: fix typo s/265KB/256KB/
sparc/srmmu: clear trailing edge of bitmap properly
sparc:remove unused declaration smp_boot_cpus()
+254
-115
+5
arch/sparc/include/asm/Kbuild
+5
arch/sparc/include/asm/Kbuild
···
2
2
3
3
4
4
generic-y += clkdev.h
5
+
generic-y += cputime.h
5
6
generic-y += div64.h
7
+
generic-y += emergency-restart.h
6
8
generic-y += exec.h
7
9
generic-y += local64.h
10
+
generic-y += mutex.h
8
11
generic-y += irq_regs.h
9
12
generic-y += local.h
10
13
generic-y += module.h
14
+
generic-y += serial.h
11
15
generic-y += trace_clock.h
16
+
generic-y += types.h
12
17
generic-y += word-at-a-time.h
-6
arch/sparc/include/asm/cputime.h
-6
arch/sparc/include/asm/cputime.h
-6
arch/sparc/include/asm/emergency-restart.h
-6
arch/sparc/include/asm/emergency-restart.h
-9
arch/sparc/include/asm/mutex.h
-9
arch/sparc/include/asm/mutex.h
···
1
-
/*
2
-
* Pull in the generic implementation for the mutex fastpath.
3
-
*
4
-
* TODO: implement optimized primitives instead, or leave the generic
5
-
* implementation in place, or pick the atomic_xchg() based generic
6
-
* implementation. (see asm-generic/mutex-xchg.h for details)
7
-
*/
8
-
9
-
#include <asm-generic/mutex-dec.h>
+1
arch/sparc/include/asm/pgtable_64.h
+1
arch/sparc/include/asm/pgtable_64.h
-6
arch/sparc/include/asm/serial.h
-6
arch/sparc/include/asm/serial.h
-5
arch/sparc/include/asm/smp_32.h
-5
arch/sparc/include/asm/smp_32.h
···
36
36
unsigned long, unsigned long);
37
37
38
38
void cpu_panic(void);
39
-
extern void smp4m_irq_rotate(int cpu);
40
39
41
40
/*
42
41
* General functions that each host system must provide.
···
45
46
void sun4d_init_smp(void);
46
47
47
48
void smp_callin(void);
48
-
void smp_boot_cpus(void);
49
49
void smp_store_cpu_info(int);
50
50
51
51
void smp_resched_interrupt(void);
···
104
106
extern int hard_smp_processor_id(void);
105
107
106
108
#define raw_smp_processor_id() (current_thread_info()->cpu)
107
-
108
-
#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
109
-
#define prof_counter(__cpu) cpu_data(__cpu).counter
110
109
111
110
void smp_setup_cpu_possible_map(void);
112
111
+1
-2
arch/sparc/include/asm/switch_to_64.h
+1
-2
arch/sparc/include/asm/switch_to_64.h
···
18
18
* and 2 stores in this critical code path. -DaveM
19
19
*/
20
20
#define switch_to(prev, next, last) \
21
-
do { flush_tlb_pending(); \
22
-
save_and_clear_fpu(); \
21
+
do { save_and_clear_fpu(); \
23
22
/* If you are tempted to conditionalize the following */ \
24
23
/* so that ASI is only written if it changes, think again. */ \
25
24
__asm__ __volatile__("wr %%g0, %0, %%asi" \
+31
-6
arch/sparc/include/asm/tlbflush_64.h
+31
-6
arch/sparc/include/asm/tlbflush_64.h
···
11
11
struct tlb_batch {
12
12
struct mm_struct *mm;
13
13
unsigned long tlb_nr;
14
+
unsigned long active;
14
15
unsigned long vaddrs[TLB_BATCH_NR];
15
16
};
16
17
17
18
extern void flush_tsb_kernel_range(unsigned long start, unsigned long end);
18
19
extern void flush_tsb_user(struct tlb_batch *tb);
20
+
extern void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr);
19
21
20
22
/* TLB flush operations. */
21
23
22
-
extern void flush_tlb_pending(void);
24
+
static inline void flush_tlb_mm(struct mm_struct *mm)
25
+
{
26
+
}
23
27
24
-
#define flush_tlb_range(vma,start,end) \
25
-
do { (void)(start); flush_tlb_pending(); } while (0)
26
-
#define flush_tlb_page(vma,addr) flush_tlb_pending()
27
-
#define flush_tlb_mm(mm) flush_tlb_pending()
28
+
static inline void flush_tlb_page(struct vm_area_struct *vma,
29
+
unsigned long vmaddr)
30
+
{
31
+
}
32
+
33
+
static inline void flush_tlb_range(struct vm_area_struct *vma,
34
+
unsigned long start, unsigned long end)
35
+
{
36
+
}
37
+
38
+
#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
39
+
40
+
extern void flush_tlb_pending(void);
41
+
extern void arch_enter_lazy_mmu_mode(void);
42
+
extern void arch_leave_lazy_mmu_mode(void);
43
+
#define arch_flush_lazy_mmu_mode() do {} while (0)
28
44
29
45
/* Local cpu only. */
30
46
extern void __flush_tlb_all(void);
31
-
47
+
extern void __flush_tlb_page(unsigned long context, unsigned long vaddr);
32
48
extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
33
49
34
50
#ifndef CONFIG_SMP
···
54
38
__flush_tlb_kernel_range(start,end); \
55
39
} while (0)
56
40
41
+
static inline void global_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr)
42
+
{
43
+
__flush_tlb_page(CTX_HWBITS(mm->context), vaddr);
44
+
}
45
+
57
46
#else /* CONFIG_SMP */
58
47
59
48
extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
49
+
extern void smp_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr);
60
50
61
51
#define flush_tlb_kernel_range(start, end) \
62
52
do { flush_tsb_kernel_range(start,end); \
63
53
smp_flush_tlb_kernel_range(start, end); \
64
54
} while (0)
55
+
56
+
#define global_flush_tlb_page(mm, vaddr) \
57
+
smp_flush_tlb_page(mm, vaddr)
65
58
66
59
#endif /* ! CONFIG_SMP */
67
60
-1
arch/sparc/include/uapi/asm/Kbuild
-1
arch/sparc/include/uapi/asm/Kbuild
-17
arch/sparc/include/uapi/asm/types.h
-17
arch/sparc/include/uapi/asm/types.h
···
1
-
#ifndef _SPARC_TYPES_H
2
-
#define _SPARC_TYPES_H
3
-
/*
4
-
* This file is never included by application software unless
5
-
* explicitly requested (e.g., via linux/types.h) in which case the
6
-
* application is Linux specific so (user-) name space pollution is
7
-
* not a major issue. However, for interoperability, libraries still
8
-
* need to be careful to avoid a name clashes.
9
-
*/
10
-
11
-
#if defined(__sparc__)
12
-
13
-
#include <asm-generic/int-ll64.h>
14
-
15
-
#endif /* defined(__sparc__) */
16
-
17
-
#endif /* defined(_SPARC_TYPES_H) */
+38
-5
arch/sparc/kernel/smp_64.c
+38
-5
arch/sparc/kernel/smp_64.c
···
849
849
}
850
850
851
851
extern unsigned long xcall_flush_tlb_mm;
852
-
extern unsigned long xcall_flush_tlb_pending;
852
+
extern unsigned long xcall_flush_tlb_page;
853
853
extern unsigned long xcall_flush_tlb_kernel_range;
854
854
extern unsigned long xcall_fetch_glob_regs;
855
855
extern unsigned long xcall_fetch_glob_pmu;
···
1074
1074
put_cpu();
1075
1075
}
1076
1076
1077
+
struct tlb_pending_info {
1078
+
unsigned long ctx;
1079
+
unsigned long nr;
1080
+
unsigned long *vaddrs;
1081
+
};
1082
+
1083
+
static void tlb_pending_func(void *info)
1084
+
{
1085
+
struct tlb_pending_info *t = info;
1086
+
1087
+
__flush_tlb_pending(t->ctx, t->nr, t->vaddrs);
1088
+
}
1089
+
1077
1090
void smp_flush_tlb_pending(struct mm_struct *mm, unsigned long nr, unsigned long *vaddrs)
1078
1091
{
1079
1092
u32 ctx = CTX_HWBITS(mm->context);
1093
+
struct tlb_pending_info info;
1094
+
int cpu = get_cpu();
1095
+
1096
+
info.ctx = ctx;
1097
+
info.nr = nr;
1098
+
info.vaddrs = vaddrs;
1099
+
1100
+
if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
1101
+
cpumask_copy(mm_cpumask(mm), cpumask_of(cpu));
1102
+
else
1103
+
smp_call_function_many(mm_cpumask(mm), tlb_pending_func,
1104
+
&info, 1);
1105
+
1106
+
__flush_tlb_pending(ctx, nr, vaddrs);
1107
+
1108
+
put_cpu();
1109
+
}
1110
+
1111
+
void smp_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr)
1112
+
{
1113
+
unsigned long context = CTX_HWBITS(mm->context);
1080
1114
int cpu = get_cpu();
1081
1115
1082
1116
if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
1083
1117
cpumask_copy(mm_cpumask(mm), cpumask_of(cpu));
1084
1118
else
1085
-
smp_cross_call_masked(&xcall_flush_tlb_pending,
1086
-
ctx, nr, (unsigned long) vaddrs,
1119
+
smp_cross_call_masked(&xcall_flush_tlb_page,
1120
+
context, vaddr, 0,
1087
1121
mm_cpumask(mm));
1088
-
1089
-
__flush_tlb_pending(ctx, nr, vaddrs);
1122
+
__flush_tlb_page(context, vaddr);
1090
1123
1091
1124
put_cpu();
1092
1125
}
+1
-5
arch/sparc/lib/bitext.c
+1
-5
arch/sparc/lib/bitext.c
+1
-1
arch/sparc/mm/iommu.c
+1
-1
arch/sparc/mm/iommu.c
···
34
34
#define IOMMU_RNGE IOMMU_RNGE_256MB
35
35
#define IOMMU_START 0xF0000000
36
36
#define IOMMU_WINSIZE (256*1024*1024U)
37
-
#define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 265KB */
37
+
#define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 256KB */
38
38
#define IOMMU_ORDER 6 /* 4096 * (1<<6) */
39
39
40
40
/* srmmu.c */
+3
-1
arch/sparc/mm/srmmu.c
+3
-1
arch/sparc/mm/srmmu.c
···
280
280
SRMMU_NOCACHE_ALIGN_MAX, 0UL);
281
281
memset(srmmu_nocache_pool, 0, srmmu_nocache_size);
282
282
283
-
srmmu_nocache_bitmap = __alloc_bootmem(bitmap_bits >> 3, SMP_CACHE_BYTES, 0UL);
283
+
srmmu_nocache_bitmap =
284
+
__alloc_bootmem(BITS_TO_LONGS(bitmap_bits) * sizeof(long),
285
+
SMP_CACHE_BYTES, 0UL);
284
286
bit_map_init(&srmmu_nocache_map, srmmu_nocache_bitmap, bitmap_bits);
285
287
286
288
srmmu_swapper_pg_dir = __srmmu_get_nocache(SRMMU_PGD_TABLE_SIZE, SRMMU_PGD_TABLE_SIZE);
+34
-4
arch/sparc/mm/tlb.c
+34
-4
arch/sparc/mm/tlb.c
···
24
24
void flush_tlb_pending(void)
25
25
{
26
26
struct tlb_batch *tb = &get_cpu_var(tlb_batch);
27
+
struct mm_struct *mm = tb->mm;
27
28
28
-
if (tb->tlb_nr) {
29
-
flush_tsb_user(tb);
29
+
if (!tb->tlb_nr)
30
+
goto out;
30
31
31
-
if (CTX_VALID(tb->mm->context)) {
32
+
flush_tsb_user(tb);
33
+
34
+
if (CTX_VALID(mm->context)) {
35
+
if (tb->tlb_nr == 1) {
36
+
global_flush_tlb_page(mm, tb->vaddrs[0]);
37
+
} else {
32
38
#ifdef CONFIG_SMP
33
39
smp_flush_tlb_pending(tb->mm, tb->tlb_nr,
34
40
&tb->vaddrs[0]);
···
43
37
tb->tlb_nr, &tb->vaddrs[0]);
44
38
#endif
45
39
}
46
-
tb->tlb_nr = 0;
47
40
}
48
41
42
+
tb->tlb_nr = 0;
43
+
44
+
out:
49
45
put_cpu_var(tlb_batch);
46
+
}
47
+
48
+
void arch_enter_lazy_mmu_mode(void)
49
+
{
50
+
struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
51
+
52
+
tb->active = 1;
53
+
}
54
+
55
+
void arch_leave_lazy_mmu_mode(void)
56
+
{
57
+
struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
58
+
59
+
if (tb->tlb_nr)
60
+
flush_tlb_pending();
61
+
tb->active = 0;
50
62
}
51
63
52
64
static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
···
82
58
if (unlikely(nr != 0 && mm != tb->mm)) {
83
59
flush_tlb_pending();
84
60
nr = 0;
61
+
}
62
+
63
+
if (!tb->active) {
64
+
global_flush_tlb_page(mm, vaddr);
65
+
flush_tsb_user_page(mm, vaddr);
66
+
return;
85
67
}
86
68
87
69
if (nr == 0)
+42
-15
arch/sparc/mm/tsb.c
+42
-15
arch/sparc/mm/tsb.c
···
7
7
#include <linux/preempt.h>
8
8
#include <linux/slab.h>
9
9
#include <asm/page.h>
10
-
#include <asm/tlbflush.h>
11
-
#include <asm/tlb.h>
12
-
#include <asm/mmu_context.h>
13
10
#include <asm/pgtable.h>
11
+
#include <asm/mmu_context.h>
14
12
#include <asm/tsb.h>
13
+
#include <asm/tlb.h>
15
14
#include <asm/oplib.h>
16
15
17
16
extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
···
45
46
}
46
47
}
47
48
49
+
static void __flush_tsb_one_entry(unsigned long tsb, unsigned long v,
50
+
unsigned long hash_shift,
51
+
unsigned long nentries)
52
+
{
53
+
unsigned long tag, ent, hash;
54
+
55
+
v &= ~0x1UL;
56
+
hash = tsb_hash(v, hash_shift, nentries);
57
+
ent = tsb + (hash * sizeof(struct tsb));
58
+
tag = (v >> 22UL);
59
+
60
+
tsb_flush(ent, tag);
61
+
}
62
+
48
63
static void __flush_tsb_one(struct tlb_batch *tb, unsigned long hash_shift,
49
64
unsigned long tsb, unsigned long nentries)
50
65
{
51
66
unsigned long i;
52
67
53
-
for (i = 0; i < tb->tlb_nr; i++) {
54
-
unsigned long v = tb->vaddrs[i];
55
-
unsigned long tag, ent, hash;
56
-
57
-
v &= ~0x1UL;
58
-
59
-
hash = tsb_hash(v, hash_shift, nentries);
60
-
ent = tsb + (hash * sizeof(struct tsb));
61
-
tag = (v >> 22UL);
62
-
63
-
tsb_flush(ent, tag);
64
-
}
68
+
for (i = 0; i < tb->tlb_nr; i++)
69
+
__flush_tsb_one_entry(tsb, tb->vaddrs[i], hash_shift, nentries);
65
70
}
66
71
67
72
void flush_tsb_user(struct tlb_batch *tb)
···
88
85
if (tlb_type == cheetah_plus || tlb_type == hypervisor)
89
86
base = __pa(base);
90
87
__flush_tsb_one(tb, HPAGE_SHIFT, base, nentries);
88
+
}
89
+
#endif
90
+
spin_unlock_irqrestore(&mm->context.lock, flags);
91
+
}
92
+
93
+
void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr)
94
+
{
95
+
unsigned long nentries, base, flags;
96
+
97
+
spin_lock_irqsave(&mm->context.lock, flags);
98
+
99
+
base = (unsigned long) mm->context.tsb_block[MM_TSB_BASE].tsb;
100
+
nentries = mm->context.tsb_block[MM_TSB_BASE].tsb_nentries;
101
+
if (tlb_type == cheetah_plus || tlb_type == hypervisor)
102
+
base = __pa(base);
103
+
__flush_tsb_one_entry(base, vaddr, PAGE_SHIFT, nentries);
104
+
105
+
#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
106
+
if (mm->context.tsb_block[MM_TSB_HUGE].tsb) {
107
+
base = (unsigned long) mm->context.tsb_block[MM_TSB_HUGE].tsb;
108
+
nentries = mm->context.tsb_block[MM_TSB_HUGE].tsb_nentries;
109
+
if (tlb_type == cheetah_plus || tlb_type == hypervisor)
110
+
base = __pa(base);
111
+
__flush_tsb_one_entry(base, vaddr, HPAGE_SHIFT, nentries);
91
112
}
92
113
#endif
93
114
spin_unlock_irqrestore(&mm->context.lock, flags);
+95
-24
arch/sparc/mm/ultra.S
+95
-24
arch/sparc/mm/ultra.S
···
53
53
nop
54
54
55
55
.align 32
56
+
.globl __flush_tlb_page
57
+
__flush_tlb_page: /* 22 insns */
58
+
/* %o0 = context, %o1 = vaddr */
59
+
rdpr %pstate, %g7
60
+
andn %g7, PSTATE_IE, %g2
61
+
wrpr %g2, %pstate
62
+
mov SECONDARY_CONTEXT, %o4
63
+
ldxa [%o4] ASI_DMMU, %g2
64
+
stxa %o0, [%o4] ASI_DMMU
65
+
andcc %o1, 1, %g0
66
+
andn %o1, 1, %o3
67
+
be,pn %icc, 1f
68
+
or %o3, 0x10, %o3
69
+
stxa %g0, [%o3] ASI_IMMU_DEMAP
70
+
1: stxa %g0, [%o3] ASI_DMMU_DEMAP
71
+
membar #Sync
72
+
stxa %g2, [%o4] ASI_DMMU
73
+
sethi %hi(KERNBASE), %o4
74
+
flush %o4
75
+
retl
76
+
wrpr %g7, 0x0, %pstate
77
+
nop
78
+
nop
79
+
nop
80
+
nop
81
+
82
+
.align 32
56
83
.globl __flush_tlb_pending
57
84
__flush_tlb_pending: /* 26 insns */
58
85
/* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
···
230
203
retl
231
204
wrpr %g7, 0x0, %pstate
232
205
206
+
__cheetah_flush_tlb_page: /* 22 insns */
207
+
/* %o0 = context, %o1 = vaddr */
208
+
rdpr %pstate, %g7
209
+
andn %g7, PSTATE_IE, %g2
210
+
wrpr %g2, 0x0, %pstate
211
+
wrpr %g0, 1, %tl
212
+
mov PRIMARY_CONTEXT, %o4
213
+
ldxa [%o4] ASI_DMMU, %g2
214
+
srlx %g2, CTX_PGSZ1_NUC_SHIFT, %o3
215
+
sllx %o3, CTX_PGSZ1_NUC_SHIFT, %o3
216
+
or %o0, %o3, %o0 /* Preserve nucleus page size fields */
217
+
stxa %o0, [%o4] ASI_DMMU
218
+
andcc %o1, 1, %g0
219
+
be,pn %icc, 1f
220
+
andn %o1, 1, %o3
221
+
stxa %g0, [%o3] ASI_IMMU_DEMAP
222
+
1: stxa %g0, [%o3] ASI_DMMU_DEMAP
223
+
membar #Sync
224
+
stxa %g2, [%o4] ASI_DMMU
225
+
sethi %hi(KERNBASE), %o4
226
+
flush %o4
227
+
wrpr %g0, 0, %tl
228
+
retl
229
+
wrpr %g7, 0x0, %pstate
230
+
233
231
__cheetah_flush_tlb_pending: /* 27 insns */
234
232
/* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
235
233
rdpr %pstate, %g7
···
318
266
ta HV_FAST_TRAP
319
267
brnz,pn %o0, __hypervisor_tlb_tl0_error
320
268
mov HV_FAST_MMU_DEMAP_CTX, %o1
269
+
retl
270
+
nop
271
+
272
+
__hypervisor_flush_tlb_page: /* 11 insns */
273
+
/* %o0 = context, %o1 = vaddr */
274
+
mov %o0, %g2
275
+
mov %o1, %o0 /* ARG0: vaddr + IMMU-bit */
276
+
mov %g2, %o1 /* ARG1: mmu context */
277
+
mov HV_MMU_ALL, %o2 /* ARG2: flags */
278
+
srlx %o0, PAGE_SHIFT, %o0
279
+
sllx %o0, PAGE_SHIFT, %o0
280
+
ta HV_MMU_UNMAP_ADDR_TRAP
281
+
brnz,pn %o0, __hypervisor_tlb_tl0_error
282
+
mov HV_MMU_UNMAP_ADDR_TRAP, %o1
321
283
retl
322
284
nop
323
285
···
405
339
call tlb_patch_one
406
340
mov 19, %o2
407
341
342
+
sethi %hi(__flush_tlb_page), %o0
343
+
or %o0, %lo(__flush_tlb_page), %o0
344
+
sethi %hi(__cheetah_flush_tlb_page), %o1
345
+
or %o1, %lo(__cheetah_flush_tlb_page), %o1
346
+
call tlb_patch_one
347
+
mov 22, %o2
348
+
408
349
sethi %hi(__flush_tlb_pending), %o0
409
350
or %o0, %lo(__flush_tlb_pending), %o0
410
351
sethi %hi(__cheetah_flush_tlb_pending), %o1
···
470
397
nop
471
398
nop
472
399
473
-
.globl xcall_flush_tlb_pending
474
-
xcall_flush_tlb_pending: /* 21 insns */
475
-
/* %g5=context, %g1=nr, %g7=vaddrs[] */
476
-
sllx %g1, 3, %g1
400
+
.globl xcall_flush_tlb_page
401
+
xcall_flush_tlb_page: /* 17 insns */
402
+
/* %g5=context, %g1=vaddr */
477
403
mov PRIMARY_CONTEXT, %g4
478
404
ldxa [%g4] ASI_DMMU, %g2
479
405
srlx %g2, CTX_PGSZ1_NUC_SHIFT, %g4
···
480
408
or %g5, %g4, %g5
481
409
mov PRIMARY_CONTEXT, %g4
482
410
stxa %g5, [%g4] ASI_DMMU
483
-
1: sub %g1, (1 << 3), %g1
484
-
ldx [%g7 + %g1], %g5
485
-
andcc %g5, 0x1, %g0
411
+
andcc %g1, 0x1, %g0
486
412
be,pn %icc, 2f
487
-
488
-
andn %g5, 0x1, %g5
413
+
andn %g1, 0x1, %g5
489
414
stxa %g0, [%g5] ASI_IMMU_DEMAP
490
415
2: stxa %g0, [%g5] ASI_DMMU_DEMAP
491
416
membar #Sync
492
-
brnz,pt %g1, 1b
493
-
nop
494
417
stxa %g2, [%g4] ASI_DMMU
495
418
retry
419
+
nop
496
420
nop
497
421
498
422
.globl xcall_flush_tlb_kernel_range
···
724
656
membar #Sync
725
657
retry
726
658
727
-
.globl __hypervisor_xcall_flush_tlb_pending
728
-
__hypervisor_xcall_flush_tlb_pending: /* 21 insns */
729
-
/* %g5=ctx, %g1=nr, %g7=vaddrs[], %g2,%g3,%g4,g6=scratch */
730
-
sllx %g1, 3, %g1
659
+
.globl __hypervisor_xcall_flush_tlb_page
660
+
__hypervisor_xcall_flush_tlb_page: /* 17 insns */
661
+
/* %g5=ctx, %g1=vaddr */
731
662
mov %o0, %g2
732
663
mov %o1, %g3
733
664
mov %o2, %g4
734
-
1: sub %g1, (1 << 3), %g1
735
-
ldx [%g7 + %g1], %o0 /* ARG0: virtual address */
665
+
mov %g1, %o0 /* ARG0: virtual address */
736
666
mov %g5, %o1 /* ARG1: mmu context */
737
667
mov HV_MMU_ALL, %o2 /* ARG2: flags */
738
668
srlx %o0, PAGE_SHIFT, %o0
···
739
673
mov HV_MMU_UNMAP_ADDR_TRAP, %g6
740
674
brnz,a,pn %o0, __hypervisor_tlb_xcall_error
741
675
mov %o0, %g5
742
-
brnz,pt %g1, 1b
743
-
nop
744
676
mov %g2, %o0
745
677
mov %g3, %o1
746
678
mov %g4, %o2
···
821
757
call tlb_patch_one
822
758
mov 10, %o2
823
759
760
+
sethi %hi(__flush_tlb_page), %o0
761
+
or %o0, %lo(__flush_tlb_page), %o0
762
+
sethi %hi(__hypervisor_flush_tlb_page), %o1
763
+
or %o1, %lo(__hypervisor_flush_tlb_page), %o1
764
+
call tlb_patch_one
765
+
mov 11, %o2
766
+
824
767
sethi %hi(__flush_tlb_pending), %o0
825
768
or %o0, %lo(__flush_tlb_pending), %o0
826
769
sethi %hi(__hypervisor_flush_tlb_pending), %o1
···
859
788
call tlb_patch_one
860
789
mov 21, %o2
861
790
862
-
sethi %hi(xcall_flush_tlb_pending), %o0
863
-
or %o0, %lo(xcall_flush_tlb_pending), %o0
864
-
sethi %hi(__hypervisor_xcall_flush_tlb_pending), %o1
865
-
or %o1, %lo(__hypervisor_xcall_flush_tlb_pending), %o1
791
+
sethi %hi(xcall_flush_tlb_page), %o0
792
+
or %o0, %lo(xcall_flush_tlb_page), %o0
793
+
sethi %hi(__hypervisor_xcall_flush_tlb_page), %o1
794
+
or %o1, %lo(__hypervisor_xcall_flush_tlb_page), %o1
866
795
call tlb_patch_one
867
-
mov 21, %o2
796
+
mov 17, %o2
868
797
869
798
sethi %hi(xcall_flush_tlb_kernel_range), %o0
870
799
or %o0, %lo(xcall_flush_tlb_kernel_range), %o0
+2
-2
drivers/sbus/char/bbc_i2c.c
+2
-2
drivers/sbus/char/bbc_i2c.c
···
282
282
return IRQ_HANDLED;
283
283
}
284
284
285
-
static void __init reset_one_i2c(struct bbc_i2c_bus *bp)
285
+
static void reset_one_i2c(struct bbc_i2c_bus *bp)
286
286
{
287
287
writeb(I2C_PCF_PIN, bp->i2c_control_regs + 0x0);
288
288
writeb(bp->own, bp->i2c_control_regs + 0x1);
···
291
291
writeb(I2C_PCF_IDLE, bp->i2c_control_regs + 0x0);
292
292
}
293
293
294
-
static struct bbc_i2c_bus * __init attach_one_i2c(struct platform_device *op, int index)
294
+
static struct bbc_i2c_bus * attach_one_i2c(struct platform_device *op, int index)
295
295
{
296
296
struct bbc_i2c_bus *bp;
297
297
struct device_node *dp;