tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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can: kvaser_pciefd: Add support for Kvaser M.2 PCIe 4xCAN

Add support for new Kvaser pciefd device, M.2 PCIe 4xCAN, based on
Xilinx FPGA.

Signed-off-by: Jimmy Assarsson <extja@kvaser.com>
Link: https://lore.kernel.org/all/20231113134717.515037-1-extja@kvaser.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

authored by

Jimmy Assarsson and committed by
Marc Kleine-Budde 85216f56 7d06d15d

+56
+1
drivers/net/can/Kconfig
··· 168 168 Kvaser Mini PCI Express 2xHS v2 169 169 Kvaser Mini PCI Express 1xCAN v3 170 170 Kvaser Mini PCI Express 2xCAN v3 171 + Kvaser M.2 PCIe 4xCAN 171 172 172 173 config CAN_SLCAN 173 174 tristate "Serial / USB serial CAN Adaptors (slcan)"
+55
drivers/net/can/kvaser_pciefd.c
··· 47 47 #define KVASER_PCIEFD_MINIPCIE_2CAN_V3_DEVICE_ID 0x0015 48 48 #define KVASER_PCIEFD_MINIPCIE_1CAN_V3_DEVICE_ID 0x0016 49 49 50 + /* Xilinx based devices */ 51 + #define KVASER_PCIEFD_M2_4CAN_DEVICE_ID 0x0017 52 + 50 53 /* Altera SerDes Enable 64-bit DMA address translation */ 51 54 #define KVASER_PCIEFD_ALTERA_DMA_64BIT BIT(0) 52 55 53 56 /* SmartFusion2 SerDes LSB address translation mask */ 54 57 #define KVASER_PCIEFD_SF2_DMA_LSB_MASK GENMASK(31, 12) 58 + 59 + /* Xilinx SerDes LSB address translation mask */ 60 + #define KVASER_PCIEFD_XILINX_DMA_LSB_MASK GENMASK(31, 12) 55 61 56 62 /* Kvaser KCAN CAN controller registers */ 57 63 #define KVASER_PCIEFD_KCAN_FIFO_REG 0x100 ··· 287 281 dma_addr_t addr, int index); 288 282 static void kvaser_pciefd_write_dma_map_sf2(struct kvaser_pciefd *pcie, 289 283 dma_addr_t addr, int index); 284 + static void kvaser_pciefd_write_dma_map_xilinx(struct kvaser_pciefd *pcie, 285 + dma_addr_t addr, int index); 290 286 291 287 struct kvaser_pciefd_address_offset { 292 288 u32 serdes; ··· 343 335 .kcan_ch1 = 0x142000, 344 336 }; 345 337 338 + static const struct kvaser_pciefd_address_offset kvaser_pciefd_xilinx_address_offset = { 339 + .serdes = 0x00208, 340 + .pci_ien = 0x102004, 341 + .pci_irq = 0x102008, 342 + .sysid = 0x100000, 343 + .loopback = 0x103000, 344 + .kcan_srb_fifo = 0x120000, 345 + .kcan_srb = 0x121000, 346 + .kcan_ch0 = 0x140000, 347 + .kcan_ch1 = 0x142000, 348 + }; 349 + 346 350 static const struct kvaser_pciefd_irq_mask kvaser_pciefd_altera_irq_mask = { 347 351 .kcan_rx0 = BIT(4), 348 352 .kcan_tx = { BIT(0), BIT(1), BIT(2), BIT(3) }, ··· 362 342 }; 363 343 364 344 static const struct kvaser_pciefd_irq_mask kvaser_pciefd_sf2_irq_mask = { 345 + .kcan_rx0 = BIT(4), 346 + .kcan_tx = { BIT(16), BIT(17), BIT(18), BIT(19) }, 347 + .all = GENMASK(19, 16) | BIT(4), 348 + }; 349 + 350 + static const struct kvaser_pciefd_irq_mask kvaser_pciefd_xilinx_irq_mask = { 365 351 .kcan_rx0 = BIT(4), 366 352 .kcan_tx = { BIT(16), BIT(17), BIT(18), BIT(19) }, 367 353 .all = GENMASK(19, 16) | BIT(4), ··· 381 355 .kvaser_pciefd_write_dma_map = kvaser_pciefd_write_dma_map_sf2, 382 356 }; 383 357 358 + static const struct kvaser_pciefd_dev_ops kvaser_pciefd_xilinx_dev_ops = { 359 + .kvaser_pciefd_write_dma_map = kvaser_pciefd_write_dma_map_xilinx, 360 + }; 361 + 384 362 static const struct kvaser_pciefd_driver_data kvaser_pciefd_altera_driver_data = { 385 363 .address_offset = &kvaser_pciefd_altera_address_offset, 386 364 .irq_mask = &kvaser_pciefd_altera_irq_mask, ··· 395 365 .address_offset = &kvaser_pciefd_sf2_address_offset, 396 366 .irq_mask = &kvaser_pciefd_sf2_irq_mask, 397 367 .ops = &kvaser_pciefd_sf2_dev_ops, 368 + }; 369 + 370 + static const struct kvaser_pciefd_driver_data kvaser_pciefd_xilinx_driver_data = { 371 + .address_offset = &kvaser_pciefd_xilinx_address_offset, 372 + .irq_mask = &kvaser_pciefd_xilinx_irq_mask, 373 + .ops = &kvaser_pciefd_xilinx_dev_ops, 398 374 }; 399 375 400 376 struct kvaser_pciefd_can { ··· 491 455 { 492 456 PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_MINIPCIE_1CAN_V3_DEVICE_ID), 493 457 .driver_data = (kernel_ulong_t)&kvaser_pciefd_sf2_driver_data, 458 + }, 459 + { 460 + PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_M2_4CAN_DEVICE_ID), 461 + .driver_data = (kernel_ulong_t)&kvaser_pciefd_xilinx_driver_data, 494 462 }, 495 463 { 496 464 0, ··· 1073 1033 serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x10 * index; 1074 1034 iowrite32(lsb, serdes_base); 1075 1035 iowrite32(msb, serdes_base + 0x4); 1036 + } 1037 + 1038 + static void kvaser_pciefd_write_dma_map_xilinx(struct kvaser_pciefd *pcie, 1039 + dma_addr_t addr, int index) 1040 + { 1041 + void __iomem *serdes_base; 1042 + u32 lsb = addr & KVASER_PCIEFD_XILINX_DMA_LSB_MASK; 1043 + u32 msb = 0x0; 1044 + 1045 + #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 1046 + msb = addr >> 32; 1047 + #endif 1048 + serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x8 * index; 1049 + iowrite32(msb, serdes_base); 1050 + iowrite32(lsb, serdes_base + 0x4); 1076 1051 } 1077 1052 1078 1053 static int kvaser_pciefd_setup_dma(struct kvaser_pciefd *pcie)