Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
mtd: rawnand: add support for ts72xx
Technologic Systems has it's own nand controller implementation in CPLD.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
authored by
Nikita Shubin
and committed by
Arnd Bergmann
853034c7
1d4f2ff1
+229
+6
drivers/mtd/nand/raw/Kconfig
+6
drivers/mtd/nand/raw/Kconfig
···
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Enables support for the NAND controller found on Renesas R-Car
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Gen3 and RZ/N1 SoC families.
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config MTD_NAND_TS72XX
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tristate "ts72xx NAND controller"
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depends on ARCH_EP93XX && HAS_IOMEM
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help
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Enables support for NAND controller on ts72xx SBCs.
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comment "Misc"
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config MTD_SM_COMMON
+1
drivers/mtd/nand/raw/Makefile
+1
drivers/mtd/nand/raw/Makefile
···
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obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o
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obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o
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obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o
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obj-$(CONFIG_MTD_NAND_TS72XX) += technologic-nand-controller.o
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obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o
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obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mpc5121_nfc.o
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obj-$(CONFIG_MTD_NAND_VF610_NFC) += vf610_nfc.o
+222
drivers/mtd/nand/raw/technologic-nand-controller.c
+222
drivers/mtd/nand/raw/technologic-nand-controller.c
···
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Technologic Systems TS72xx NAND controller driver
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*
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* Copyright (C) 2023 Nikita Shubin <nikita.shubin@maquefel.me>
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*
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* Derived from: plat_nand.c
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* Author: Vitaly Wool <vitalywool@gmail.com>
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*/
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#include <linux/bits.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/platnand.h>
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#define TS72XX_NAND_CONTROL_ADDR_LINE BIT(22) /* 0xN0400000 */
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#define TS72XX_NAND_BUSY_ADDR_LINE BIT(23) /* 0xN0800000 */
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+
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#define TS72XX_NAND_ALE BIT(0)
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#define TS72XX_NAND_CLE BIT(1)
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#define TS72XX_NAND_NCE BIT(2)
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#define TS72XX_NAND_CTRL_CLE (TS72XX_NAND_NCE | TS72XX_NAND_CLE)
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#define TS72XX_NAND_CTRL_ALE (TS72XX_NAND_NCE | TS72XX_NAND_ALE)
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struct ts72xx_nand_data {
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struct nand_controller controller;
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struct nand_chip chip;
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void __iomem *base;
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void __iomem *ctrl;
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void __iomem *busy;
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};
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static inline struct ts72xx_nand_data *chip_to_ts72xx(struct nand_chip *chip)
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{
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return container_of(chip, struct ts72xx_nand_data, chip);
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}
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static int ts72xx_nand_attach_chip(struct nand_chip *chip)
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{
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switch (chip->ecc.engine_type) {
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case NAND_ECC_ENGINE_TYPE_ON_HOST:
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return -EINVAL;
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case NAND_ECC_ENGINE_TYPE_SOFT:
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if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
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chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
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chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
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fallthrough;
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default:
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return 0;
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}
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}
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static void ts72xx_nand_ctrl(struct nand_chip *chip, u8 value)
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{
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struct ts72xx_nand_data *data = chip_to_ts72xx(chip);
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unsigned char bits = ioread8(data->ctrl) & ~GENMASK(2, 0);
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iowrite8(bits | value, data->ctrl);
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}
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static int ts72xx_nand_exec_instr(struct nand_chip *chip,
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const struct nand_op_instr *instr)
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{
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struct ts72xx_nand_data *data = chip_to_ts72xx(chip);
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unsigned int timeout_us;
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u32 status;
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int ret;
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switch (instr->type) {
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case NAND_OP_CMD_INSTR:
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ts72xx_nand_ctrl(chip, TS72XX_NAND_CTRL_CLE);
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iowrite8(instr->ctx.cmd.opcode, data->base);
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ts72xx_nand_ctrl(chip, TS72XX_NAND_NCE);
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break;
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case NAND_OP_ADDR_INSTR:
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ts72xx_nand_ctrl(chip, TS72XX_NAND_CTRL_ALE);
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iowrite8_rep(data->base, instr->ctx.addr.addrs, instr->ctx.addr.naddrs);
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ts72xx_nand_ctrl(chip, TS72XX_NAND_NCE);
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break;
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case NAND_OP_DATA_IN_INSTR:
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ioread8_rep(data->base, instr->ctx.data.buf.in, instr->ctx.data.len);
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break;
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case NAND_OP_DATA_OUT_INSTR:
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iowrite8_rep(data->base, instr->ctx.data.buf.in, instr->ctx.data.len);
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break;
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case NAND_OP_WAITRDY_INSTR:
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timeout_us = instr->ctx.waitrdy.timeout_ms * 1000;
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ret = readb_poll_timeout(data->busy, status, status & BIT(5), 0, timeout_us);
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if (ret)
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return ret;
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break;
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}
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if (instr->delay_ns)
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ndelay(instr->delay_ns);
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return 0;
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}
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static int ts72xx_nand_exec_op(struct nand_chip *chip,
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const struct nand_operation *op, bool check_only)
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{
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unsigned int i;
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int ret;
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if (check_only)
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return 0;
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for (i = 0; i < op->ninstrs; i++) {
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ret = ts72xx_nand_exec_instr(chip, &op->instrs[i]);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct nand_controller_ops ts72xx_nand_ops = {
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.attach_chip = ts72xx_nand_attach_chip,
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.exec_op = ts72xx_nand_exec_op,
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};
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static int ts72xx_nand_probe(struct platform_device *pdev)
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{
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struct ts72xx_nand_data *data;
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struct fwnode_handle *child;
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struct mtd_info *mtd;
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int err;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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nand_controller_init(&data->controller);
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data->controller.ops = &ts72xx_nand_ops;
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data->chip.controller = &data->controller;
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data->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(data->base))
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return PTR_ERR(data->base);
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data->ctrl = data->base + TS72XX_NAND_CONTROL_ADDR_LINE;
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data->busy = data->base + TS72XX_NAND_BUSY_ADDR_LINE;
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child = fwnode_get_next_child_node(dev_fwnode(&pdev->dev), NULL);
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if (!child)
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return dev_err_probe(&pdev->dev, -ENXIO,
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"ts72xx controller node should have exactly one child\n");
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nand_set_flash_node(&data->chip, to_of_node(child));
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mtd = nand_to_mtd(&data->chip);
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mtd->dev.parent = &pdev->dev;
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platform_set_drvdata(pdev, data);
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/*
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* This driver assumes that the default ECC engine should be TYPE_SOFT.
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* Set ->engine_type before registering the NAND devices in order to
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* provide a driver specific default value.
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*/
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data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
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/* Scan to find existence of the device */
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err = nand_scan(&data->chip, 1);
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if (err)
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goto err_handle_put;
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err = mtd_device_parse_register(mtd, NULL, NULL, NULL, 0);
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if (err)
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goto err_clean_nand;
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return 0;
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err_clean_nand:
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nand_cleanup(&data->chip);
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err_handle_put:
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fwnode_handle_put(child);
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return err;
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}
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static void ts72xx_nand_remove(struct platform_device *pdev)
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{
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struct ts72xx_nand_data *data = platform_get_drvdata(pdev);
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struct fwnode_handle *fwnode = dev_fwnode(&pdev->dev);
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struct nand_chip *chip = &data->chip;
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int ret;
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ret = mtd_device_unregister(nand_to_mtd(chip));
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WARN_ON(ret);
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nand_cleanup(chip);
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fwnode_handle_put(fwnode);
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}
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static const struct of_device_id ts72xx_id_table[] = {
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{ .compatible = "technologic,ts7200-nand" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, ts72xx_id_table);
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static struct platform_driver ts72xx_nand_driver = {
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.driver = {
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.name = "ts72xx-nand",
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.of_match_table = ts72xx_id_table,
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},
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.probe = ts72xx_nand_probe,
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.remove_new = ts72xx_nand_remove,
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};
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module_platform_driver(ts72xx_nand_driver);
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MODULE_AUTHOR("Nikita Shubin <nikita.shubin@maquefel.me>");
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MODULE_DESCRIPTION("Technologic Systems TS72xx NAND controller driver");
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MODULE_LICENSE("GPL");