serial: 8250_exar: Replace custom EEPROM read with eeprom_93cx6

Replace the custom 93cx6 EEPROM read functions with the eeprom_93cx6
driver. This removes duplicate code and improves code readability.

Replace exar_ee_read() calls with eeprom_93cx6_read() or
eeprom_93cx6_multiread().

Add "select EEPROM_93CX6" to config SERIAL_8250_EXAR to ensure
eeprom_93cx6 driver is also compiled when 8250_exar driver is selected.

Note: Old exar_ee_read() and associated functions are removed in next
patch in this series.

Link to mailing list discussion with Andy Shevchenko for reference.

Link: https://lore.kernel.org/linux-serial/Ztr5u2wEt8VF1IdI@black.fi.intel.com/
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Parker Newman <pnewman@connecttech.com>
Link: https://lore.kernel.org/r/1bf2214ae27130ca58b9e779c4d65a0e5db06fc1.1727880931.git.pnewman@connecttech.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Parker Newman and committed by

Greg Kroah-Hartman 2 years ago 85eb2e57 d45109c5

+47 -14

2 changed files

expand all

drivers

tty

serial

8250

8250_exar.c

Kconfig

+46 -14

drivers/tty/serial/8250/8250_exar.c

··· 11 11 #include <linux/delay.h> 12 12 #include <linux/device.h> 13 13 #include <linux/dmi.h> 14 + #include <linux/eeprom_93cx6.h> 14 15 #include <linux/interrupt.h> 15 16 #include <linux/io.h> 16 17 #include <linux/math.h> ··· 192 191 #define CTI_EE_OFF_XR17V35X_PORT_FLAGS 0x14 /* 1 word */ 193 192 194 193 #define CTI_EE_MASK_PORT_FLAGS_TYPE GENMASK(7, 0) 195 - #define CTI_EE_MASK_OSC_FREQ_LOWER GENMASK(15, 0) 196 - #define CTI_EE_MASK_OSC_FREQ_UPPER GENMASK(31, 16) 194 + #define CTI_EE_MASK_OSC_FREQ GENMASK(31, 0) 197 195 198 196 #define CTI_FPGA_RS485_IO_REG 0x2008 199 197 #define CTI_FPGA_CFG_INT_EN_REG 0x48 ··· 254 254 unsigned int nr; 255 255 unsigned int osc_freq; 256 256 struct exar8250_board *board; 257 + struct eeprom_93cx6 eeprom; 257 258 void __iomem *virt; 258 259 int line[]; 259 260 }; ··· 356 355 exar_ee_deselect(priv); 357 356 358 357 return data; 358 + } 359 + 360 + static void exar_eeprom_93cx6_reg_read(struct eeprom_93cx6 *eeprom) 361 + { 362 + struct exar8250 *priv = eeprom->data; 363 + u8 regb = exar_read_reg(priv, UART_EXAR_REGB); 364 + 365 + /* EECK and EECS always read 0 from REGB so only set EEDO */ 366 + eeprom->reg_data_out = regb & UART_EXAR_REGB_EEDO; 367 + } 368 + 369 + static void exar_eeprom_93cx6_reg_write(struct eeprom_93cx6 *eeprom) 370 + { 371 + struct exar8250 *priv = eeprom->data; 372 + u8 regb = 0; 373 + 374 + if (eeprom->reg_data_in) 375 + regb |= UART_EXAR_REGB_EEDI; 376 + if (eeprom->reg_data_clock) 377 + regb |= UART_EXAR_REGB_EECK; 378 + if (eeprom->reg_chip_select) 379 + regb |= UART_EXAR_REGB_EECS; 380 + 381 + exar_write_reg(priv, UART_EXAR_REGB, regb); 382 + } 383 + 384 + static void exar_eeprom_init(struct exar8250 *priv) 385 + { 386 + priv->eeprom.data = priv; 387 + priv->eeprom.register_read = exar_eeprom_93cx6_reg_read; 388 + priv->eeprom.register_write = exar_eeprom_93cx6_reg_write; 389 + priv->eeprom.width = PCI_EEPROM_WIDTH_93C46; 390 + priv->eeprom.quirks |= PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE; 359 391 } 360 392 361 393 /** ··· 732 698 */ 733 699 static int cti_read_osc_freq(struct exar8250 *priv, u8 eeprom_offset) 734 700 { 735 - u16 lower_word; 736 - u16 upper_word; 701 + __le16 ee_words[2]; 702 + u32 osc_freq; 737 703 738 - lower_word = exar_ee_read(priv, eeprom_offset); 739 - // Check if EEPROM word was blank 740 - if (lower_word == 0xFFFF) 704 + eeprom_93cx6_multiread(&priv->eeprom, eeprom_offset, ee_words, ARRAY_SIZE(ee_words)); 705 + 706 + osc_freq = le16_to_cpu(ee_words[0]) | (le16_to_cpu(ee_words[1]) << 16); 707 + if (osc_freq == CTI_EE_MASK_OSC_FREQ) 741 708 return -EIO; 742 709 743 - upper_word = exar_ee_read(priv, (eeprom_offset + 1)); 744 - if (upper_word == 0xFFFF) 745 - return -EIO; 746 - 747 - return FIELD_PREP(CTI_EE_MASK_OSC_FREQ_LOWER, lower_word) | 748 - FIELD_PREP(CTI_EE_MASK_OSC_FREQ_UPPER, upper_word); 710 + return osc_freq; 749 711 } 750 712 751 713 /** ··· 865 835 u8 offset; 866 836 867 837 offset = CTI_EE_OFF_XR17V35X_PORT_FLAGS + port_num; 868 - port_flags = exar_ee_read(priv, offset); 838 + eeprom_93cx6_read(&priv->eeprom, offset, &port_flags); 869 839 870 840 port_type = FIELD_GET(CTI_EE_MASK_PORT_FLAGS_TYPE, port_flags); 871 841 if (CTI_PORT_TYPE_VALID(port_type)) ··· 1582 1552 IRQF_SHARED, "exar_uart", priv); 1583 1553 if (rc) 1584 1554 return rc; 1555 + 1556 + exar_eeprom_init(priv); 1585 1557 1586 1558 for (i = 0; i < nr_ports && i < maxnr; i++) { 1587 1559 rc = board->setup(priv, pcidev, &uart, i);

drivers/tty/serial/8250/Kconfig

··· 150 150 tristate "8250/16550 Exar/Commtech PCI/PCIe device support" 151 151 depends on SERIAL_8250 && PCI 152 152 select SERIAL_8250_PCILIB 153 + select EEPROM_93CX6 153 154 default SERIAL_8250 154 155 help 155 156 This builds support for XR17C1xx, XR17V3xx and some Commtech

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