Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

-2

MAINTAINERS

··· 8611 8611 F: arch/x86/kvm/svm.c 8612 8612 8613 8613 KERNEL VIRTUAL MACHINE FOR ARM/ARM64 (KVM/arm, KVM/arm64) 8614 - M: Christoffer Dall <christoffer.dall@arm.com> 8615 8614 M: Marc Zyngier <marc.zyngier@arm.com> 8616 8615 R: James Morse <james.morse@arm.com> 8617 8616 R: Julien Thierry <julien.thierry@arm.com> 8618 8617 R: Suzuki K Pouloze <suzuki.poulose@arm.com> 8619 8618 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 8620 8619 L: kvmarm@lists.cs.columbia.edu 8621 - W: http://systems.cs.columbia.edu/projects/kvm-arm 8622 8620 T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git 8623 8621 S: Maintained 8624 8622 F: arch/arm/include/uapi/asm/kvm*

+1

arch/arm/kvm/hyp/Makefile

··· 11 11 12 12 obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/vgic-v3-sr.o 13 13 obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/timer-sr.o 14 + obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/aarch32.o 14 15 15 16 obj-$(CONFIG_KVM_ARM_HOST) += tlb.o 16 17 obj-$(CONFIG_KVM_ARM_HOST) += cp15-sr.o

-3

arch/arm64/include/asm/kvm_host.h

··· 592 592 void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr); 593 593 void kvm_clr_pmu_events(u32 clr); 594 594 595 - void __pmu_switch_to_host(struct kvm_cpu_context *host_ctxt); 596 - bool __pmu_switch_to_guest(struct kvm_cpu_context *host_ctxt); 597 - 598 595 void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu); 599 596 void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu); 600 597 #else

+1

arch/arm64/kvm/hyp/Makefile

··· 10 10 11 11 obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/vgic-v3-sr.o 12 12 obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/timer-sr.o 13 + obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/aarch32.o 13 14 14 15 obj-$(CONFIG_KVM_ARM_HOST) += vgic-v2-cpuif-proxy.o 15 16 obj-$(CONFIG_KVM_ARM_HOST) += sysreg-sr.o

+39

arch/arm64/kvm/hyp/switch.c

··· 16 16 */ 17 17 18 18 #include <linux/arm-smccc.h> 19 + #include <linux/kvm_host.h> 19 20 #include <linux/types.h> 20 21 #include <linux/jump_label.h> 21 22 #include <uapi/linux/psci.h> ··· 504 503 __hyp_this_cpu_read(arm64_ssbd_callback_required)) 505 504 arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2, 1, NULL); 506 505 #endif 506 + } 507 + 508 + /** 509 + * Disable host events, enable guest events 510 + */ 511 + static bool __hyp_text __pmu_switch_to_guest(struct kvm_cpu_context *host_ctxt) 512 + { 513 + struct kvm_host_data *host; 514 + struct kvm_pmu_events *pmu; 515 + 516 + host = container_of(host_ctxt, struct kvm_host_data, host_ctxt); 517 + pmu = &host->pmu_events; 518 + 519 + if (pmu->events_host) 520 + write_sysreg(pmu->events_host, pmcntenclr_el0); 521 + 522 + if (pmu->events_guest) 523 + write_sysreg(pmu->events_guest, pmcntenset_el0); 524 + 525 + return (pmu->events_host || pmu->events_guest); 526 + } 527 + 528 + /** 529 + * Disable guest events, enable host events 530 + */ 531 + static void __hyp_text __pmu_switch_to_host(struct kvm_cpu_context *host_ctxt) 532 + { 533 + struct kvm_host_data *host; 534 + struct kvm_pmu_events *pmu; 535 + 536 + host = container_of(host_ctxt, struct kvm_host_data, host_ctxt); 537 + pmu = &host->pmu_events; 538 + 539 + if (pmu->events_guest) 540 + write_sysreg(pmu->events_guest, pmcntenclr_el0); 541 + 542 + if (pmu->events_host) 543 + write_sysreg(pmu->events_host, pmcntenset_el0); 507 544 } 508 545 509 546 /* Switch to the guest for VHE systems running in EL2 */

-38

arch/arm64/kvm/pmu.c

··· 53 53 ctx->pmu_events.events_guest &= ~clr; 54 54 } 55 55 56 - /** 57 - * Disable host events, enable guest events 58 - */ 59 - bool __hyp_text __pmu_switch_to_guest(struct kvm_cpu_context *host_ctxt) 60 - { 61 - struct kvm_host_data *host; 62 - struct kvm_pmu_events *pmu; 63 - 64 - host = container_of(host_ctxt, struct kvm_host_data, host_ctxt); 65 - pmu = &host->pmu_events; 66 - 67 - if (pmu->events_host) 68 - write_sysreg(pmu->events_host, pmcntenclr_el0); 69 - 70 - if (pmu->events_guest) 71 - write_sysreg(pmu->events_guest, pmcntenset_el0); 72 - 73 - return (pmu->events_host || pmu->events_guest); 74 - } 75 - 76 - /** 77 - * Disable guest events, enable host events 78 - */ 79 - void __hyp_text __pmu_switch_to_host(struct kvm_cpu_context *host_ctxt) 80 - { 81 - struct kvm_host_data *host; 82 - struct kvm_pmu_events *pmu; 83 - 84 - host = container_of(host_ctxt, struct kvm_host_data, host_ctxt); 85 - pmu = &host->pmu_events; 86 - 87 - if (pmu->events_guest) 88 - write_sysreg(pmu->events_guest, pmcntenclr_el0); 89 - 90 - if (pmu->events_host) 91 - write_sysreg(pmu->events_host, pmcntenset_el0); 92 - } 93 - 94 56 #define PMEVTYPER_READ_CASE(idx) \ 95 57 case idx: \ 96 58 return read_sysreg(pmevtyper##idx##_el0)

+1 -1

arch/s390/include/asm/kvm_host.h

··· 36 36 */ 37 37 #define KVM_NR_IRQCHIPS 1 38 38 #define KVM_IRQCHIP_NUM_PINS 4096 39 - #define KVM_HALT_POLL_NS_DEFAULT 80000 39 + #define KVM_HALT_POLL_NS_DEFAULT 50000 40 40 41 41 /* s390-specific vcpu->requests bit members */ 42 42 #define KVM_REQ_ENABLE_IBS KVM_ARCH_REQ(0)

+22 -15

arch/s390/kvm/kvm-s390.c

··· 181 181 /* maximum percentage of steal time for polling. >100 is treated like 100 */ 182 182 static u8 halt_poll_max_steal = 10; 183 183 module_param(halt_poll_max_steal, byte, 0644); 184 - MODULE_PARM_DESC(hpage, "Maximum percentage of steal time to allow polling"); 184 + MODULE_PARM_DESC(halt_poll_max_steal, "Maximum percentage of steal time to allow polling"); 185 185 186 186 /* 187 187 * For now we handle at most 16 double words as this is what the s390 base ··· 4524 4524 const struct kvm_memory_slot *new, 4525 4525 enum kvm_mr_change change) 4526 4526 { 4527 - int rc; 4527 + int rc = 0; 4528 4528 4529 - /* If the basics of the memslot do not change, we do not want 4530 - * to update the gmap. Every update causes several unnecessary 4531 - * segment translation exceptions. This is usually handled just 4532 - * fine by the normal fault handler + gmap, but it will also 4533 - * cause faults on the prefix page of running guest CPUs. 4534 - */ 4535 - if (old->userspace_addr == mem->userspace_addr && 4536 - old->base_gfn * PAGE_SIZE == mem->guest_phys_addr && 4537 - old->npages * PAGE_SIZE == mem->memory_size) 4538 - return; 4539 - 4540 - rc = gmap_map_segment(kvm->arch.gmap, mem->userspace_addr, 4541 - mem->guest_phys_addr, mem->memory_size); 4529 + switch (change) { 4530 + case KVM_MR_DELETE: 4531 + rc = gmap_unmap_segment(kvm->arch.gmap, old->base_gfn * PAGE_SIZE, 4532 + old->npages * PAGE_SIZE); 4533 + break; 4534 + case KVM_MR_MOVE: 4535 + rc = gmap_unmap_segment(kvm->arch.gmap, old->base_gfn * PAGE_SIZE, 4536 + old->npages * PAGE_SIZE); 4537 + if (rc) 4538 + break; 4539 + /* FALLTHROUGH */ 4540 + case KVM_MR_CREATE: 4541 + rc = gmap_map_segment(kvm->arch.gmap, mem->userspace_addr, 4542 + mem->guest_phys_addr, mem->memory_size); 4543 + break; 4544 + case KVM_MR_FLAGS_ONLY: 4545 + break; 4546 + default: 4547 + WARN(1, "Unknown KVM MR CHANGE: %d\n", change); 4548 + } 4542 4549 if (rc) 4543 4550 pr_warn("failed to commit memory region\n"); 4544 4551 return;

+4 -4

arch/x86/kvm/cpuid.c

··· 456 456 } 457 457 break; 458 458 } 459 - /* function 4 has additional index. */ 460 - case 4: { 459 + /* functions 4 and 0x8000001d have additional index. */ 460 + case 4: 461 + case 0x8000001d: { 461 462 int i, cache_type; 462 463 463 464 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; ··· 702 701 entry->ecx = entry->edx = 0; 703 702 break; 704 703 case 0x8000001a: 705 - break; 706 - case 0x8000001d: 704 + case 0x8000001e: 707 705 break; 708 706 /*Add support for Centaur's CPUID instruction*/ 709 707 case 0xC0000000:

+18

arch/x86/kvm/debugfs.c

··· 9 9 */ 10 10 #include <linux/kvm_host.h> 11 11 #include <linux/debugfs.h> 12 + #include "lapic.h" 12 13 13 14 bool kvm_arch_has_vcpu_debugfs(void) 14 15 { 15 16 return true; 16 17 } 18 + 19 + static int vcpu_get_timer_advance_ns(void *data, u64 *val) 20 + { 21 + struct kvm_vcpu *vcpu = (struct kvm_vcpu *) data; 22 + *val = vcpu->arch.apic->lapic_timer.timer_advance_ns; 23 + return 0; 24 + } 25 + 26 + DEFINE_SIMPLE_ATTRIBUTE(vcpu_timer_advance_ns_fops, vcpu_get_timer_advance_ns, NULL, "%llu\n"); 17 27 18 28 static int vcpu_get_tsc_offset(void *data, u64 *val) 19 29 { ··· 60 50 vcpu, &vcpu_tsc_offset_fops); 61 51 if (!ret) 62 52 return -ENOMEM; 53 + 54 + if (lapic_in_kernel(vcpu)) { 55 + ret = debugfs_create_file("lapic_timer_advance_ns", 0444, 56 + vcpu->debugfs_dentry, 57 + vcpu, &vcpu_timer_advance_ns_fops); 58 + if (!ret) 59 + return -ENOMEM; 60 + } 63 61 64 62 if (kvm_has_tsc_control) { 65 63 ret = debugfs_create_file("tsc-scaling-ratio", 0444,

+7

arch/x86/kvm/irq.c

··· 172 172 __kvm_migrate_apic_timer(vcpu); 173 173 __kvm_migrate_pit_timer(vcpu); 174 174 } 175 + 176 + bool kvm_arch_irqfd_allowed(struct kvm *kvm, struct kvm_irqfd *args) 177 + { 178 + bool resample = args->flags & KVM_IRQFD_FLAG_RESAMPLE; 179 + 180 + return resample ? irqchip_kernel(kvm) : irqchip_in_kernel(kvm); 181 + }

+1

arch/x86/kvm/irq.h

··· 114 114 return mode != KVM_IRQCHIP_NONE; 115 115 } 116 116 117 + bool kvm_arch_irqfd_allowed(struct kvm *kvm, struct kvm_irqfd *args); 117 118 void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu); 118 119 void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu); 119 120 void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu);

+3 -7

arch/x86/kvm/pmu.c

··· 283 283 bool fast_mode = idx & (1u << 31); 284 284 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); 285 285 struct kvm_pmc *pmc; 286 - u64 ctr_val; 286 + u64 mask = fast_mode ? ~0u : ~0ull; 287 287 288 288 if (!pmu->version) 289 289 return 1; ··· 291 291 if (is_vmware_backdoor_pmc(idx)) 292 292 return kvm_pmu_rdpmc_vmware(vcpu, idx, data); 293 293 294 - pmc = kvm_x86_ops->pmu_ops->msr_idx_to_pmc(vcpu, idx); 294 + pmc = kvm_x86_ops->pmu_ops->msr_idx_to_pmc(vcpu, idx, &mask); 295 295 if (!pmc) 296 296 return 1; 297 297 298 - ctr_val = pmc_read_counter(pmc); 299 - if (fast_mode) 300 - ctr_val = (u32)ctr_val; 301 - 302 - *data = ctr_val; 298 + *data = pmc_read_counter(pmc) & mask; 303 299 return 0; 304 300 } 305 301

+2 -1

arch/x86/kvm/pmu.h

··· 25 25 unsigned (*find_fixed_event)(int idx); 26 26 bool (*pmc_is_enabled)(struct kvm_pmc *pmc); 27 27 struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx); 28 - struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx); 28 + struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx, 29 + u64 *mask); 29 30 int (*is_valid_msr_idx)(struct kvm_vcpu *vcpu, unsigned idx); 30 31 bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr); 31 32 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data);

+2 -2

arch/x86/kvm/pmu_amd.c

··· 186 186 } 187 187 188 188 /* idx is the ECX register of RDPMC instruction */ 189 - static struct kvm_pmc *amd_msr_idx_to_pmc(struct kvm_vcpu *vcpu, unsigned idx) 189 + static struct kvm_pmc *amd_msr_idx_to_pmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *mask) 190 190 { 191 191 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); 192 192 struct kvm_pmc *counters; ··· 269 269 270 270 pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << 48) - 1; 271 271 pmu->reserved_bits = 0xffffffff00200000ull; 272 + pmu->version = 1; 272 273 /* not applicable to AMD; but clean them to prevent any fall out */ 273 274 pmu->counter_bitmask[KVM_PMC_FIXED] = 0; 274 275 pmu->nr_arch_fixed_counters = 0; 275 - pmu->version = 0; 276 276 pmu->global_status = 0; 277 277 } 278 278

+13 -2

arch/x86/kvm/svm.c

··· 379 379 static int sev = IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT); 380 380 module_param(sev, int, 0444); 381 381 382 + static bool __read_mostly dump_invalid_vmcb = 0; 383 + module_param(dump_invalid_vmcb, bool, 0644); 384 + 382 385 static u8 rsm_ins_bytes[] = "\x0f\xaa"; 383 386 384 387 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); ··· 2027 2024 if (!kvm_vcpu_apicv_active(vcpu)) 2028 2025 return; 2029 2026 2030 - if (WARN_ON(h_physical_id >= AVIC_MAX_PHYSICAL_ID_COUNT)) 2027 + /* 2028 + * Since the host physical APIC id is 8 bits, 2029 + * we can support host APIC ID upto 255. 2030 + */ 2031 + if (WARN_ON(h_physical_id > AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK)) 2031 2032 return; 2032 2033 2033 2034 entry = READ_ONCE(*(svm->avic_physical_id_cache)); ··· 4831 4824 struct vmcb_control_area *control = &svm->vmcb->control; 4832 4825 struct vmcb_save_area *save = &svm->vmcb->save; 4833 4826 4827 + if (!dump_invalid_vmcb) { 4828 + pr_warn_ratelimited("set kvm_amd.dump_invalid_vmcb=1 to dump internal KVM state.\n"); 4829 + return; 4830 + } 4831 + 4834 4832 pr_err("VMCB Control Area:\n"); 4835 4833 pr_err("%-20s%04x\n", "cr_read:", control->intercept_cr & 0xffff); 4836 4834 pr_err("%-20s%04x\n", "cr_write:", control->intercept_cr >> 16); ··· 4994 4982 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4995 4983 kvm_run->fail_entry.hardware_entry_failure_reason 4996 4984 = svm->vmcb->control.exit_code; 4997 - pr_err("KVM: FAILED VMRUN WITH VMCB:\n"); 4998 4985 dump_vmcb(vcpu); 4999 4986 return 0; 5000 4987 }

+20 -15

arch/x86/kvm/vmx/nested.c

··· 2784 2784 : "cc", "memory" 2785 2785 ); 2786 2786 2787 - preempt_enable(); 2788 - 2789 2787 if (vmx->msr_autoload.host.nr) 2790 2788 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, vmx->msr_autoload.host.nr); 2791 2789 if (vmx->msr_autoload.guest.nr) 2792 2790 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, vmx->msr_autoload.guest.nr); 2793 2791 2794 2792 if (vm_fail) { 2793 + preempt_enable(); 2795 2794 WARN_ON_ONCE(vmcs_read32(VM_INSTRUCTION_ERROR) != 2796 2795 VMXERR_ENTRY_INVALID_CONTROL_FIELD); 2797 2796 return 1; ··· 2802 2803 local_irq_enable(); 2803 2804 if (hw_breakpoint_active()) 2804 2805 set_debugreg(__this_cpu_read(cpu_dr7), 7); 2806 + preempt_enable(); 2805 2807 2806 2808 /* 2807 2809 * A non-failing VMEntry means we somehow entered guest mode with ··· 5423 5423 if (!(kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) 5424 5424 return 0; 5425 5425 5426 + vmx->nested.nested_run_pending = 5427 + !!(kvm_state->flags & KVM_STATE_NESTED_RUN_PENDING); 5428 + 5429 + ret = -EINVAL; 5426 5430 if (nested_cpu_has_shadow_vmcs(vmcs12) && 5427 5431 vmcs12->vmcs_link_pointer != -1ull) { 5428 5432 struct vmcs12 *shadow_vmcs12 = get_shadow_vmcs12(vcpu); 5429 5433 5430 - if (kvm_state->size < sizeof(*kvm_state) + 2 * sizeof(*vmcs12)) 5431 - return -EINVAL; 5434 + if (kvm_state->size < sizeof(*kvm_state) + VMCS12_SIZE + sizeof(*vmcs12)) 5435 + goto error_guest_mode; 5432 5436 5433 5437 if (copy_from_user(shadow_vmcs12, 5434 5438 user_kvm_nested_state->data + VMCS12_SIZE, 5435 - sizeof(*vmcs12))) 5436 - return -EFAULT; 5439 + sizeof(*vmcs12))) { 5440 + ret = -EFAULT; 5441 + goto error_guest_mode; 5442 + } 5437 5443 5438 5444 if (shadow_vmcs12->hdr.revision_id != VMCS12_REVISION || 5439 5445 !shadow_vmcs12->hdr.shadow_vmcs) 5440 - return -EINVAL; 5446 + goto error_guest_mode; 5441 5447 } 5442 5448 5443 5449 if (nested_vmx_check_controls(vcpu, vmcs12) || 5444 5450 nested_vmx_check_host_state(vcpu, vmcs12) || 5445 5451 nested_vmx_check_guest_state(vcpu, vmcs12, &exit_qual)) 5446 - return -EINVAL; 5452 + goto error_guest_mode; 5447 5453 5448 5454 vmx->nested.dirty_vmcs12 = true; 5449 - vmx->nested.nested_run_pending = 5450 - !!(kvm_state->flags & KVM_STATE_NESTED_RUN_PENDING); 5451 - 5452 5455 ret = nested_vmx_enter_non_root_mode(vcpu, false); 5453 - if (ret) { 5454 - vmx->nested.nested_run_pending = 0; 5455 - return -EINVAL; 5456 - } 5456 + if (ret) 5457 + goto error_guest_mode; 5457 5458 5458 5459 return 0; 5460 + 5461 + error_guest_mode: 5462 + vmx->nested.nested_run_pending = 0; 5463 + return ret; 5459 5464 } 5460 5465 5461 5466 void nested_vmx_vcpu_setup(void)

+17 -9

arch/x86/kvm/vmx/pmu_intel.c

··· 126 126 } 127 127 128 128 static struct kvm_pmc *intel_msr_idx_to_pmc(struct kvm_vcpu *vcpu, 129 - unsigned idx) 129 + unsigned idx, u64 *mask) 130 130 { 131 131 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); 132 132 bool fixed = idx & (1u << 30); ··· 138 138 if (fixed && idx >= pmu->nr_arch_fixed_counters) 139 139 return NULL; 140 140 counters = fixed ? pmu->fixed_counters : pmu->gp_counters; 141 + *mask &= pmu->counter_bitmask[fixed ? KVM_PMC_FIXED : KVM_PMC_GP]; 141 142 142 143 return &counters[idx]; 143 144 } ··· 184 183 *data = pmu->global_ovf_ctrl; 185 184 return 0; 186 185 default: 187 - if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) || 188 - (pmc = get_fixed_pmc(pmu, msr))) { 189 - *data = pmc_read_counter(pmc); 186 + if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0))) { 187 + u64 val = pmc_read_counter(pmc); 188 + *data = val & pmu->counter_bitmask[KVM_PMC_GP]; 189 + return 0; 190 + } else if ((pmc = get_fixed_pmc(pmu, msr))) { 191 + u64 val = pmc_read_counter(pmc); 192 + *data = val & pmu->counter_bitmask[KVM_PMC_FIXED]; 190 193 return 0; 191 194 } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { 192 195 *data = pmc->eventsel; ··· 240 235 } 241 236 break; 242 237 default: 243 - if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) || 244 - (pmc = get_fixed_pmc(pmu, msr))) { 245 - if (!msr_info->host_initiated) 246 - data = (s64)(s32)data; 247 - pmc->counter += data - pmc_read_counter(pmc); 238 + if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0))) { 239 + if (msr_info->host_initiated) 240 + pmc->counter = data; 241 + else 242 + pmc->counter = (s32)data; 243 + return 0; 244 + } else if ((pmc = get_fixed_pmc(pmu, msr))) { 245 + pmc->counter = data; 248 246 return 0; 249 247 } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { 250 248 if (data == pmc->eventsel)

+19 -7

arch/x86/kvm/vmx/vmx.c

··· 114 114 bool __read_mostly enable_pml = 1; 115 115 module_param_named(pml, enable_pml, bool, S_IRUGO); 116 116 117 + static bool __read_mostly dump_invalid_vmcs = 0; 118 + module_param(dump_invalid_vmcs, bool, 0644); 119 + 117 120 #define MSR_BITMAP_MODE_X2APIC 1 118 121 #define MSR_BITMAP_MODE_X2APIC_APICV 2 119 122 ··· 5610 5607 5611 5608 void dump_vmcs(void) 5612 5609 { 5613 - u32 vmentry_ctl = vmcs_read32(VM_ENTRY_CONTROLS); 5614 - u32 vmexit_ctl = vmcs_read32(VM_EXIT_CONTROLS); 5615 - u32 cpu_based_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL); 5616 - u32 pin_based_exec_ctrl = vmcs_read32(PIN_BASED_VM_EXEC_CONTROL); 5617 - u32 secondary_exec_control = 0; 5618 - unsigned long cr4 = vmcs_readl(GUEST_CR4); 5619 - u64 efer = vmcs_read64(GUEST_IA32_EFER); 5610 + u32 vmentry_ctl, vmexit_ctl; 5611 + u32 cpu_based_exec_ctrl, pin_based_exec_ctrl, secondary_exec_control; 5612 + unsigned long cr4; 5613 + u64 efer; 5620 5614 int i, n; 5621 5615 5616 + if (!dump_invalid_vmcs) { 5617 + pr_warn_ratelimited("set kvm_intel.dump_invalid_vmcs=1 to dump internal KVM state.\n"); 5618 + return; 5619 + } 5620 + 5621 + vmentry_ctl = vmcs_read32(VM_ENTRY_CONTROLS); 5622 + vmexit_ctl = vmcs_read32(VM_EXIT_CONTROLS); 5623 + cpu_based_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL); 5624 + pin_based_exec_ctrl = vmcs_read32(PIN_BASED_VM_EXEC_CONTROL); 5625 + cr4 = vmcs_readl(GUEST_CR4); 5626 + efer = vmcs_read64(GUEST_IA32_EFER); 5627 + secondary_exec_control = 0; 5622 5628 if (cpu_has_secondary_exec_ctrls()) 5623 5629 secondary_exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL); 5624 5630

+1

arch/x86/kvm/vmx/vmx.h

··· 319 319 void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu); 320 320 struct shared_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr); 321 321 void pt_update_intercept_for_msr(struct vcpu_vmx *vmx); 322 + void vmx_update_host_rsp(struct vcpu_vmx *vmx, unsigned long host_rsp); 322 323 323 324 #define POSTED_INTR_ON 0 324 325 #define POSTED_INTR_SN 1

+2 -2

arch/x86/kvm/x86.c

··· 143 143 * tuning, i.e. allows priveleged userspace to set an exact advancement time. 144 144 */ 145 145 static int __read_mostly lapic_timer_advance_ns = -1; 146 - module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR); 146 + module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR); 147 147 148 148 static bool __read_mostly vector_hashing = true; 149 149 module_param(vector_hashing, bool, S_IRUGO); ··· 1298 1298 u64 efer = msr_info->data; 1299 1299 1300 1300 if (efer & efer_reserved_bits) 1301 - return false; 1301 + return 1; 1302 1302 1303 1303 if (!msr_info->host_initiated) { 1304 1304 if (!__kvm_valid_efer(vcpu, efer))

+12 -4

tools/kvm/kvm_stat/kvm_stat

··· 575 575 def update_fields(self, fields_filter): 576 576 """Refresh fields, applying fields_filter""" 577 577 self.fields = [field for field in self._get_available_fields() 578 - if self.is_field_wanted(fields_filter, field) or 579 - ARCH.tracepoint_is_child(field)] 578 + if self.is_field_wanted(fields_filter, field)] 579 + # add parents for child fields - otherwise we won't see any output! 580 + for field in self._fields: 581 + parent = ARCH.tracepoint_is_child(field) 582 + if (parent and parent not in self._fields): 583 + self.fields.append(parent) 580 584 581 585 @staticmethod 582 586 def _get_online_cpus(): ··· 739 735 def update_fields(self, fields_filter): 740 736 """Refresh fields, applying fields_filter""" 741 737 self._fields = [field for field in self._get_available_fields() 742 - if self.is_field_wanted(fields_filter, field) or 743 - ARCH.debugfs_is_child(field)] 738 + if self.is_field_wanted(fields_filter, field)] 739 + # add parents for child fields - otherwise we won't see any output! 740 + for field in self._fields: 741 + parent = ARCH.debugfs_is_child(field) 742 + if (parent and parent not in self._fields): 743 + self.fields.append(parent) 744 744 745 745 @property 746 746 def fields(self):

+2

tools/kvm/kvm_stat/kvm_stat.txt

··· 34 34 *c*:: clear filter 35 35 36 36 *f*:: filter by regular expression 37 + :: *Note*: Child events pull in their parents, and parents' stats summarize 38 + all child events, not just the filtered ones 37 39 38 40 *g*:: filter by guest name/PID 39 41

+3 -1

tools/testing/selftests/kvm/Makefile

··· 35 35 INSTALL_HDR_PATH = $(top_srcdir)/usr 36 36 LINUX_HDR_PATH = $(INSTALL_HDR_PATH)/include/ 37 37 LINUX_TOOL_INCLUDE = $(top_srcdir)/tools/include 38 - CFLAGS += -O2 -g -std=gnu99 -fno-stack-protector -fno-PIE -I$(LINUX_TOOL_INCLUDE) -I$(LINUX_HDR_PATH) -Iinclude -I$(<D) -Iinclude/$(UNAME_M) -I.. 38 + CFLAGS += -Wall -Wstrict-prototypes -Wuninitialized -O2 -g -std=gnu99 \ 39 + -fno-stack-protector -fno-PIE -I$(LINUX_TOOL_INCLUDE) \ 40 + -I$(LINUX_HDR_PATH) -Iinclude -I$(<D) -Iinclude/$(UNAME_M) -I.. 39 41 40 42 no-pie-option := $(call try-run, echo 'int main() { return 0; }' | \ 41 43 $(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -no-pie -x c - -o "$$TMP", -no-pie)

+6 -2

tools/testing/selftests/kvm/dirty_log_test.c

··· 131 131 while (!READ_ONCE(host_quit)) { 132 132 /* Let the guest dirty the random pages */ 133 133 ret = _vcpu_run(vm, VCPU_ID); 134 + TEST_ASSERT(ret == 0, "vcpu_run failed: %d\n", ret); 134 135 if (get_ucall(vm, VCPU_ID, &uc) == UCALL_SYNC) { 135 136 pages_count += TEST_PAGES_PER_LOOP; 136 137 generate_random_array(guest_array, TEST_PAGES_PER_LOOP); ··· 293 292 * A little more than 1G of guest page sized pages. Cover the 294 293 * case where the size is not aligned to 64 pages. 295 294 */ 296 - guest_num_pages = (1ul << (30 - guest_page_shift)) + 3; 295 + guest_num_pages = (1ul << (30 - guest_page_shift)) + 16; 297 296 host_page_size = getpagesize(); 298 297 host_num_pages = (guest_num_pages * guest_page_size) / host_page_size + 299 298 !!((guest_num_pages * guest_page_size) % host_page_size); ··· 427 426 unsigned long interval = TEST_HOST_LOOP_INTERVAL; 428 427 bool mode_selected = false; 429 428 uint64_t phys_offset = 0; 430 - unsigned int mode, host_ipa_limit; 429 + unsigned int mode; 431 430 int opt, i; 431 + #ifdef __aarch64__ 432 + unsigned int host_ipa_limit; 433 + #endif 432 434 433 435 #ifdef USE_CLEAR_DIRTY_LOG 434 436 if (!kvm_check_cap(KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2)) {

+2

tools/testing/selftests/kvm/include/kvm_util.h

··· 118 118 struct kvm_vcpu_events *events); 119 119 void vcpu_events_set(struct kvm_vm *vm, uint32_t vcpuid, 120 120 struct kvm_vcpu_events *events); 121 + #ifdef __x86_64__ 121 122 void vcpu_nested_state_get(struct kvm_vm *vm, uint32_t vcpuid, 122 123 struct kvm_nested_state *state); 123 124 int vcpu_nested_state_set(struct kvm_vm *vm, uint32_t vcpuid, 124 125 struct kvm_nested_state *state, bool ignore_error); 126 + #endif 125 127 126 128 const char *exit_reason_str(unsigned int exit_reason); 127 129

+6 -5

tools/testing/selftests/kvm/lib/aarch64/processor.c

··· 7 7 8 8 #define _GNU_SOURCE /* for program_invocation_name */ 9 9 10 + #include <linux/compiler.h> 11 + 10 12 #include "kvm_util.h" 11 13 #include "../kvm_util_internal.h" 12 14 #include "processor.h" ··· 69 67 return 1 << (vm->va_bits - shift); 70 68 } 71 69 72 - static uint64_t ptrs_per_pte(struct kvm_vm *vm) 70 + static uint64_t __maybe_unused ptrs_per_pte(struct kvm_vm *vm) 73 71 { 74 72 return 1 << (vm->page_shift - 3); 75 73 } 76 74 77 75 void virt_pgd_alloc(struct kvm_vm *vm, uint32_t pgd_memslot) 78 76 { 79 - int rc; 80 - 81 77 if (!vm->pgd_created) { 82 78 vm_paddr_t paddr = vm_phy_pages_alloc(vm, 83 79 page_align(vm, ptrs_per_pgd(vm) * 8) / vm->page_size, ··· 181 181 unmapped_gva: 182 182 TEST_ASSERT(false, "No mapping for vm virtual address, " 183 183 "gva: 0x%lx", gva); 184 + exit(1); 184 185 } 185 186 186 187 static void pte_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent, uint64_t page, int level) ··· 227 226 uint64_t extra_pg_pages = (extra_mem_pages / ptrs_per_4k_pte) * 2; 228 227 struct kvm_vm *vm; 229 228 230 - vm = vm_create(VM_MODE_P52V48_4K, DEFAULT_GUEST_PHY_PAGES + extra_pg_pages, O_RDWR); 229 + vm = vm_create(VM_MODE_P40V48_4K, DEFAULT_GUEST_PHY_PAGES + extra_pg_pages, O_RDWR); 231 230 232 231 kvm_vm_elf_load(vm, program_invocation_name, 0, 0); 233 232 vm_vcpu_add_default(vm, vcpuid, guest_code); ··· 313 312 get_reg(vm, vcpuid, ARM64_CORE_REG(regs.pstate), &pstate); 314 313 get_reg(vm, vcpuid, ARM64_CORE_REG(regs.pc), &pc); 315 314 316 - fprintf(stream, "%*spstate: 0x%.16llx pc: 0x%.16llx\n", 315 + fprintf(stream, "%*spstate: 0x%.16lx pc: 0x%.16lx\n", 317 316 indent, "", pstate, pc); 318 317 }

+2 -3

tools/testing/selftests/kvm/lib/kvm_util.c

··· 135 135 int perm, unsigned long type) 136 136 { 137 137 struct kvm_vm *vm; 138 - int kvm_fd; 139 138 140 139 vm = calloc(1, sizeof(*vm)); 141 140 TEST_ASSERT(vm != NULL, "Insufficient Memory"); ··· 555 556 uint32_t flags) 556 557 { 557 558 int ret; 558 - unsigned long pmem_size = 0; 559 559 struct userspace_mem_region *region; 560 560 size_t huge_page_size = KVM_UTIL_PGS_PER_HUGEPG * vm->page_size; 561 561 ··· 1248 1250 ret, errno); 1249 1251 } 1250 1252 1253 + #ifdef __x86_64__ 1251 1254 void vcpu_nested_state_get(struct kvm_vm *vm, uint32_t vcpuid, 1252 1255 struct kvm_nested_state *state) 1253 1256 { ··· 1280 1281 1281 1282 return ret; 1282 1283 } 1284 + #endif 1283 1285 1284 1286 /* 1285 1287 * VM VCPU System Regs Get ··· 1334 1334 int _vcpu_sregs_set(struct kvm_vm *vm, uint32_t vcpuid, struct kvm_sregs *sregs) 1335 1335 { 1336 1336 struct vcpu *vcpu = vcpu_find(vm, vcpuid); 1337 - int ret; 1338 1337 1339 1338 TEST_ASSERT(vcpu != NULL, "vcpu not found, vcpuid: %u", vcpuid); 1340 1339

+1 -1

tools/testing/selftests/kvm/lib/ucall.c

··· 142 142 vm_vaddr_t gva; 143 143 TEST_ASSERT(run->mmio.is_write && run->mmio.len == 8, 144 144 "Unexpected ucall exit mmio address access"); 145 - gva = *(vm_vaddr_t *)run->mmio.data; 145 + memcpy(&gva, run->mmio.data, sizeof(gva)); 146 146 memcpy(uc, addr_gva2hva(vm, gva), sizeof(*uc)); 147 147 } 148 148

+1 -3

tools/testing/selftests/kvm/lib/x86_64/processor.c

··· 229 229 230 230 void virt_pgd_alloc(struct kvm_vm *vm, uint32_t pgd_memslot) 231 231 { 232 - int rc; 233 - 234 232 TEST_ASSERT(vm->mode == VM_MODE_P52V48_4K, "Attempt to use " 235 233 "unknown or unsupported guest mode, mode: 0x%x", vm->mode); 236 234 ··· 547 549 struct pageDirectoryPointerEntry *pdpe; 548 550 struct pageDirectoryEntry *pde; 549 551 struct pageTableEntry *pte; 550 - void *hva; 551 552 552 553 TEST_ASSERT(vm->mode == VM_MODE_P52V48_4K, "Attempt to use " 553 554 "unknown or unsupported guest mode, mode: 0x%x", vm->mode); ··· 579 582 unmapped_gva: 580 583 TEST_ASSERT(false, "No mapping for vm virtual address, " 581 584 "gva: 0x%lx", gva); 585 + exit(EXIT_FAILURE); 582 586 } 583 587 584 588 static void kvm_setup_gdt(struct kvm_vm *vm, struct kvm_dtable *dt, int gdt_memslot,

+1

tools/testing/selftests/kvm/x86_64/cr4_cpuid_sync_test.c

··· 87 87 while (1) { 88 88 rc = _vcpu_run(vm, VCPU_ID); 89 89 90 + TEST_ASSERT(rc == 0, "vcpu_run failed: %d\n", rc); 90 91 TEST_ASSERT(run->exit_reason == KVM_EXIT_IO, 91 92 "Unexpected exit reason: %u (%s),\n", 92 93 run->exit_reason,

+1 -6

tools/testing/selftests/kvm/x86_64/evmcs_test.c

··· 19 19 20 20 #define VCPU_ID 5 21 21 22 - static bool have_nested_state; 23 - 24 22 void l2_guest_code(void) 25 23 { 26 24 GUEST_SYNC(6); ··· 71 73 72 74 int main(int argc, char *argv[]) 73 75 { 74 - struct vmx_pages *vmx_pages = NULL; 75 76 vm_vaddr_t vmx_pages_gva = 0; 76 77 77 78 struct kvm_regs regs1, regs2; ··· 84 87 .cap = KVM_CAP_HYPERV_ENLIGHTENED_VMCS, 85 88 .args[0] = (unsigned long)&evmcs_ver 86 89 }; 87 - 88 - struct kvm_cpuid_entry2 *entry = kvm_get_supported_cpuid_entry(1); 89 90 90 91 /* Create VM */ 91 92 vm = vm_create_default(VCPU_ID, 0, guest_code); ··· 108 113 109 114 vcpu_regs_get(vm, VCPU_ID, &regs1); 110 115 111 - vmx_pages = vcpu_alloc_vmx(vm, &vmx_pages_gva); 116 + vcpu_alloc_vmx(vm, &vmx_pages_gva); 112 117 vcpu_args_set(vm, VCPU_ID, 1, vmx_pages_gva); 113 118 114 119 for (stage = 1;; stage++) {

+2 -7

tools/testing/selftests/kvm/x86_64/hyperv_cpuid.c

··· 52 52 TEST_ASSERT(entry->index == 0, 53 53 ".index field should be zero"); 54 54 55 - TEST_ASSERT(entry->index == 0, 56 - ".index field should be zero"); 57 - 58 55 TEST_ASSERT(entry->flags == 0, 59 56 ".flags field should be zero"); 60 57 61 - TEST_ASSERT(entry->padding[0] == entry->padding[1] 62 - == entry->padding[2] == 0, 63 - ".index field should be zero"); 58 + TEST_ASSERT(!entry->padding[0] && !entry->padding[1] && 59 + !entry->padding[2], "padding should be zero"); 64 60 65 61 /* 66 62 * If needed for debug: ··· 86 90 { 87 91 int nent = 20; /* should be enough */ 88 92 static struct kvm_cpuid2 *cpuid; 89 - int ret; 90 93 91 94 cpuid = malloc(sizeof(*cpuid) + nent * sizeof(struct kvm_cpuid_entry2)); 92 95

-1

tools/testing/selftests/kvm/x86_64/platform_info_test.c

··· 81 81 int main(int argc, char *argv[]) 82 82 { 83 83 struct kvm_vm *vm; 84 - struct kvm_run *state; 85 84 int rv; 86 85 uint64_t msr_platform_info; 87 86

+1 -2

tools/testing/selftests/kvm/x86_64/smm_test.c

··· 87 87 88 88 int main(int argc, char *argv[]) 89 89 { 90 - struct vmx_pages *vmx_pages = NULL; 91 90 vm_vaddr_t vmx_pages_gva = 0; 92 91 93 92 struct kvm_regs regs; ··· 114 115 vcpu_set_msr(vm, VCPU_ID, MSR_IA32_SMBASE, SMRAM_GPA); 115 116 116 117 if (kvm_check_cap(KVM_CAP_NESTED_STATE)) { 117 - vmx_pages = vcpu_alloc_vmx(vm, &vmx_pages_gva); 118 + vcpu_alloc_vmx(vm, &vmx_pages_gva); 118 119 vcpu_args_set(vm, VCPU_ID, 1, vmx_pages_gva); 119 120 } else { 120 121 printf("will skip SMM test with VMX enabled\n");

+1 -6

tools/testing/selftests/kvm/x86_64/state_test.c

··· 22 22 23 23 #define VCPU_ID 5 24 24 25 - static bool have_nested_state; 26 - 27 25 void l2_guest_code(void) 28 26 { 29 27 GUEST_SYNC(6); ··· 120 122 121 123 int main(int argc, char *argv[]) 122 124 { 123 - struct vmx_pages *vmx_pages = NULL; 124 125 vm_vaddr_t vmx_pages_gva = 0; 125 126 126 127 struct kvm_regs regs1, regs2; ··· 129 132 struct ucall uc; 130 133 int stage; 131 134 132 - struct kvm_cpuid_entry2 *entry = kvm_get_supported_cpuid_entry(1); 133 - 134 135 /* Create VM */ 135 136 vm = vm_create_default(VCPU_ID, 0, guest_code); 136 137 vcpu_set_cpuid(vm, VCPU_ID, kvm_get_supported_cpuid()); ··· 137 142 vcpu_regs_get(vm, VCPU_ID, &regs1); 138 143 139 144 if (kvm_check_cap(KVM_CAP_NESTED_STATE)) { 140 - vmx_pages = vcpu_alloc_vmx(vm, &vmx_pages_gva); 145 + vcpu_alloc_vmx(vm, &vmx_pages_gva); 141 146 vcpu_args_set(vm, VCPU_ID, 1, vmx_pages_gva); 142 147 } else { 143 148 printf("will skip nested state checks\n");

+30 -24

tools/testing/selftests/kvm/x86_64/sync_regs_test.c

··· 25 25 26 26 void guest_code(void) 27 27 { 28 + /* 29 + * use a callee-save register, otherwise the compiler 30 + * saves it around the call to GUEST_SYNC. 31 + */ 32 + register u32 stage asm("rbx"); 28 33 for (;;) { 29 34 GUEST_SYNC(0); 30 - asm volatile ("inc %r11"); 35 + stage++; 36 + asm volatile ("" : : "r" (stage)); 31 37 } 32 38 } 33 39 ··· 153 147 compare_vcpu_events(&events, &run->s.regs.events); 154 148 155 149 /* Set and verify various register values. */ 156 - run->s.regs.regs.r11 = 0xBAD1DEA; 150 + run->s.regs.regs.rbx = 0xBAD1DEA; 157 151 run->s.regs.sregs.apic_base = 1 << 11; 158 152 /* TODO run->s.regs.events.XYZ = ABC; */ 159 153 ··· 164 158 "Unexpected exit reason: %u (%s),\n", 165 159 run->exit_reason, 166 160 exit_reason_str(run->exit_reason)); 167 - TEST_ASSERT(run->s.regs.regs.r11 == 0xBAD1DEA + 1, 168 - "r11 sync regs value incorrect 0x%llx.", 169 - run->s.regs.regs.r11); 161 + TEST_ASSERT(run->s.regs.regs.rbx == 0xBAD1DEA + 1, 162 + "rbx sync regs value incorrect 0x%llx.", 163 + run->s.regs.regs.rbx); 170 164 TEST_ASSERT(run->s.regs.sregs.apic_base == 1 << 11, 171 165 "apic_base sync regs value incorrect 0x%llx.", 172 166 run->s.regs.sregs.apic_base); ··· 185 179 */ 186 180 run->kvm_valid_regs = TEST_SYNC_FIELDS; 187 181 run->kvm_dirty_regs = 0; 188 - run->s.regs.regs.r11 = 0xDEADBEEF; 182 + run->s.regs.regs.rbx = 0xDEADBEEF; 189 183 rv = _vcpu_run(vm, VCPU_ID); 190 184 TEST_ASSERT(run->exit_reason == KVM_EXIT_IO, 191 185 "Unexpected exit reason: %u (%s),\n", 192 186 run->exit_reason, 193 187 exit_reason_str(run->exit_reason)); 194 - TEST_ASSERT(run->s.regs.regs.r11 != 0xDEADBEEF, 195 - "r11 sync regs value incorrect 0x%llx.", 196 - run->s.regs.regs.r11); 188 + TEST_ASSERT(run->s.regs.regs.rbx != 0xDEADBEEF, 189 + "rbx sync regs value incorrect 0x%llx.", 190 + run->s.regs.regs.rbx); 197 191 198 192 /* Clear kvm_valid_regs bits and kvm_dirty_bits. 199 193 * Verify s.regs values are not overwritten with existing guest values ··· 201 195 */ 202 196 run->kvm_valid_regs = 0; 203 197 run->kvm_dirty_regs = 0; 204 - run->s.regs.regs.r11 = 0xAAAA; 205 - regs.r11 = 0xBAC0; 198 + run->s.regs.regs.rbx = 0xAAAA; 199 + regs.rbx = 0xBAC0; 206 200 vcpu_regs_set(vm, VCPU_ID, &regs); 207 201 rv = _vcpu_run(vm, VCPU_ID); 208 202 TEST_ASSERT(run->exit_reason == KVM_EXIT_IO, 209 203 "Unexpected exit reason: %u (%s),\n", 210 204 run->exit_reason, 211 205 exit_reason_str(run->exit_reason)); 212 - TEST_ASSERT(run->s.regs.regs.r11 == 0xAAAA, 213 - "r11 sync regs value incorrect 0x%llx.", 214 - run->s.regs.regs.r11); 206 + TEST_ASSERT(run->s.regs.regs.rbx == 0xAAAA, 207 + "rbx sync regs value incorrect 0x%llx.", 208 + run->s.regs.regs.rbx); 215 209 vcpu_regs_get(vm, VCPU_ID, &regs); 216 - TEST_ASSERT(regs.r11 == 0xBAC0 + 1, 217 - "r11 guest value incorrect 0x%llx.", 218 - regs.r11); 210 + TEST_ASSERT(regs.rbx == 0xBAC0 + 1, 211 + "rbx guest value incorrect 0x%llx.", 212 + regs.rbx); 219 213 220 214 /* Clear kvm_valid_regs bits. Verify s.regs values are not overwritten 221 215 * with existing guest values but that guest values are overwritten ··· 223 217 */ 224 218 run->kvm_valid_regs = 0; 225 219 run->kvm_dirty_regs = TEST_SYNC_FIELDS; 226 - run->s.regs.regs.r11 = 0xBBBB; 220 + run->s.regs.regs.rbx = 0xBBBB; 227 221 rv = _vcpu_run(vm, VCPU_ID); 228 222 TEST_ASSERT(run->exit_reason == KVM_EXIT_IO, 229 223 "Unexpected exit reason: %u (%s),\n", 230 224 run->exit_reason, 231 225 exit_reason_str(run->exit_reason)); 232 - TEST_ASSERT(run->s.regs.regs.r11 == 0xBBBB, 233 - "r11 sync regs value incorrect 0x%llx.", 234 - run->s.regs.regs.r11); 226 + TEST_ASSERT(run->s.regs.regs.rbx == 0xBBBB, 227 + "rbx sync regs value incorrect 0x%llx.", 228 + run->s.regs.regs.rbx); 235 229 vcpu_regs_get(vm, VCPU_ID, &regs); 236 - TEST_ASSERT(regs.r11 == 0xBBBB + 1, 237 - "r11 guest value incorrect 0x%llx.", 238 - regs.r11); 230 + TEST_ASSERT(regs.rbx == 0xBBBB + 1, 231 + "rbx guest value incorrect 0x%llx.", 232 + regs.rbx); 239 233 240 234 kvm_vm_free(vm); 241 235

+1 -4

tools/testing/selftests/kvm/x86_64/vmx_close_while_nested_test.c

··· 39 39 { 40 40 #define L2_GUEST_STACK_SIZE 64 41 41 unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE]; 42 - uint32_t control; 43 - uintptr_t save_cr3; 44 42 45 43 GUEST_ASSERT(prepare_for_vmx_operation(vmx_pages)); 46 44 GUEST_ASSERT(load_vmcs(vmx_pages)); ··· 53 55 54 56 int main(int argc, char *argv[]) 55 57 { 56 - struct vmx_pages *vmx_pages; 57 58 vm_vaddr_t vmx_pages_gva; 58 59 struct kvm_cpuid_entry2 *entry = kvm_get_supported_cpuid_entry(1); 59 60 ··· 65 68 vcpu_set_cpuid(vm, VCPU_ID, kvm_get_supported_cpuid()); 66 69 67 70 /* Allocate VMX pages and shared descriptors (vmx_pages). */ 68 - vmx_pages = vcpu_alloc_vmx(vm, &vmx_pages_gva); 71 + vcpu_alloc_vmx(vm, &vmx_pages_gva); 69 72 vcpu_args_set(vm, VCPU_ID, 1, vmx_pages_gva); 70 73 71 74 for (;;) {

+1 -1

tools/testing/selftests/kvm/x86_64/vmx_set_nested_state_test.c

··· 75 75 u32 vmcs12_revision) 76 76 { 77 77 /* Set revision_id in vmcs12 to vmcs12_revision. */ 78 - *(u32 *)(state->data) = vmcs12_revision; 78 + memcpy(state->data, &vmcs12_revision, sizeof(u32)); 79 79 } 80 80 81 81 void set_default_state(struct kvm_nested_state *state)

+2 -3

tools/testing/selftests/kvm/x86_64/vmx_tsc_adjust_test.c

··· 121 121 GUEST_DONE(); 122 122 } 123 123 124 - void report(int64_t val) 124 + static void report(int64_t val) 125 125 { 126 126 printf("IA32_TSC_ADJUST is %ld (%lld * TSC_ADJUST_VALUE + %lld).\n", 127 127 val, val / TSC_ADJUST_VALUE, val % TSC_ADJUST_VALUE); ··· 129 129 130 130 int main(int argc, char *argv[]) 131 131 { 132 - struct vmx_pages *vmx_pages; 133 132 vm_vaddr_t vmx_pages_gva; 134 133 struct kvm_cpuid_entry2 *entry = kvm_get_supported_cpuid_entry(1); 135 134 ··· 141 142 vcpu_set_cpuid(vm, VCPU_ID, kvm_get_supported_cpuid()); 142 143 143 144 /* Allocate VMX pages and shared descriptors (vmx_pages). */ 144 - vmx_pages = vcpu_alloc_vmx(vm, &vmx_pages_gva); 145 + vcpu_alloc_vmx(vm, &vmx_pages_gva); 145 146 vcpu_args_set(vm, VCPU_ID, 1, vmx_pages_gva); 146 147 147 148 for (;;) {

-121

virt/kvm/arm/aarch32.c

··· 26 26 #include <asm/kvm_hyp.h> 27 27 28 28 /* 29 - * stolen from arch/arm/kernel/opcodes.c 30 - * 31 - * condition code lookup table 32 - * index into the table is test code: EQ, NE, ... LT, GT, AL, NV 33 - * 34 - * bit position in short is condition code: NZCV 35 - */ 36 - static const unsigned short cc_map[16] = { 37 - 0xF0F0, /* EQ == Z set */ 38 - 0x0F0F, /* NE */ 39 - 0xCCCC, /* CS == C set */ 40 - 0x3333, /* CC */ 41 - 0xFF00, /* MI == N set */ 42 - 0x00FF, /* PL */ 43 - 0xAAAA, /* VS == V set */ 44 - 0x5555, /* VC */ 45 - 0x0C0C, /* HI == C set && Z clear */ 46 - 0xF3F3, /* LS == C clear || Z set */ 47 - 0xAA55, /* GE == (N==V) */ 48 - 0x55AA, /* LT == (N!=V) */ 49 - 0x0A05, /* GT == (!Z && (N==V)) */ 50 - 0xF5FA, /* LE == (Z || (N!=V)) */ 51 - 0xFFFF, /* AL always */ 52 - 0 /* NV */ 53 - }; 54 - 55 - /* 56 - * Check if a trapped instruction should have been executed or not. 57 - */ 58 - bool __hyp_text kvm_condition_valid32(const struct kvm_vcpu *vcpu) 59 - { 60 - unsigned long cpsr; 61 - u32 cpsr_cond; 62 - int cond; 63 - 64 - /* Top two bits non-zero? Unconditional. */ 65 - if (kvm_vcpu_get_hsr(vcpu) >> 30) 66 - return true; 67 - 68 - /* Is condition field valid? */ 69 - cond = kvm_vcpu_get_condition(vcpu); 70 - if (cond == 0xE) 71 - return true; 72 - 73 - cpsr = *vcpu_cpsr(vcpu); 74 - 75 - if (cond < 0) { 76 - /* This can happen in Thumb mode: examine IT state. */ 77 - unsigned long it; 78 - 79 - it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); 80 - 81 - /* it == 0 => unconditional. */ 82 - if (it == 0) 83 - return true; 84 - 85 - /* The cond for this insn works out as the top 4 bits. */ 86 - cond = (it >> 4); 87 - } 88 - 89 - cpsr_cond = cpsr >> 28; 90 - 91 - if (!((cc_map[cond] >> cpsr_cond) & 1)) 92 - return false; 93 - 94 - return true; 95 - } 96 - 97 - /** 98 - * adjust_itstate - adjust ITSTATE when emulating instructions in IT-block 99 - * @vcpu: The VCPU pointer 100 - * 101 - * When exceptions occur while instructions are executed in Thumb IF-THEN 102 - * blocks, the ITSTATE field of the CPSR is not advanced (updated), so we have 103 - * to do this little bit of work manually. The fields map like this: 104 - * 105 - * IT[7:0] -> CPSR[26:25],CPSR[15:10] 106 - */ 107 - static void __hyp_text kvm_adjust_itstate(struct kvm_vcpu *vcpu) 108 - { 109 - unsigned long itbits, cond; 110 - unsigned long cpsr = *vcpu_cpsr(vcpu); 111 - bool is_arm = !(cpsr & PSR_AA32_T_BIT); 112 - 113 - if (is_arm || !(cpsr & PSR_AA32_IT_MASK)) 114 - return; 115 - 116 - cond = (cpsr & 0xe000) >> 13; 117 - itbits = (cpsr & 0x1c00) >> (10 - 2); 118 - itbits |= (cpsr & (0x3 << 25)) >> 25; 119 - 120 - /* Perform ITAdvance (see page A2-52 in ARM DDI 0406C) */ 121 - if ((itbits & 0x7) == 0) 122 - itbits = cond = 0; 123 - else 124 - itbits = (itbits << 1) & 0x1f; 125 - 126 - cpsr &= ~PSR_AA32_IT_MASK; 127 - cpsr |= cond << 13; 128 - cpsr |= (itbits & 0x1c) << (10 - 2); 129 - cpsr |= (itbits & 0x3) << 25; 130 - *vcpu_cpsr(vcpu) = cpsr; 131 - } 132 - 133 - /** 134 - * kvm_skip_instr - skip a trapped instruction and proceed to the next 135 - * @vcpu: The vcpu pointer 136 - */ 137 - void __hyp_text kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr) 138 - { 139 - bool is_thumb; 140 - 141 - is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_AA32_T_BIT); 142 - if (is_thumb && !is_wide_instr) 143 - *vcpu_pc(vcpu) += 2; 144 - else 145 - *vcpu_pc(vcpu) += 4; 146 - kvm_adjust_itstate(vcpu); 147 - } 148 - 149 - /* 150 29 * Table taken from ARMv8 ARM DDI0487B-B, table G1-10. 151 30 */ 152 31 static const u8 return_offsets[8][2] = {

+136

virt/kvm/arm/hyp/aarch32.c

··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Hyp portion of the (not much of an) Emulation layer for 32bit guests. 4 + * 5 + * Copyright (C) 2012,2013 - ARM Ltd 6 + * Author: Marc Zyngier <marc.zyngier@arm.com> 7 + * 8 + * based on arch/arm/kvm/emulate.c 9 + * Copyright (C) 2012 - Virtual Open Systems and Columbia University 10 + * Author: Christoffer Dall <c.dall@virtualopensystems.com> 11 + */ 12 + 13 + #include <linux/kvm_host.h> 14 + #include <asm/kvm_emulate.h> 15 + #include <asm/kvm_hyp.h> 16 + 17 + /* 18 + * stolen from arch/arm/kernel/opcodes.c 19 + * 20 + * condition code lookup table 21 + * index into the table is test code: EQ, NE, ... LT, GT, AL, NV 22 + * 23 + * bit position in short is condition code: NZCV 24 + */ 25 + static const unsigned short cc_map[16] = { 26 + 0xF0F0, /* EQ == Z set */ 27 + 0x0F0F, /* NE */ 28 + 0xCCCC, /* CS == C set */ 29 + 0x3333, /* CC */ 30 + 0xFF00, /* MI == N set */ 31 + 0x00FF, /* PL */ 32 + 0xAAAA, /* VS == V set */ 33 + 0x5555, /* VC */ 34 + 0x0C0C, /* HI == C set && Z clear */ 35 + 0xF3F3, /* LS == C clear || Z set */ 36 + 0xAA55, /* GE == (N==V) */ 37 + 0x55AA, /* LT == (N!=V) */ 38 + 0x0A05, /* GT == (!Z && (N==V)) */ 39 + 0xF5FA, /* LE == (Z || (N!=V)) */ 40 + 0xFFFF, /* AL always */ 41 + 0 /* NV */ 42 + }; 43 + 44 + /* 45 + * Check if a trapped instruction should have been executed or not. 46 + */ 47 + bool __hyp_text kvm_condition_valid32(const struct kvm_vcpu *vcpu) 48 + { 49 + unsigned long cpsr; 50 + u32 cpsr_cond; 51 + int cond; 52 + 53 + /* Top two bits non-zero? Unconditional. */ 54 + if (kvm_vcpu_get_hsr(vcpu) >> 30) 55 + return true; 56 + 57 + /* Is condition field valid? */ 58 + cond = kvm_vcpu_get_condition(vcpu); 59 + if (cond == 0xE) 60 + return true; 61 + 62 + cpsr = *vcpu_cpsr(vcpu); 63 + 64 + if (cond < 0) { 65 + /* This can happen in Thumb mode: examine IT state. */ 66 + unsigned long it; 67 + 68 + it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); 69 + 70 + /* it == 0 => unconditional. */ 71 + if (it == 0) 72 + return true; 73 + 74 + /* The cond for this insn works out as the top 4 bits. */ 75 + cond = (it >> 4); 76 + } 77 + 78 + cpsr_cond = cpsr >> 28; 79 + 80 + if (!((cc_map[cond] >> cpsr_cond) & 1)) 81 + return false; 82 + 83 + return true; 84 + } 85 + 86 + /** 87 + * adjust_itstate - adjust ITSTATE when emulating instructions in IT-block 88 + * @vcpu: The VCPU pointer 89 + * 90 + * When exceptions occur while instructions are executed in Thumb IF-THEN 91 + * blocks, the ITSTATE field of the CPSR is not advanced (updated), so we have 92 + * to do this little bit of work manually. The fields map like this: 93 + * 94 + * IT[7:0] -> CPSR[26:25],CPSR[15:10] 95 + */ 96 + static void __hyp_text kvm_adjust_itstate(struct kvm_vcpu *vcpu) 97 + { 98 + unsigned long itbits, cond; 99 + unsigned long cpsr = *vcpu_cpsr(vcpu); 100 + bool is_arm = !(cpsr & PSR_AA32_T_BIT); 101 + 102 + if (is_arm || !(cpsr & PSR_AA32_IT_MASK)) 103 + return; 104 + 105 + cond = (cpsr & 0xe000) >> 13; 106 + itbits = (cpsr & 0x1c00) >> (10 - 2); 107 + itbits |= (cpsr & (0x3 << 25)) >> 25; 108 + 109 + /* Perform ITAdvance (see page A2-52 in ARM DDI 0406C) */ 110 + if ((itbits & 0x7) == 0) 111 + itbits = cond = 0; 112 + else 113 + itbits = (itbits << 1) & 0x1f; 114 + 115 + cpsr &= ~PSR_AA32_IT_MASK; 116 + cpsr |= cond << 13; 117 + cpsr |= (itbits & 0x1c) << (10 - 2); 118 + cpsr |= (itbits & 0x3) << 25; 119 + *vcpu_cpsr(vcpu) = cpsr; 120 + } 121 + 122 + /** 123 + * kvm_skip_instr - skip a trapped instruction and proceed to the next 124 + * @vcpu: The vcpu pointer 125 + */ 126 + void __hyp_text kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr) 127 + { 128 + bool is_thumb; 129 + 130 + is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_AA32_T_BIT); 131 + if (is_thumb && !is_wide_instr) 132 + *vcpu_pc(vcpu) += 2; 133 + else 134 + *vcpu_pc(vcpu) += 4; 135 + kvm_adjust_itstate(vcpu); 136 + }

+9

virt/kvm/eventfd.c

··· 44 44 45 45 static struct workqueue_struct *irqfd_cleanup_wq; 46 46 47 + bool __attribute__((weak)) 48 + kvm_arch_irqfd_allowed(struct kvm *kvm, struct kvm_irqfd *args) 49 + { 50 + return true; 51 + } 52 + 47 53 static void 48 54 irqfd_inject(struct work_struct *work) 49 55 { ··· 302 296 303 297 if (!kvm_arch_intc_initialized(kvm)) 304 298 return -EAGAIN; 299 + 300 + if (!kvm_arch_irqfd_allowed(kvm, args)) 301 + return -EINVAL; 305 302 306 303 irqfd = kzalloc(sizeof(*irqfd), GFP_KERNEL_ACCOUNT); 307 304 if (!irqfd)

+6 -1

virt/kvm/kvm_main.c

··· 52 52 #include <linux/sort.h> 53 53 #include <linux/bsearch.h> 54 54 #include <linux/io.h> 55 + #include <linux/lockdep.h> 55 56 56 57 #include <asm/processor.h> 57 58 #include <asm/ioctl.h> ··· 1761 1760 if (pfn_valid(pfn)) { 1762 1761 page = pfn_to_page(pfn); 1763 1762 hva = kmap(page); 1763 + #ifdef CONFIG_HAS_IOMEM 1764 1764 } else { 1765 1765 hva = memremap(pfn_to_hpa(pfn), PAGE_SIZE, MEMREMAP_WB); 1766 + #endif 1766 1767 } 1767 1768 1768 1769 if (!hva) ··· 4184 4181 static void kvm_resume(void) 4185 4182 { 4186 4183 if (kvm_usage_count) { 4187 - lockdep_assert_held(&kvm_count_lock); 4184 + #ifdef CONFIG_LOCKDEP 4185 + WARN_ON(lockdep_is_held(&kvm_count_lock)); 4186 + #endif 4188 4187 hardware_enable_nolock(NULL); 4189 4188 } 4190 4189 }

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