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dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs

The NXP S32 SoCs have a GPR region which is used by a variety of
drivers. Some examples of the registers in this region are:

* DDR_PMU_IRQ
* GMAC0_PHY_INTF_SEL
* GMAC1_PHY_INTF_SEL
* PFE_EMACS_INTF_SEL
* PFE_COH_EN
* PFE_PWR_CTRL
* PFE_EMACS_GENCTRL1
* PFE_GENCTRL3

Use the syscon interface to access these registers.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/792d3f59b9f519529b94e673faf70d77c4b61fb3.1765806521.git.dan.carpenter@linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>

authored by

Dan Carpenter and committed by
Lee Jones 8644fa4a 1c378a4c

+4
+4
Documentation/devicetree/bindings/mfd/syscon.yaml
··· 102 102 - mstar,msc313-pmsleep 103 103 - nuvoton,ma35d1-sys 104 104 - nuvoton,wpcm450-shm 105 + - nxp,s32g2-gpr 106 + - nxp,s32g3-gpr 105 107 - qcom,apq8064-mmss-sfpb 106 108 - qcom,apq8064-sps-sic 107 109 - rockchip,px30-qos ··· 214 212 - mstar,msc313-pmsleep 215 213 - nuvoton,ma35d1-sys 216 214 - nuvoton,wpcm450-shm 215 + - nxp,s32g2-gpr 216 + - nxp,s32g3-gpr 217 217 - qcom,apq8064-mmss-sfpb 218 218 - qcom,apq8064-sps-sic 219 219 - rockchip,px30-qos