tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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arm64: mpam: Re-initialise MPAM regs when CPU comes online

Now that the MPAM system registers are expected to have values that change,
reprogram them based on the previous value when a CPU is brought online.

Previously MPAM's 'default PARTID' of 0 was always used for MPAM in
kernel-space as this is the PARTID that hardware guarantees to
reset. Because there are a limited number of PARTID, this value is exposed
to user-space, meaning resctrl changes to the resctrl default group would
also affect kernel threads. Instead, use the task's PARTID value for
kernel work on behalf of user-space too. The default of 0 is kept for both
user-space and kernel-space when MPAM is not enabled.

Tested-by: Gavin Shan <gshan@redhat.com>
Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Tested-by: Peter Newman <peternewman@google.com>
Tested-by: Zeng Heng <zengheng4@huawei.com>
Tested-by: Punit Agrawal <punit.agrawal@oss.qualcomm.com>
Tested-by: Jesse Chick <jessechick@os.amperecomputing.com>
Reviewed-by: Zeng Heng <zengheng4@huawei.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Co-developed-by: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>

James Morse 87b78a5d 8e06d04f

+12 -7
+12 -7
arch/arm64/kernel/cpufeature.c
··· 86 86 #include <asm/kvm_host.h> 87 87 #include <asm/mmu.h> 88 88 #include <asm/mmu_context.h> 89 + #include <asm/mpam.h> 89 90 #include <asm/mte.h> 90 91 #include <asm/hypervisor.h> 91 92 #include <asm/processor.h> ··· 2493 2492 static void 2494 2493 cpu_enable_mpam(const struct arm64_cpu_capabilities *entry) 2495 2494 { 2496 - /* 2497 - * Access by the kernel (at EL1) should use the reserved PARTID 2498 - * which is configured unrestricted. This avoids priority-inversion 2499 - * where latency sensitive tasks have to wait for a task that has 2500 - * been throttled to release the lock. 2501 - */ 2502 - write_sysreg_s(0, SYS_MPAM1_EL1); 2495 + int cpu = smp_processor_id(); 2496 + u64 regval = 0; 2497 + 2498 + if (IS_ENABLED(CONFIG_ARM64_MPAM) && static_branch_likely(&mpam_enabled)) 2499 + regval = READ_ONCE(per_cpu(arm64_mpam_current, cpu)); 2500 + 2501 + write_sysreg_s(regval | MPAM1_EL1_MPAMEN, SYS_MPAM1_EL1); 2502 + isb(); 2503 + 2504 + /* Synchronising the EL0 write is left until the ERET to EL0 */ 2505 + write_sysreg_s(regval, SYS_MPAM0_EL1); 2503 2506 } 2504 2507 2505 2508 static bool