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drm/rockchip: dw_hdmi: introduce the pclk for grf

For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>

Mark Yao 8814b40b 5e3bc6d1

+19
+1
Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
··· 32 32 I2C master controller. 33 33 - clock-names: See dw_hdmi.txt. The "cec" clock is optional. 34 34 - clock-names: May contain "cec" as defined in dw_hdmi.txt. 35 + - clock-names: May contain "grf", power for grf io. 35 36 - clock-names: May contain "vpll", external clock for some hdmi phy. 36 37 37 38 Example:
+18
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
··· 47 47 struct drm_encoder encoder; 48 48 const struct rockchip_hdmi_chip_data *chip_data; 49 49 struct clk *vpll_clk; 50 + struct clk *grf_clk; 50 51 }; 51 52 52 53 #define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x) ··· 182 181 return PTR_ERR(hdmi->vpll_clk); 183 182 } 184 183 184 + hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf"); 185 + if (PTR_ERR(hdmi->grf_clk) == -ENOENT) { 186 + hdmi->grf_clk = NULL; 187 + } else if (PTR_ERR(hdmi->grf_clk) == -EPROBE_DEFER) { 188 + return -EPROBE_DEFER; 189 + } else if (IS_ERR(hdmi->grf_clk)) { 190 + dev_err(hdmi->dev, "failed to get grf clock\n"); 191 + return PTR_ERR(hdmi->grf_clk); 192 + } 193 + 185 194 ret = clk_prepare_enable(hdmi->vpll_clk); 186 195 if (ret) { 187 196 dev_err(hdmi->dev, "Failed to enable HDMI vpll: %d\n", ret); ··· 257 246 else 258 247 val = hdmi->chip_data->lcdsel_big; 259 248 249 + ret = clk_prepare_enable(hdmi->grf_clk); 250 + if (ret < 0) { 251 + dev_err(hdmi->dev, "failed to enable grfclk %d\n", ret); 252 + return; 253 + } 254 + 260 255 ret = regmap_write(hdmi->regmap, hdmi->chip_data->lcdsel_grf_reg, val); 261 256 if (ret != 0) 262 257 dev_err(hdmi->dev, "Could not write to GRF: %d\n", ret); 263 258 259 + clk_disable_unprepare(hdmi->grf_clk); 264 260 dev_dbg(hdmi->dev, "vop %s output to hdmi\n", 265 261 ret ? "LIT" : "BIG"); 266 262 }