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Merge branch 'net-dsa-b53-mmap-add-bcm63268-gphy-power-control'
Kyle Hendry says:
====================
net: dsa: b53: mmap: Add bcm63268 GPHY power control
The gpio controller on the bcm63268 has a register for
controlling the gigabit phy power. These patches disable
low power mode when enabling the gphy port.
This is based on an earlier patch series here:
https://lore.kernel.org/20250306053105.41677-1-kylehendrydev@gmail.com
I have created a new series since many of the changes
were included in the ephy control patches:
https://lore.kernel.org/20250724035300.20497-1-kylehendrydev@gmail.com
====================
Link: https://patch.msgid.link/20250814002530.5866-1-kylehendrydev@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+31
-4
+31
-4
drivers/net/dsa/b53/b53_mmap.c
+31
-4
drivers/net/dsa/b53/b53_mmap.c
···
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#include "b53_priv.h"
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#define BCM63XX_EPHY_REG 0x3C
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+
#define BCM63268_GPHY_REG 0x54
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+
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#define GPHY_CTRL_LOW_PWR BIT(3)
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#define GPHY_CTRL_IDDQ_BIAS BIT(0)
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struct b53_phy_info {
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u32 gphy_port_mask;
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u32 ephy_enable_mask;
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u32 ephy_port_mask;
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u32 ephy_bias_bit;
···
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static const u32 bcm63268_ephy_offsets[] = {4, 9, 14};
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static const struct b53_phy_info bcm63268_ephy_info = {
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.gphy_port_mask = BIT(3),
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.ephy_enable_mask = GENMASK(4, 0),
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.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm63268_ephy_offsets) - 1), 0),
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.ephy_bias_bit = 24,
···
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return regmap_update_bits(gpio_ctrl, BCM63XX_EPHY_REG, mask, val);
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}
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static int bcm63268_gphy_set(struct b53_device *dev, bool enable)
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{
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struct b53_mmap_priv *priv = dev->priv;
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struct regmap *gpio_ctrl = priv->gpio_ctrl;
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u32 mask = GPHY_CTRL_IDDQ_BIAS | GPHY_CTRL_LOW_PWR;
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u32 val = 0;
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if (!enable)
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val = mask;
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return regmap_update_bits(gpio_ctrl, BCM63268_GPHY_REG, mask, val);
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}
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static void b53_mmap_phy_enable(struct b53_device *dev, int port)
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{
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struct b53_mmap_priv *priv = dev->priv;
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int ret = 0;
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-
if (priv->phy_info && (BIT(port) & priv->phy_info->ephy_port_mask))
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ret = bcm63xx_ephy_set(dev, port, true);
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+
if (priv->phy_info) {
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if (BIT(port) & priv->phy_info->ephy_port_mask)
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ret = bcm63xx_ephy_set(dev, port, true);
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else if (BIT(port) & priv->phy_info->gphy_port_mask)
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ret = bcm63268_gphy_set(dev, true);
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}
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if (!ret)
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priv->phys_enabled |= BIT(port);
···
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struct b53_mmap_priv *priv = dev->priv;
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int ret = 0;
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-
if (priv->phy_info && (BIT(port) & priv->phy_info->ephy_port_mask))
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-
ret = bcm63xx_ephy_set(dev, port, false);
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if (priv->phy_info) {
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if (BIT(port) & priv->phy_info->ephy_port_mask)
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ret = bcm63xx_ephy_set(dev, port, false);
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else if (BIT(port) & priv->phy_info->gphy_port_mask)
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ret = bcm63268_gphy_set(dev, false);
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}
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if (!ret)
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priv->phys_enabled &= ~BIT(port);