Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm: Add driver for Sitronix ST7920 LCD displays
Add a new DRM/KMS driver for displays using the Sitronix ST7920
controller connected via the SPI bus. This provides a standard
framebuffer interface for these common monochrome LCDs.
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Signed-off-by: Iker Pedrosa <ikerpedrosam@gmail.com>
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Link: https://patch.msgid.link/20251215-st7920-v7-2-36771009ec01@gmail.com
authored by
Iker Pedrosa
and committed by
Javier Martinez Canillas
88b09229
549cf05a
+878
+10
drivers/gpu/drm/sitronix/Kconfig
+10
drivers/gpu/drm/sitronix/Kconfig
···
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If M is selected the module will be called st7735r.
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config DRM_ST7920
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tristate "DRM support for Sitronix ST7920 LCD displays"
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depends on DRM && SPI && MMU
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select DRM_GEM_SHMEM_HELPER
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select DRM_KMS_HELPER
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select REGMAP_SPI
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help
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DRM driver for the ST7920 Sitronix LCD controllers.
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If M is selected the module will be called st7920.
+1
drivers/gpu/drm/sitronix/Makefile
+1
drivers/gpu/drm/sitronix/Makefile
+867
drivers/gpu/drm/sitronix/st7920.c
+867
drivers/gpu/drm/sitronix/st7920.c
···
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* DRM driver for Sitronix ST7920 LCD displays
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*
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* Copyright 2025 Iker Pedrosa <ikerpedrosam@gmail.com>
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*
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*/
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+
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#include <linux/bitrev.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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+
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#include <drm/clients/drm_client_setup.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_damage_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fbdev_shmem.h>
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#include <drm/drm_framebuffer.h>
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#include <drm/drm_gem_atomic_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_gem_shmem_helper.h>
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#include <drm/drm_plane.h>
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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+
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#define DRIVER_NAME "sitronix_st7920"
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#define DRIVER_DESC "DRM driver for Sitronix ST7920 LCD displays"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 0
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+
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/* Display organization */
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#define ST7920_PITCH 16
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#define ST7920_SCANLINES 64
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#define BYTES_IN_DISPLAY (ST7920_PITCH * ST7920_SCANLINES)
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#define BYTES_IN_SEGMENT 2
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#define PIXELS_PER_SEGMENT (BYTES_IN_SEGMENT * 8)
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#define ST7920_DEFAULT_WIDTH 128
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#define ST7920_DEFAULT_HEIGHT 64
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+
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/* Sync sequence */
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#define SYNC_BITS 0xF8
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#define RW_HIGH 0x04
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#define RS_HIGH 0x02
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+
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/* Commands */
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#define SET_DISPLAY_ON 0x0C
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#define SET_DISPLAY_OFF 0x08
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#define SET_DISPLAY_CLEAR 0x01
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#define SET_BASIC_INSTRUCTION_SET 0x30
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#define SET_EXT_INSTRUCTION_SET 0x34
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#define SET_GRAPHICS_DISPLAY 0x36
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#define SET_GDRAM_ADDRESS 0x80
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#define SET_GDRAM_DATA 0xFF /* Driver internal command */
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+
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/* Masks */
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#define HIGH_DATA_MASK 0xF0
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#define LOW_DATA_MASK 0x0F
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#define TOP_VERTICAL_ADDRESS 0x80
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#define BOTTOM_VERTICAL_ADDRESS 0x60
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#define TOP_HORIZONTAL_ADDRESS 0x00
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#define BOTTOM_HORIZONTAL_ADDRESS 0x80
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+
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#define CMD_SIZE 35
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+
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struct spi7920_error {
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int errno;
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};
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+
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struct st7920_device {
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struct drm_device drm;
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struct drm_display_mode mode;
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struct drm_plane primary_plane;
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struct drm_crtc crtc;
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struct drm_encoder encoder;
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struct drm_connector connector;
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struct spi_device *spi;
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+
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struct regmap *regmap;
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+
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struct gpio_desc *reset_gpio;
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+
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u32 height;
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u32 width;
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};
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+
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struct st7920_plane_state {
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struct drm_shadow_plane_state base;
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/* Intermediate buffer to convert pixels from XRGB8888 to HW format */
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u8 *buffer;
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};
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+
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struct st7920_crtc_state {
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struct drm_crtc_state base;
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/* Buffer to store pixels in HW format and written to the panel */
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u8 *data_array;
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};
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static inline struct st7920_plane_state *to_st7920_plane_state(struct drm_plane_state *state)
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{
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return container_of(state, struct st7920_plane_state, base.base);
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}
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static inline struct st7920_crtc_state *to_st7920_crtc_state(struct drm_crtc_state *state)
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{
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return container_of(state, struct st7920_crtc_state, base);
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}
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static inline struct st7920_device *drm_to_st7920(struct drm_device *drm)
114
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{
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return container_of(drm, struct st7920_device, drm);
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}
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+
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static int st7920_store_gdram_address(const void *data, u8 *reg)
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{
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const u8 y_addr = *(const u8 *)data;
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bool bottom_screen = (y_addr >= 32);
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int i = 0;
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reg[i++] = SYNC_BITS;
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/* Set vertical address */
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if (!bottom_screen)
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reg[i++] = TOP_VERTICAL_ADDRESS + (*(uint8_t *)data & HIGH_DATA_MASK);
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else
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reg[i++] = BOTTOM_VERTICAL_ADDRESS + (*(uint8_t *)data & HIGH_DATA_MASK);
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+
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reg[i++] = *(uint8_t *)data << 4;
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/* Set horizontal address */
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reg[i++] = SET_GDRAM_ADDRESS;
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if (!bottom_screen)
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reg[i++] = TOP_HORIZONTAL_ADDRESS;
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else
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reg[i++] = BOTTOM_HORIZONTAL_ADDRESS;
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return i;
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}
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static int st7920_store_gdram_data(const void *data, u8 *reg)
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{
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const u8 *line_data = data;
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int i = 0, j = 0;
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+
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reg[i++] = SYNC_BITS | RS_HIGH;
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+
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for (j = 0; j < 16; j++) {
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reg[i++] = line_data[j] & 0xF0;
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reg[i++] = (line_data[j] << 4) & 0xF0;
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}
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return i;
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}
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static int st7920_store_others(int cmd, const void *data, u8 *reg)
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+
{
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int i = 0;
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+
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reg[i++] = SYNC_BITS;
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reg[i++] = cmd & HIGH_DATA_MASK;
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reg[i++] = (cmd & LOW_DATA_MASK) << 4;
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return i;
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}
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+
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static void st7920_spi_write(struct spi_device *spi, int cmd, const void *data,
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int delay_us, struct spi7920_error *err)
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{
171
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u8 reg[CMD_SIZE] = {0};
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int size = 0;
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int ret;
174
+
175
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if (err->errno)
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return;
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+
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/*
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* First the sync bits are sent: 11111WS0.
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* Where W is the read/write (RW) bit and S is the register/data (RS) bit.
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* Then, every 8 bits instruction/data will be separated into 2 groups.
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* Higher 4 bits (DB7~DB4) will be placed in the first section followed by
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* 4 '0's. And lower 4 bits (DB3~DB0) will be placed in the second section
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* followed by 4 '0's.
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*/
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if (cmd == SET_GDRAM_ADDRESS)
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size = st7920_store_gdram_address(data, reg);
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else if (cmd == SET_GDRAM_DATA)
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size = st7920_store_gdram_data(data, reg);
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else
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size = st7920_store_others(cmd, data, reg);
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+
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ret = spi_write(spi, reg, size);
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if (ret) {
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err->errno = ret;
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return;
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}
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if (delay_us)
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udelay(delay_us);
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}
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static const struct regmap_config st7920_spi_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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};
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static const struct of_device_id st7920_of_match[] = {
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/* st7920 family */
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{
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.compatible = "sitronix,st7920",
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, st7920_of_match);
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/*
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* The SPI core always reports a MODALIAS uevent of the form "spi:<dev>", even
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* if the device was registered via OF. This means that the module will not be
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* auto loaded, unless it contains an alias that matches the MODALIAS reported.
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*
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* To workaround this issue, add a SPI device ID table. Even when this should
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* not be needed for this driver to match the registered SPI devices.
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*/
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static const struct spi_device_id st7920_spi_id[] = {
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/* st7920 family */
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{ "st7920", 0 },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(spi, st7920_spi_id);
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+
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static void st7920_power_on(struct st7920_device *st7920,
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struct spi7920_error *err)
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{
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st7920_spi_write(st7920->spi, SET_DISPLAY_ON, NULL, 72, err);
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+
}
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+
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static void st7920_power_off(struct st7920_device *st7920,
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struct spi7920_error *err)
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{
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st7920_spi_write(st7920->spi, SET_DISPLAY_CLEAR, NULL, 1600, err);
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st7920_spi_write(st7920->spi, SET_DISPLAY_OFF, NULL, 72, err);
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}
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+
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static void st7920_hw_reset(struct st7920_device *st7920)
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{
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if (!st7920->reset_gpio)
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return;
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+
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gpiod_set_value_cansleep(st7920->reset_gpio, 1);
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usleep_range(15, 20);
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gpiod_set_value_cansleep(st7920->reset_gpio, 0);
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msleep(40);
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}
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static int st7920_init(struct st7920_device *st7920)
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{
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struct spi7920_error err = {0};
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st7920_spi_write(st7920->spi, SET_BASIC_INSTRUCTION_SET, NULL, 72, &err);
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st7920_power_on(st7920, &err);
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st7920_spi_write(st7920->spi, SET_GRAPHICS_DISPLAY, NULL, 72, &err);
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st7920_spi_write(st7920->spi, SET_DISPLAY_CLEAR, NULL, 1600, &err);
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return err.errno;
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}
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+
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static int st7920_update_rect(struct st7920_device *st7920,
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struct drm_rect *rect, u8 *buf,
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u8 *data_array)
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{
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struct spi7920_error err = {0};
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u32 array_idx = 0;
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int i, j;
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+
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/*
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* The screen is divided in 64(Y)x8(X) segments and each segment is
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* further divided in 2 bytes (D15~D0).
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*
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* Segment 0x0 is in the top-right corner, while segment 63x15 is in the
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* bottom-left. They would be displayed in the screen in the following way:
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* 0x0 0x1 0x2 ... 0x15
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* 1x0 1x1 1x2 ... 1x15
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* ...
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* 63x0 63x1 63x2 ... 63x15
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*
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* The data in each byte is big endian.
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*/
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+
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for (i = 0; i < ST7920_SCANLINES; i++) {
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u8 *line_start = buf + (i * ST7920_PITCH);
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u8 line_buffer[ST7920_PITCH];
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+
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for (j = 0; j < ST7920_PITCH; j++) {
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line_buffer[j] = bitrev8(line_start[j]);
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data_array[array_idx++] = line_buffer[j];
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}
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+
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st7920_spi_write(st7920->spi, SET_GDRAM_ADDRESS, &i, 72, &err);
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st7920_spi_write(st7920->spi, SET_GDRAM_DATA, line_buffer, 72, &err);
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}
302
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return err.errno;
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}
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+
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static void st7920_clear_screen(struct st7920_device *st7920, u8 *data_array)
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{
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struct spi7920_error err = {0};
309
+
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memset(data_array, 0, BYTES_IN_DISPLAY);
311
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st7920_spi_write(st7920->spi, SET_DISPLAY_CLEAR, NULL, 1600, &err);
313
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}
314
+
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static int st7920_fb_blit_rect(struct drm_framebuffer *fb,
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const struct iosys_map *vmap,
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struct drm_rect *rect,
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u8 *buf, u8 *data_array,
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struct drm_format_conv_state *fmtcnv_state)
320
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{
321
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struct st7920_device *st7920 = drm_to_st7920(fb->dev);
322
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struct iosys_map dst;
323
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unsigned int dst_pitch;
324
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int ret;
325
+
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/* Align y to display page boundaries */
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rect->y1 = round_down(rect->y1, PIXELS_PER_SEGMENT);
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rect->y2 = min_t(unsigned int, round_up(rect->y2, PIXELS_PER_SEGMENT), st7920->height);
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+
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dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8);
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+
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iosys_map_set_vaddr(&dst, buf);
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drm_fb_xrgb8888_to_mono(&dst, &dst_pitch, vmap, fb, rect, fmtcnv_state);
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+
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ret = st7920_update_rect(st7920, rect, buf, data_array);
336
+
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return ret;
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+
}
339
+
340
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static int st7920_primary_plane_atomic_check(struct drm_plane *plane,
341
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struct drm_atomic_state *state)
342
+
{
343
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struct drm_device *drm = plane->dev;
344
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struct st7920_device *st7920 = drm_to_st7920(drm);
345
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struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
346
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struct st7920_plane_state *st7920_state = to_st7920_plane_state(plane_state);
347
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struct drm_shadow_plane_state *shadow_plane_state = &st7920_state->base;
348
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struct drm_crtc *crtc = plane_state->crtc;
349
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struct drm_crtc_state *crtc_state = NULL;
350
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const struct drm_format_info *fi;
351
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unsigned int pitch;
352
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int ret;
353
+
354
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if (crtc)
355
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crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
356
+
357
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ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state,
358
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DRM_PLANE_NO_SCALING,
359
+
DRM_PLANE_NO_SCALING,
360
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false, false);
361
+
if (ret)
362
+
return ret;
363
+
else if (!plane_state->visible)
364
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return 0;
365
+
366
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fi = drm_format_info(DRM_FORMAT_R1);
367
+
if (!fi)
368
+
return -EINVAL;
369
+
370
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pitch = drm_format_info_min_pitch(fi, 0, st7920->width);
371
+
372
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if (plane_state->fb->format != fi) {
373
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void *buf;
374
+
375
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/* format conversion necessary; reserve buffer */
376
+
buf = drm_format_conv_state_reserve(&shadow_plane_state->fmtcnv_state,
377
+
pitch, GFP_KERNEL);
378
+
if (!buf)
379
+
return -ENOMEM;
380
+
}
381
+
382
+
st7920_state->buffer = kcalloc(pitch, st7920->height, GFP_KERNEL);
383
+
if (!st7920_state->buffer)
384
+
return -ENOMEM;
385
+
386
+
return 0;
387
+
}
388
+
389
+
static void st7920_primary_plane_atomic_update(struct drm_plane *plane,
390
+
struct drm_atomic_state *state)
391
+
{
392
+
struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
393
+
struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
394
+
struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
395
+
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);
396
+
struct st7920_crtc_state *st7920_crtc_state = to_st7920_crtc_state(crtc_state);
397
+
struct st7920_plane_state *st7920_plane_state = to_st7920_plane_state(plane_state);
398
+
struct drm_framebuffer *fb = plane_state->fb;
399
+
struct drm_atomic_helper_damage_iter iter;
400
+
struct drm_device *drm = plane->dev;
401
+
struct drm_rect dst_clip;
402
+
struct drm_rect damage;
403
+
int idx;
404
+
int ret;
405
+
406
+
if (!drm_dev_enter(drm, &idx))
407
+
return;
408
+
409
+
if (drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE) == 0) {
410
+
drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
411
+
drm_atomic_for_each_plane_damage(&iter, &damage) {
412
+
dst_clip = plane_state->dst;
413
+
414
+
if (!drm_rect_intersect(&dst_clip, &damage))
415
+
continue;
416
+
417
+
ret = st7920_fb_blit_rect(fb, &shadow_plane_state->data[0], &dst_clip,
418
+
st7920_plane_state->buffer,
419
+
st7920_crtc_state->data_array,
420
+
&shadow_plane_state->fmtcnv_state);
421
+
if (ret)
422
+
drm_err_once(plane->dev, "Failed to write to device: %d.\n", ret);
423
+
}
424
+
425
+
drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
426
+
}
427
+
428
+
drm_dev_exit(idx);
429
+
}
430
+
431
+
static void st7920_primary_plane_atomic_disable(struct drm_plane *plane,
432
+
struct drm_atomic_state *state)
433
+
{
434
+
struct drm_device *drm = plane->dev;
435
+
struct st7920_device *st7920 = drm_to_st7920(drm);
436
+
struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
437
+
struct drm_crtc_state *crtc_state;
438
+
struct st7920_crtc_state *st7920_crtc_state;
439
+
int idx;
440
+
441
+
if (!plane_state->crtc)
442
+
return;
443
+
444
+
crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);
445
+
st7920_crtc_state = to_st7920_crtc_state(crtc_state);
446
+
447
+
if (!drm_dev_enter(drm, &idx))
448
+
return;
449
+
450
+
st7920_clear_screen(st7920, st7920_crtc_state->data_array);
451
+
452
+
drm_dev_exit(idx);
453
+
}
454
+
455
+
/* Called during init to allocate the plane's atomic state. */
456
+
static void st7920_primary_plane_reset(struct drm_plane *plane)
457
+
{
458
+
struct st7920_plane_state *st7920_state;
459
+
460
+
drm_WARN_ON_ONCE(plane->dev, plane->state);
461
+
462
+
st7920_state = kzalloc(sizeof(*st7920_state), GFP_KERNEL);
463
+
if (!st7920_state)
464
+
return;
465
+
466
+
__drm_gem_reset_shadow_plane(plane, &st7920_state->base);
467
+
}
468
+
469
+
static struct drm_plane_state *st7920_primary_plane_duplicate_state(struct drm_plane *plane)
470
+
{
471
+
struct drm_shadow_plane_state *new_shadow_plane_state;
472
+
struct st7920_plane_state *st7920_state;
473
+
474
+
if (drm_WARN_ON_ONCE(plane->dev, !plane->state))
475
+
return NULL;
476
+
477
+
st7920_state = kzalloc(sizeof(*st7920_state), GFP_KERNEL);
478
+
if (!st7920_state)
479
+
return NULL;
480
+
481
+
new_shadow_plane_state = &st7920_state->base;
482
+
483
+
__drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state);
484
+
485
+
return &new_shadow_plane_state->base;
486
+
}
487
+
488
+
static void st7920_primary_plane_destroy_state(struct drm_plane *plane,
489
+
struct drm_plane_state *state)
490
+
{
491
+
struct st7920_plane_state *st7920_state = to_st7920_plane_state(state);
492
+
493
+
kfree(st7920_state->buffer);
494
+
495
+
__drm_gem_destroy_shadow_plane_state(&st7920_state->base);
496
+
497
+
kfree(st7920_state);
498
+
}
499
+
500
+
static const struct drm_plane_helper_funcs st7920_primary_plane_helper_funcs = {
501
+
DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
502
+
.atomic_check = st7920_primary_plane_atomic_check,
503
+
.atomic_update = st7920_primary_plane_atomic_update,
504
+
.atomic_disable = st7920_primary_plane_atomic_disable,
505
+
};
506
+
507
+
static const struct drm_plane_funcs st7920_primary_plane_funcs = {
508
+
.update_plane = drm_atomic_helper_update_plane,
509
+
.disable_plane = drm_atomic_helper_disable_plane,
510
+
.reset = st7920_primary_plane_reset,
511
+
.atomic_duplicate_state = st7920_primary_plane_duplicate_state,
512
+
.atomic_destroy_state = st7920_primary_plane_destroy_state,
513
+
.destroy = drm_plane_cleanup,
514
+
};
515
+
516
+
static enum drm_mode_status st7920_crtc_mode_valid(struct drm_crtc *crtc,
517
+
const struct drm_display_mode *mode)
518
+
{
519
+
struct st7920_device *st7920 = drm_to_st7920(crtc->dev);
520
+
521
+
return drm_crtc_helper_mode_valid_fixed(crtc, mode, &st7920->mode);
522
+
}
523
+
524
+
static int st7920_crtc_atomic_check(struct drm_crtc *crtc,
525
+
struct drm_atomic_state *state)
526
+
{
527
+
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
528
+
struct st7920_crtc_state *st7920_state = to_st7920_crtc_state(crtc_state);
529
+
int ret;
530
+
531
+
ret = drm_crtc_helper_atomic_check(crtc, state);
532
+
if (ret)
533
+
return ret;
534
+
535
+
st7920_state->data_array = kmalloc(BYTES_IN_DISPLAY, GFP_KERNEL);
536
+
if (!st7920_state->data_array)
537
+
return -ENOMEM;
538
+
539
+
return 0;
540
+
}
541
+
542
+
static void st7920_crtc_atomic_enable(struct drm_crtc *crtc,
543
+
struct drm_atomic_state *state)
544
+
{
545
+
struct drm_device *drm = crtc->dev;
546
+
struct st7920_device *st7920 = drm_to_st7920(drm);
547
+
int idx;
548
+
int ret;
549
+
550
+
if (!drm_dev_enter(drm, &idx))
551
+
return;
552
+
553
+
st7920_hw_reset(st7920);
554
+
555
+
ret = st7920_init(st7920);
556
+
if (ret)
557
+
drm_err(drm, "Failed to init hardware: %d\n", ret);
558
+
559
+
drm_dev_exit(idx);
560
+
}
561
+
562
+
static void st7920_crtc_atomic_disable(struct drm_crtc *crtc,
563
+
struct drm_atomic_state *state)
564
+
{
565
+
struct spi7920_error err = {0};
566
+
struct drm_device *drm = crtc->dev;
567
+
struct st7920_device *st7920 = drm_to_st7920(drm);
568
+
int idx;
569
+
570
+
drm_dev_enter(drm, &idx);
571
+
572
+
st7920_power_off(st7920, &err);
573
+
574
+
drm_dev_exit(idx);
575
+
}
576
+
577
+
/* Called during init to allocate the CRTC's atomic state. */
578
+
static void st7920_crtc_reset(struct drm_crtc *crtc)
579
+
{
580
+
struct st7920_crtc_state *st7920_state;
581
+
582
+
drm_WARN_ON_ONCE(crtc->dev, crtc->state);
583
+
584
+
st7920_state = kzalloc(sizeof(*st7920_state), GFP_KERNEL);
585
+
if (!st7920_state)
586
+
return;
587
+
588
+
__drm_atomic_helper_crtc_reset(crtc, &st7920_state->base);
589
+
}
590
+
591
+
static struct drm_crtc_state *st7920_crtc_duplicate_state(struct drm_crtc *crtc)
592
+
{
593
+
struct st7920_crtc_state *st7920_state;
594
+
595
+
if (drm_WARN_ON_ONCE(crtc->dev, !crtc->state))
596
+
return NULL;
597
+
598
+
st7920_state = kzalloc(sizeof(*st7920_state), GFP_KERNEL);
599
+
if (!st7920_state)
600
+
return NULL;
601
+
602
+
__drm_atomic_helper_crtc_duplicate_state(crtc, &st7920_state->base);
603
+
604
+
return &st7920_state->base;
605
+
}
606
+
607
+
static void st7920_crtc_destroy_state(struct drm_crtc *crtc,
608
+
struct drm_crtc_state *state)
609
+
{
610
+
struct st7920_crtc_state *st7920_state = to_st7920_crtc_state(state);
611
+
612
+
kfree(st7920_state->data_array);
613
+
614
+
__drm_atomic_helper_crtc_destroy_state(state);
615
+
616
+
kfree(st7920_state);
617
+
}
618
+
619
+
/*
620
+
* The CRTC is always enabled. Screen updates are performed by
621
+
* the primary plane's atomic_update function. Disabling clears
622
+
* the screen in the primary plane's atomic_disable function.
623
+
*/
624
+
static const struct drm_crtc_helper_funcs st7920_crtc_helper_funcs = {
625
+
.mode_valid = st7920_crtc_mode_valid,
626
+
.atomic_check = st7920_crtc_atomic_check,
627
+
.atomic_enable = st7920_crtc_atomic_enable,
628
+
.atomic_disable = st7920_crtc_atomic_disable,
629
+
};
630
+
631
+
static const struct drm_crtc_funcs st7920_crtc_funcs = {
632
+
.reset = st7920_crtc_reset,
633
+
.destroy = drm_crtc_cleanup,
634
+
.set_config = drm_atomic_helper_set_config,
635
+
.page_flip = drm_atomic_helper_page_flip,
636
+
.atomic_duplicate_state = st7920_crtc_duplicate_state,
637
+
.atomic_destroy_state = st7920_crtc_destroy_state,
638
+
};
639
+
640
+
static const struct drm_encoder_funcs st7920_encoder_funcs = {
641
+
.destroy = drm_encoder_cleanup,
642
+
};
643
+
644
+
static int st7920_connector_get_modes(struct drm_connector *connector)
645
+
{
646
+
struct st7920_device *st7920 = drm_to_st7920(connector->dev);
647
+
648
+
return drm_connector_helper_get_modes_fixed(connector, &st7920->mode);
649
+
}
650
+
651
+
static const struct drm_connector_helper_funcs st7920_connector_helper_funcs = {
652
+
.get_modes = st7920_connector_get_modes,
653
+
};
654
+
655
+
static const struct drm_connector_funcs st7920_connector_funcs = {
656
+
.reset = drm_atomic_helper_connector_reset,
657
+
.fill_modes = drm_helper_probe_single_connector_modes,
658
+
.destroy = drm_connector_cleanup,
659
+
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
660
+
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
661
+
};
662
+
663
+
static const struct drm_mode_config_funcs st7920_mode_config_funcs = {
664
+
.fb_create = drm_gem_fb_create_with_dirty,
665
+
.atomic_check = drm_atomic_helper_check,
666
+
.atomic_commit = drm_atomic_helper_commit,
667
+
};
668
+
669
+
static const uint32_t st7920_formats[] = {
670
+
DRM_FORMAT_XRGB8888,
671
+
};
672
+
673
+
DEFINE_DRM_GEM_FOPS(st7920_fops);
674
+
675
+
static const struct drm_driver st7920_drm_driver = {
676
+
DRM_GEM_SHMEM_DRIVER_OPS,
677
+
DRM_FBDEV_SHMEM_DRIVER_OPS,
678
+
.name = DRIVER_NAME,
679
+
.desc = DRIVER_DESC,
680
+
.major = DRIVER_MAJOR,
681
+
.minor = DRIVER_MINOR,
682
+
.driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
683
+
.fops = &st7920_fops,
684
+
};
685
+
686
+
static int st7920_init_modeset(struct st7920_device *st7920)
687
+
{
688
+
struct drm_display_mode *mode = &st7920->mode;
689
+
struct drm_device *drm = &st7920->drm;
690
+
unsigned long max_width, max_height;
691
+
struct drm_plane *primary_plane;
692
+
struct drm_crtc *crtc;
693
+
struct drm_encoder *encoder;
694
+
struct drm_connector *connector;
695
+
int ret;
696
+
697
+
/*
698
+
* Modesetting
699
+
*/
700
+
701
+
ret = drmm_mode_config_init(drm);
702
+
if (ret) {
703
+
drm_err(drm, "DRM mode config init failed: %d\n", ret);
704
+
return ret;
705
+
}
706
+
707
+
mode->type = DRM_MODE_TYPE_DRIVER;
708
+
mode->clock = 30;
709
+
mode->hdisplay = st7920->width;
710
+
mode->htotal = st7920->width;
711
+
mode->hsync_start = st7920->width;
712
+
mode->hsync_end = st7920->width;
713
+
mode->vdisplay = st7920->height;
714
+
mode->vtotal = st7920->height;
715
+
mode->vsync_start = st7920->height;
716
+
mode->vsync_end = st7920->height;
717
+
mode->width_mm = 27;
718
+
mode->height_mm = 27;
719
+
720
+
max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH);
721
+
max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT);
722
+
723
+
drm->mode_config.min_width = mode->hdisplay;
724
+
drm->mode_config.max_width = max_width;
725
+
drm->mode_config.min_height = mode->vdisplay;
726
+
drm->mode_config.max_height = max_height;
727
+
drm->mode_config.preferred_depth = 24;
728
+
drm->mode_config.funcs = &st7920_mode_config_funcs;
729
+
730
+
/* Primary plane */
731
+
732
+
primary_plane = &st7920->primary_plane;
733
+
ret = drm_universal_plane_init(drm, primary_plane, 0, &st7920_primary_plane_funcs,
734
+
st7920_formats, ARRAY_SIZE(st7920_formats),
735
+
NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
736
+
if (ret) {
737
+
drm_err(drm, "DRM primary plane init failed: %d\n", ret);
738
+
return ret;
739
+
}
740
+
741
+
drm_plane_helper_add(primary_plane, &st7920_primary_plane_helper_funcs);
742
+
743
+
drm_plane_enable_fb_damage_clips(primary_plane);
744
+
745
+
/* CRTC */
746
+
747
+
crtc = &st7920->crtc;
748
+
ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
749
+
&st7920_crtc_funcs, NULL);
750
+
if (ret) {
751
+
drm_err(drm, "DRM crtc init failed: %d\n", ret);
752
+
return ret;
753
+
}
754
+
755
+
drm_crtc_helper_add(crtc, &st7920_crtc_helper_funcs);
756
+
757
+
/* Encoder */
758
+
759
+
encoder = &st7920->encoder;
760
+
ret = drm_encoder_init(drm, encoder, &st7920_encoder_funcs,
761
+
DRM_MODE_ENCODER_NONE, NULL);
762
+
if (ret) {
763
+
drm_err(drm, "DRM encoder init failed: %d\n", ret);
764
+
return ret;
765
+
}
766
+
767
+
encoder->possible_crtcs = drm_crtc_mask(crtc);
768
+
769
+
/* Connector */
770
+
771
+
connector = &st7920->connector;
772
+
ret = drm_connector_init(drm, connector, &st7920_connector_funcs,
773
+
DRM_MODE_CONNECTOR_Unknown);
774
+
if (ret) {
775
+
drm_err(drm, "DRM connector init failed: %d\n", ret);
776
+
return ret;
777
+
}
778
+
779
+
drm_connector_helper_add(connector, &st7920_connector_helper_funcs);
780
+
781
+
ret = drm_connector_attach_encoder(connector, encoder);
782
+
if (ret) {
783
+
drm_err(drm, "DRM attach connector to encoder failed: %d\n", ret);
784
+
return ret;
785
+
}
786
+
787
+
drm_mode_config_reset(drm);
788
+
789
+
return 0;
790
+
}
791
+
792
+
static int st7920_probe(struct spi_device *spi)
793
+
{
794
+
struct st7920_device *st7920;
795
+
struct regmap *regmap;
796
+
struct device *dev = &spi->dev;
797
+
struct drm_device *drm;
798
+
int ret;
799
+
800
+
regmap = devm_regmap_init_spi(spi, &st7920_spi_regmap_config);
801
+
if (IS_ERR(regmap))
802
+
return PTR_ERR(regmap);
803
+
804
+
st7920 = devm_drm_dev_alloc(dev, &st7920_drm_driver,
805
+
struct st7920_device, drm);
806
+
if (IS_ERR(st7920))
807
+
return PTR_ERR(st7920);
808
+
809
+
drm = &st7920->drm;
810
+
811
+
st7920->drm.dev = dev;
812
+
st7920->regmap = regmap;
813
+
st7920->spi = spi;
814
+
st7920->width = ST7920_DEFAULT_WIDTH;
815
+
st7920->height = ST7920_DEFAULT_HEIGHT;
816
+
817
+
st7920->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
818
+
if (IS_ERR(st7920->reset_gpio)) {
819
+
ret = PTR_ERR(st7920->reset_gpio);
820
+
return dev_err_probe(dev, ret, "Unable to retrieve reset GPIO\n");
821
+
}
822
+
823
+
spi_set_drvdata(spi, st7920);
824
+
825
+
ret = st7920_init_modeset(st7920);
826
+
if (ret)
827
+
return ret;
828
+
829
+
ret = drm_dev_register(drm, 0);
830
+
if (ret)
831
+
return dev_err_probe(dev, ret, "DRM device register failed\n");
832
+
833
+
drm_client_setup(drm, NULL);
834
+
835
+
return 0;
836
+
}
837
+
838
+
static void st7920_remove(struct spi_device *spi)
839
+
{
840
+
struct st7920_device *st7920 = spi_get_drvdata(spi);
841
+
842
+
drm_dev_unplug(&st7920->drm);
843
+
drm_atomic_helper_shutdown(&st7920->drm);
844
+
}
845
+
846
+
static void st7920_shutdown(struct spi_device *spi)
847
+
{
848
+
struct st7920_device *st7920 = spi_get_drvdata(spi);
849
+
850
+
drm_atomic_helper_shutdown(&st7920->drm);
851
+
}
852
+
853
+
static struct spi_driver st7920_spi_driver = {
854
+
.driver = {
855
+
.name = DRIVER_NAME,
856
+
.of_match_table = st7920_of_match,
857
+
},
858
+
.id_table = st7920_spi_id,
859
+
.probe = st7920_probe,
860
+
.remove = st7920_remove,
861
+
.shutdown = st7920_shutdown,
862
+
};
863
+
module_spi_driver(st7920_spi_driver);
864
+
865
+
MODULE_DESCRIPTION(DRIVER_DESC);
866
+
MODULE_AUTHOR("Iker Pedrosa <ipedrosam@gmail.com>");
867
+
MODULE_LICENSE("GPL");